Issue 1021 (#1026) - LVS match issue on SRAM sample

* First step for solution:

Problem was: the ambiguity resolver was making decisions which later resulted in
a name conflict. Later on, another branch of the backtracking algorithm came
across the same situation but decided based on names, creating an conflict.

First part of the solution is to establish the backtracking information
during ambiguity resolution and using that rather than an alternative branch
later on. This avoids this conflict, but does not favor names as mandated
by the "use_names" flag. This will be the second step of the solution.

* Bugfixed solution (partially)

* Introducing third pass in netlist compare

The second pass is "ambiguity resolution by name" and
is skipped if "consider_net_names" is false. The third
pass then is ignoring the names.

* Bugfix

* Comment fixed, test updates

* Added tests

* Added test data variant for CentOS 8
This commit is contained in:
Matthias Köfferlein 2022-03-15 21:14:32 +01:00 committed by GitHub
parent e9c5782c51
commit 7d78194cf0
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
17 changed files with 9923 additions and 72 deletions

View File

@ -942,13 +942,22 @@ NetlistComparer::compare_circuits (const db::Circuit *c1, const db::Circuit *c2,
RedundantNodeCache redundant_nodes;
redundant_nodes.fill (g1);
// two passes: one without ambiguities, the second one with
// Three passes: one without ambiguities, the second one with ambiguities and names (optional) and a third with ambiguities with topology
for (int pass = 0; pass < 2 && ! good; ++pass) {
for (int pass = 0; pass < 3 && ! good; ++pass) {
if (pass == 1 && m_dont_consider_net_names) {
// skip the named pass in "don't consider net names" mode
continue;
}
if (db::NetlistCompareGlobalOptions::options ()->debug_netcompare) {
if (pass > 0) {
tl::info << "including ambiguous nodes now.";
if (pass == 1) {
tl::info << "including ambiguous nodes now (with names)";
} else {
tl::info << "including ambiguous nodes now (ignoreing names)";
}
}
}
@ -956,7 +965,7 @@ NetlistComparer::compare_circuits (const db::Circuit *c1, const db::Circuit *c2,
compare.max_depth = m_max_depth;
compare.max_n_branch = m_max_n_branch;
compare.depth_first = m_depth_first;
compare.dont_consider_net_names = m_dont_consider_net_names;
compare.dont_consider_net_names = (pass > 1);
compare.with_ambiguous = (pass > 0);
compare.circuit_pin_mapper = &circuit_pin_mapper;
compare.subcircuit_equivalence = &subcircuit_equivalence;

View File

@ -268,6 +268,29 @@ public:
}
}
void clear ()
{
m_to_undo.clear ();
m_to_undo_to_unknown.clear ();
m_to_undo_devices.clear ();
m_to_undo_subcircuits.clear ();
}
void swap (TentativeNodeMapping &other)
{
m_to_undo.swap (other.m_to_undo);
m_to_undo_to_unknown.swap (other.m_to_undo_to_unknown);
m_to_undo_devices.swap (other.m_to_undo_devices);
m_to_undo_subcircuits.swap (other.m_to_undo_subcircuits);
}
std::vector<std::pair<NetGraph *, size_t> > nodes_tracked ()
{
std::vector<std::pair<NetGraph *, size_t> > res = m_to_undo;
res.insert (res.end (), m_to_undo_to_unknown.begin (), m_to_undo_to_unknown.end ());
return res;
}
private:
std::vector<std::pair<NetGraph *, size_t> > m_to_undo, m_to_undo_to_unknown;
std::vector<std::pair<DeviceEquivalenceTracker *, std::pair<const db::Device *, const db::Device *> > > m_to_undo_devices;
@ -804,6 +827,7 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
// sort the ambiguity group such that net names match best
std::vector<std::pair<const NetGraphNode *, const NetGraphNode *> > pairs;
std::list<TentativeNodeMapping> tn_for_pairs;
tl::equivalence_clusters<const NetGraphNode *> equivalent_other_nodes;
sort_node_range_by_best_match (nr);
@ -840,6 +864,7 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
// (Rationale for the latter: passive nets cannot be told apart topologically and are typical for blackbox models.
// So the net name is the only differentiator)
bool use_name = ! dont_consider_net_names || i1->node->net ()->is_passive ();
bool use_topology = dont_consider_net_names || i1->node->net ()->is_passive ();
// in tentative mode, reject this choice if nets are named and all other nets in the ambiguity group differ -> this favors net matching by name
if (use_name && tentative) {
@ -861,6 +886,8 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
}
bool any = false;
bool need_rerun = false;
size_t node_count = 0;
std::vector<std::vector<NodeEdgePair>::const_iterator>::iterator to_remove = iters2.end ();
for (std::vector<std::vector<NodeEdgePair>::const_iterator>::iterator ii2 = iters2.begin (); ii2 != iters2.end (); ++ii2) {
@ -888,13 +915,16 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
}
// utilize net names to propose a match
new_nodes += 1;
if (any) {
pairs.pop_back ();
}
pairs.push_back (std::make_pair (i1->node, i2->node));
to_remove = ii2;
node_count = 1;
any = true;
break;
} else {
} else if (use_topology) {
size_t ni = mp_graph->node_index_for_net (i1->node->net ());
size_t other_ni = mp_other_graph->node_index_for_net (i2->node->net ());
@ -922,9 +952,10 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
} else {
// identified a new pair
new_nodes += bt_count + 1;
node_count = bt_count + 1;
pairs.push_back (std::make_pair (i1->node, i2->node));
to_remove = ii2;
need_rerun = true;
any = true;
// no ambiguity analysis in tentative mode - we can stop now
@ -940,7 +971,9 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
}
if (to_remove != iters2.end ()) {
if (any) {
new_nodes += node_count;
// Add the new pair to the temporary mapping (even in tentative mode)
// Reasoning: doing the mapping may render other nets incompatible, so to ensure "edges_are_compatible" works properly we
@ -954,6 +987,21 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
TentativeNodeMapping::map_pair (&tn_temp, mp_graph, ni, mp_other_graph, other_ni, dm, dm_other, *device_equivalence, scm, scm_other, *subcircuit_equivalence, depth);
if (need_rerun && ! tentative) {
// Re-run the mapping for the selected pair and stash that - this will lock this mapping when investigating other
// branches of the ambiguity resolution tree
if (db::NetlistCompareGlobalOptions::options ()->debug_netcompare || tl::verbosity () >= 40) {
tl::info << indent_s << "finalizing decision (rerun tracking): " << i1->node->net ()->expanded_name () << " vs. " << i2->node->net ()->expanded_name ();
}
tn_for_pairs.push_back (TentativeNodeMapping ());
size_t bt_count = derive_node_identities (ni, depth + 1, complexity * n_branch, &tn_for_pairs.back ());
tl_assert (bt_count != failed_match);
}
// now we can get rid of the node and reduce the "other" list of ambiguous nodes
iters2.erase (to_remove);
@ -1013,6 +1061,61 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
}
// Establish further mappings from the mappings stashed during tentative evaluation
std::vector<std::pair<const NetGraphNode *, const NetGraphNode *> >::const_iterator p = pairs.begin ();
for (std::list<TentativeNodeMapping>::iterator tn_of_pair = tn_for_pairs.begin (); tn_of_pair != tn_for_pairs.end (); ++tn_of_pair, ++p) {
// Note: this would propagate ambiguities to all *derived* mappings. But this probably goes too far:
// bool ambiguous = equivalent_other_nodes.has_attribute (p->second);
// Instead we ignore propagated ambiguitied for now:
bool ambiguous = false;
if (db::NetlistCompareGlobalOptions::options ()->debug_netcompare || tl::verbosity () >= 40) {
tl::info << indent_s << "propagating from deduced match: " << p->first->net ()->expanded_name () << " vs. " << p->second->net ()->expanded_name ();
}
std::vector<std::pair<NetGraph *, size_t> > nn = tn_of_pair->nodes_tracked ();
for (std::vector<std::pair<NetGraph *, size_t> >::const_iterator i = nn.begin (); i != nn.end (); ++i) {
if (i->first != mp_graph) {
continue;
}
NetGraphNode *n = & mp_graph->node (i->second);
size_t other_net_index = n->other_net_index ();
NetGraphNode *n_other = & mp_other_graph->node (other_net_index);
if (db::NetlistCompareGlobalOptions::options ()->debug_netcompare || tl::verbosity () >= 40) {
if (ambiguous) {
tl::info << indent_s << "deduced ambiguous match: " << n->net ()->expanded_name () << " vs. " << n_other->net ()->expanded_name ();
} else {
tl::info << indent_s << "deduced match: " << n->net ()->expanded_name () << " vs. " << n_other->net ()->expanded_name ();
}
}
if (ambiguous) {
if (logger) {
logger->match_ambiguous_nets (n->net (), n_other->net ());
}
for (db::Net::const_pin_iterator i = n->net ()->begin_pins (); i != n->net ()->end_pins (); ++i) {
pa.push_back (i->pin ()->id ());
}
for (db::Net::const_pin_iterator i = n_other->net ()->begin_pins (); i != n_other->net ()->end_pins (); ++i) {
pb.push_back (i->pin ()->id ());
}
} else if (logger) {
logger->match_nets (n->net (), n_other->net ());
}
}
tn_of_pair->clear ();
}
// marks pins on ambiguous nets as swappable
if (! pa.empty ()) {
@ -1022,21 +1125,6 @@ NetlistCompareCore::derive_node_identities_from_ambiguity_group (const NodeRange
circuit_pin_mapper->map_pins (mp_other_graph->circuit (), pb);
}
// And seek further from these pairs
if (depth_first) {
for (std::vector<std::pair<const NetGraphNode *, const NetGraphNode *> >::const_iterator p = pairs.begin (); p != pairs.end (); ++p) {
size_t ni = mp_graph->node_index_for_net (p->first->net ());
size_t bt_count = derive_node_identities (ni, depth + 1, complexity * n_branch, tentative);
tl_assert (bt_count != failed_match);
}
}
} else {
for (std::vector<std::pair<const NetGraphNode *, const NetGraphNode *> >::const_iterator p = pairs.begin (); p != pairs.end (); ++p) {

View File

@ -2634,13 +2634,13 @@ TEST(17_InherentlyAmbiguousDecoder)
"match_nets VSS VSS\n"
"match_nets VDD VDD\n"
"match_nets NQ0 NQ0\n"
"match_ambiguous_nets NQ1 NQ1\n"
"match_ambiguous_nets NQ2 NQ2\n"
"match_nets NQ1 NQ1\n"
"match_nets NQ2 NQ2\n"
"match_nets NQ3 NQ3\n"
"match_nets NA NA\n"
"match_nets NB NB\n"
"match_nets B B\n"
"match_nets A A\n"
"match_nets B B\n"
"match_pins $0 $1\n"
"match_pins $1 $0\n"
"match_pins $2 $2\n"
@ -2692,8 +2692,8 @@ TEST(17_InherentlyAmbiguousDecoder)
"match_nets NQ3 NQ3\n"
"match_nets NA NA\n"
"match_nets NB NB\n"
"match_nets B B\n"
"match_nets A A\n"
"match_nets B B\n"
"match_pins $0 $1\n"
"match_pins $1 $0\n"
"match_pins $2 $2\n"
@ -2903,18 +2903,18 @@ TEST(18_ClockTree)
"match_nets S S\n"
"match_nets SX SX\n"
"match_nets SX SX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXXX SXXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_subcircuits TXXX TXXX\n"
"match_subcircuits TX TX\n"
"match_subcircuits TXXX TXXX\n"
@ -2965,14 +2965,14 @@ TEST(18_ClockTree)
"match_nets S S\n"
"match_ambiguous_nets SX SX\n"
"match_ambiguous_nets SX SX\n"
"match_ambiguous_nets SXX SXX\n"
"match_ambiguous_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXX SXX\n"
"match_ambiguous_nets SXX SXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
@ -3026,18 +3026,18 @@ TEST(18_ClockTree)
"match_nets S S\n"
"match_ambiguous_nets SX SX\n"
"match_ambiguous_nets SX SX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_subcircuits TXXX TXXX\n"
"match_subcircuits TX TX\n"
"match_subcircuits TXXX TXXX\n"
@ -3087,18 +3087,18 @@ TEST(18_ClockTree)
"match_nets S S\n"
"match_ambiguous_nets SX SX\n"
"match_ambiguous_nets SX SX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_nets SXX SXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_ambiguous_nets SXXX SXXX\n"
"match_subcircuits TXXX TXXX\n"
"match_subcircuits TX TX\n"
"match_subcircuits TXXX TXXX\n"
@ -3248,22 +3248,22 @@ TEST(19_SymmetricCircuit)
"match_nets $14 WELL\n"
"match_ambiguous_nets nn2 NN2\n"
"match_ambiguous_nets nn2_ NN2_\n"
"match_ambiguous_nets q0 Q0\n"
"match_ambiguous_nets q1 Q1\n"
"match_nets q0 Q0\n"
"match_nets q1 Q1\n"
"match_nets $11 CS0\n"
"match_nets $13 CS1\n"
"match_nets q0_ Q0_\n"
"match_nets q1_ Q1_\n"
"match_nets a0 A0\n"
"match_nets a0_ A0_\n"
"match_nets $35 HNET44\n"
"match_nets $34 HNET48\n"
"match_nets $4 NET200\n"
"match_nets nn1_ NN1_\n"
"match_nets $9 NET175\n"
"match_nets $6 NET181\n"
"match_nets nn1 NN1\n"
"match_nets $8 NET215\n"
"match_nets $13 CS1\n"
"match_nets q1_ Q1_\n"
"match_nets a0 A0\n"
"match_nets $35 HNET44\n"
"match_nets nn1_ NN1_\n"
"match_nets $9 NET175\n"
"match_nets $4 NET200\n"
"match_nets a0_ A0_\n"
"match_nets $34 HNET48\n"
"match_pins VDD VDD\n"
"match_pins nn1_ NN1_\n"
"match_pins nn1 NN1\n"
@ -3347,20 +3347,20 @@ TEST(19_SymmetricCircuit)
"match_nets VSS VSS\n"
"match_ambiguous_nets nn2 NN2\n"
"match_ambiguous_nets nn2_ NN2_\n"
"match_ambiguous_nets q0 Q0\n"
"match_nets q0_ Q0_\n"
"match_ambiguous_nets q1 Q1\n"
"match_nets q1_ Q1_\n"
"match_nets q0 Q0\n"
"match_nets q1 Q1\n"
"match_nets $11 CS0\n"
"match_nets $13 CS1\n"
"match_nets q0_ Q0_\n"
"match_nets q1_ Q1_\n"
"match_nets a0 A0\n"
"match_nets a0_ A0_\n"
"match_nets $35 HNET44\n"
"match_nets $34 HNET48\n"
"match_nets $4 NET200\n"
"match_nets $6 NET181\n"
"match_nets $8 NET215\n"
"match_nets $9 NET175\n"
"match_nets $35 HNET44\n"
"match_nets $34 HNET48\n"
"match_nets nn1 NN1\n"
"match_nets nn1_ NN1_\n"
"match_pins VDD VDD\n"

View File

@ -30,7 +30,7 @@
#include "lymMacro.h"
#include "tlFileUtils.h"
void run_test (tl::TestBase *_this, const std::string &lvs_rs, const std::string &au_netlist, const std::string &layout, bool priv = false, const std::string &au_lvsdb_name = std::string ())
void run_test (tl::TestBase *_this, const std::string &lvs_rs, const std::string &au_netlist, const std::string &layout, bool priv = false, const std::string &au_lvsdb_name = std::string (), const std::string &added = std::string ())
{
std::string testsrc = priv ? tl::testdata_private () : tl::testdata ();
testsrc = tl::combine_path (testsrc, "lvs");
@ -51,7 +51,8 @@ void run_test (tl::TestBase *_this, const std::string &lvs_rs, const std::string
"$lvs_test_target_lvsdb = '%s'\n"
"$lvs_test_target_cir = '%s'\n"
"$lvs_test_target_l2n = '%s'\n"
, ly, output_lvsdb, output_cir, output_l2n)
"%s"
, ly, output_lvsdb, output_cir, output_l2n, added)
);
config.set_interpreter (lym::Macro::Ruby);
EXPECT_EQ (config.run (), 0);
@ -177,3 +178,21 @@ TEST(21_private)
{
run_test (_this, "test_21.lylvs", "test_21.cir.gz", "test_21.gds.gz", true, "test_21.lvsdb");
}
// issue #1021
TEST(22a_SP6TArray2X4)
{
run_test (_this, "SP6TArray_2X4.lvs", "test_22a.cir", "SP6TArray_2X4.gds", false, "test_22a.lvsdb", "$test22_texts = false\n$test22_deep = false");
}
TEST(22b_SP6TArray2X4)
{
run_test (_this, "SP6TArray_2X4.lvs", "test_22b.cir", "SP6TArray_2X4.gds", false, "test_22b.lvsdb", "$test22_texts = true\n$test22_deep = false");
}
TEST(22c_SP6TArray2X4)
{
run_test (_this, "SP6TArray_2X4.lvs", "test_22c.cir", "SP6TArray_2X4.gds", false, "test_22c.lvsdb", "$test22_texts = false\n$test22_deep = true");
}
TEST(22d_SP6TArray2X4)
{
run_test (_this, "SP6TArray_2X4.lvs", "test_22d.cir", "SP6TArray_2X4.gds", false, "test_22d.lvsdb", "$test22_texts = true\n$test22_deep = true");
}

BIN
testdata/lvs/SP6TArray_2X4.gds vendored Normal file

Binary file not shown.

206
testdata/lvs/SP6TArray_2X4.lvs vendored Normal file
View File

@ -0,0 +1,206 @@
source($lvs_test_source)
report_lvs($lvs_test_target_lvsdb, true)
target_netlist($lvs_test_target_cir, write_spice, "Extracted by KLayout")
schematic("SP6TArray_2X4.spi")
consider_net_names($test22_texts)
if $test22_deep
deep
else
flat
end
# Define layers
nwm = input(64, 20)
nsdm = input(93, 44)
psdm = input(94, 20)
hvi = input(75, 20)
difftap_pin = input(65, 16)
difftap_block = input(100, 10)
difftap = input(65, 20)
poly_pin = input(66, 16)
poly_block = input(100, 20)
poly = input(66, 20)
li_pin = input(67, 16)
li_block = input(100, 40)
li = input(67, 20)
m1_pin = input(68, 16)
m1_block = input(100, 60)
m1 = input(68, 20)
m2_pin = input(69, 16)
m2_block = input(100, 80)
m2 = input(69, 20)
m3_pin = input(70, 16)
m3_block = input(100, 100)
m3 = input(70, 20)
m4_pin = input(71, 16)
m4_block = input(100, 120)
m4 = input(71, 20)
m5_pin = input(72, 16)
m5_block = input(100, 140)
m5 = input(72, 20)
licon_block = input(100, 30)
mcon_block = input(100, 50)
via_block = input(100, 70)
via2_block = input(100, 90)
via3_block = input(100, 110)
via4_block = input(100, 130)
licon = input(66, 44)
mcon = input(67, 44)
via = input(68, 44)
via2 = input(69, 44)
via3 = input(70, 44)
via4 = input(71, 44)
hvtp = input(78, 44)
lvtn = input(125, 44)
pad = input(76, 20)
areaid_diode = input(81, 23)
polyres = input(66, 13)
diffres = input(65, 13)
prBoundary = input(235, 4)
substrate__Sky130 = polygon_layer
difftap__conn = (difftap-(poly+diffres))
difftap__conn__nsdm = (difftap__conn&nsdm&nwm)
difftap__conn__psdm = (difftap__conn&psdm-nwm)
poly__conn = (poly-polyres)
gate__hvmosgate = (difftap&poly__conn&hvi)
gate__mosgate = (difftap&poly__conn-hvi)
gate__mosfet__nfet_01v8 = (gate__mosgate&nsdm)
gate__mosfet__nfet_01v8_lvt = (gate__mosgate&nsdm&lvtn)
gate__mosfet__nfet_g5v0d10v5 = (gate__hvmosgate&nsdm)
gate__mosfet__pfet_01v8 = (gate__mosgate&nwm&psdm)
gate__mosfet__pfet_01v8_hvt = (gate__mosgate&nwm&psdm&hvtp)
gate__mosfet__pfet_01v8_lvt = (gate__mosgate&nwm&psdm&lvtn)
gate__mosfet__pfet_g5v0d10v5 = (gate__hvmosgate&nwm&psdm)
resistor__active_res = (difftap&diffres)
resistor__poly_res = (poly&polyres)
diode__ndiode = (difftap&areaid_diode&nsdm)
diode__pdiode = (difftap&areaid_diode&psdm)
# Connectivity
connect_global(substrate__Sky130, "vss")
# connect(difftap,difftap.pin)
connect(difftap__conn, difftap_pin)
# connect(difftap__conn,difftap__conn:nsdm)
connect(difftap__conn, difftap__conn__nsdm)
# connect(difftap__conn:nsdm,nwm)
connect(difftap__conn__nsdm, nwm)
# connect(difftap__conn,difftap__conn:psdm)
connect(difftap__conn, difftap__conn__psdm)
# connect(difftap__conn:psdm,substrate:Sky130)
connect_global(difftap__conn__psdm, "vss")
# connect(poly,poly.pin)
connect(poly, poly_pin)
# connect(li,li.pin)
connect(li, li_pin)
# connect(m1,m1.pin)
connect(m1, m1_pin)
# connect(m2,m2.pin)
connect(m2, m2_pin)
# connect(m3,m3.pin)
connect(m3, m3_pin)
# connect(m4,m4.pin)
connect(m4, m4_pin)
# connect(m5,m5.pin)
connect(m5, m5_pin)
# connect((difftap__conn,poly__conn),licon)
connect(difftap__conn, licon)
connect(poly__conn, licon)
# connect(licon,li)
connect(licon, li)
# connect(li,mcon)
connect(li, mcon)
# connect(mcon,m1)
connect(mcon, m1)
# connect(m1,via)
connect(m1, via)
# connect(via,m2)
connect(via, m2)
# connect(m2,via2)
connect(m2, via2)
# connect(via2,m3)
connect(via2, m3)
# connect(m3,via3)
connect(m3, via3)
# connect(via3,m4)
connect(via3, m4)
# connect(m4,via4)
connect(m4, via4)
# connect(via4,m5)
connect(via4, m5)
connect_implicit("vss*")
connect_implicit("vcc*")
connect_implicit("vdd*")
connect_implicit("SP6TArray_2X1", "vdd")
# Resistors
# active_res
extract_devices(resistor("active_res", 200.0), {
"R" => resistor__active_res, "C" => difftap__conn,
})
same_device_classes("active_res", "RES")
# poly_res
extract_devices(resistor("poly_res", 300.0), {
"R" => resistor__poly_res, "C" => poly__conn,
})
same_device_classes("poly_res", "RES")
# Diodes
# ndiode
extract_devices(diode("sky130_fd_pr__diode_pw2nd_05v5"), {
"P" => substrate__Sky130, "N" => diode__ndiode, "tC" => difftap__conn
})
# pdiode
extract_devices(diode("sky130_fd_pr__diode_pd2nw_05v5"), {
"P" => diode__pdiode, "N" => nwm, "tA" => difftap__conn
})
# Transistors
# nfet_01v8
cheat("SP6TCell") do
extract_devices(mos4("sky130_fd_pr__nfet_01v8__model"), {
"SD" => difftap__conn, "G" => gate__mosfet__nfet_01v8, "tG" => poly__conn, "W" => substrate__Sky130,
})
end
# nfet_01v8_lvt
extract_devices(mos4("sky130_fd_pr__nfet_01v8_lvt__model"), {
"SD" => difftap__conn, "G" => gate__mosfet__nfet_01v8_lvt, "tG" => poly__conn, "W" => substrate__Sky130,
})
# nfet_g5v0d10v5
extract_devices(mos4("sky130_fd_pr__nfet_g5v0d10v5__model"), {
"SD" => difftap__conn, "G" => gate__mosfet__nfet_g5v0d10v5, "tG" => poly__conn, "W" => substrate__Sky130,
})
# pfet_01v8
cheat("SP6TCell") do
extract_devices(mos4("sky130_fd_pr__pfet_01v8__model"), {
"SD" => difftap__conn, "G" => gate__mosfet__pfet_01v8, "tG" => poly__conn, "W" => nwm,
})
end
# pfet_01v8_hvt
extract_devices(mos4("sky130_fd_pr__pfet_01v8_hvt__model"), {
"SD" => difftap__conn, "G" => gate__mosfet__pfet_01v8_hvt, "tG" => poly__conn, "W" => nwm,
})
# pfet_01v8_lvt
extract_devices(mos4("sky130_fd_pr__pfet_01v8_lvt__model"), {
"SD" => difftap__conn, "G" => gate__mosfet__pfet_01v8_lvt, "tG" => poly__conn, "W" => nwm,
})
# pfet_g5v0d10v5
extract_devices(mos4("sky130_fd_pr__pfet_g5v0d10v5__model"), {
"SD" => difftap__conn, "G" => gate__mosfet__pfet_g5v0d10v5, "tG" => poly__conn, "W" => nwm,
})
netlist
align
ok = compare
if ok then
print("LVS OK\n")
else
abort "LVS Failed!"
end

25
testdata/lvs/SP6TArray_2X4.spi vendored Normal file
View File

@ -0,0 +1,25 @@
* SP6TArray_2X4
* SP6TCell
.subckt SP6TCell vdd vss wl bl bl_n
Mpu1 vdd bit_n bit vdd sky130_fd_pr__pfet_01v8__model l=0.15um w=0.42um
Mpu2 bit_n bit vdd vdd sky130_fd_pr__pfet_01v8__model l=0.15um w=0.42um
Mpd1 vss bit_n bit vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
Mpd2 bit_n bit vss vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
Mpg1 bl wl bit vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
Mpg2 bl_n wl bit_n vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
.ends SP6TCell
* SP6TArray_2X1
.subckt SP6TArray_2X1 vss vdd wl[0] wl[1] bl[0] bl_n[0]
Xinst0x0 vdd vss wl[0] bl[0] bl_n[0] SP6TCell
Xinst1x0 vdd vss wl[1] bl[0] bl_n[0] SP6TCell
.ends SP6TArray_2X1
* SP6TArray_2X2
.subckt SP6TArray_2X2 vss vdd wl[0] wl[1] bl[0] bl_n[0] bl[1] bl_n[1]
Xinst0x0 vss vdd wl[0] wl[1] bl[0] bl_n[0] SP6TArray_2X1
Xinst0x1 vss vdd wl[0] wl[1] bl[1] bl_n[1] SP6TArray_2X1
.ends SP6TArray_2X2
* SP6TArray_2X4
.subckt SP6TArray_2X4 vss vdd wl[0] wl[1] bl[0] bl_n[0] bl[1] bl_n[1] bl[2] bl_n[2] bl[3] bl_n[3]
Xinst0x0 vss vdd wl[0] wl[1] bl[0] bl_n[0] bl[1] bl_n[1] SP6TArray_2X2
Xinst0x1 vss vdd wl[0] wl[1] bl[2] bl_n[2] bl[3] bl_n[3] SP6TArray_2X2
.ends SP6TArray_2X4

161
testdata/lvs/test_22a.cir vendored Normal file
View File

@ -0,0 +1,161 @@
* Extracted by KLayout
* cell SP6TArray_2X4
.SUBCKT SP6TArray_2X4
* net 1 vdd
* net 2 bl[0]
* net 3 bl_n[0]
* net 4 bl[1]
* net 5 bl_n[1]
* net 6 bl[2]
* net 7 bl_n[2]
* net 8 bl[3]
* net 9 bl_n[3]
* net 26 wl[0]
* net 31 wl[1]
* net 52 vss
* device instance $1 r0 *1 0.215,1.935 sky130_fd_pr__nfet_01v8__model
M$1 52 11 12 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.18165P PS=1.37U PD=1.285U
* device instance $2 r0 *1 0.605,2.56 sky130_fd_pr__nfet_01v8__model
M$2 12 26 2 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $3 r0 *1 0.605,2.99 sky130_fd_pr__nfet_01v8__model
M$3 2 31 32 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $4 r0 *1 0.215,3.615 sky130_fd_pr__nfet_01v8__model
M$4 32 34 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $5 r0 *1 1.965,1.935 sky130_fd_pr__nfet_01v8__model
M$5 11 12 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $6 r0 *1 2.395,1.935 sky130_fd_pr__nfet_01v8__model
M$6 52 15 16 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $7 r0 *1 1.575,2.56 sky130_fd_pr__nfet_01v8__model
M$7 11 26 3 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $8 r0 *1 2.785,2.56 sky130_fd_pr__nfet_01v8__model
M$8 16 26 4 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $9 r0 *1 1.575,2.99 sky130_fd_pr__nfet_01v8__model
M$9 3 31 34 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $10 r0 *1 2.785,2.99 sky130_fd_pr__nfet_01v8__model
M$10 4 31 35 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $11 r0 *1 1.965,3.615 sky130_fd_pr__nfet_01v8__model
M$11 34 32 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $12 r0 *1 2.395,3.615 sky130_fd_pr__nfet_01v8__model
M$12 35 37 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $13 r0 *1 4.145,1.935 sky130_fd_pr__nfet_01v8__model
M$13 15 16 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $14 r0 *1 4.575,1.935 sky130_fd_pr__nfet_01v8__model
M$14 52 19 20 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $15 r0 *1 3.755,2.56 sky130_fd_pr__nfet_01v8__model
M$15 15 26 5 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $16 r0 *1 4.965,2.56 sky130_fd_pr__nfet_01v8__model
M$16 20 26 6 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $17 r0 *1 3.755,2.99 sky130_fd_pr__nfet_01v8__model
M$17 5 31 37 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $18 r0 *1 4.965,2.99 sky130_fd_pr__nfet_01v8__model
M$18 6 31 38 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $19 r0 *1 4.145,3.615 sky130_fd_pr__nfet_01v8__model
M$19 37 35 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $20 r0 *1 4.575,3.615 sky130_fd_pr__nfet_01v8__model
M$20 38 40 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $21 r0 *1 6.325,1.935 sky130_fd_pr__nfet_01v8__model
M$21 19 20 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $22 r0 *1 6.755,1.935 sky130_fd_pr__nfet_01v8__model
M$22 52 23 24 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $23 r0 *1 5.935,2.56 sky130_fd_pr__nfet_01v8__model
M$23 19 26 7 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $24 r0 *1 7.145,2.56 sky130_fd_pr__nfet_01v8__model
M$24 24 26 8 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $25 r0 *1 5.935,2.99 sky130_fd_pr__nfet_01v8__model
M$25 7 31 40 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $26 r0 *1 7.145,2.99 sky130_fd_pr__nfet_01v8__model
M$26 8 31 41 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $27 r0 *1 6.325,3.615 sky130_fd_pr__nfet_01v8__model
M$27 40 38 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $28 r0 *1 6.755,3.615 sky130_fd_pr__nfet_01v8__model
M$28 41 50 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $29 r0 *1 8.505,1.935 sky130_fd_pr__nfet_01v8__model
M$29 23 24 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $30 r0 *1 8.115,2.56 sky130_fd_pr__nfet_01v8__model
M$30 23 26 9 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $31 r0 *1 8.115,2.99 sky130_fd_pr__nfet_01v8__model
M$31 9 31 50 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $32 r0 *1 8.505,3.615 sky130_fd_pr__nfet_01v8__model
M$32 50 41 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $33 r0 *1 0.215,0.605 sky130_fd_pr__pfet_01v8__model
M$33 1 11 12 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.1869P PS=1.37U PD=1.73U
* device instance $34 r0 *1 1.965,0.605 sky130_fd_pr__pfet_01v8__model
M$34 11 12 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $35 r0 *1 2.395,0.605 sky130_fd_pr__pfet_01v8__model
M$35 1 15 16 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $36 r0 *1 4.145,0.605 sky130_fd_pr__pfet_01v8__model
M$36 15 16 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $37 r0 *1 4.575,0.605 sky130_fd_pr__pfet_01v8__model
M$37 1 19 20 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $38 r0 *1 6.325,0.605 sky130_fd_pr__pfet_01v8__model
M$38 19 20 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $39 r0 *1 6.755,0.605 sky130_fd_pr__pfet_01v8__model
M$39 1 23 24 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $40 r0 *1 8.505,0.605 sky130_fd_pr__pfet_01v8__model
M$40 23 24 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.1113P PS=1.73U PD=1.37U
* device instance $41 r0 *1 0.215,4.945 sky130_fd_pr__pfet_01v8__model
M$41 1 34 32 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.1869P PS=1.37U PD=1.73U
* device instance $42 r0 *1 1.965,4.945 sky130_fd_pr__pfet_01v8__model
M$42 34 32 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $43 r0 *1 2.395,4.945 sky130_fd_pr__pfet_01v8__model
M$43 1 37 35 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $44 r0 *1 4.145,4.945 sky130_fd_pr__pfet_01v8__model
M$44 37 35 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $45 r0 *1 4.575,4.945 sky130_fd_pr__pfet_01v8__model
M$45 1 40 38 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $46 r0 *1 6.325,4.945 sky130_fd_pr__pfet_01v8__model
M$46 40 38 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $47 r0 *1 6.755,4.945 sky130_fd_pr__pfet_01v8__model
M$47 1 50 41 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $48 r0 *1 8.505,4.945 sky130_fd_pr__pfet_01v8__model
M$48 50 41 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.1113P PS=1.73U PD=1.37U
.ENDS SP6TArray_2X4

2590
testdata/lvs/test_22a.lvsdb vendored Normal file

File diff suppressed because it is too large Load Diff

161
testdata/lvs/test_22b.cir vendored Normal file
View File

@ -0,0 +1,161 @@
* Extracted by KLayout
* cell SP6TArray_2X4
.SUBCKT SP6TArray_2X4
* net 1 vdd
* net 2 bl[0]
* net 3 bl_n[0]
* net 4 bl[1]
* net 5 bl_n[1]
* net 6 bl[2]
* net 7 bl_n[2]
* net 8 bl[3]
* net 9 bl_n[3]
* net 26 wl[0]
* net 31 wl[1]
* net 52 vss
* device instance $1 r0 *1 0.215,1.935 sky130_fd_pr__nfet_01v8__model
M$1 52 11 12 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.18165P PS=1.37U PD=1.285U
* device instance $2 r0 *1 0.605,2.56 sky130_fd_pr__nfet_01v8__model
M$2 12 26 2 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $3 r0 *1 0.605,2.99 sky130_fd_pr__nfet_01v8__model
M$3 2 31 32 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $4 r0 *1 0.215,3.615 sky130_fd_pr__nfet_01v8__model
M$4 32 34 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $5 r0 *1 1.965,1.935 sky130_fd_pr__nfet_01v8__model
M$5 11 12 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $6 r0 *1 2.395,1.935 sky130_fd_pr__nfet_01v8__model
M$6 52 15 16 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $7 r0 *1 1.575,2.56 sky130_fd_pr__nfet_01v8__model
M$7 11 26 3 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $8 r0 *1 2.785,2.56 sky130_fd_pr__nfet_01v8__model
M$8 16 26 4 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $9 r0 *1 1.575,2.99 sky130_fd_pr__nfet_01v8__model
M$9 3 31 34 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $10 r0 *1 2.785,2.99 sky130_fd_pr__nfet_01v8__model
M$10 4 31 35 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $11 r0 *1 1.965,3.615 sky130_fd_pr__nfet_01v8__model
M$11 34 32 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $12 r0 *1 2.395,3.615 sky130_fd_pr__nfet_01v8__model
M$12 35 37 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $13 r0 *1 4.145,1.935 sky130_fd_pr__nfet_01v8__model
M$13 15 16 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $14 r0 *1 4.575,1.935 sky130_fd_pr__nfet_01v8__model
M$14 52 19 20 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $15 r0 *1 3.755,2.56 sky130_fd_pr__nfet_01v8__model
M$15 15 26 5 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $16 r0 *1 4.965,2.56 sky130_fd_pr__nfet_01v8__model
M$16 20 26 6 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $17 r0 *1 3.755,2.99 sky130_fd_pr__nfet_01v8__model
M$17 5 31 37 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $18 r0 *1 4.965,2.99 sky130_fd_pr__nfet_01v8__model
M$18 6 31 38 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $19 r0 *1 4.145,3.615 sky130_fd_pr__nfet_01v8__model
M$19 37 35 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $20 r0 *1 4.575,3.615 sky130_fd_pr__nfet_01v8__model
M$20 38 40 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $21 r0 *1 6.325,1.935 sky130_fd_pr__nfet_01v8__model
M$21 19 20 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $22 r0 *1 6.755,1.935 sky130_fd_pr__nfet_01v8__model
M$22 52 23 24 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $23 r0 *1 5.935,2.56 sky130_fd_pr__nfet_01v8__model
M$23 19 26 7 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $24 r0 *1 7.145,2.56 sky130_fd_pr__nfet_01v8__model
M$24 24 26 8 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $25 r0 *1 5.935,2.99 sky130_fd_pr__nfet_01v8__model
M$25 7 31 40 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $26 r0 *1 7.145,2.99 sky130_fd_pr__nfet_01v8__model
M$26 8 31 41 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $27 r0 *1 6.325,3.615 sky130_fd_pr__nfet_01v8__model
M$27 40 38 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $28 r0 *1 6.755,3.615 sky130_fd_pr__nfet_01v8__model
M$28 41 50 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $29 r0 *1 8.505,1.935 sky130_fd_pr__nfet_01v8__model
M$29 23 24 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $30 r0 *1 8.115,2.56 sky130_fd_pr__nfet_01v8__model
M$30 23 26 9 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.0588P PS=1.285U PD=0.7U
* device instance $31 r0 *1 8.115,2.99 sky130_fd_pr__nfet_01v8__model
M$31 9 31 50 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.18165P PS=0.7U PD=1.285U
* device instance $32 r0 *1 8.505,3.615 sky130_fd_pr__nfet_01v8__model
M$32 50 41 52 52 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $33 r0 *1 0.215,0.605 sky130_fd_pr__pfet_01v8__model
M$33 1 11 12 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.1869P PS=1.37U PD=1.73U
* device instance $34 r0 *1 1.965,0.605 sky130_fd_pr__pfet_01v8__model
M$34 11 12 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $35 r0 *1 2.395,0.605 sky130_fd_pr__pfet_01v8__model
M$35 1 15 16 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $36 r0 *1 4.145,0.605 sky130_fd_pr__pfet_01v8__model
M$36 15 16 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $37 r0 *1 4.575,0.605 sky130_fd_pr__pfet_01v8__model
M$37 1 19 20 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $38 r0 *1 6.325,0.605 sky130_fd_pr__pfet_01v8__model
M$38 19 20 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $39 r0 *1 6.755,0.605 sky130_fd_pr__pfet_01v8__model
M$39 1 23 24 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $40 r0 *1 8.505,0.605 sky130_fd_pr__pfet_01v8__model
M$40 23 24 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.1113P PS=1.73U PD=1.37U
* device instance $41 r0 *1 0.215,4.945 sky130_fd_pr__pfet_01v8__model
M$41 1 34 32 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.1869P PS=1.37U PD=1.73U
* device instance $42 r0 *1 1.965,4.945 sky130_fd_pr__pfet_01v8__model
M$42 34 32 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $43 r0 *1 2.395,4.945 sky130_fd_pr__pfet_01v8__model
M$43 1 37 35 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $44 r0 *1 4.145,4.945 sky130_fd_pr__pfet_01v8__model
M$44 37 35 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $45 r0 *1 4.575,4.945 sky130_fd_pr__pfet_01v8__model
M$45 1 40 38 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $46 r0 *1 6.325,4.945 sky130_fd_pr__pfet_01v8__model
M$46 40 38 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.0588P PS=1.73U PD=0.7U
* device instance $47 r0 *1 6.755,4.945 sky130_fd_pr__pfet_01v8__model
M$47 1 50 41 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.0588P
+ AD=0.1869P PS=0.7U PD=1.73U
* device instance $48 r0 *1 8.505,4.945 sky130_fd_pr__pfet_01v8__model
M$48 50 41 1 1 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.1113P PS=1.73U PD=1.37U
.ENDS SP6TArray_2X4

2590
testdata/lvs/test_22b.lvsdb vendored Normal file

File diff suppressed because it is too large Load Diff

97
testdata/lvs/test_22c.cir vendored Normal file
View File

@ -0,0 +1,97 @@
* Extracted by KLayout
* cell SP6TArray_2X4
.SUBCKT SP6TArray_2X4
* net 1 bl[0]
* net 2 bl_n[0]
* net 3 bl[1]
* net 4 bl_n[1]
* net 5 bl[2]
* net 6 bl_n[2]
* net 7 bl[3]
* net 8 bl_n[3]
* net 9 vdd
* net 10 wl[0]
* net 11 wl[1]
* net 12 vss
* cell instance $1 r0 *1 0,0
X$1 1 2 3 4 9 10 11 12 SP6TArray_2X2
* cell instance $2 r0 *1 4.36,0
X$2 5 6 7 8 9 10 11 12 SP6TArray_2X2
.ENDS SP6TArray_2X4
* cell SP6TArray_2X2
* pin bl[0]
* pin bl_n[0]
* pin bl[1]
* pin bl_n[1]
* pin vdd
* pin wl[0]
* pin wl[1]
* pin vss
.SUBCKT SP6TArray_2X2 1 2 3 4 5 6 7 8
* net 1 bl[0]
* net 2 bl_n[0]
* net 3 bl[1]
* net 4 bl_n[1]
* net 5 vdd
* net 6 wl[0]
* net 7 wl[1]
* net 8 vss
* cell instance $1 r0 *1 0,0
X$1 1 2 5 6 7 8 SP6TArray_2X1
* cell instance $2 r0 *1 2.18,0
X$2 3 4 5 6 7 8 SP6TArray_2X1
.ENDS SP6TArray_2X2
* cell SP6TArray_2X1
* pin bl[0]
* pin bl_n[0]
* pin vdd
* pin wl[0]
* pin wl[1]
* pin vss
.SUBCKT SP6TArray_2X1 1 2 3 4 5 6
* net 1 bl[0]
* net 2 bl_n[0]
* net 3 vdd
* net 4 wl[0]
* net 5 wl[1]
* net 6 vss
* cell instance $1 r0 *1 0,2.775
X$1 3 5 1 2 6 SP6TCell
* cell instance $2 m0 *1 0,2.775
X$2 3 4 1 2 6 SP6TCell
.ENDS SP6TArray_2X1
* cell SP6TCell
* pin vdd
* pin wl
* pin bl
* pin bl_n
* pin vss
.SUBCKT SP6TCell 5 6 7 8 10
* net 5 vdd
* net 6 wl
* net 7 bl
* net 8 bl_n
* net 10 vss
* device instance $1 r0 *1 1.575,0.215 sky130_fd_pr__nfet_01v8__model
M$1 8 6 4 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.18165P PS=1.37U PD=1.285U
* device instance $2 r0 *1 1.965,0.84 sky130_fd_pr__nfet_01v8__model
M$2 4 3 10 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $3 r0 *1 0.605,0.215 sky130_fd_pr__nfet_01v8__model
M$3 7 6 3 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.18165P PS=1.37U PD=1.285U
* device instance $4 r0 *1 0.215,0.84 sky130_fd_pr__nfet_01v8__model
M$4 3 4 10 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $5 r0 *1 1.965,2.17 sky130_fd_pr__pfet_01v8__model
M$5 4 3 5 5 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.1113P PS=1.73U PD=1.37U
* device instance $6 r0 *1 0.215,2.17 sky130_fd_pr__pfet_01v8__model
M$6 5 4 3 5 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.1869P PS=1.37U PD=1.73U
.ENDS SP6TCell

952
testdata/lvs/test_22c.lvsdb.1 vendored Normal file
View File

@ -0,0 +1,952 @@
#%lvsdb-klayout
# Layout
layout(
top(SP6TArray_2X4)
unit(0.001)
# Layer section
# This section lists the mask layers (drawing or derived) and their connections.
# Mask layers
layer(l5 '64/20')
layer(l3)
layer(l8)
layer(l7 '66/20')
layer(l10)
layer(l9 '67/20')
layer(l12 '68/16')
layer(l11 '68/20')
layer(l14 '69/16')
layer(l13 '69/20')
layer(l16)
layer(l15)
layer(l18)
layer(l17)
layer(l20)
layer(l19)
layer(l21 '66/44')
layer(l23 '67/44')
layer(l24 '68/44')
layer(l25)
layer(l26)
layer(l27)
layer(l1)
layer(l2)
layer(l4)
layer(l6)
layer(l22)
# Mask layer connectivity
connect(l5 l5 l4)
connect(l3 l3 l2)
connect(l8 l8 l7)
connect(l7 l8 l7)
connect(l10 l10 l9)
connect(l9 l10 l9 l21 l23)
connect(l12 l12 l11)
connect(l11 l12 l11 l23 l24)
connect(l14 l14 l13)
connect(l13 l14 l13 l24 l25)
connect(l16 l16 l15)
connect(l15 l16 l15 l25 l26)
connect(l18 l18 l17)
connect(l17 l18 l17 l26 l27)
connect(l20 l20 l19)
connect(l19 l20 l19 l27)
connect(l21 l9 l21 l2 l22)
connect(l23 l9 l11 l23)
connect(l24 l11 l13 l24)
connect(l25 l13 l15 l25)
connect(l26 l15 l17 l26)
connect(l27 l17 l19 l27)
connect(l1 l1)
connect(l2 l3 l21 l2 l4 l6)
connect(l4 l5 l2 l4)
connect(l6 l2 l6)
connect(l22 l21 l22)
# Global nets and connectivity
global(l1 vss)
global(l6 vss)
# Device class section
class(active_res RES)
class(poly_res RES)
class(sky130_fd_pr__diode_pw2nd_05v5 DIODE)
class(sky130_fd_pr__diode_pd2nw_05v5 DIODE)
class(sky130_fd_pr__nfet_01v8__model MOS4)
class(sky130_fd_pr__nfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__nfet_g5v0d10v5__model MOS4)
class(sky130_fd_pr__pfet_01v8__model MOS4)
class(sky130_fd_pr__pfet_01v8_hvt__model MOS4)
class(sky130_fd_pr__pfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__pfet_g5v0d10v5__model MOS4)
# Device abstracts section
# Device abstracts list the pin shapes of the devices.
device(D$sky130_fd_pr__nfet_01v8__model sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$1 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (-600 -550) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$2 sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$3 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (180 -550) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (-340 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-520 -210) (445 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model$1 sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-340 -210) (265 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (445 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCell
# Circuit boundary
rect((-385 -485) (2950 3565))
# Nets with their geometries
net(1
rect(l7 (1890 500) (150 2010))
rect(l7 (-1100 -1320) (950 150))
rect(l7 (-1280 -150) (330 270))
)
net(2
rect(l7 (1240 1550) (330 270))
rect(l7 (-1280 -150) (950 150))
rect(l7 (-1100 -1320) (150 2010))
)
net(3
polygon(l9 (525 760) (0 1570) (170 0) (0 -920) (245 0) (0 -170) (-245 0) (0 -480))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-5 -1010) (170 170))
polygon(l2 (-465 -1120) (0 340) (-105 0) (0 420) (525 0) (0 -760))
rect(l2 (-525 1670) (445 420))
rect(l22 (-125 -1190) (330 270))
rect(l22 (950 -960) (150 2010))
rect(l22 (-1100 -1320) (950 150))
)
net(4
polygon(l9 (1485 760) (0 840) (-245 0) (0 170) (245 0) (0 560) (170 0) (0 -1570))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-335 -650) (170 170))
polygon(l2 (-125 -1480) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
rect(l2 (-340 1670) (445 420))
rect(l22 (-650 -830) (330 270))
rect(l22 (-1280 -150) (950 150))
rect(l22 (-1100 -1320) (150 2010))
)
net(5 name(vdd)
rect(l5 (-385 1780) (2950 1300))
rect(l9 (-2650 -1075) (170 685))
rect(l9 (-250 0) (2510 170))
rect(l9 (-250 -855) (170 685))
rect(l11 (-2395 -75) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l21 (2010 435) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l23 (-2350 435) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-2460 -200) (2590 250))
rect(l2 (-2510 -940) (265 420))
rect(l2 (1900 -420) (265 420))
rect(l4 (-2510 270) (2590 250))
)
net(6 name(wl)
rect(l9 (1005 140) (170 500))
polygon(l11 (-200 -230) (0 290) (-15 0) (0 320) (260 0) (0 -320) (-15 0) (0 -290))
rect(l14 (-1205 320) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
rect(l21 (-1175 -770) (170 170))
rect(l23 (-170 80) (170 170))
rect(l24 (-160 145) (150 150))
polygon(l22 (-900 -795) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(7 name(bl)
polygon(l9 (520 -165) (0 80) (-60 0) (0 170) (60 0) (0 80) (170 0) (0 -330))
rect(l12 (-260 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-140 -2860) (170 170))
rect(l23 (-230 -170) (170 170))
rect(l2 (-235 -210) (420 265))
)
net(8 name(bl_n)
polygon(l9 (1490 -165) (0 330) (170 0) (0 -80) (60 0) (0 -170) (-60 0) (0 -80))
rect(l12 (-140 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-260 -2860) (170 170))
rect(l23 (-110 -170) (170 170))
rect(l2 (-355 -210) (420 265))
)
net(9
polygon(l7 (265 140) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(10 name(vss)
rect(l9 (-85 -165) (170 1170))
rect(l9 (2010 -1170) (170 1170))
rect(l11 (-2395 -1165) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 670) (170 170))
rect(l21 (2010 -170) (170 170))
rect(l21 (-170 -1010) (170 170))
rect(l23 (-2350 -170) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-215 555) (265 420))
rect(l2 (-2430 -1410) (250 720))
rect(l2 (-250 270) (265 420))
rect(l2 (1915 -1410) (250 720))
rect(l6 (-2430 -720) (250 720))
rect(l6 (1930 -720) (250 720))
)
# Outgoing pins and their connections to nets
pin(5 name(vdd))
pin(6 name(wl))
pin(7 name(bl))
pin(8 name(bl_n))
pin(10 name(vss))
# Devices and their connections
device(1 D$sky130_fd_pr__nfet_01v8__model
location(1575 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 8)
terminal(G 6)
terminal(D 4)
terminal(B 10)
)
device(2 D$sky130_fd_pr__nfet_01v8__model$1
location(1965 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 10)
terminal(B 10)
)
device(3 D$sky130_fd_pr__nfet_01v8__model$2
location(605 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 7)
terminal(G 6)
terminal(D 3)
terminal(B 10)
)
device(4 D$sky130_fd_pr__nfet_01v8__model$3
location(215 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 3)
terminal(G 4)
terminal(D 10)
terminal(B 10)
)
device(5 D$sky130_fd_pr__pfet_01v8__model
location(1965 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1869)
param(AD 0.1113)
param(PS 1.73)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 5)
terminal(B 5)
)
device(6 D$sky130_fd_pr__pfet_01v8__model$1
location(215 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.1869)
param(PS 1.37)
param(PD 1.73)
terminal(S 5)
terminal(G 4)
terminal(D 3)
terminal(B 5)
)
)
circuit(SP6TArray_2X1
# Circuit boundary
rect((-385 -305) (2950 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name(vdd)
rect(l14 (-160 -130) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l14 (-1251 5419) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -5681) (2500 260))
rect(l13 (-2500 5290) (2500 260))
)
net(4 name('wl[0]')
rect(l14 (0 1785) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(5 name('wl[1]')
rect(l14 (0 3505) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(6 name(vss)
rect(l14 (-160 2645) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name(vdd))
pin(4 name('wl[0]'))
pin(5 name('wl[1]'))
pin(6 name(vss))
# Subcircuits and their connections
circuit(1 SP6TCell location(0 2775)
pin(0 3)
pin(1 5)
pin(2 1)
pin(3 2)
pin(4 6)
)
circuit(2 SP6TCell mirror location(0 2775)
pin(0 3)
pin(1 4)
pin(2 1)
pin(3 2)
pin(4 6)
)
)
circuit(SP6TArray_2X2
# Circuit boundary
rect((-385 -305) (5130 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name(vdd)
rect(l14 (-160 5420) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l14 (-2341 -5681) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 5419) (4680 260))
rect(l13 (-4680 -5810) (4680 260))
)
net(6 name('wl[0]')
rect(l14 (0 1785) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(7 name('wl[1]')
rect(l14 (0 3505) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(8 name(vss)
rect(l14 (-160 2645) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 -131) (4680 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name('bl[1]'))
pin(4 name('bl_n[1]'))
pin(5 name(vdd))
pin(6 name('wl[0]'))
pin(7 name('wl[1]'))
pin(8 name(vss))
# Subcircuits and their connections
circuit(1 SP6TArray_2X1 location(0 0)
pin(0 1)
pin(1 2)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
circuit(2 SP6TArray_2X1 location(2180 0)
pin(0 3)
pin(1 4)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TArray_2X4
# Circuit boundary
rect((-385 -305) (9490 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name('bl[2]')
rect(l12 (4790 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(6 name('bl_n[2]')
rect(l12 (5880 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(7 name('bl[3]')
rect(l12 (6970 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(8 name('bl_n[3]')
rect(l12 (8060 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(9 name(vdd)
rect(l14 (-160 -130) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l14 (-4521 5419) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -5681) (9040 260))
rect(l13 (-9040 5290) (9040 260))
)
net(10 name('wl[0]')
rect(l14 (0 1785) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(11 name('wl[1]')
rect(l14 (0 3505) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(12 name(vss)
rect(l14 (-160 2645) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -131) (9040 260))
)
# Subcircuits and their connections
circuit(1 SP6TArray_2X2 location(0 0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
circuit(2 SP6TArray_2X2 location(4360 0)
pin(0 5)
pin(1 6)
pin(2 7)
pin(3 8)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Reference netlist
reference(
# Device class section
class(SKY130_FD_PR__PFET_01V8__MODEL MOS4)
class(SKY130_FD_PR__NFET_01V8__MODEL MOS4)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCELL
# Nets
net(1 name(VDD))
net(2 name(VSS))
net(3 name(WL))
net(4 name(BL))
net(5 name(BL_N))
net(6 name(BIT_N))
net(7 name(BIT))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(VSS))
pin(3 name(WL))
pin(4 name(BL))
pin(5 name(BL_N))
# Devices and their connections
device(1 SKY130_FD_PR__PFET_01V8__MODEL
name(PU1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 6)
terminal(D 7)
terminal(B 1)
)
device(2 SKY130_FD_PR__PFET_01V8__MODEL
name(PU2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 1)
terminal(B 1)
)
device(3 SKY130_FD_PR__NFET_01V8__MODEL
name(PD1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 2)
terminal(G 6)
terminal(D 7)
terminal(B 2)
)
device(4 SKY130_FD_PR__NFET_01V8__MODEL
name(PD2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 2)
terminal(B 2)
)
device(5 SKY130_FD_PR__NFET_01V8__MODEL
name(PG1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 4)
terminal(G 3)
terminal(D 7)
terminal(B 2)
)
device(6 SKY130_FD_PR__NFET_01V8__MODEL
name(PG2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 5)
terminal(G 3)
terminal(D 6)
terminal(B 2)
)
)
circuit(SP6TARRAY_2X1
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
# Subcircuits and their connections
circuit(1 SP6TCELL name(INST0X0)
pin(0 2)
pin(1 1)
pin(2 3)
pin(3 5)
pin(4 6)
)
circuit(2 SP6TCELL name(INST1X0)
pin(0 2)
pin(1 1)
pin(2 4)
pin(3 5)
pin(4 6)
)
)
circuit(SP6TARRAY_2X2
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X1 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
)
circuit(2 SP6TARRAY_2X1 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TARRAY_2X4
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
net(9 name('BL[2]'))
net(10 name('BL_N[2]'))
net(11 name('BL[3]'))
net(12 name('BL_N[3]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
pin(9 name('BL[2]'))
pin(10 name('BL_N[2]'))
pin(11 name('BL[3]'))
pin(12 name('BL_N[3]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X2 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
pin(6 7)
pin(7 8)
)
circuit(2 SP6TARRAY_2X2 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Cross reference
xref(
circuit(SP6TArray_2X1 SP6TARRAY_2X1 match
xref(
net(1 5 match)
net(2 6 match)
net(3 2 match)
net(6 1 match)
net(4 3 warning)
net(5 4 warning)
pin(0 4 match)
pin(1 5 match)
pin(2 1 match)
pin(5 0 match)
pin(3 2 match)
pin(4 3 match)
circuit(2 1 match)
circuit(1 2 match)
)
)
circuit(SP6TArray_2X2 SP6TARRAY_2X2 match
xref(
net(1 5 match)
net(3 7 match)
net(2 6 warning)
net(4 8 warning)
net(5 2 match)
net(8 1 match)
net(6 3 match)
net(7 4 match)
pin(0 4 match)
pin(2 6 match)
pin(1 5 match)
pin(3 7 match)
pin(4 1 match)
pin(7 0 match)
pin(5 2 match)
pin(6 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TArray_2X4 SP6TARRAY_2X4 match
xref(
net(1 5 match)
net(3 7 warning)
net(5 9 match)
net(7 11 warning)
net(2 6 match)
net(4 8 match)
net(6 10 match)
net(8 12 match)
net(9 2 match)
net(12 1 match)
net(10 3 match)
net(11 4 match)
pin(() 4 match)
pin(() 6 match)
pin(() 8 match)
pin(() 10 match)
pin(() 5 match)
pin(() 7 match)
pin(() 9 match)
pin(() 11 match)
pin(() 1 match)
pin(() 0 match)
pin(() 2 match)
pin(() 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TCell SP6TCELL match
xref(
net(3 7 warning)
net(4 6 warning)
net(7 4 match)
net(8 5 match)
net(5 1 match)
net(10 2 match)
net(6 3 match)
pin(2 3 match)
pin(3 4 match)
pin(0 0 match)
pin(4 1 match)
pin(1 2 match)
device(4 3 match)
device(2 4 match)
device(3 5 match)
device(1 6 match)
device(6 1 match)
device(5 2 match)
)
)
)

952
testdata/lvs/test_22c.lvsdb.2 vendored Normal file
View File

@ -0,0 +1,952 @@
#%lvsdb-klayout
# Layout
layout(
top(SP6TArray_2X4)
unit(0.001)
# Layer section
# This section lists the mask layers (drawing or derived) and their connections.
# Mask layers
layer(l5 '64/20')
layer(l3)
layer(l8)
layer(l7 '66/20')
layer(l10)
layer(l9 '67/20')
layer(l12 '68/16')
layer(l11 '68/20')
layer(l14 '69/16')
layer(l13 '69/20')
layer(l16)
layer(l15)
layer(l18)
layer(l17)
layer(l20)
layer(l19)
layer(l21 '66/44')
layer(l23 '67/44')
layer(l24 '68/44')
layer(l25)
layer(l26)
layer(l27)
layer(l1)
layer(l2)
layer(l4)
layer(l6)
layer(l22)
# Mask layer connectivity
connect(l5 l5 l4)
connect(l3 l3 l2)
connect(l8 l8 l7)
connect(l7 l8 l7)
connect(l10 l10 l9)
connect(l9 l10 l9 l21 l23)
connect(l12 l12 l11)
connect(l11 l12 l11 l23 l24)
connect(l14 l14 l13)
connect(l13 l14 l13 l24 l25)
connect(l16 l16 l15)
connect(l15 l16 l15 l25 l26)
connect(l18 l18 l17)
connect(l17 l18 l17 l26 l27)
connect(l20 l20 l19)
connect(l19 l20 l19 l27)
connect(l21 l9 l21 l2 l22)
connect(l23 l9 l11 l23)
connect(l24 l11 l13 l24)
connect(l25 l13 l15 l25)
connect(l26 l15 l17 l26)
connect(l27 l17 l19 l27)
connect(l1 l1)
connect(l2 l3 l21 l2 l4 l6)
connect(l4 l5 l2 l4)
connect(l6 l2 l6)
connect(l22 l21 l22)
# Global nets and connectivity
global(l1 vss)
global(l6 vss)
# Device class section
class(active_res RES)
class(poly_res RES)
class(sky130_fd_pr__diode_pw2nd_05v5 DIODE)
class(sky130_fd_pr__diode_pd2nw_05v5 DIODE)
class(sky130_fd_pr__nfet_01v8__model MOS4)
class(sky130_fd_pr__nfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__nfet_g5v0d10v5__model MOS4)
class(sky130_fd_pr__pfet_01v8__model MOS4)
class(sky130_fd_pr__pfet_01v8_hvt__model MOS4)
class(sky130_fd_pr__pfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__pfet_g5v0d10v5__model MOS4)
# Device abstracts section
# Device abstracts list the pin shapes of the devices.
device(D$sky130_fd_pr__nfet_01v8__model sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$1 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (-600 -550) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$2 sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$3 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (180 -550) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (-340 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-520 -210) (445 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model$1 sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-340 -210) (265 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (445 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCell
# Circuit boundary
rect((-385 -485) (2950 3565))
# Nets with their geometries
net(1
rect(l7 (1890 500) (150 2010))
rect(l7 (-1100 -1320) (950 150))
rect(l7 (-1280 -150) (330 270))
)
net(2
rect(l7 (1240 1550) (330 270))
rect(l7 (-1280 -150) (950 150))
rect(l7 (-1100 -1320) (150 2010))
)
net(3
polygon(l9 (525 760) (0 1570) (170 0) (0 -920) (245 0) (0 -170) (-245 0) (0 -480))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-5 -1010) (170 170))
polygon(l2 (-465 -1120) (0 340) (-105 0) (0 420) (525 0) (0 -760))
rect(l2 (-525 1670) (445 420))
rect(l22 (-125 -1190) (330 270))
rect(l22 (950 -960) (150 2010))
rect(l22 (-1100 -1320) (950 150))
)
net(4
polygon(l9 (1485 760) (0 840) (-245 0) (0 170) (245 0) (0 560) (170 0) (0 -1570))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-335 -650) (170 170))
polygon(l2 (-125 -1480) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
rect(l2 (-340 1670) (445 420))
rect(l22 (-650 -830) (330 270))
rect(l22 (-1280 -150) (950 150))
rect(l22 (-1100 -1320) (150 2010))
)
net(5 name(vdd)
rect(l5 (-385 1780) (2950 1300))
rect(l9 (-2650 -1075) (170 685))
rect(l9 (-250 0) (2510 170))
rect(l9 (-250 -855) (170 685))
rect(l11 (-2395 -75) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l21 (2010 435) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l23 (-2350 435) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-2460 -200) (2590 250))
rect(l2 (-2510 -940) (265 420))
rect(l2 (1900 -420) (265 420))
rect(l4 (-2510 270) (2590 250))
)
net(6 name(wl)
rect(l9 (1005 140) (170 500))
polygon(l11 (-200 -230) (0 290) (-15 0) (0 320) (260 0) (0 -320) (-15 0) (0 -290))
rect(l14 (-1205 320) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
rect(l21 (-1175 -770) (170 170))
rect(l23 (-170 80) (170 170))
rect(l24 (-160 145) (150 150))
polygon(l22 (-900 -795) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(7 name(bl)
polygon(l9 (520 -165) (0 80) (-60 0) (0 170) (60 0) (0 80) (170 0) (0 -330))
rect(l12 (-260 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-140 -2860) (170 170))
rect(l23 (-230 -170) (170 170))
rect(l2 (-235 -210) (420 265))
)
net(8 name(bl_n)
polygon(l9 (1490 -165) (0 330) (170 0) (0 -80) (60 0) (0 -170) (-60 0) (0 -80))
rect(l12 (-140 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-260 -2860) (170 170))
rect(l23 (-110 -170) (170 170))
rect(l2 (-355 -210) (420 265))
)
net(9
polygon(l7 (265 140) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(10 name(vss)
rect(l9 (-85 -165) (170 1170))
rect(l9 (2010 -1170) (170 1170))
rect(l11 (-2395 -1165) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 670) (170 170))
rect(l21 (2010 -170) (170 170))
rect(l21 (-170 -1010) (170 170))
rect(l23 (-2350 -170) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-215 555) (265 420))
rect(l2 (-2430 -1410) (250 720))
rect(l2 (-250 270) (265 420))
rect(l2 (1915 -1410) (250 720))
rect(l6 (-250 -720) (250 720))
rect(l6 (-2430 -720) (250 720))
)
# Outgoing pins and their connections to nets
pin(5 name(vdd))
pin(6 name(wl))
pin(7 name(bl))
pin(8 name(bl_n))
pin(10 name(vss))
# Devices and their connections
device(1 D$sky130_fd_pr__nfet_01v8__model
location(1575 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 8)
terminal(G 6)
terminal(D 4)
terminal(B 10)
)
device(2 D$sky130_fd_pr__nfet_01v8__model$1
location(1965 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 10)
terminal(B 10)
)
device(3 D$sky130_fd_pr__nfet_01v8__model$2
location(605 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 7)
terminal(G 6)
terminal(D 3)
terminal(B 10)
)
device(4 D$sky130_fd_pr__nfet_01v8__model$3
location(215 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 3)
terminal(G 4)
terminal(D 10)
terminal(B 10)
)
device(5 D$sky130_fd_pr__pfet_01v8__model
location(1965 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1869)
param(AD 0.1113)
param(PS 1.73)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 5)
terminal(B 5)
)
device(6 D$sky130_fd_pr__pfet_01v8__model$1
location(215 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.1869)
param(PS 1.37)
param(PD 1.73)
terminal(S 5)
terminal(G 4)
terminal(D 3)
terminal(B 5)
)
)
circuit(SP6TArray_2X1
# Circuit boundary
rect((-385 -305) (2950 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name(vdd)
rect(l14 (-160 -130) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l14 (-1251 5419) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -5681) (2500 260))
rect(l13 (-2500 5290) (2500 260))
)
net(4 name('wl[0]')
rect(l14 (0 1785) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(5 name('wl[1]')
rect(l14 (0 3505) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(6 name(vss)
rect(l14 (-160 2645) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name(vdd))
pin(4 name('wl[0]'))
pin(5 name('wl[1]'))
pin(6 name(vss))
# Subcircuits and their connections
circuit(1 SP6TCell location(0 2775)
pin(0 3)
pin(1 5)
pin(2 1)
pin(3 2)
pin(4 6)
)
circuit(2 SP6TCell mirror location(0 2775)
pin(0 3)
pin(1 4)
pin(2 1)
pin(3 2)
pin(4 6)
)
)
circuit(SP6TArray_2X2
# Circuit boundary
rect((-385 -305) (5130 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name(vdd)
rect(l14 (-160 5420) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l14 (-2341 -5681) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 5419) (4680 260))
rect(l13 (-4680 -5810) (4680 260))
)
net(6 name('wl[0]')
rect(l14 (0 1785) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(7 name('wl[1]')
rect(l14 (0 3505) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(8 name(vss)
rect(l14 (-160 2645) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 -131) (4680 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name('bl[1]'))
pin(4 name('bl_n[1]'))
pin(5 name(vdd))
pin(6 name('wl[0]'))
pin(7 name('wl[1]'))
pin(8 name(vss))
# Subcircuits and their connections
circuit(1 SP6TArray_2X1 location(0 0)
pin(0 1)
pin(1 2)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
circuit(2 SP6TArray_2X1 location(2180 0)
pin(0 3)
pin(1 4)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TArray_2X4
# Circuit boundary
rect((-385 -305) (9490 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name('bl[2]')
rect(l12 (4790 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(6 name('bl_n[2]')
rect(l12 (5880 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(7 name('bl[3]')
rect(l12 (6970 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(8 name('bl_n[3]')
rect(l12 (8060 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(9 name(vdd)
rect(l14 (-160 -130) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l14 (-4521 5419) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -5681) (9040 260))
rect(l13 (-9040 5290) (9040 260))
)
net(10 name('wl[0]')
rect(l14 (0 1785) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(11 name('wl[1]')
rect(l14 (0 3505) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(12 name(vss)
rect(l14 (-160 2645) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -131) (9040 260))
)
# Subcircuits and their connections
circuit(1 SP6TArray_2X2 location(0 0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
circuit(2 SP6TArray_2X2 location(4360 0)
pin(0 5)
pin(1 6)
pin(2 7)
pin(3 8)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Reference netlist
reference(
# Device class section
class(SKY130_FD_PR__PFET_01V8__MODEL MOS4)
class(SKY130_FD_PR__NFET_01V8__MODEL MOS4)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCELL
# Nets
net(1 name(VDD))
net(2 name(VSS))
net(3 name(WL))
net(4 name(BL))
net(5 name(BL_N))
net(6 name(BIT_N))
net(7 name(BIT))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(VSS))
pin(3 name(WL))
pin(4 name(BL))
pin(5 name(BL_N))
# Devices and their connections
device(1 SKY130_FD_PR__PFET_01V8__MODEL
name(PU1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 6)
terminal(D 7)
terminal(B 1)
)
device(2 SKY130_FD_PR__PFET_01V8__MODEL
name(PU2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 1)
terminal(B 1)
)
device(3 SKY130_FD_PR__NFET_01V8__MODEL
name(PD1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 2)
terminal(G 6)
terminal(D 7)
terminal(B 2)
)
device(4 SKY130_FD_PR__NFET_01V8__MODEL
name(PD2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 2)
terminal(B 2)
)
device(5 SKY130_FD_PR__NFET_01V8__MODEL
name(PG1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 4)
terminal(G 3)
terminal(D 7)
terminal(B 2)
)
device(6 SKY130_FD_PR__NFET_01V8__MODEL
name(PG2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 5)
terminal(G 3)
terminal(D 6)
terminal(B 2)
)
)
circuit(SP6TARRAY_2X1
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
# Subcircuits and their connections
circuit(1 SP6TCELL name(INST0X0)
pin(0 2)
pin(1 1)
pin(2 3)
pin(3 5)
pin(4 6)
)
circuit(2 SP6TCELL name(INST1X0)
pin(0 2)
pin(1 1)
pin(2 4)
pin(3 5)
pin(4 6)
)
)
circuit(SP6TARRAY_2X2
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X1 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
)
circuit(2 SP6TARRAY_2X1 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TARRAY_2X4
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
net(9 name('BL[2]'))
net(10 name('BL_N[2]'))
net(11 name('BL[3]'))
net(12 name('BL_N[3]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
pin(9 name('BL[2]'))
pin(10 name('BL_N[2]'))
pin(11 name('BL[3]'))
pin(12 name('BL_N[3]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X2 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
pin(6 7)
pin(7 8)
)
circuit(2 SP6TARRAY_2X2 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Cross reference
xref(
circuit(SP6TArray_2X1 SP6TARRAY_2X1 match
xref(
net(1 5 match)
net(2 6 match)
net(3 2 match)
net(6 1 match)
net(4 3 warning)
net(5 4 warning)
pin(0 4 match)
pin(1 5 match)
pin(2 1 match)
pin(5 0 match)
pin(3 2 match)
pin(4 3 match)
circuit(2 1 match)
circuit(1 2 match)
)
)
circuit(SP6TArray_2X2 SP6TARRAY_2X2 match
xref(
net(1 5 match)
net(3 7 match)
net(2 6 warning)
net(4 8 warning)
net(5 2 match)
net(8 1 match)
net(6 3 match)
net(7 4 match)
pin(0 4 match)
pin(2 6 match)
pin(1 5 match)
pin(3 7 match)
pin(4 1 match)
pin(7 0 match)
pin(5 2 match)
pin(6 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TArray_2X4 SP6TARRAY_2X4 match
xref(
net(1 5 match)
net(3 7 warning)
net(5 9 match)
net(7 11 warning)
net(2 6 match)
net(4 8 match)
net(6 10 match)
net(8 12 match)
net(9 2 match)
net(12 1 match)
net(10 3 match)
net(11 4 match)
pin(() 4 match)
pin(() 6 match)
pin(() 8 match)
pin(() 10 match)
pin(() 5 match)
pin(() 7 match)
pin(() 9 match)
pin(() 11 match)
pin(() 1 match)
pin(() 0 match)
pin(() 2 match)
pin(() 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TCell SP6TCELL match
xref(
net(3 7 warning)
net(4 6 warning)
net(7 4 match)
net(8 5 match)
net(5 1 match)
net(10 2 match)
net(6 3 match)
pin(2 3 match)
pin(3 4 match)
pin(0 0 match)
pin(4 1 match)
pin(1 2 match)
device(4 3 match)
device(2 4 match)
device(3 5 match)
device(1 6 match)
device(6 1 match)
device(5 2 match)
)
)
)

97
testdata/lvs/test_22d.cir vendored Normal file
View File

@ -0,0 +1,97 @@
* Extracted by KLayout
* cell SP6TArray_2X4
.SUBCKT SP6TArray_2X4
* net 1 bl[0]
* net 2 bl_n[0]
* net 3 bl[1]
* net 4 bl_n[1]
* net 5 bl[2]
* net 6 bl_n[2]
* net 7 bl[3]
* net 8 bl_n[3]
* net 9 vdd
* net 10 wl[0]
* net 11 wl[1]
* net 12 vss
* cell instance $1 r0 *1 0,0
X$1 1 2 3 4 9 10 11 12 SP6TArray_2X2
* cell instance $2 r0 *1 4.36,0
X$2 5 6 7 8 9 10 11 12 SP6TArray_2X2
.ENDS SP6TArray_2X4
* cell SP6TArray_2X2
* pin bl[0]
* pin bl_n[0]
* pin bl[1]
* pin bl_n[1]
* pin vdd
* pin wl[0]
* pin wl[1]
* pin vss
.SUBCKT SP6TArray_2X2 1 2 3 4 5 6 7 8
* net 1 bl[0]
* net 2 bl_n[0]
* net 3 bl[1]
* net 4 bl_n[1]
* net 5 vdd
* net 6 wl[0]
* net 7 wl[1]
* net 8 vss
* cell instance $1 r0 *1 0,0
X$1 1 2 5 6 7 8 SP6TArray_2X1
* cell instance $2 r0 *1 2.18,0
X$2 3 4 5 6 7 8 SP6TArray_2X1
.ENDS SP6TArray_2X2
* cell SP6TArray_2X1
* pin bl[0]
* pin bl_n[0]
* pin vdd
* pin wl[0]
* pin wl[1]
* pin vss
.SUBCKT SP6TArray_2X1 1 2 3 4 5 6
* net 1 bl[0]
* net 2 bl_n[0]
* net 3 vdd
* net 4 wl[0]
* net 5 wl[1]
* net 6 vss
* cell instance $1 r0 *1 0,2.775
X$1 3 5 1 2 6 SP6TCell
* cell instance $2 m0 *1 0,2.775
X$2 3 4 1 2 6 SP6TCell
.ENDS SP6TArray_2X1
* cell SP6TCell
* pin vdd
* pin wl
* pin bl
* pin bl_n
* pin vss
.SUBCKT SP6TCell 5 6 7 8 10
* net 5 vdd
* net 6 wl
* net 7 bl
* net 8 bl_n
* net 10 vss
* device instance $1 r0 *1 1.575,0.215 sky130_fd_pr__nfet_01v8__model
M$1 8 6 4 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.18165P PS=1.37U PD=1.285U
* device instance $2 r0 *1 1.965,0.84 sky130_fd_pr__nfet_01v8__model
M$2 4 3 10 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $3 r0 *1 0.605,0.215 sky130_fd_pr__nfet_01v8__model
M$3 7 6 3 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.18165P PS=1.37U PD=1.285U
* device instance $4 r0 *1 0.215,0.84 sky130_fd_pr__nfet_01v8__model
M$4 3 4 10 10 sky130_fd_pr__nfet_01v8__model L=0.15U W=0.42U AS=0.18165P
+ AD=0.1113P PS=1.285U PD=1.37U
* device instance $5 r0 *1 1.965,2.17 sky130_fd_pr__pfet_01v8__model
M$5 4 3 5 5 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1869P
+ AD=0.1113P PS=1.73U PD=1.37U
* device instance $6 r0 *1 0.215,2.17 sky130_fd_pr__pfet_01v8__model
M$6 5 4 3 5 sky130_fd_pr__pfet_01v8__model L=0.15U W=0.42U AS=0.1113P
+ AD=0.1869P PS=1.37U PD=1.73U
.ENDS SP6TCell

952
testdata/lvs/test_22d.lvsdb.1 vendored Normal file
View File

@ -0,0 +1,952 @@
#%lvsdb-klayout
# Layout
layout(
top(SP6TArray_2X4)
unit(0.001)
# Layer section
# This section lists the mask layers (drawing or derived) and their connections.
# Mask layers
layer(l5 '64/20')
layer(l3)
layer(l8)
layer(l7 '66/20')
layer(l10)
layer(l9 '67/20')
layer(l12 '68/16')
layer(l11 '68/20')
layer(l14 '69/16')
layer(l13 '69/20')
layer(l16)
layer(l15)
layer(l18)
layer(l17)
layer(l20)
layer(l19)
layer(l21 '66/44')
layer(l23 '67/44')
layer(l24 '68/44')
layer(l25)
layer(l26)
layer(l27)
layer(l1)
layer(l2)
layer(l4)
layer(l6)
layer(l22)
# Mask layer connectivity
connect(l5 l5 l4)
connect(l3 l3 l2)
connect(l8 l8 l7)
connect(l7 l8 l7)
connect(l10 l10 l9)
connect(l9 l10 l9 l21 l23)
connect(l12 l12 l11)
connect(l11 l12 l11 l23 l24)
connect(l14 l14 l13)
connect(l13 l14 l13 l24 l25)
connect(l16 l16 l15)
connect(l15 l16 l15 l25 l26)
connect(l18 l18 l17)
connect(l17 l18 l17 l26 l27)
connect(l20 l20 l19)
connect(l19 l20 l19 l27)
connect(l21 l9 l21 l2 l22)
connect(l23 l9 l11 l23)
connect(l24 l11 l13 l24)
connect(l25 l13 l15 l25)
connect(l26 l15 l17 l26)
connect(l27 l17 l19 l27)
connect(l1 l1)
connect(l2 l3 l21 l2 l4 l6)
connect(l4 l5 l2 l4)
connect(l6 l2 l6)
connect(l22 l21 l22)
# Global nets and connectivity
global(l1 vss)
global(l6 vss)
# Device class section
class(active_res RES)
class(poly_res RES)
class(sky130_fd_pr__diode_pw2nd_05v5 DIODE)
class(sky130_fd_pr__diode_pd2nw_05v5 DIODE)
class(sky130_fd_pr__nfet_01v8__model MOS4)
class(sky130_fd_pr__nfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__nfet_g5v0d10v5__model MOS4)
class(sky130_fd_pr__pfet_01v8__model MOS4)
class(sky130_fd_pr__pfet_01v8_hvt__model MOS4)
class(sky130_fd_pr__pfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__pfet_g5v0d10v5__model MOS4)
# Device abstracts section
# Device abstracts list the pin shapes of the devices.
device(D$sky130_fd_pr__nfet_01v8__model sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$1 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (-600 -550) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$2 sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$3 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (180 -550) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (-340 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-520 -210) (445 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model$1 sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-340 -210) (265 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (445 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCell
# Circuit boundary
rect((-385 -485) (2950 3565))
# Nets with their geometries
net(1
rect(l7 (1890 500) (150 2010))
rect(l7 (-1100 -1320) (950 150))
rect(l7 (-1280 -150) (330 270))
)
net(2
rect(l7 (1240 1550) (330 270))
rect(l7 (-1280 -150) (950 150))
rect(l7 (-1100 -1320) (150 2010))
)
net(3
polygon(l9 (525 760) (0 1570) (170 0) (0 -920) (245 0) (0 -170) (-245 0) (0 -480))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-5 -1010) (170 170))
polygon(l2 (-465 -1120) (0 340) (-105 0) (0 420) (525 0) (0 -760))
rect(l2 (-525 1670) (445 420))
rect(l22 (-125 -1190) (330 270))
rect(l22 (950 -960) (150 2010))
rect(l22 (-1100 -1320) (950 150))
)
net(4
polygon(l9 (1485 760) (0 840) (-245 0) (0 170) (245 0) (0 560) (170 0) (0 -1570))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-335 -650) (170 170))
polygon(l2 (-125 -1480) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
rect(l2 (-340 1670) (445 420))
rect(l22 (-650 -830) (330 270))
rect(l22 (-1280 -150) (950 150))
rect(l22 (-1100 -1320) (150 2010))
)
net(5 name(vdd)
rect(l5 (-385 1780) (2950 1300))
rect(l9 (-2650 -1075) (170 685))
rect(l9 (-250 0) (2510 170))
rect(l9 (-250 -855) (170 685))
rect(l11 (-2395 -75) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l21 (2010 435) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l23 (-2350 435) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-2460 -200) (2590 250))
rect(l2 (-2510 -940) (265 420))
rect(l2 (1900 -420) (265 420))
rect(l4 (-2510 270) (2590 250))
)
net(6 name(wl)
rect(l9 (1005 140) (170 500))
polygon(l11 (-200 -230) (0 290) (-15 0) (0 320) (260 0) (0 -320) (-15 0) (0 -290))
rect(l14 (-1205 320) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
rect(l21 (-1175 -770) (170 170))
rect(l23 (-170 80) (170 170))
rect(l24 (-160 145) (150 150))
polygon(l22 (-900 -795) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(7 name(bl)
polygon(l9 (520 -165) (0 80) (-60 0) (0 170) (60 0) (0 80) (170 0) (0 -330))
rect(l12 (-260 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-140 -2860) (170 170))
rect(l23 (-230 -170) (170 170))
rect(l2 (-235 -210) (420 265))
)
net(8 name(bl_n)
polygon(l9 (1490 -165) (0 330) (170 0) (0 -80) (60 0) (0 -170) (-60 0) (0 -80))
rect(l12 (-140 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-260 -2860) (170 170))
rect(l23 (-110 -170) (170 170))
rect(l2 (-355 -210) (420 265))
)
net(9
polygon(l7 (265 140) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(10 name(vss)
rect(l9 (-85 -165) (170 1170))
rect(l9 (2010 -1170) (170 1170))
rect(l11 (-2395 -1165) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 670) (170 170))
rect(l21 (2010 -170) (170 170))
rect(l21 (-170 -1010) (170 170))
rect(l23 (-2350 -170) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-215 555) (265 420))
rect(l2 (-2430 -1410) (250 720))
rect(l2 (-250 270) (265 420))
rect(l2 (1915 -1410) (250 720))
rect(l6 (-2430 -720) (250 720))
rect(l6 (1930 -720) (250 720))
)
# Outgoing pins and their connections to nets
pin(5 name(vdd))
pin(6 name(wl))
pin(7 name(bl))
pin(8 name(bl_n))
pin(10 name(vss))
# Devices and their connections
device(1 D$sky130_fd_pr__nfet_01v8__model
location(1575 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 8)
terminal(G 6)
terminal(D 4)
terminal(B 10)
)
device(2 D$sky130_fd_pr__nfet_01v8__model$1
location(1965 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 10)
terminal(B 10)
)
device(3 D$sky130_fd_pr__nfet_01v8__model$2
location(605 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 7)
terminal(G 6)
terminal(D 3)
terminal(B 10)
)
device(4 D$sky130_fd_pr__nfet_01v8__model$3
location(215 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 3)
terminal(G 4)
terminal(D 10)
terminal(B 10)
)
device(5 D$sky130_fd_pr__pfet_01v8__model
location(1965 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1869)
param(AD 0.1113)
param(PS 1.73)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 5)
terminal(B 5)
)
device(6 D$sky130_fd_pr__pfet_01v8__model$1
location(215 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.1869)
param(PS 1.37)
param(PD 1.73)
terminal(S 5)
terminal(G 4)
terminal(D 3)
terminal(B 5)
)
)
circuit(SP6TArray_2X1
# Circuit boundary
rect((-385 -305) (2950 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name(vdd)
rect(l14 (-160 -130) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l14 (-1251 5419) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -5681) (2500 260))
rect(l13 (-2500 5290) (2500 260))
)
net(4 name('wl[0]')
rect(l14 (0 1785) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(5 name('wl[1]')
rect(l14 (0 3505) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(6 name(vss)
rect(l14 (-160 2645) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name(vdd))
pin(4 name('wl[0]'))
pin(5 name('wl[1]'))
pin(6 name(vss))
# Subcircuits and their connections
circuit(1 SP6TCell location(0 2775)
pin(0 3)
pin(1 5)
pin(2 1)
pin(3 2)
pin(4 6)
)
circuit(2 SP6TCell mirror location(0 2775)
pin(0 3)
pin(1 4)
pin(2 1)
pin(3 2)
pin(4 6)
)
)
circuit(SP6TArray_2X2
# Circuit boundary
rect((-385 -305) (5130 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name(vdd)
rect(l14 (-160 5420) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l14 (-2341 -5681) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 5419) (4680 260))
rect(l13 (-4680 -5810) (4680 260))
)
net(6 name('wl[0]')
rect(l14 (0 1785) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(7 name('wl[1]')
rect(l14 (0 3505) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(8 name(vss)
rect(l14 (-160 2645) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 -131) (4680 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name('bl[1]'))
pin(4 name('bl_n[1]'))
pin(5 name(vdd))
pin(6 name('wl[0]'))
pin(7 name('wl[1]'))
pin(8 name(vss))
# Subcircuits and their connections
circuit(1 SP6TArray_2X1 location(0 0)
pin(0 1)
pin(1 2)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
circuit(2 SP6TArray_2X1 location(2180 0)
pin(0 3)
pin(1 4)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TArray_2X4
# Circuit boundary
rect((-385 -305) (9490 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name('bl[2]')
rect(l12 (4790 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(6 name('bl_n[2]')
rect(l12 (5880 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(7 name('bl[3]')
rect(l12 (6970 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(8 name('bl_n[3]')
rect(l12 (8060 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(9 name(vdd)
rect(l14 (-160 -130) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l14 (-4521 5419) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -5681) (9040 260))
rect(l13 (-9040 5290) (9040 260))
)
net(10 name('wl[0]')
rect(l14 (0 1785) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(11 name('wl[1]')
rect(l14 (0 3505) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(12 name(vss)
rect(l14 (-160 2645) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -131) (9040 260))
)
# Subcircuits and their connections
circuit(1 SP6TArray_2X2 location(0 0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
circuit(2 SP6TArray_2X2 location(4360 0)
pin(0 5)
pin(1 6)
pin(2 7)
pin(3 8)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Reference netlist
reference(
# Device class section
class(SKY130_FD_PR__PFET_01V8__MODEL MOS4)
class(SKY130_FD_PR__NFET_01V8__MODEL MOS4)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCELL
# Nets
net(1 name(VDD))
net(2 name(VSS))
net(3 name(WL))
net(4 name(BL))
net(5 name(BL_N))
net(6 name(BIT_N))
net(7 name(BIT))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(VSS))
pin(3 name(WL))
pin(4 name(BL))
pin(5 name(BL_N))
# Devices and their connections
device(1 SKY130_FD_PR__PFET_01V8__MODEL
name(PU1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 6)
terminal(D 7)
terminal(B 1)
)
device(2 SKY130_FD_PR__PFET_01V8__MODEL
name(PU2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 1)
terminal(B 1)
)
device(3 SKY130_FD_PR__NFET_01V8__MODEL
name(PD1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 2)
terminal(G 6)
terminal(D 7)
terminal(B 2)
)
device(4 SKY130_FD_PR__NFET_01V8__MODEL
name(PD2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 2)
terminal(B 2)
)
device(5 SKY130_FD_PR__NFET_01V8__MODEL
name(PG1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 4)
terminal(G 3)
terminal(D 7)
terminal(B 2)
)
device(6 SKY130_FD_PR__NFET_01V8__MODEL
name(PG2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 5)
terminal(G 3)
terminal(D 6)
terminal(B 2)
)
)
circuit(SP6TARRAY_2X1
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
# Subcircuits and their connections
circuit(1 SP6TCELL name(INST0X0)
pin(0 2)
pin(1 1)
pin(2 3)
pin(3 5)
pin(4 6)
)
circuit(2 SP6TCELL name(INST1X0)
pin(0 2)
pin(1 1)
pin(2 4)
pin(3 5)
pin(4 6)
)
)
circuit(SP6TARRAY_2X2
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X1 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
)
circuit(2 SP6TARRAY_2X1 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TARRAY_2X4
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
net(9 name('BL[2]'))
net(10 name('BL_N[2]'))
net(11 name('BL[3]'))
net(12 name('BL_N[3]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
pin(9 name('BL[2]'))
pin(10 name('BL_N[2]'))
pin(11 name('BL[3]'))
pin(12 name('BL_N[3]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X2 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
pin(6 7)
pin(7 8)
)
circuit(2 SP6TARRAY_2X2 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Cross reference
xref(
circuit(SP6TArray_2X1 SP6TARRAY_2X1 match
xref(
net(1 5 match)
net(2 6 match)
net(3 2 match)
net(6 1 match)
net(4 3 match)
net(5 4 match)
pin(0 4 match)
pin(1 5 match)
pin(2 1 match)
pin(5 0 match)
pin(3 2 match)
pin(4 3 match)
circuit(2 1 match)
circuit(1 2 match)
)
)
circuit(SP6TArray_2X2 SP6TARRAY_2X2 match
xref(
net(1 5 match)
net(3 7 match)
net(2 6 match)
net(4 8 match)
net(5 2 match)
net(8 1 match)
net(6 3 match)
net(7 4 match)
pin(0 4 match)
pin(2 6 match)
pin(1 5 match)
pin(3 7 match)
pin(4 1 match)
pin(7 0 match)
pin(5 2 match)
pin(6 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TArray_2X4 SP6TARRAY_2X4 match
xref(
net(1 5 match)
net(3 7 match)
net(5 9 match)
net(7 11 match)
net(2 6 match)
net(4 8 match)
net(6 10 match)
net(8 12 match)
net(9 2 match)
net(12 1 match)
net(10 3 match)
net(11 4 match)
pin(() 4 match)
pin(() 6 match)
pin(() 8 match)
pin(() 10 match)
pin(() 5 match)
pin(() 7 match)
pin(() 9 match)
pin(() 11 match)
pin(() 1 match)
pin(() 0 match)
pin(() 2 match)
pin(() 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TCell SP6TCELL match
xref(
net(3 7 match)
net(4 6 match)
net(7 4 match)
net(8 5 match)
net(5 1 match)
net(10 2 match)
net(6 3 match)
pin(2 3 match)
pin(3 4 match)
pin(0 0 match)
pin(4 1 match)
pin(1 2 match)
device(4 3 match)
device(2 4 match)
device(3 5 match)
device(1 6 match)
device(6 1 match)
device(5 2 match)
)
)
)

952
testdata/lvs/test_22d.lvsdb.2 vendored Normal file
View File

@ -0,0 +1,952 @@
#%lvsdb-klayout
# Layout
layout(
top(SP6TArray_2X4)
unit(0.001)
# Layer section
# This section lists the mask layers (drawing or derived) and their connections.
# Mask layers
layer(l5 '64/20')
layer(l3)
layer(l8)
layer(l7 '66/20')
layer(l10)
layer(l9 '67/20')
layer(l12 '68/16')
layer(l11 '68/20')
layer(l14 '69/16')
layer(l13 '69/20')
layer(l16)
layer(l15)
layer(l18)
layer(l17)
layer(l20)
layer(l19)
layer(l21 '66/44')
layer(l23 '67/44')
layer(l24 '68/44')
layer(l25)
layer(l26)
layer(l27)
layer(l1)
layer(l2)
layer(l4)
layer(l6)
layer(l22)
# Mask layer connectivity
connect(l5 l5 l4)
connect(l3 l3 l2)
connect(l8 l8 l7)
connect(l7 l8 l7)
connect(l10 l10 l9)
connect(l9 l10 l9 l21 l23)
connect(l12 l12 l11)
connect(l11 l12 l11 l23 l24)
connect(l14 l14 l13)
connect(l13 l14 l13 l24 l25)
connect(l16 l16 l15)
connect(l15 l16 l15 l25 l26)
connect(l18 l18 l17)
connect(l17 l18 l17 l26 l27)
connect(l20 l20 l19)
connect(l19 l20 l19 l27)
connect(l21 l9 l21 l2 l22)
connect(l23 l9 l11 l23)
connect(l24 l11 l13 l24)
connect(l25 l13 l15 l25)
connect(l26 l15 l17 l26)
connect(l27 l17 l19 l27)
connect(l1 l1)
connect(l2 l3 l21 l2 l4 l6)
connect(l4 l5 l2 l4)
connect(l6 l2 l6)
connect(l22 l21 l22)
# Global nets and connectivity
global(l1 vss)
global(l6 vss)
# Device class section
class(active_res RES)
class(poly_res RES)
class(sky130_fd_pr__diode_pw2nd_05v5 DIODE)
class(sky130_fd_pr__diode_pd2nw_05v5 DIODE)
class(sky130_fd_pr__nfet_01v8__model MOS4)
class(sky130_fd_pr__nfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__nfet_g5v0d10v5__model MOS4)
class(sky130_fd_pr__pfet_01v8__model MOS4)
class(sky130_fd_pr__pfet_01v8_hvt__model MOS4)
class(sky130_fd_pr__pfet_01v8_lvt__model MOS4)
class(sky130_fd_pr__pfet_g5v0d10v5__model MOS4)
# Device abstracts section
# Device abstracts list the pin shapes of the devices.
device(D$sky130_fd_pr__nfet_01v8__model sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$1 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (-600 -550) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$2 sky130_fd_pr__nfet_01v8__model
terminal(S
rect(l2 (-210 -340) (420 265))
)
terminal(G
rect(l22 (-210 -75) (420 150))
)
terminal(D
polygon(l2 (-210 75) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(B
rect(l1 (-210 -75) (420 150))
)
)
device(D$sky130_fd_pr__nfet_01v8__model$3 sky130_fd_pr__nfet_01v8__model
terminal(S
polygon(l2 (180 -550) (0 340) (-105 0) (0 420) (525 0) (0 -760))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (-340 -210) (265 420))
)
terminal(B
rect(l1 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-520 -210) (445 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (265 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
device(D$sky130_fd_pr__pfet_01v8__model$1 sky130_fd_pr__pfet_01v8__model
terminal(S
rect(l2 (-340 -210) (265 420))
)
terminal(G
rect(l22 (-75 -210) (150 420))
)
terminal(D
rect(l2 (75 -210) (445 420))
)
terminal(B
rect(l5 (-75 -210) (150 420))
)
)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCell
# Circuit boundary
rect((-385 -485) (2950 3565))
# Nets with their geometries
net(1
rect(l7 (1890 500) (150 2010))
rect(l7 (-1100 -1320) (950 150))
rect(l7 (-1280 -150) (330 270))
)
net(2
rect(l7 (1240 1550) (330 270))
rect(l7 (-1280 -150) (950 150))
rect(l7 (-1100 -1320) (150 2010))
)
net(3
polygon(l9 (525 760) (0 1570) (170 0) (0 -920) (245 0) (0 -170) (-245 0) (0 -480))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-5 -1010) (170 170))
polygon(l2 (-465 -1120) (0 340) (-105 0) (0 420) (525 0) (0 -760))
rect(l2 (-525 1670) (445 420))
rect(l22 (-125 -1190) (330 270))
rect(l22 (950 -960) (150 2010))
rect(l22 (-1100 -1320) (950 150))
)
net(4
polygon(l9 (1485 760) (0 840) (-245 0) (0 170) (245 0) (0 560) (170 0) (0 -1570))
rect(l21 (-170 80) (170 170))
rect(l21 (-170 1070) (170 170))
rect(l21 (-335 -650) (170 170))
polygon(l2 (-125 -1480) (0 760) (525 0) (0 -420) (-105 0) (0 -340))
rect(l2 (-340 1670) (445 420))
rect(l22 (-650 -830) (330 270))
rect(l22 (-1280 -150) (950 150))
rect(l22 (-1100 -1320) (150 2010))
)
net(5 name(vdd)
rect(l5 (-385 1780) (2950 1300))
rect(l9 (-2650 -1075) (170 685))
rect(l9 (-250 0) (2510 170))
rect(l9 (-250 -855) (170 685))
rect(l11 (-2395 -75) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l21 (2010 435) (170 170))
rect(l21 (-170 -775) (170 170))
rect(l23 (-2350 435) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-2460 -200) (2590 250))
rect(l2 (-2510 -940) (265 420))
rect(l2 (1900 -420) (265 420))
rect(l4 (-2510 270) (2590 250))
)
net(6 name(wl)
rect(l9 (1005 140) (170 500))
polygon(l11 (-200 -230) (0 290) (-15 0) (0 320) (260 0) (0 -320) (-15 0) (0 -290))
rect(l14 (-1205 320) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
rect(l21 (-1175 -770) (170 170))
rect(l23 (-170 80) (170 170))
rect(l24 (-160 145) (150 150))
polygon(l22 (-900 -795) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(7 name(bl)
polygon(l9 (520 -165) (0 80) (-60 0) (0 170) (60 0) (0 80) (170 0) (0 -330))
rect(l12 (-260 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-140 -2860) (170 170))
rect(l23 (-230 -170) (170 170))
rect(l2 (-235 -210) (420 265))
)
net(8 name(bl_n)
polygon(l9 (1490 -165) (0 330) (170 0) (0 -80) (60 0) (0 -170) (-60 0) (0 -80))
rect(l12 (-140 20) (230 2920))
rect(l12 (-116 -1461) (2 2))
rect(l11 (-116 -1461) (230 2920))
rect(l21 (-260 -2860) (170 170))
rect(l23 (-110 -170) (170 170))
rect(l2 (-355 -210) (420 265))
)
net(9
polygon(l7 (265 140) (0 150) (690 0) (0 180) (270 0) (0 -180) (690 0) (0 -150))
)
net(10 name(vss)
rect(l9 (-85 -165) (170 1170))
rect(l9 (2010 -1170) (170 1170))
rect(l11 (-2395 -1165) (260 320))
rect(l11 (1920 -320) (260 320))
rect(l14 (-2470 -290) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
rect(l21 (-2425 -215) (170 170))
rect(l21 (-170 670) (170 170))
rect(l21 (2010 -170) (170 170))
rect(l21 (-170 -1010) (170 170))
rect(l23 (-2350 -170) (170 170))
rect(l23 (2010 -170) (170 170))
rect(l24 (-2340 -160) (150 150))
rect(l24 (2030 -150) (150 150))
rect(l2 (-215 555) (265 420))
rect(l2 (-2430 -1410) (250 720))
rect(l2 (-250 270) (265 420))
rect(l2 (1915 -1410) (250 720))
rect(l6 (-250 -720) (250 720))
rect(l6 (-2430 -720) (250 720))
)
# Outgoing pins and their connections to nets
pin(5 name(vdd))
pin(6 name(wl))
pin(7 name(bl))
pin(8 name(bl_n))
pin(10 name(vss))
# Devices and their connections
device(1 D$sky130_fd_pr__nfet_01v8__model
location(1575 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 8)
terminal(G 6)
terminal(D 4)
terminal(B 10)
)
device(2 D$sky130_fd_pr__nfet_01v8__model$1
location(1965 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 10)
terminal(B 10)
)
device(3 D$sky130_fd_pr__nfet_01v8__model$2
location(605 215)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.18165)
param(PS 1.37)
param(PD 1.285)
terminal(S 7)
terminal(G 6)
terminal(D 3)
terminal(B 10)
)
device(4 D$sky130_fd_pr__nfet_01v8__model$3
location(215 840)
param(L 0.15)
param(W 0.42)
param(AS 0.18165)
param(AD 0.1113)
param(PS 1.285)
param(PD 1.37)
terminal(S 3)
terminal(G 4)
terminal(D 10)
terminal(B 10)
)
device(5 D$sky130_fd_pr__pfet_01v8__model
location(1965 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1869)
param(AD 0.1113)
param(PS 1.73)
param(PD 1.37)
terminal(S 4)
terminal(G 3)
terminal(D 5)
terminal(B 5)
)
device(6 D$sky130_fd_pr__pfet_01v8__model$1
location(215 2170)
param(L 0.15)
param(W 0.42)
param(AS 0.1113)
param(AD 0.1869)
param(PS 1.37)
param(PD 1.73)
terminal(S 5)
terminal(G 4)
terminal(D 3)
terminal(B 5)
)
)
circuit(SP6TArray_2X1
# Circuit boundary
rect((-385 -305) (2950 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name(vdd)
rect(l14 (-160 -130) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l14 (-1251 5419) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -5681) (2500 260))
rect(l13 (-2500 5290) (2500 260))
)
net(4 name('wl[0]')
rect(l14 (0 1785) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(5 name('wl[1]')
rect(l14 (0 3505) (2180 260))
rect(l14 (-1091 -131) (2 2))
rect(l13 (-1091 -131) (2180 260))
)
net(6 name(vss)
rect(l14 (-160 2645) (2500 260))
rect(l14 (-1251 -131) (2 2))
rect(l13 (-1251 -131) (2500 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name(vdd))
pin(4 name('wl[0]'))
pin(5 name('wl[1]'))
pin(6 name(vss))
# Subcircuits and their connections
circuit(1 SP6TCell location(0 2775)
pin(0 3)
pin(1 5)
pin(2 1)
pin(3 2)
pin(4 6)
)
circuit(2 SP6TCell mirror location(0 2775)
pin(0 3)
pin(1 4)
pin(2 1)
pin(3 2)
pin(4 6)
)
)
circuit(SP6TArray_2X2
# Circuit boundary
rect((-385 -305) (5130 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name(vdd)
rect(l14 (-160 5420) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l14 (-2341 -5681) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 5419) (4680 260))
rect(l13 (-4680 -5810) (4680 260))
)
net(6 name('wl[0]')
rect(l14 (0 1785) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(7 name('wl[1]')
rect(l14 (0 3505) (4360 260))
rect(l14 (-2181 -131) (2 2))
rect(l13 (-2181 -131) (4360 260))
)
net(8 name(vss)
rect(l14 (-160 2645) (4680 260))
rect(l14 (-2341 -131) (2 2))
rect(l13 (-2341 -131) (4680 260))
)
# Outgoing pins and their connections to nets
pin(1 name('bl[0]'))
pin(2 name('bl_n[0]'))
pin(3 name('bl[1]'))
pin(4 name('bl_n[1]'))
pin(5 name(vdd))
pin(6 name('wl[0]'))
pin(7 name('wl[1]'))
pin(8 name(vss))
# Subcircuits and their connections
circuit(1 SP6TArray_2X1 location(0 0)
pin(0 1)
pin(1 2)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
circuit(2 SP6TArray_2X1 location(2180 0)
pin(0 3)
pin(1 4)
pin(2 5)
pin(3 6)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TArray_2X4
# Circuit boundary
rect((-385 -305) (9490 6160))
# Nets with their geometries
net(1 name('bl[0]')
rect(l12 (430 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(2 name('bl_n[0]')
rect(l12 (1520 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(3 name('bl[1]')
rect(l12 (2610 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(4 name('bl_n[1]')
rect(l12 (3700 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(5 name('bl[2]')
rect(l12 (4790 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(6 name('bl_n[2]')
rect(l12 (5880 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(7 name('bl[3]')
rect(l12 (6970 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(8 name('bl_n[3]')
rect(l12 (8060 0) (230 5550))
rect(l12 (-116 -2776) (2 2))
rect(l11 (-116 -2776) (230 5550))
)
net(9 name(vdd)
rect(l14 (-160 -130) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l14 (-4521 5419) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -5681) (9040 260))
rect(l13 (-9040 5290) (9040 260))
)
net(10 name('wl[0]')
rect(l14 (0 1785) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(11 name('wl[1]')
rect(l14 (0 3505) (8720 260))
rect(l14 (-4361 -131) (2 2))
rect(l13 (-4361 -131) (8720 260))
)
net(12 name(vss)
rect(l14 (-160 2645) (9040 260))
rect(l14 (-4521 -131) (2 2))
rect(l13 (-4521 -131) (9040 260))
)
# Subcircuits and their connections
circuit(1 SP6TArray_2X2 location(0 0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
circuit(2 SP6TArray_2X2 location(4360 0)
pin(0 5)
pin(1 6)
pin(2 7)
pin(3 8)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Reference netlist
reference(
# Device class section
class(SKY130_FD_PR__PFET_01V8__MODEL MOS4)
class(SKY130_FD_PR__NFET_01V8__MODEL MOS4)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(SP6TCELL
# Nets
net(1 name(VDD))
net(2 name(VSS))
net(3 name(WL))
net(4 name(BL))
net(5 name(BL_N))
net(6 name(BIT_N))
net(7 name(BIT))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(VSS))
pin(3 name(WL))
pin(4 name(BL))
pin(5 name(BL_N))
# Devices and their connections
device(1 SKY130_FD_PR__PFET_01V8__MODEL
name(PU1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 6)
terminal(D 7)
terminal(B 1)
)
device(2 SKY130_FD_PR__PFET_01V8__MODEL
name(PU2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 1)
terminal(B 1)
)
device(3 SKY130_FD_PR__NFET_01V8__MODEL
name(PD1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 2)
terminal(G 6)
terminal(D 7)
terminal(B 2)
)
device(4 SKY130_FD_PR__NFET_01V8__MODEL
name(PD2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 6)
terminal(G 7)
terminal(D 2)
terminal(B 2)
)
device(5 SKY130_FD_PR__NFET_01V8__MODEL
name(PG1)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 4)
terminal(G 3)
terminal(D 7)
terminal(B 2)
)
device(6 SKY130_FD_PR__NFET_01V8__MODEL
name(PG2)
param(L 0.15)
param(W 0.42)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 5)
terminal(G 3)
terminal(D 6)
terminal(B 2)
)
)
circuit(SP6TARRAY_2X1
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
# Subcircuits and their connections
circuit(1 SP6TCELL name(INST0X0)
pin(0 2)
pin(1 1)
pin(2 3)
pin(3 5)
pin(4 6)
)
circuit(2 SP6TCELL name(INST1X0)
pin(0 2)
pin(1 1)
pin(2 4)
pin(3 5)
pin(4 6)
)
)
circuit(SP6TARRAY_2X2
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X1 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
)
circuit(2 SP6TARRAY_2X1 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 7)
pin(5 8)
)
)
circuit(SP6TARRAY_2X4
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name('WL[0]'))
net(4 name('WL[1]'))
net(5 name('BL[0]'))
net(6 name('BL_N[0]'))
net(7 name('BL[1]'))
net(8 name('BL_N[1]'))
net(9 name('BL[2]'))
net(10 name('BL_N[2]'))
net(11 name('BL[3]'))
net(12 name('BL_N[3]'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name('WL[0]'))
pin(4 name('WL[1]'))
pin(5 name('BL[0]'))
pin(6 name('BL_N[0]'))
pin(7 name('BL[1]'))
pin(8 name('BL_N[1]'))
pin(9 name('BL[2]'))
pin(10 name('BL_N[2]'))
pin(11 name('BL[3]'))
pin(12 name('BL_N[3]'))
# Subcircuits and their connections
circuit(1 SP6TARRAY_2X2 name(INST0X0)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 5)
pin(5 6)
pin(6 7)
pin(7 8)
)
circuit(2 SP6TARRAY_2X2 name(INST0X1)
pin(0 1)
pin(1 2)
pin(2 3)
pin(3 4)
pin(4 9)
pin(5 10)
pin(6 11)
pin(7 12)
)
)
)
# Cross reference
xref(
circuit(SP6TArray_2X1 SP6TARRAY_2X1 match
xref(
net(1 5 match)
net(2 6 match)
net(3 2 match)
net(6 1 match)
net(4 3 match)
net(5 4 match)
pin(0 4 match)
pin(1 5 match)
pin(2 1 match)
pin(5 0 match)
pin(3 2 match)
pin(4 3 match)
circuit(2 1 match)
circuit(1 2 match)
)
)
circuit(SP6TArray_2X2 SP6TARRAY_2X2 match
xref(
net(1 5 match)
net(3 7 match)
net(2 6 match)
net(4 8 match)
net(5 2 match)
net(8 1 match)
net(6 3 match)
net(7 4 match)
pin(0 4 match)
pin(2 6 match)
pin(1 5 match)
pin(3 7 match)
pin(4 1 match)
pin(7 0 match)
pin(5 2 match)
pin(6 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TArray_2X4 SP6TARRAY_2X4 match
xref(
net(1 5 match)
net(3 7 match)
net(5 9 match)
net(7 11 match)
net(2 6 match)
net(4 8 match)
net(6 10 match)
net(8 12 match)
net(9 2 match)
net(12 1 match)
net(10 3 match)
net(11 4 match)
pin(() 4 match)
pin(() 6 match)
pin(() 8 match)
pin(() 10 match)
pin(() 5 match)
pin(() 7 match)
pin(() 9 match)
pin(() 11 match)
pin(() 1 match)
pin(() 0 match)
pin(() 2 match)
pin(() 3 match)
circuit(1 1 match)
circuit(2 2 match)
)
)
circuit(SP6TCell SP6TCELL match
xref(
net(3 7 match)
net(4 6 match)
net(7 4 match)
net(8 5 match)
net(5 1 match)
net(10 2 match)
net(6 3 match)
pin(2 3 match)
pin(3 4 match)
pin(0 0 match)
pin(4 1 match)
pin(1 2 match)
device(4 3 match)
device(2 4 match)
device(3 5 match)
device(1 6 match)
device(6 1 match)
device(5 2 match)
)
)
)