Commit Graph

356 Commits

Author SHA1 Message Date
Cary R 8edf14ae68 Check for primitive port mismatches and other error cleanup 2024-12-08 22:21:51 -08:00
Martin Whitaker 62727e8b2e Add regression tests for packed/unpacked array parameter declarations.
These are currently unsupported, so should result in a compiler error.
2024-11-15 21:10:51 +00:00
Martin Whitaker 6c8ed62a5a Add regression test for issue #1181. 2024-11-10 19:34:36 +00:00
Cary R 00fcd58fab A repeat concatenation cannot be used as a net l-value 2024-11-09 17:21:44 -08:00
Dag Lem ba7da9d5a5 Guard against overflow / wrap around of internal part-select bit address
Internally, the maximum address space of a vector is 31 bits + a sign bit
to signal invalid addresses (out of bounds or has one or more x or z bits).

This commit ensures that unsigned part-select bit addresses which would
otherwise overflow and wrap around within this address space are correctly
handled as out of bounds.
2024-09-16 23:50:24 +02:00
Martin Whitaker 2ab57a2b09 Add regression test for return type of $bits (issue #1163). 2024-09-07 17:56:15 +01:00
martinwhitaker 34ed6f6f97
Merge pull request #1168 from steveicarus/fix-vvp-cg-array-word-aliasing
Fix vvp cg array word aliasing
2024-09-07 17:04:57 +01:00
martinwhitaker 74ba42e2df
Merge pull request #1166 from larsclausen/fix-ix-load-sign
tgt-vvp: Use signedness of expression instead of signal for index load
2024-09-07 17:04:40 +01:00
Martin Whitaker ae78218c2f Add regression test for issue #1155. 2024-09-03 21:38:09 +01:00
Lars-Peter Clausen 841e5a9d9e ivtest: Add regression test to check that shift rhs is always unsigned
Add a regression test to check that the right-hand side of a shift
operation is always treated as unsigned, even if it is a signed registers
or a variation thereof.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2024-09-02 19:09:06 +02:00
Lars-Peter Clausen fa83f42cba ivtest: Add regression test for undefined intra-assignment delay
Check that assignments with undefined intra-assignment delay get executed
with zero delay. The assignment should not be skipped.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2024-09-02 14:11:29 +02:00
Cary R 676b36e455 Fix space issues in the source code 2024-07-21 11:19:41 -07:00
Martin Whitaker cb6544fac3 Add regression tests for issue #1143. 2024-07-09 22:22:39 +01:00
Martin Whitaker 5cbdff202e Add regression tests for checking constant function call scopes. 2024-06-30 11:52:54 +01:00
Martin Whitaker 94d9d19519 Add regression test for issue #1122. 2024-05-06 21:47:18 +01:00
Paul Rigge 28187823ed
Update handling of single-element arrays.
Also, add a test. This fixes #1113.
2024-04-15 13:14:53 -07:00
Martin Whitaker ef7f0a8f38 Add regression tests for early signal elaboration. 2024-04-06 10:19:00 +01:00
Martin Whitaker ff4cd2c5da Merge branch 'declare-before-use' 2024-04-06 09:13:07 +01:00
Martin Whitaker 52d049b513 Add additional regression tests for issue #1099. 2024-02-25 21:55:37 +00:00
Martin Whitaker 3624a54f7f Add regression test for issue #1104. 2024-02-24 13:36:25 +00:00
Martin Whitaker 0679d7c8cf Add regression test for issue #1099 2024-02-24 11:49:46 +00:00
Martin Whitaker d043c1fa44 Add regression tests for declare before use. 2024-02-20 08:46:28 +00:00
Martin Whitaker cd76bd2371 Fix tests that used variables/nets before declaring them.
The sdf_interconnect tests just need the code reordering. The
pr1909940 tests were written to test use before declaration, so
now need to be CE tests.
2024-02-19 18:20:04 +00:00
Martin Whitaker 72e86d396c Add regression test for issue #703. 2024-02-09 22:38:32 +00:00
Martin Whitaker 2299fc1b2b Add regression tests for mixed procedural/continuous assignments. 2024-02-03 22:24:22 +00:00
Martin Whitaker 53b8220b9f Add extra regression tests for multiple drivers on uwires. 2024-02-03 22:23:45 +00:00
Martin Whitaker 5e139890b6 Add regression test for connecting module output port to array variable (issue #1001). 2024-01-30 23:31:56 +00:00
Martin Whitaker 39753da458 Add regression test for disabling binary NAND and NOR operators. 2024-01-28 22:47:46 +00:00
Martin Whitaker 81d7abaf88 Add regression tests for checking wire data types (issue 1087). 2024-01-28 15:53:47 +00:00
Martin Whitaker fbb2d91927 Add regression tests for issue #1074. 2024-01-27 16:17:31 +00:00
Stephen Williams 71b9c551df Move tests pr2509349a/b to the new test format.
This removes the regress-msys2.list file, fixes the output from the
pr2509349a.v test to not be different on different systems, and
documents the $readmempath task.
2024-01-21 15:49:09 -08:00
Cary R d42f97ecbe Cleanup space issues 2024-01-20 11:26:06 -08:00
Lars-Peter Clausen 2d611c4347 ivtest: pr1002: Avoid race condition
The pr1002 test has a always block with the `dataout` in its sensitivity
list. It compares `dataout` to `expected_dataout`.

Both `dataout` and `expected_dataout` depend on `datain` and are updated in
the same cycle. This means there is no guarantee in which order they are
updated and the always block might get scheduled before `expected_dataout`
has been updated. This can lead to a test failure.

To avoid this slightly change the test to use a task to perform the
comparison and add an explicit delay before the task is executed so that
all updates have a chance to be fully resolved

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2024-01-20 10:32:55 -08:00
Lars-Peter Clausen 9b1ac6ab50 ivtest: Fix `assign` vs `initial` race condition in some tests
The first evaluation of an `assign` statement is scheduled at the same time as
`initial` statements.

There are some test cases that evaluate the result of an `assign` statement
in an `initial` statement. This is an inherent race condition and might
fail depending on the exact order of evaluation.

To fix this add an additional delay in the `initial` block. This will make
sure that all `assign` statements get fully resolved first.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2024-01-20 10:32:02 -08:00
Martin Whitaker 7b99cd25ca Add regression tests for suppressed VCD/LXT/LXT2 warnings (issue #710) 2024-01-07 20:34:45 +00:00
Martin Whitaker fa2dfe690c Add regression test for synthesisable for loop check (issue #687) 2024-01-07 13:23:36 +00:00
Cary R 7c25e8506c
Merge pull request #1060 from larsclausen/ident-test-width
Correctly calculate width of nested path identifiers
2024-01-01 12:26:51 -08:00
Cary R 1712b2e8e8
Merge pull request #1059 from larsclausen/invalid-partsel
Detect reversed part select on inner dimensions
2024-01-01 12:25:07 -08:00
Cary R 724a88f523
Update array_slice_concat.v
Add delay to avoid race in TB code and DUT code
2024-01-01 11:01:19 -08:00
Lars-Peter Clausen 9a563e9bab Add regression test for nested struct width
Check that expression width is correctly calculated for nested structs.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-12-30 18:30:24 -08:00
Johan Euphrosine 0b22810a25 ivtests/array_slice_contact: add tb 2023-12-30 10:57:24 +09:00
Johan Euphrosine fbbff9646d ivtest: add array_slice_concat 2023-12-30 10:57:24 +09:00
Lars-Peter Clausen 57f8084d0c Add regression tests for reversed part select indices
Check that reversed part selects result in an error. Check this for both
right-hand and left-hand side expressions as well as for inner and outer
dimensions.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-12-29 16:34:46 -08:00
Cary R cc829031ff Elaborate system elab tasks in gen blocks 2023-12-28 15:07:37 -08:00
Lars-Peter Clausen 7fb1cabdbb
Merge pull request #1055 from larsclausen/invalid-index-base
Handle invalid vector slice base expressions
2023-12-28 13:38:28 -08:00
Cary R b14c4ca26c add suport for the shortreal conversion functions 2023-12-28 13:30:27 -08:00
Lars-Peter Clausen 8f006a22b4 Add regression tests for invalid part select base expressions
Check that a invalid part select base expression results in a compile
error.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2023-12-28 13:21:37 -08:00
Cary R 57524836f1 Fix space issues 2023-12-28 11:21:09 -08:00
Stephen Williams 0be07afab3 ivtest: Remove the regress-v10 test list
This list is not needed with the new scheme. This means that some gold
files that are v10 specific are removed, as well as the list itself.
2023-12-10 19:05:12 -08:00
Cary R 987b7d1dc0 fread() support integral variables not just registers 2023-12-09 14:30:25 -08:00