Commit Graph

20 Commits

Author SHA1 Message Date
steve e4ae832153 Clean up spurious trailing white space. 2004-10-04 01:10:51 +00:00
steve 534a656be8 devices need show_cmp_gt 2003-11-12 03:20:14 +00:00
steve 7734ba99fc Generate MUXF5 based 4-input N-wide muxes. 2003-07-04 00:10:09 +00:00
steve eb605694eb More xilinx common code. 2003-07-02 03:02:15 +00:00
steve 03089bdbf3 Add support for wide OR/NOR gates. 2003-06-28 04:18:47 +00:00
steve 253f3bc660 Add Xilinx support for A/B MUX devices. 2003-06-26 03:57:05 +00:00
steve 0e797dc7bc Virtex and Virtex2 share much code. 2003-06-25 02:55:57 +00:00
steve f7162eb538 Spelling fixes. 2003-06-25 01:49:06 +00:00
steve 957a464743 Virtex support for NOT gates. 2003-06-25 01:46:44 +00:00
steve 79248d0592 Add ivl_synthesis_cell support for virtex2. 2003-06-24 03:55:00 +00:00
steve aad7816949 Move library cell management to common file. 2003-04-05 05:53:34 +00:00
steve 15fa7246f2 Fix LUT function for chained NE. 2003-04-05 01:35:40 +00:00
steve 882c46437c Add == and some lut logic. 2003-04-04 06:20:29 +00:00
steve 6495d0bd5d Add xlibrary celltable. 2003-04-04 04:59:03 +00:00
steve 9531aafaf2 Wide shift of MUX was wrong. 2003-03-31 01:34:19 +00:00
steve aa9ab7e09c Fix wrong input constant to bottom of GE. 2003-03-31 00:25:19 +00:00
steve 2be1b1a096 Proper sliced >= comparator. 2003-03-31 00:04:21 +00:00
steve 3878f3c770 Handle wide ports of macros. 2003-03-30 03:43:44 +00:00
steve a49df16d44 Give proper basenames to PAD signals. 2003-03-24 02:29:04 +00:00
steve ff032fa18c Add new virtex2 architecture family, and
also the new edif.h EDIF management functions.
2003-03-24 00:47:54 +00:00