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OpenRAM
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4,371 Commits 4 Branches 63 Tags 78 MiB
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3592 Commits

Author SHA1 Message Date
Eren Dogan 4fe5aa49e4 Reorganize utility functions for Hanan router 2023-06-01 14:24:40 -07:00
Eren Dogan e3d8ad13b2 Remove blocked Hanan node connections 2023-05-30 20:09:10 -07:00
Eren Dogan 2799c106bd Divide long code into sub-functions 2023-05-30 13:36:38 -07:00
Eren Dogan 136d4564a2 Use less memory when removing blocked Hanan points 2023-05-30 11:10:34 -07:00
Eren Dogan 9f75e68a92 Simplify Hanan graph generation 2023-05-29 21:49:00 -07:00
Eren Dogan 6079152092 Cleanup Hanan router 2023-05-29 12:43:43 -07:00
Eren Dogan e1e24f6d06 Rename gridless router 2023-05-29 09:18:55 -07:00
Eren Dogan 533c1c9472 Fix gridless router for tall and fat pins 2023-05-28 21:25:11 -07:00
Eren Dogan 33f1b924a4 Avoid blockages when connecting Hanan points 2023-05-22 18:16:49 -07:00
Eren Dogan 648a631a28 Use Hanan points to generate the routing graph 2023-05-22 13:08:21 -07:00
Eren Dogan cd339ebbd0 Add A* algorithm for navigation router 2023-05-09 13:23:01 -07:00
Eren Dogan 909ac6ce68 Add initial files for navigation router 2023-05-04 20:51:30 -07:00
Eren Dogan 938da3b369 Merge branch 'sky130_regress' into dev 2023-04-26 12:33:21 -07:00
Eren Dogan 51ddb08385 Enable sky130 regression but disable failing tests 2023-04-13 22:12:46 -07:00
Eren Dogan ed8242daf8 Add OPENRAM_TECH to package namespace 2023-04-12 13:18:00 -07:00
Eren Dogan 095e0baddd Remove CHECKPOINT_OPTS since it is not used 2023-04-07 12:32:29 -07:00
Jacob Walker 0b056dca54 fixed rom bank test name 2023-03-30 18:44:55 -07:00
Jacob Walker 52791a2719 a space 2023-03-30 11:30:50 -07:00
Jacob Walker c1fb3cab6c 1kb rom DRC clean 2023-03-30 11:30:50 -07:00
Jacob Walker 7805fcb21e more top level routing cleanup 2023-03-30 11:30:50 -07:00
Jacob Walker fef9902c45 rom base passing tests with top level routing 2023-03-30 11:30:50 -07:00
mrg 7c453e80be Simplify ROM test. 2023-03-30 11:30:50 -07:00
mrg af0a6d32fb Remove old skip tests 2023-03-30 11:30:50 -07:00
mrg 2075d244cb Change ROM test permissions to include x 2023-03-30 11:30:50 -07:00
Jacob Walker 4c34a54d32 top level boundary fixes 2023-03-30 11:30:50 -07:00
Jacob Walker 7fe5ed5c41 edge routing 2023-03-30 11:30:50 -07:00
Jacob Walker 09f9c4cc20 some rom bank cleanup 2023-03-30 11:30:50 -07:00
mrg 56e14113aa Change rom_base_bank name and top pin names 2023-03-30 11:30:50 -07:00
mrg d2b5be0130 Add exclude tests for ROMs 2023-03-30 11:30:50 -07:00
mrg fe65a20431 Rename ROM unit tests. 2023-03-30 11:30:50 -07:00
Jacob Walker eec0f02bb8 skip test file 2023-03-30 11:30:50 -07:00
Jacob Walker b50ec272da updated top level rom unit tests 2023-03-30 11:30:50 -07:00
Jacob Walker 41f0b9a412 rom compiler top level 2023-03-30 11:30:50 -07:00
Jacob Walker 2d5199961d revert changes to pinvbuf 2023-03-30 11:30:50 -07:00
Jacob Walker 382c91f342 precharge array test passing sky130 2023-03-30 11:30:50 -07:00
Jacob Walker 92251fe61e more code cleaning 2023-03-30 11:30:50 -07:00
Jacob Walker 90cf382a43 removed hardcoded DRC rule 2023-03-30 11:30:50 -07:00
Jacob Walker 0cb4459b4b changed ROM test data path 2023-03-30 11:30:50 -07:00
Jacob Walker af0209ec96 passing code style 2023-03-30 11:30:50 -07:00
Jacob Walker 79efff9ca6 code cleanup and updated copyright 2023-03-30 11:30:50 -07:00
Jacob Walker bbf2cd2913 Changes for test generation and simulation 2023-03-30 11:30:50 -07:00
Jacob Walker 89c7d50bd1 added row of nmos to end of array for precharge 2023-03-30 11:30:50 -07:00
SWalker f847721500 changes to control logic, invert polarity of precharge 2023-03-30 11:30:50 -07:00
SWalker 9cefe5da7c added unrouted output buffers 2023-03-30 11:30:50 -07:00
SWalker 764601a721 added binning to precharge pmos 2023-03-30 11:30:50 -07:00
Jesse Cirimelli-Low 6981cfa58b add example of writing out simulation netlist 2023-03-30 11:30:50 -07:00
Jacob Walker 736bd51fe1 add top level pins for sim 2023-03-30 11:30:50 -07:00
Jacob Walker 81bf2d7ae7 fixed decode lvs 2023-03-30 11:30:50 -07:00
Jacob Walker 16df8e0e43 fixing decoder lvs 2023-03-30 11:30:50 -07:00
Jacob Walker 559300e5cc taps in main array and decoder 2023-03-30 11:30:50 -07:00