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add example of writing out simulation netlist

This commit is contained in:
Jesse Cirimelli-Low 2023-02-01 23:08:47 -08:00 committed by Jacob Walker
parent a64361b9d1
commit 6981cfa58b
1 changed files with 3 additions and 1 deletions
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4
compiler/tests/05_rom_base_bank_small_test.py
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@ -26,6 +26,8 @@ class rom_bank_test(openram_test):
a = factory.create(module_type="rom_base_bank", strap_spacing = 8, data_file="/openram/technology/rom_data_64B", word_size=1)
self.local_check(a)
print('wriitng file')
a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
openram.end_openram()
# run the test from the command line
@ -33,4 +35,4 @@ if __name__ == "__main__":
(OPTS, args) = openram.parse_args()
del sys.argv[1:]
header(__file__, OPTS.tech_name)
unittest.main(testRunner=debugTestRunner())
unittest.main(testRunner=debugTestRunner())