2624 Commits

Author	SHA1	Message	Date
Emil J. Tywoniak	772d821fb0	opt_expr: reindent test	2025-12-19 18:32:56 +01:00
Akash Levy	abd485fa49	Bump Yosys to latest	2025-12-17 21:06:17 -08:00
N. Engelhardt	45d654e2d7	avoid merging formal properties	2025-12-17 20:25:24 +01:00
Miodrag Milanović	d861a26e49	Merge pull request #5504 from nataliakokoromyti/verific-run-test-bugfix ... Fix Verific run-test.sh	2025-12-17 11:08:44 +01:00
nataliakokoromyti	2ded4bd893	Update run-test.sh ... fix: preserve newline at eof	2025-12-16 04:16:03 -08:00
Krystine Sherwin	c69be9d767	Missed an iverilog ... Should now still report an iverilog issue if `iverilog` doesn't exist.	2025-12-15 10:31:17 +13:00
Krystine Sherwin	24f4902156	Don't mention iverilog if the error wasn't from iverilog	2025-12-15 10:17:19 +13:00
Emil J	f003eca615	Merge pull request #5526 from YosysHQ/emil/fix-cellaigs-function-arg-eval-order ... cellaigs: fix function argument evaluation order	2025-12-12 10:00:09 +01:00
Krystine Sherwin	4da0c552dd	tests/aiger: Fix pipe hiding diff exit status	2025-12-12 11:26:24 +13:00
Yannick Lamarre	54b278d574	Add tests for implicit wires in generate blocks. ... Signed-off-by: Yannick Lamarre <yan.lamarre@gmail.com>	2025-12-10 14:43:42 +01:00
Emil J	e08e9119ee	Merge pull request #5516 from rocallahan/limit-threads ... Limit thread usage in tests	2025-12-10 13:45:07 +01:00
Akash Levy	2aeada6980	Bump Yosys to latest	2025-12-05 20:05:16 -08:00
Emil J	46fbed6e6f	Merge pull request #5525 from YosysHQ/emil/fix-xaiger2-empty-cell-input ... aiger2: fix empty cell input	2025-12-04 16:47:53 +01:00
Robert O'Callahan	2ca28d964b	Limit YOSYS_MAX_THREADS to 4 for abcopt-tests	2025-12-04 12:09:49 +01:00
Robert O'Callahan	a871415abf	Limit YOSYS_MAX_THREADS to 4 when running seed-tests	2025-12-04 12:09:48 +01:00
Robert O'Callahan	fc951a28d3	Limit YOSYS_MAX_THREADS to 4 when running makefile-tests so we don't overload systems when running 'make -j... test'	2025-12-04 12:09:04 +01:00
Akash Levy	5dfadb968f	Merge branch 'YosysHQ:main' into main	2025-12-03 13:28:56 -05:00
Gus Smith	07a690570e	Merge pull request #5128 from gussmith23/gussmith23-rosette-backend-updates ... Add association-list-based helper functions into Rosette backend	2025-12-02 16:27:05 -08:00
Emil J. Tywoniak	36f0e0392f	aiger2: add crash test	2025-12-02 15:30:02 +01:00
Akash Levy	c2d8a4e43f	Merge branch 'YosysHQ:main' into main	2025-12-01 23:54:18 -05:00
Krystine Sherwin	b2e527c67e	tests/aiger: Only write aigmap.err on error	2025-12-02 14:17:16 +13:00
Krystine Sherwin	6842003e76	tests/aiger: Add gold .aag files ... Generated with changes from 26f2c111	2025-12-02 14:03:37 +13:00
Krystine Sherwin	e2e7922756	tests/aiger: Compare .aag outputs against known ... Any files that differ (e.g. due to compiler order of operations changing) will trigger an error.	2025-12-02 14:03:36 +13:00
Emil J	9871e9b17e	Merge pull request #5496 from YosysHQ/emil/liberty-flop-loops ... read_liberty: support loopy retention cells	2025-12-01 22:50:20 +01:00
Gus Smith	38ee4fc730	Undo more unnecessary changes	2025-11-29 16:17:27 -08:00
Gus Smith	62e666c2ed	Make run-test work from anywhere	2025-11-29 16:08:42 -08:00
Gus Smith	fb8a1ad3bc	Add back param	2025-11-29 16:07:18 -08:00
Gus Smith	0f8e1e3bf7	Undo more changes	2025-11-29 16:06:18 -08:00
Gus Smith	5f84b8b339	Undo some other changes	2025-11-29 15:32:19 -08:00
Gus Smith	e223087578	Undo more changes that slipped in from somewhere? a merge maybe?	2025-11-29 15:28:34 -08:00
Gus Smith	5d5a7ab443	remove unused	2025-11-29 15:08:57 -08:00
Gus Smith	473edd19ed	Undo formatting	2025-11-29 15:06:46 -08:00
Gus Smith	403740428c	Remove unknown change	2025-11-29 15:01:17 -08:00
Gus Smith	6fe35fa46c	Merge remote-tracking branch 'origin/main' into gussmith23-rosette-backend-updates	2025-11-29 14:20:36 -08:00
Akash Levy	4a25f63699	Merge from upstream	2025-11-29 11:53:48 -05:00
Natalia	d4e0437cfd	Fix Verific run-test.mk setup	2025-11-24 15:56:28 -08:00
Akash Levy	71ba176b50	Merge branch 'YosysHQ:main' into main	2025-11-24 14:04:13 -05:00
Krystine Sherwin	a8e8746fc0	tests: Tidy up bug3515 ... Add base case where mapping is possible for sanity checking.	2025-11-25 07:35:19 +13:00
Krystine Sherwin	ba31a02578	tests: Add bug3515	2025-11-25 07:04:34 +13:00
Akash Levy	a705042d2e	Merge branch 'YosysHQ:main' into main	2025-11-20 23:05:40 -05:00
Krystine Sherwin	44ab884b06	bug5495.sh: Skip test if timeout isn't available	2025-11-21 04:03:39 +00:00
Krystine Sherwin	4d1b688717	Tests: Add testcase for problematic ABC DONE check	2025-11-21 14:46:01 +13:00
Emil J. Tywoniak	bfc957ee2d	filterlib, read_liberty: add loopy retention cell formal equivalence test	2025-11-21 00:57:54 +01:00
Emil J. Tywoniak	b3112bf025	filterlib: prefer using precedence over unsynthesizable verilog	2025-11-21 00:43:54 +01:00
Miodrag Milanović	e83d721cb0	Merge pull request #5492 from donn/getitem ... pyosys: __getitem__ for supported classes	2025-11-19 17:58:01 +01:00
Mohamed Gaber	58e831486d	pyosys: __getitem__ for supported classes ... - functions that have a const `[]` operator method now support `__getitem__` in Python - fields of a pointer type now return a `reference_internal` instead of a `copy` because classes referenced to by pointers typically aren't copyable (e.g. RTLIL::Wire, RTLIL::Module, etc) - removed duplicate of test_script.py	2025-11-19 18:09:41 +02:00
Emil J. Tywoniak	920f4793fb	sdc: error on unknown getters	2025-11-19 15:26:02 +01:00
Emil J. Tywoniak	07de7509bf	sdc: add -keep_hierarchy test	2025-11-19 15:26:02 +01:00
Emil J. Tywoniak	dc48ceadd9	sdc: collect strictly matching objects	2025-11-19 15:25:24 +01:00
Emil J. Tywoniak	c26aa3186d	sdc: collect design objects	2025-11-19 15:25:24 +01:00
Akash Levy	a90a5e10d6	Merge branch 'YosysHQ:main' into main	2025-11-18 11:48:04 -05:00
Miodrag Milanovic	58d4e2c38e	ignore generated file	2025-11-17 13:35:38 +01:00
Robert O'Callahan	b870693393	Fix reset_auto_counter_id to correctly detect _NNN_ patterns ... This fixes a regression caused by commit c4c389fdd7.	2025-11-17 09:21:59 +00:00
Akash Levy	1a966c4459	Merge branch 'YosysHQ:main' into main	2025-11-14 17:36:57 -05:00
Miodrag Milanović	4bfdc62f65	Merge pull request #5472 from Anhijkt/arst-fsm-handling ... fsm_detect: add adff detection	2025-11-14 13:47:08 +01:00
Anhijkt	b08195a9cf	typo	2025-11-14 13:34:58 +02:00
Anhijkt	a75b999f13	fsm_detect: fix test	2025-11-14 13:25:51 +02:00
Akash Levy	71586d39b0	Merge from upstream	2025-11-12 08:14:33 -08:00
Emil J. Tywoniak	ae281720cf	tests: remove unstable FPGA synthesis result checks	2025-11-12 11:52:04 +01:00
Robert O'Callahan	df8444c5e7	Optimize IdString operations to avoid calling c_str()	2025-11-12 11:52:04 +01:00
Robert O'Callahan	e95ed7bbab	Make NEW_ID create IDs whose string allocation is delayed	2025-11-12 11:52:04 +01:00
Robert O'Callahan	54bde15329	Implement IdString garbage collection instead of refcounting.	2025-11-12 11:52:04 +01:00
Akash Levy	e21324d609	Merge from upstream	2025-11-11 22:52:11 -08:00
KrystalDelusion	529886f7fb	Merge pull request #5473 from YosysHQ/krys/unsized_params ... Handle unsized params	2025-11-12 07:14:44 +13:00
Rahul Bhagwat	224109151d	add specific package imports and tests	2025-11-08 23:05:10 +05:30
Akash Levy	d5049ee8cf	Merge remote-tracking branch 'upstream/main'	2025-11-07 01:42:20 -08:00
Krystine Sherwin	7302bf9a66	Add CONST_FLAG_UNSIZED ... In order to support unsized constants being used as parameters, the `const` struct needs to know if it is unsized (so that the parameter can be used to set the size). Add unsized flag to param value serialization and rtlil back-/front-end. Add cell params to `tests/rtlil/everything.v`.	2025-11-07 17:45:07 +13:00
Krystine Sherwin	e4c5900acd	tests/verilog: Unsized params in cell ... Non-zero case fails with `read_verilog`, but passes with `verific` and `read_slang`.	2025-11-07 17:13:12 +13:00
Krystine Sherwin	a5cc905184	simplify.cc: Fix unsized const in params	2025-11-07 15:52:24 +13:00
KrystalDelusion	24b69cabaa	Merge pull request #5422 from YosysHQ/krys/SVI_support ... Catch partial support of SVI	2025-11-07 11:16:07 +13:00
Anhijkt	7d10a72490	fsm_detect: add adff detection	2025-11-06 23:29:47 +02:00
Akash Levy	be421095da	Merge branch 'YosysHQ:main' into main	2025-11-06 13:59:12 -05:00
Emil J	a16fc9b4f3	Merge pull request #5467 from YosysHQ/emil/liberty-unquoted-expressions ... libparse: support unquoted expressions	2025-11-06 19:45:17 +01:00
Akash Levy	2ebed571b5	Baseline	2025-11-06 06:44:35 -08:00
Emil J. Tywoniak	2bf7aac9d1	Makefile: clean unit test on clean, ensure prepared to fix parallelism	2025-11-06 13:59:14 +01:00
Akash Levy	78b1aed973	abc_state merge	2025-11-06 03:24:59 -08:00
Emil J	a2aeef6c96	Merge pull request #5461 from rocallahan/reset-abc-config ... Fix regression in configuring ABC techmapping	2025-11-06 11:58:04 +01:00
Akash Levy	ec535c1b48	Merge branch 'YosysHQ:main' into main	2025-11-05 15:40:09 -05:00
Robert O'Callahan	0f770285f3	Move global ABC configuration variables into AbcConfig and initialize them properly	2025-11-05 13:56:04 +00:00
Martin Povišer	45bb5c690d	Merge pull request #5460 from povik/timeest-comb ... timeest: Add top ports launching/sampling	2025-11-05 14:29:34 +01:00
Emil J. Tywoniak	90553267b0	libparse: fix quoting and negedge in filterlib -verilogsim	2025-11-05 14:13:58 +01:00
Emil J. Tywoniak	b0a3d6a3e7	libparse: fix up tests since liberty expression parsing now normalizes the form of these expressions	2025-11-05 13:06:12 +01:00
Emil J. Tywoniak	4fac7a1b20	libparse: fix space before closing paren in expressions	2025-11-05 13:05:56 +01:00
Akash Levy	11731c91f4	Merge from upstream	2025-11-04 22:20:34 -08:00
Akash Levy	4c903fe7f3	Use upstream implementation of logger_cmd_error.sh in tests/various	2025-11-04 22:00:26 -08:00
KrystalDelusion	52c108cd6a	Merge pull request #4596 from YosysHQ/emil/path-sep-refactor ... Refactor getting dirs and filenames from paths to files	2025-11-05 09:12:54 +13:00
Miodrag Milanović	0751b74e7a	Merge pull request #5441 from donn/pyosys_bugfixes ... pyosys: fix a number of regressions from 0.58	2025-11-04 07:36:25 +01:00
Krystine Sherwin	1a80c26bae	tests: Fix for macos ... Drop non standard `-t` flag for putting the destination directory first.	2025-11-04 11:11:01 +13:00
Akash Levy	76c12f8f8c	Merge branch 'YosysHQ:main' into main	2025-11-03 13:38:04 -05:00
Martin Povišer	5fa7feccd3	timeest: Add top ports launching/sampling	2025-11-03 14:21:28 +01:00
Miodrag Milanović	d0a41d4f58	Merge pull request #5442 from rocallahan/verific-bus-ports ... Set `port_id` for Verific `PortBus` wires	2025-11-03 10:04:07 +01:00
Emil J. Tywoniak	b2fe335b2d	dfflibmap: fix next_state inversion propagation for DFF flops by inverting reset value polarity	2025-10-28 13:56:28 +01:00
Akash Levy	3d06b52ae1	Fix broken Yosys test	2025-10-26 11:40:13 -07:00
Mohamed Gaber	dec28f65ae	Merge remote-tracking branch 'donn/pyosys_bugfixes' into merge_pybind11	2025-10-26 02:39:43 +03:00
Mohamed Gaber	d6b9158fa3	pyosys: fix regressions from 0.58 ... - consistently use value semantics for objects passed along FFI boundary (not ideal but matches previous behavior) - add new overload of RTLIL::Module: addMemory that does not require a "donor" object - the idea is `Module`, `Memory`, `Wire`, `Cell` and `Process` cannot be directly constructed in Python and can only be added to the existing memory hierarchy in `Design` using the `add` methods - `Memory` requiring a donor object was the odd one out here - fix superclass member wrapping only looking at direct superclass for inheritance instead of recursively checking superclasses - fix superclass member wrapping not using superclass's denylists - fix Design's `__str__` function not returning a string - fix the generator crashing if there's any `std::function` in a header - misc: add a crude `__repr__` based on `__str__`	2025-10-26 02:21:40 +03:00
Robert O'Callahan	25aafab86b	Set `port_id` for Verific PortBus wires	2025-10-23 20:51:53 +00:00
Jannis Harder	6a0ee6e4fb	Revert sim's cycle_width default back to 10, but keep -width option	2025-10-20 14:40:05 +02:00
Miodrag Milanovic	f11a61b32b	sim: Make cycle width small as possible and configurable	2025-10-16 11:37:44 +02:00
Miodrag Milanović	759996b968	Merge pull request #5427 from donn/plugin_search_paths ... plugins: add search paths	2025-10-15 20:02:05 +02:00
Emil J	9d21585a4c	Merge pull request #5426 from rocallahan/parse-sigspec ... Don't stop parsing sigspec after a {} group.	2025-10-15 17:31:11 +02:00
Mohamed Gaber	e86797f029	plugins: add search path ... This uses the environment variable `YOSYS_PLUGIN_PATH` to provide multiple colon-delimited search paths for native plugins in a similar manner to `PATH` for executables and `PYTHONPATH` for Python modules. This addresses https://github.com/YosysHQ/yosys/issues/2545, allowing Yosys to be better packaged in non-FHS environments such as Nix.	2025-10-15 14:13:25 +03:00
Robert O'Callahan	e099a7d34a	Don't stop parsing sigspec after a {} group. ... Resolves #5424	2025-10-14 21:18:58 +00:00
Krystine Sherwin	c599d6a67e	tests/svinterfaces: re-chmod test script	2025-10-15 09:49:53 +13:00
Krystine Sherwin	7bb0a1913e	hierarchy.cc: Raise error on positional interface ... Add test to check that it does error.	2025-10-15 09:10:33 +13:00
Miodrag Milanović	2e3bfca294	Merge pull request #5419 from YosysHQ/micko/verific_fix_nocolumns ... verific: Fix error compiling without VERIFIC_LINEFILE_INCLUDES_COLUMNS	2025-10-14 17:05:31 +02:00
Miodrag Milanovic	7d2857b30f	Fix regex checks	2025-10-14 16:04:56 +02:00
N. Engelhardt	4513783a02	add tests	2025-10-14 15:48:16 +02:00
Krystine Sherwin	1eb5181700	Add tests/verilog/local_include.* ... `read_verilog` supports checking both the current directory and the source directory for relative includes. Make sure we aren't regressing that.	2025-10-14 15:47:08 +02:00
Emil J. Tywoniak	e9aedf505c	chtype: replace publish pass with chtype -publish_icells	2025-10-14 15:01:48 +02:00
Emil J. Tywoniak	c46df9ffdc	box_derive: rename -apply to -apply_derived_type	2025-10-13 17:24:32 +02:00
Emil J. Tywoniak	d7cea2c35c	box_derive: add -apply	2025-10-13 17:24:32 +02:00
Emil J	9a12d92551	Merge pull request #5386 from YosysHQ/emil/liberty-glob-all ... Expand wildcards in Liberty file consumers	2025-10-09 20:21:48 +02:00
Miodrag Milanović	ba1a347d59	Merge pull request #5370 from donn/pyosys_pybind11 ... pyosys: rewrite using pybind11	2025-10-08 13:07:59 +02:00
Miodrag Milanović	4cdaac003f	Merge pull request #3991 from adrianparvino/alumacc-sign ... alumacc: merge independent of sign	2025-10-08 13:02:10 +02:00
Mohamed Gaber	80fcce64da	pyosys: fix ref-only classes, implicit conversions ... + cleanup	2025-10-03 11:54:44 +03:00
Mohamed Gaber	c8404bf86b	pyosys/hashlib: equivalence operators	2025-10-03 11:54:44 +03:00
Mohamed Gaber	dc88906c91	tests/pyosys: print log on failed test, fix make clean	2025-10-03 11:54:44 +03:00
Mohamed Gaber	54799bb8be	pyosys: globals, set operators for opaque types ... There is so much templating going on that compiling wrappers.cc now takes 1m1.668s on an Apple M4…	2025-10-03 11:54:44 +03:00
Mohamed Gaber	384f7431fd	pyosys: rewrite wrapper generator ... [skip ci]	2025-10-03 11:54:44 +03:00
Mohamed Gaber	88be728353	pyosys: rewrite using pybind11 ... - Rewrite all Python features to use the pybind11 library instead of boost::python. Unlike boost::python, pybind11 is a header-only library that is just included by Pyosys code, saving a lot of compile time on wheels. - Factor out as much "translation" code from the generator into proper C++ files - Fix running the embedded interpreter not supporting "from pyosys import libyosys as ys" like wheels - Move Python-related elements to `pyosys` directory at the root of the repo - Slight shift in bridging semantics: - Containers are declared as "opaque types" and are passed by reference to Python - many methods have been implemented to make them feel right at home without the overhead/ambiguity of copying to Python and then copying back after mutation - Monitor/Pass use "trampoline" pattern to support virual methods overridable in Python: virtual methods no longer require `py_` prefix - Create really short test set for pyosys that just exercises basic functionality	2025-10-03 11:54:44 +03:00
Akash Levy	6021168b03	Add back VHDL support	2025-10-02 00:39:33 -07:00
Akash Levy	a353716202	Update fanoutbuf	2025-10-01 20:59:36 -07:00
Akash Levy	c8d8c4f408	Add fanoutbuf pass	2025-10-01 19:23:45 -07:00
Akash Levy	17e3ed3258	Remove annotate_unqcoef (for now)	2025-10-01 19:23:13 -07:00
Akash Levy	40f562475e	Smallfix	2025-09-30 14:18:23 -07:00
Akash Levy	16215b8786	Merge upstream	2025-09-29 20:58:56 -07:00
Jannis Harder	47639f8a98	Merge pull request #5388 from jix/bufnorm-followup ... Refactor and fixes to incremental bufNormalize + related changes	2025-09-29 15:15:29 +02:00
Jannis Harder	6a7372626a	Merge pull request #5389 from jix/sva_continue ... verific: New `-sva-continue-on-error` import option	2025-09-29 15:07:54 +02:00
Akash Levy	dfc8607a77	Fixups	2025-09-29 03:49:44 -07:00
Martin Povišer	ffe2f7a16d	opt_hier: Fix two optimizations conflicting ... Fix a conflict between the following two: * propagation of tied-together inputs in * propagation of unused inputs out	2025-09-29 12:27:27 +02:00
Akash Levy	fbc2b71ed4	Revert some stuff	2025-09-29 00:43:49 -07:00
Jannis Harder	86fb2f16f7	bufnorm: Refactor and fix incremental bufNormalize ... This fixes some edge cases the previous version didn't handle properly by simplifying the logic of determining directly driven wires and representatives to use as buffer inputs.	2025-09-29 08:21:28 +02:00
Akash Levy	a0d1c8b30f	More minor cleanup	2025-09-28 07:19:53 -07:00
Akash Levy	507d43a9b8	Fixups	2025-09-28 06:16:07 -07:00
Akash Levy	5efc95f7d9	Clean up	2025-09-28 05:10:05 -07:00
Akash Levy	652a9a63b2	Update to latest and fix all disabled tests	2025-09-28 01:33:08 -07:00
Jannis Harder	4bb4b6c662	verific: Extend -sva-continue-on-err to handle FSM explosion ... This also rolls back any added cells and wires, since we might have added a lot of helper logic by the point we detect this.	2025-09-27 21:13:02 +02:00
KrystalDelusion	7ebd972165	Merge pull request #5277 from YosysHQ/krys/fix_4983_alt ... autoname: Avoid integer overflow	2025-09-26 14:11:20 +12:00
Krystine Sherwin	941ba3b745	autoname.ys: Extra check for rename order ... Disabling comparison with best score will cause this check to fail. Preferred names will not be possible if $name2 has not yet been renamed.	2025-09-26 11:36:23 +12:00
Krystine Sherwin	fef6bdae6c	autoname.cc: Return number of renames ... Was previously the number of proposed renames, but since renames can be skipped this causes the final count to differ from the number of actually renamed objects. Check counts in `tests/various/autoname.ys`.	2025-09-26 11:05:50 +12:00
Jannis Harder	83dd99efb7	verific: New `-sva-continue-on-error` import option ... This option allows you to process a design that includes unsupported SVA. Unsupported SVA gets imported as formal cells using 'x inputs and with the `unsupported_sva` attribute set. This allows you to get a complete list of defined properties or to check only a supported subset of properties. To ensure no properties are unintentionally skipped for actual verification, even in cases where `-sva-continue-on-error` is used by default to read and inspect a design, `hierarchy -simcheck` and `hierarchy -smtcheck` (run by SBY) now ensure that no `unsupported_sva` property cells remain in the design.	2025-09-24 18:58:54 +02:00
Emil Jiří Tywoniak	4508676e67	libcache: support liberty filename globbing	2025-09-24 11:41:51 +02:00
Emil Jiří Tywoniak	856a387aad	dfflibmap: support liberty filename globbing	2025-09-24 11:41:51 +02:00
Emil Jiří Tywoniak	a28c0c632b	clockgate: support liberty filename globbing	2025-09-24 11:41:51 +02:00
Emil J	5f6819fd76	Merge pull request #5361 from YosysHQ/emil/simplemap-transfer-src ... simplemap: fix src attribute transfer	2025-09-23 20:40:57 +02:00
Emil Jiří Tywoniak	6527cc2134	gowin: fix test	2025-09-23 20:03:50 +02:00
KrystalDelusion	d4071b63f7	Merge pull request #5268 from YosysHQ/krys/cutpoint_inout ... Track wire drivers in cutpoint	2025-09-24 04:14:19 +12:00
Miodrag Milanović	fcc3d7132d	Fix building and running unit tests (#5374) ... * Fix building and running unit tests * Enable unit tests * Add gtest always * test-sanitizers.yml: Use makefile.conf * proper test setup * make it run on macOS * Run libyosys build only for unit tests after testing is done * Disable LTO on public CI --------- Co-authored-by: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com>	2025-09-23 17:10:18 +02:00
Akash Levy	d16ca47549	Merge branch 'YosysHQ:main' into main	2025-09-22 17:47:23 -07:00
Emil J	a78eb9e151	Merge pull request #5315 from YosysHQ/emil/write_rtlil-no-sort ... write_rtlil: don't sort	2025-09-22 11:14:39 +02:00