Stefan Frederik
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36b8c30fcc
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revert ngspice/autozero_comp.sch to previous version since ngspice has fixed parameters in agauss funtion; add tests/xschemtest.tcl
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2021-12-09 23:39:07 +01:00 |
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Stefan Frederik
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8eaada23f0
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static function rename
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2021-12-09 13:43:00 +01:00 |
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Stefan Frederik
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fa25edabec
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fix 3 potential (small) memory leaks
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2021-12-08 00:38:19 +01:00 |
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Stefan Frederik
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989388e14b
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allow panning schematic even if dialog box displayes or xschem simulation ongoing; update example simulate_ff.sch
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2021-12-07 14:07:36 +01:00 |
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Stefan Frederik
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629917cfcd
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new find_inst_to_be_redrawn() implementation to recalculate area to be redrawn with/without show net names on symbol pins, simplified new_window() call in callback `x` command, code formatting in globals.c, added xschem get [xy]origin commands
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2021-12-03 19:15:07 +01:00 |
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Stefan Frederik
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f94d3b5c15
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removed comment in schematic test_verilog_verilog.sch
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2021-12-01 15:58:26 +01:00 |
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Stefan Frederik
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756a7ba06d
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swap s/d in verilog netlisting rule for enhancement load "rnmos4.sym" so it can be used as usually done with nmos devices (drain side up) .
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2021-12-01 15:53:14 +01:00 |
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Stefan Frederik
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dcb37ef295
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added devices/rnmos4.sym for enhancement load nmos gate simulation in verilog, updated test_mos_verilog.sch example
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2021-12-01 14:25:27 +01:00 |
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Stefan Frederik
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6317b8f5b6
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updated autozero_comp.sch to work again with ngspice and montecarlo (second argument of agauss() does not accept parameters?)
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2021-11-29 23:39:47 +01:00 |
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Stefan Frederik
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551bbcec0c
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Windows does not recognize XPending, fix typo for verilog_format`s port name: g instead of f
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2021-11-26 13:16:52 +01:00 |
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Stefan Frederik
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39a27e856e
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fix pcb_current_protection_embed.sch with up to date embedded symbols (previous had very old symbols with errors), fix pmos.sym (make pin names and verilog_format string consistent). All other schematics with embedded symbols updated with current library symbol. Some code in place for saving/restoring symbols in in-memory undo. This code is not compiled so does not affect xschem operation at all.
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2021-11-25 04:00:01 +01:00 |
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Stefan Frederik
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b5c5db8c57
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revert pcb_current_protection_embed.sch to older rev
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2021-11-24 16:32:19 +01:00 |
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Stefan Frederik
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f67ec47f82
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added some comments, commented out xctx->prep_* = 0 in save_schematic()
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2021-11-24 13:52:59 +01:00 |
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Stefan Frederik
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9bca5b3f5b
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fix descend_symbol regression due to previous commit
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2021-11-22 00:42:53 +01:00 |
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Stefan Frederik
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fddd3f84fb
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avoid force-saving changed schematic before doing netlist (use push/pop undo instead of load_schematic() to restore circuit after traversing hierarchy)
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2021-11-21 23:04:48 +01:00 |
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Stefan Frederik
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7f9ee9fc2a
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add "xschem check_symbols" and "xschem reload_symbols" for future checking of symbols that are newer wrt to schematic. set mtime of newly created schematic (that does not exist on disk) to current time. Add verilog attributes to devices/pmos4.sym
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2021-11-21 12:28:36 +01:00 |
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Stefan Frederik
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95095e97d0
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add delays in logic/test_mos_verilog.sch
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2021-11-21 01:45:16 +01:00 |
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Stefan Frederik
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0e91351e4a
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fix depletion mos example
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2021-11-21 01:18:12 +01:00 |
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Stefan Frederik
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94934b8989
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added test_mos_verilog.sym example in top schematic page
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2021-11-21 00:53:37 +01:00 |
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Stefan Frederik
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64586f0c2d
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depletion nmos transistor drawn with drain side low as this is the way it is used
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2021-11-21 00:02:48 +01:00 |
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Stefan Frederik
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10114ec838
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add missing braces in update recent file submenu, fix file selector improperly setting main window title, added logic/test_mos_verilog.sch depletion mode verilog example
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2021-11-20 23:44:19 +01:00 |
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Stefan Frederik
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9ceb25716e
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auditing of static in-function variables, remove unnecessary, add notes for allowed ones
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2021-11-20 02:37:56 +01:00 |
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Stefan Frederik
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ad05513838
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some parameter checks in xschem commands, global var removal in simulation help window - No use for production yet
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2021-11-16 22:28:10 +01:00 |
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Stefan Frederik
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c3c1b39cb5
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(2) full widget creation for xschem new windows, code cleanup, removed old stuff
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2021-11-09 19:05:56 +01:00 |
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Stefan Frederik
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7efc446dae
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Escape key (instead of Simulation menu entry, now removed) stops ongoing xschem internal simulator engine if running
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2021-11-04 23:52:24 +01:00 |
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Stefan Frederik
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1fa2486e44
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remove dbg messages in propagate_logic()
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2021-10-30 21:33:12 +02:00 |
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Stefan Frederik
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ebf0f0cf95
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fixed simulation engine, no more bidirectional devices allowed
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2021-10-30 03:12:06 +02:00 |
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Stefan Frederik
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3f9e255a90
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added symbols xnor2_1.sym, xor3_1.sym, xor4_1.sym in xschem_library/xschem_simulator
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2021-10-24 01:41:01 +02:00 |
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Stefan Frederik
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0070498eb4
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avoid printing "**** end_element" in spice netlist if current instance is skipped (no format or spice_ignore set); spice_probe_vdiff.sym will print .save v(n1) v(n2) instead of .save v(n1,n2) since this is how ngspice saves nodes (no differential voltage is saved)
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2021-10-21 00:00:54 +02:00 |
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Stefan Frederik
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05af59ac9d
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small fixes in pdf creation script and html docs
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2021-10-15 19:10:33 +02:00 |
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Stefan Frederik
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a2779fab3c
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misc fixes in gschemtoxschem.awk
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2021-10-14 02:35:43 +02:00 |
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Stefan Frederik
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53487ec796
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manual fixes on some converted geda syms
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2021-10-12 18:35:04 +02:00 |
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Stefan Frederik
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2f47dfaaab
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updated gschem conversions, add tutorial documentation about geda translation to xschem
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2021-10-12 18:03:39 +02:00 |
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Stefan Frederik
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0791a99165
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updated geda translation, some additional allowed syntax in parselabel.l
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2021-10-12 15:03:23 +02:00 |
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Stefan Frederik
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e8e56aa025
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mux simulation operator: set "X" instead of "Z" if select not "0" or "1"
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2021-09-27 10:56:23 +02:00 |
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Stefan Frederik
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72b356df3c
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some simulation fixes in eval_logic_expr()
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2021-09-27 02:47:23 +02:00 |
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Stefan Frederik
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f00b27d97d
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interrupting xschem digital simulation with "Simulation->Forced stop tcl scripts" was leaving "tclstop" variable set, causing following simulation to produce erroneousr results. Any new sim resets the flag to 0.
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2021-09-25 16:16:30 +02:00 |
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Stefan Frederik
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96c84c15f9
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added conn_6x1.sym in devices
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2021-09-25 01:49:42 +02:00 |
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Stefan Frederik
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8e4a6250ac
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added spice waveform template configuration for Analog Flavor`s bespice wave (bspwave)
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2021-09-16 18:07:12 +02:00 |
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Stefan Frederik
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771123550e
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added "place=header" (in addition to "place=end" attribuite value) to print code block as a header in spice netlists
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2021-09-02 10:24:30 +02:00 |
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Stefan Frederik
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4e8e4cea20
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poweramp.sch fixes in sim commands
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2021-07-13 18:37:01 +02:00 |
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Stefan Frederik
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9cdfad3abb
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do a tcl evaluation of the "schematic" attribute of a symbol if the attribute is within a tcleval(...) expression. This way tcl variables/expressions can be used to determine the schematic to descend into when traversing/netlisting. example: schematic=tcleval(poweramp_${::mode}.sch).
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2021-06-17 00:25:39 +02:00 |
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Stefan Frederik
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5880e23f94
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added hierarchical ps/pdf export (File menu)
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2021-06-13 23:55:17 +02:00 |
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Stefan Frederik
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500feade8d
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Joanne fixes for potential crash in align_sch_pins_with_sym() if there is a sym/sch pin number mismatch. Moved box declaration to beginning of scope block for C89 compatibility
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2021-03-07 00:15:16 +01:00 |
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Stefan Frederik
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975b1900dc
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bus_connect_nolab.sym type set to "show_label" so it will be highlighted when net is highlighted, without needing to set "auto-highlight nets/pins".
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2021-02-10 00:49:46 +01:00 |
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Stefan Frederik
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4fd65005a1
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new_wire(): update connecting bubbles when inserting new wires and no one is highlighted
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2021-01-19 13:32:45 +01:00 |
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Stefan Frederik
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86bafe1f9b
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remove unconnected components in switch_level_sim.sch
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2021-01-14 18:53:50 +01:00 |
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Stefan Frederik
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934e16ab87
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uniquify __UNCONNECTED_NODE__ by appending a unique number to avoid shorting multiple missing connecting nodes
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2021-01-14 18:12:02 +01:00 |
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Stefan Frederik
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afef3e059f
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better handle simulation interruption
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2021-01-12 22:07:27 +01:00 |
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Stefan Frederik
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37f52dd625
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added missing symbols to xschem_simulator/
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2021-01-12 19:12:40 +01:00 |