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fix pcb_current_protection_embed.sch with up to date embedded symbols (previous had very old symbols with errors), fix pmos.sym (make pin names and verilog_format string consistent). All other schematics with embedded symbols updated with current library symbol. Some code in place for saving/restoring symbols in in-memory undo. This code is not compiled so does not affect xschem operation at all.

This commit is contained in:
Stefan Frederik 2021-11-25 04:00:01 +01:00
parent b5c5db8c57
commit 39a27e856e
7 changed files with 1482 additions and 292 deletions
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128
src/in_memory_undo.c
View File

@ -133,6 +133,83 @@ void free_instances(int slot)
xctx->uslot[slot].instances = 0;
}
void free_symbols(int slot)
{
int i, c, symbols;
xSymbol *sym;
symbols = xctx->uslot[slot].symbols;
for(i = 0;i < symbols; i++) {
sym = &xctx->uslot[slot].symptr[i];
my_free(354, &sym->name);
my_free(355, &sym->prop_ptr);
my_free(373, &sym->type);
my_free(660, &sym->templ);
for(c=0;c<cadlayers;c++) {
for(i=0;i<sym->polygons[c];i++) {
if(sym->poly[c][i].prop_ptr != NULL) {
my_free(892, &sym->poly[c][i].prop_ptr);
}
my_free(914, &sym->poly[c][i].x);
my_free(915, &sym->poly[c][i].y);
my_free(918, &sym->poly[c][i].selected_point);
}
my_free(1137, &sym->poly[c]);
sym->polygons[c] = 0;
for(i=0;i<sym->lines[c];i++) {
if(sym->line[c][i].prop_ptr != NULL) {
my_free(1142, &sym->line[c][i].prop_ptr);
}
}
my_free(1290, &sym->line[c]);
sym->lines[c] = 0;
for(i=0;i<sym->arcs[c];i++) {
if(sym->arc[c][i].prop_ptr != NULL) {
my_free(1291, &sym->arc[c][i].prop_ptr);
}
}
my_free(1292, &sym->arc[c]);
sym->arcs[c] = 0;
for(i=0;i<sym->rects[c];i++) {
if(sym->rect[c][i].prop_ptr != NULL) {
my_free(1293, &sym->rect[c][i].prop_ptr);
}
}
my_free(1294, &sym->rect[c]);
sym->rects[c] = 0;
} /* for(c=0;c<cadlayers;c++) */
for(i=0;i<sym->texts;i++) {
if(sym->text[i].prop_ptr != NULL) {
my_free(1297, &sym->text[i].prop_ptr);
}
if(sym->text[i].txt_ptr != NULL) {
my_free(1298, &sym->text[i].txt_ptr);
}
if(sym->text[i].font != NULL) {
my_free(1299, &sym->text[i].font);
}
}
my_free(1300, &sym->text);
sym->texts = 0;
my_free(1301, &sym->line);
my_free(1302, &sym->rect);
my_free(1303, &sym->poly);
my_free(1304, &sym->arc);
my_free(1305, &sym->lines);
my_free(1306, &sym->rects);
my_free(1307, &sym->polygons);
my_free(1308, &sym->arcs);
/* <<<< */
}
my_free(48, &xctx->uslot[slot].symptr);
xctx->uslot[slot].symbols = 0;
}
void clear_undo(void)
{
int slot;
@ -148,6 +225,7 @@ void clear_undo(void)
free_wires(slot);
free_texts(slot);
free_instances(slot);
free_symbols(slot);
}
}
@ -171,7 +249,8 @@ void delete_undo(void)
void push_undo(void)
{
int slot, i, c;
int slot, i, j, c;
xSymbol *sym;
if(xctx->no_undo)return;
if(!xctx->undo_initialized) {
@ -193,6 +272,8 @@ void push_undo(void)
free_wires(slot);
free_texts(slot);
free_instances(slot);
free_symbols(slot);
for(c=0;c<cadlayers;c++) {
xctx->uslot[slot].lines[c] = xctx->lines[c];
@ -207,8 +288,10 @@ void push_undo(void)
xctx->uslot[slot].wptr = my_calloc(181, xctx->wires, sizeof(xWire));
xctx->uslot[slot].tptr = my_calloc(182, xctx->texts, sizeof(xText));
xctx->uslot[slot].iptr = my_calloc(183, xctx->instances, sizeof(xInstance));
xctx->uslot[slot].symptr = my_calloc(353, xctx->symbols, sizeof(xSymbol));
xctx->uslot[slot].texts = xctx->texts;
xctx->uslot[slot].instances = xctx->instances;
xctx->uslot[slot].symbols = xctx->symbols;
xctx->uslot[slot].wires = xctx->wires;
for(c=0;c<cadlayers;c++) {
@ -261,6 +344,42 @@ void push_undo(void)
my_strdup(192, &xctx->uslot[slot].iptr[i].prop_ptr, xctx->inst[i].prop_ptr);
my_strdup2(193, &xctx->uslot[slot].iptr[i].name, xctx->inst[i].name);
}
/* symbols */
for(i=0;i<xctx->symbols;i++) {
sym = &xctx->uslot[slot].symptr[i];
xctx->uslot[slot].symptr[i] = xctx->sym[i];
sym->name = NULL;
sym->prop_ptr = NULL;
sym->type = NULL;
sym->templ = NULL;
my_strdup2(1316, &sym->name, xctx->sym[i].name);
my_strdup2(1317, &sym->type, xctx->sym[i].type);
my_strdup2(1318, &sym->templ, xctx->sym[i].templ);
my_strdup2(1319, &sym->prop_ptr, xctx->sym[i].prop_ptr);
sym->line=my_calloc(1309, cadlayers, sizeof(xLine *));
sym->poly=my_calloc(1324, cadlayers, sizeof(xPoly *));
sym->arc=my_calloc(1310, cadlayers, sizeof(xArc *));
sym->rect=my_calloc(1311, cadlayers, sizeof(xRect *));
sym->lines=my_calloc(1312, cadlayers, sizeof(int));
sym->rects=my_calloc(1313, cadlayers, sizeof(int));
sym->arcs=my_calloc(1314, cadlayers, sizeof(int));
sym->polygons=my_calloc(1315, cadlayers, sizeof(int));
sym->text = my_calloc(1320, xctx->sym[i].texts, sizeof(xText));
for(j = 0; j < xctx->sym[i].texts; j++) {
sym->text[j] = xctx->sym[i].text[j];
sym->text[j].prop_ptr = NULL;
sym->text[j].txt_ptr = NULL;
sym->text[j].font = NULL;
my_strdup(1321, &sym->text[j].prop_ptr, xctx->sym[i].text[j].prop_ptr);
my_strdup(1322, &sym->text[j].txt_ptr, xctx->sym[i].text[j].txt_ptr);
my_strdup(1323, &sym->text[j].font, xctx->sym[i].text[j].font);
}
}
/* <<<< */
/* texts */
for(i=0;i<xctx->texts;i++) {
xctx->uslot[slot].tptr[i] = xctx->text[i];
@ -391,6 +510,13 @@ void pop_undo(int redo, int set_modify_status)
my_strdup(766, &xctx->inst[i].lab, xctx->uslot[slot].iptr[i].lab);
}
/* symbols */
xctx->maxs = xctx->symbols = xctx->uslot[slot].symbols;
xctx->sym = my_calloc(1325, xctx->symbols, sizeof(xSymbol));
/* <<<< */
/* texts */
xctx->maxt = xctx->texts = xctx->uslot[slot].texts;
xctx->text = my_calloc(217, xctx->texts, sizeof(xText));

2
src/xschem.h
View File

@ -515,6 +515,7 @@ typedef struct
int wires;
int texts;
int instances;
int symbols;
xLine **lptr;
xRect **bptr;
xPoly **pptr;
@ -522,6 +523,7 @@ typedef struct
xWire *wptr;
xText *tptr;
xInstance *iptr;
xSymbol *symptr;
} Undo_slot;
typedef struct {

38
src/xschem.tcl
View File

@ -1278,8 +1278,8 @@ proc load_file_dialog_mkdir {dir} {
}
proc load_file_dialog_up {dir} {
global myload_dir1
bind .dialog.l.paneright.pre <Expose> {}
.dialog.l.paneright.pre configure -background white
bind .dialog.l.paneright.drw <Expose> {}
.dialog.l.paneright.drw configure -background white
set d [file dirname $dir]
if { [file isdirectory $d]} {
myload_set_home $d
@ -1318,8 +1318,8 @@ proc load_file_dialog {{msg {}} {ext {}} {global_initdir {INITIALINSTDIR}} {init
pack .dialog.l.paneleft.xscroll -side bottom -fill x
pack .dialog.l.paneleft.list -fill both -expand true
bind .dialog.l.paneleft.list <<ListboxSelect>> {
# bind .dialog.l.paneright.pre <Expose> {}
# .dialog.l.paneright.pre configure -background white
# bind .dialog.l.paneright.drw <Expose> {}
# .dialog.l.paneright.drw configure -background white
set myload_sel [.dialog.l.paneleft.list curselection]
if { $myload_sel ne {} } {
set myload_dir1 [abs_sym_path [.dialog.l.paneleft.list get $myload_sel]]
@ -1329,13 +1329,13 @@ proc load_file_dialog {{msg {}} {ext {}} {global_initdir {INITIALINSTDIR}} {init
}
}
frame .dialog.l.paneright
frame .dialog.l.paneright.pre -background white -width 200 -height 200
frame .dialog.l.paneright.drw -background white -width 200 -height 200
listbox .dialog.l.paneright.list -listvariable myload_files2 -width 20 -height 12\
-yscrollcommand ".dialog.l.paneright.yscroll set" -selectmode browse \
-xscrollcommand ".dialog.l.paneright.xscroll set" -exportselection 0
scrollbar .dialog.l.paneright.yscroll -command ".dialog.l.paneright.list yview"
scrollbar .dialog.l.paneright.xscroll -command ".dialog.l.paneright.list xview" -orient horiz
pack .dialog.l.paneright.pre -side bottom -anchor s -fill x
pack .dialog.l.paneright.drw -side bottom -anchor s -fill x
pack .dialog.l.paneright.yscroll -side right -fill y
pack .dialog.l.paneright.xscroll -side bottom -fill x
pack .dialog.l.paneright.list -side bottom -fill both -expand true
@ -1355,8 +1355,8 @@ proc load_file_dialog {{msg {}} {ext {}} {global_initdir {INITIALINSTDIR}} {init
destroy .dialog
}
button .dialog.buttons.home -width 5 -text {Home} -command {
bind .dialog.l.paneright.pre <Expose> {}
.dialog.l.paneright.pre configure -background white
bind .dialog.l.paneright.drw <Expose> {}
.dialog.l.paneright.drw configure -background white
set myload_files1 $pathlist
update
myload_set_colors1
@ -1417,7 +1417,7 @@ proc load_file_dialog {{msg {}} {ext {}} {global_initdir {INITIALINSTDIR}} {init
bind .dialog.l.paneright.list <Double-Button-1> {
set myload_retval [.dialog.buttons_bot.entry get]
if {$myload_retval ne {} && ![file isdirectory "$myload_dir1/[.dialog.l.paneright.list get $myload_sel]"]} {
bind .dialog.l.paneright.pre <Expose> {}
bind .dialog.l.paneright.drw <Expose> {}
destroy .dialog
}
}
@ -1444,7 +1444,7 @@ proc load_file_dialog {{msg {}} {ext {}} {global_initdir {INITIALINSTDIR}} {init
set myload_yview [.dialog.l.paneright.list yview]
}
xschem preview_window create .dialog.l.paneright.pre {}
xschem preview_window create .dialog.l.paneright.drw {}
set myload_dir1 [abs_sym_path [.dialog.l.paneleft.list get $myload_index1]]
setglob $myload_dir1
myload_set_colors2
@ -1478,8 +1478,8 @@ proc load_file_dialog {{msg {}} {ext {}} {global_initdir {INITIALINSTDIR}} {init
}
}
if { [file isdirectory $myload_d]} {
bind .dialog.l.paneright.pre <Expose> {}
.dialog.l.paneright.pre configure -background white
bind .dialog.l.paneright.drw <Expose> {}
.dialog.l.paneright.drw configure -background white
myload_set_home $myload_d
setglob $myload_d
myload_set_colors2
@ -1492,17 +1492,17 @@ proc load_file_dialog {{msg {}} {ext {}} {global_initdir {INITIALINSTDIR}} {init
if { $myload_type ne {0} } {
### update
if { [winfo exists .dialog] } {
.dialog.l.paneright.pre configure -background {}
xschem preview_window draw .dialog.l.paneright.pre "$myload_dir1/$myload_dir2"
bind .dialog.l.paneright.pre <Expose> {
xschem preview_window draw .dialog.l.paneright.pre "$myload_dir1/$myload_dir2"
.dialog.l.paneright.drw configure -background {}
xschem preview_window draw .dialog.l.paneright.drw "$myload_dir1/$myload_dir2"
bind .dialog.l.paneright.drw <Expose> {
xschem preview_window draw .dialog.l.paneright.drw "$myload_dir1/$myload_dir2"
}
}
} else {
bind .dialog.l.paneright.pre <Expose> {}
.dialog.l.paneright.pre configure -background white
bind .dialog.l.paneright.drw <Expose> {}
.dialog.l.paneright.drw configure -background white
}
# puts "xschem preview_window draw .dialog.l.paneright.pre \"$myload_dir1/$myload_dir2\""
# puts "xschem preview_window draw .dialog.l.paneright.drw \"$myload_dir1/$myload_dir2\""
}
}
}

8
xschem_library/devices/pmos.sym
View File

@ -1,4 +1,4 @@
v {xschem version=2.9.8 file_version=1.2}
v {xschem version=3.0.0 file_version=1.2 }
G {}
K {type=pmos
format="@spiceprefix@name @pinlist @model @extra m=@m"
@ -26,9 +26,9 @@ L 4 5 -20 20 -20 {}
L 4 20 -30 20 -20 {}
L 4 -5 -15 -5 15 {}
L 4 -20 0 -12.5 0 {}
B 5 17.5 27.5 22.5 32.5 {name=D dir=inout pinnumber=3}
B 5 -22.5 -2.5 -17.5 2.5 {name=G dir=in pinnumber=1}
B 5 17.5 -32.5 22.5 -27.5 {name=S dir=inout pinnumber=2}
B 5 17.5 27.5 22.5 32.5 {name=d dir=inout pinnumber=3}
B 5 -22.5 -2.5 -17.5 2.5 {name=g dir=in pinnumber=1}
B 5 17.5 -32.5 22.5 -27.5 {name=s dir=inout pinnumber=2}
A 4 -8.75 0 3.75 270 360 {}
T {@device} 18.75 -13.75 0 0 0.2 0.2 {}
T {@name} 18.75 0 0 0 0.2 0.2 {}

663
xschem_library/pcb/pcb_current_protection_embed.sch
View File

@ -1,5 +1,6 @@
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2 }
G {}
K {}
V {}
S {}
E {}
@ -24,11 +25,18 @@ N 550 -320 650 -320 {lab=G}
N 550 -260 650 -260 {lab=#net1}
C {conn_3x1.sym} 150 -360 0 0 {name=C1 embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=connector
format="*connector(3,1) @pinlist"
tedax_format="footprint @name @footprint"
template="name=C1 footprint=connector(3,1)"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=c1 footprint=connector(3,1)"
}
V {}
S {}
@ -39,17 +47,18 @@ B 5 18.75 18.75 21.25 21.25 {name=conn_3 dir=inout pinnumber=3}
A 4 15 -20 5 270 360 {}
A 4 15 0 5 270 360 {}
A 4 15 20 5 270 360 {}
T {@#0:pinnumber} 6.25 -21.25 0 1 0.1 0.1 {}
T {@#1:pinnumber} 6.25 -1.25 0 1 0.1 0.1 {}
T {@#2:pinnumber} 6.25 18.75 0 1 0.1 0.1 {}
T {@#0:pinnumber} 7.5 -23.75 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} 7.5 -3.75 0 1 0.2 0.2 {layer=13}
T {@#2:pinnumber} 7.5 16.25 0 1 0.2 0.2 {layer=13}
T {@name} -18.75 -43.75 0 0 0.2 0.2 {}
P 4 5 10 30 -10 30 -10 -30 10 -30 10 30 {}
]
C {vdd.sym} 770 -490 0 0 {name=l6 lab=VCC embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
global=1
function0="H"
global=true
format="*.alias @lab"
template="name=l1 lab=VDD"}
V {}
@ -57,12 +66,12 @@ S {}
E {}
L 4 0 -20 0 0 {}
L 4 -10 -20 10 -20 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire goto=0}
T {@lab} -12.5 -35 0 0 0.2 0.2 {}
]
C {lab_pin.sym} 860 -300 0 1 {name=p0 lab=VOUT embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
@ -70,11 +79,11 @@ V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -7.5 -7.5 0 1 0.36 0.33 {}
T {@lab} -7.5 -8.125 0 1 0.33 0.33 {}
]
C {lab_wire.sym} 660 -360 0 0 {name=l9 lab=G embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
@ -82,19 +91,34 @@ V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -3.75 -18.75 0 1 0.33 0.27 {}
T {@lab} -2.5 -1.25 2 0 0.27 0.27 {}
]
C {res.sym} 770 -190 0 0 {name=Rload m=1 value=100 footprint=1206 device=resistor
tedax_ignore=true embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name ( @#0 , @#1 ) ;"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device"
template="name=R0 m=1 value=1k footprint=1206 device=resistor"}
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
@ -111,19 +135,22 @@ L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout goto=1 pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout goto=0 pinnumber=2}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@value} 15 -3.75 0 0 0.2 0.2 {}
T {m=@m} 15 11.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -25 0 1 0.12 0.12 {}
T {@#1:pinnumber} -5 20 0 1 0.12 0.12 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {gnd.sym} 770 -130 0 0 {name=l10 lab=VSS embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
global=1
function0="L"
global=true
format="*.alias @lab"
template="name=l1 lab=GND"}
V {}
@ -133,7 +160,7 @@ L 4 0 0 0 12.5 {}
L 4 -5 12.5 5 12.5 {}
L 4 0 17.5 5 12.5 {}
L 4 -5 12.5 0 17.5 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout goto=0}
T {@lab} 7.5 5 0 0 0.2 0.2 {}
]
C {code.sym} 950 -430 0 0 {name=STIMULI
@ -151,44 +178,54 @@ vvss vss 0 dc 0
.save all
" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=netlist_commands
template="name=s1 only_toplevel=false value=blabla"
tedax_ignore=true
format="
@value
"}
V {}
S {}
E {}
L 3 20 30 60 30 {}
L 3 20 40 40 40 {}
L 3 20 50 60 50 {}
L 3 20 60 50 60 {}
L 3 20 70 50 70 {}
L 3 20 80 90 80 {}
L 3 20 90 40 90 {}
L 3 20 20 70 20 {}
L 3 20 10 40 10 {}
L 5 100 10 110 10 {}
L 5 110 10 110 110 {}
L 5 20 110 110 110 {}
L 5 20 100 20 110 {}
L 5 100 0 100 100 {}
L 5 10 100 100 100 {}
L 5 10 0 10 100 {}
L 5 10 0 100 0 {}
L 4 20 30 60 30 {}
L 4 20 40 40 40 {}
L 4 20 50 60 50 {}
L 4 20 60 50 60 {}
L 4 20 70 50 70 {}
L 4 20 80 90 80 {}
L 4 20 90 40 90 {}
L 4 20 20 70 20 {}
L 4 20 10 40 10 {}
L 4 100 10 110 10 {}
L 4 110 10 110 110 {}
L 4 20 110 110 110 {}
L 4 20 100 20 110 {}
L 4 100 0 100 100 {}
L 4 10 100 100 100 {}
L 4 10 0 10 100 {}
L 4 10 0 100 0 {}
T {@name} 15 -25 0 0 0.3 0.3 {}
]
C {pnp.sym} 580 -390 0 0 {name=Q6 model=BC857 device=BC857 area=1 footprint=SOT23
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=2ahUKEwijlfagu4zfAhUN0xoKHTPBAb0QFjAAegQIAhAC&url=http%3A%2F%2Fwww.onsemi.com%2Fpub%2FCollateral%2FPN2907-D.PDF&usg=AOvVaw2wgr87fGZgGfBRhXzHGwZM" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=pnp
format="@name @pinlist @model area=@area"
format="@spiceprefix@name @pinlist @model area=@area m=@m"
tedax_format="footprint @name @footprint
device @name @device"
template="name=Q1 model=Q2N2907 device=2N2907 area=1"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=Q1
model=Q2N2907
device=2N2907
footprint=TO92
area=1
m=1"}
V {}
S {}
E {}
@ -199,21 +236,30 @@ L 4 0 10 20 30 {}
B 5 17.5 27.5 22.5 32.5 {name=C dir=inout pinnumber=3}
B 5 -22.5 -2.5 -17.5 2.5 {name=B dir=in pinnumber=1}
B 5 17.5 -32.5 22.5 -27.5 {name=E dir=inout pinnumber=2}
T {@device} 20 -12.5 0 0 0.2 0.2 {}
T {@name} 20 2.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -28.75 0 0 0.12 0.12 {}
T {@#0:pinnumber} 25 23.75 0 0 0.12 0.12 {}
T {@#1:pinnumber} -20 6.25 0 1 0.12 0.12 {}
T {@model} 20 -12.5 0 0 0.2 0.2 {}
T {@name} 20 0 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -25 0 0 0.2 0.2 {layer=13}
T {@#0:pinnumber} 25 12.5 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 6.25 0 1 0.2 0.2 {layer=13}
T {@#2:net_name} 25 -33.75 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 23.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -6.25 -12.5 0 1 0.15 0.15 {layer=15}
P 4 4 0 -10 15 -15 5 -25 0 -10 {fill=true}
]
C {zener.sym} 330 -190 2 0 {name=x3 model=BZX5V1 device=BZX5V1 area=1 footprint=acy(300) embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=diode
format="@name @pinlist @model"
format="@spiceprefix@name @pinlist @model"
tedax_format="footprint @name @footprint
device @name @device"
template="name=x1 model=XXX device=XXX"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=X1 model=XXX device=XXX"}
V {}
S {}
E {}
@ -224,30 +270,268 @@ L 4 20 -5 20 5 {}
L 4 -20 5 -20 15 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout pinnumber=2}
T {@name} 2.5 -20 0 0 0.2 0.2 {}
T {@device} 2.5 12.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -25 0 1 0.12 0.12 {}
T {@#1:pinnumber} -5 20 0 1 0.12 0.12 {}
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 17.5 0 1 0.2 0.2 {layer=13}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@model} 15 6.25 0 0 0.2 0.2 {}
P 4 4 -0 5 -10 -5 10 -5 -0 5 {fill=true}
]
C {gnd.sym} 330 -130 0 0 {name=l13 lab=VSS embed=true}
C {res.sym} 330 -460 0 0 {name=R4 m=1 value=4.7K footprint=1206 device=resistor embed=true}
C {vdd.sym} 330 -490 0 0 {name=l14 lab=VCC embed=true}
C {vdd.sym} 600 -490 0 0 {name=l15 lab=VCC embed=true}
C {res.sym} 600 -190 0 0 {name=R5 m=1 value=470 footprint=1206 device=resistor embed=true}
C {gnd.sym} 600 -130 0 0 {name=l16 lab=VSS embed=true}
C {lab_wire.sym} 360 -390 0 0 {name=l0 lab=B embed=true}
C {res.sym} 330 -340 0 0 {name=R2 m=1 value=510 footprint=1206 device=resistor embed=true}
C {pmos.sym} 750 -360 0 0 {name=M2 m=1 model=IRLML6402 device=IRLML6402 footprint=SOT23
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=2ahUKEwjs8pzxuozfAhWpz4UKHR4CDnMQFjAAegQIAhAC&url=https%3A%2F%2Fwww.infineon.com%2Fdgdl%2Firlml6402.pdf%3FfileId%3D5546d462533600a401535668c9822638&usg=AOvVaw21fCRax-ssVpLqDeGK8KiC" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
G {type=pmos
format="x@name @pinlist @model m=@m"
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="L"
global=true
format="*.alias @lab"
template="name=l1 lab=GND"}
V {}
S {}
E {}
L 4 0 0 0 12.5 {}
L 4 -5 12.5 5 12.5 {}
L 4 0 17.5 5 12.5 {}
L 4 -5 12.5 0 17.5 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout goto=0}
T {@lab} 7.5 5 0 0 0.2 0.2 {}
]
C {res.sym} 330 -460 0 0 {name=R4 m=1 value=4.7K footprint=1206 device=resistor embed=true}
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v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
device @name @device"
template="name=M1 model=DMP2035U device=DMP2035U m=1"
verilog_format="@symname #@del @name ( @@d , @@s , @@g );"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
L 4 0 20 0 30 {}
L 4 0 20 7.5 17.5 {}
L 4 -7.5 12.5 7.5 17.5 {}
L 4 -7.5 12.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -12.5 {}
L 4 -7.5 -17.5 7.5 -12.5 {}
L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {vdd.sym} 330 -490 0 0 {name=l14 lab=VCC embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="H"
global=true
format="*.alias @lab"
template="name=l1 lab=VDD"}
V {}
S {}
E {}
L 4 0 -20 0 0 {}
L 4 -10 -20 10 -20 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire goto=0}
T {@lab} -12.5 -35 0 0 0.2 0.2 {}
]
C {vdd.sym} 600 -490 0 0 {name=l15 lab=VCC embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="H"
global=true
format="*.alias @lab"
template="name=l1 lab=VDD"}
V {}
S {}
E {}
L 4 0 -20 0 0 {}
L 4 -10 -20 10 -20 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire goto=0}
T {@lab} -12.5 -35 0 0 0.2 0.2 {}
]
C {res.sym} 600 -190 0 0 {name=R5 m=1 value=470 footprint=1206 device=resistor embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
L 4 0 20 0 30 {}
L 4 0 20 7.5 17.5 {}
L 4 -7.5 12.5 7.5 17.5 {}
L 4 -7.5 12.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -12.5 {}
L 4 -7.5 -17.5 7.5 -12.5 {}
L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {gnd.sym} 600 -130 0 0 {name=l16 lab=VSS embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="L"
global=true
format="*.alias @lab"
template="name=l1 lab=GND"}
V {}
S {}
E {}
L 4 0 0 0 12.5 {}
L 4 -5 12.5 5 12.5 {}
L 4 0 17.5 5 12.5 {}
L 4 -5 12.5 0 17.5 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout goto=0}
T {@lab} 7.5 5 0 0 0.2 0.2 {}
]
C {lab_wire.sym} 360 -390 0 0 {name=l0 lab=B embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -2.5 -1.25 2 0 0.27 0.27 {}
]
C {res.sym} 330 -340 0 0 {name=R2 m=1 value=510 footprint=1206 device=resistor embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
L 4 0 20 0 30 {}
L 4 0 20 7.5 17.5 {}
L 4 -7.5 12.5 7.5 17.5 {}
L 4 -7.5 12.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -12.5 {}
L 4 -7.5 -17.5 7.5 -12.5 {}
L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {pmos.sym} 750 -360 0 0 {name=M2 m=1 model=IRLML6402 device=IRLML6402 footprint=SOT23
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=2ahUKEwjs8pzxuozfAhWpz4UKHR4CDnMQFjAAegQIAhAC&url=https%3A%2F%2Fwww.infineon.com%2Fdgdl%2Firlml6402.pdf%3FfileId%3D5546d462533600a401535668c9822638&usg=AOvVaw21fCRax-ssVpLqDeGK8KiC"
embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=pmos
format="@spiceprefix@name @pinlist @model @extra m=@m"
verilog_format="@symname #@del @name ( @@d , @@s , @@g );"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=M1
model=DMP2035U
device=DMP2035U
m=1"
}
V {}
S {}
E {}
@ -262,44 +546,52 @@ B 5 17.5 27.5 22.5 32.5 {name=d dir=inout pinnumber=3}
B 5 -22.5 -2.5 -17.5 2.5 {name=g dir=in pinnumber=1}
B 5 17.5 -32.5 22.5 -27.5 {name=s dir=inout pinnumber=2}
A 4 -8.75 0 3.75 270 360 {}
T {@device} 10 -17.5 0 0 0.2 0.2 {}
T {@name} 10 0 0 0 0.2 0.2 {}
T {D} 22.5 12.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -28.75 0 0 0.12 0.12 {}
T {@#0:pinnumber} 25 23.75 0 0 0.12 0.12 {}
T {@#1:pinnumber} -20 6.25 0 1 0.12 0.12 {}
T {@device} 18.75 -13.75 0 0 0.2 0.2 {}
T {@name} 18.75 0 0 0 0.2 0.2 {}
T {D} 7.5 8.75 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -28.75 0 0 0.2 0.2 {layer=13}
T {@#0:pinnumber} 25 18.75 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -13.75 6.25 0 1 0.2 0.2 {layer=13}
]
C {led.sym} 650 -290 0 0 {name=x1 model=D1N5765 device=D1N5765 area=1 footprint=acy(300) embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=diode
format="@name @pinlist @model"
format="@spiceprefix@name @pinlist @model"
tedax_format="footprint @name @footprint
device @name @device"
template="name=x1 model=XXX device=XXX"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
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template="name=X1 model=XXX device=XXX"}
V {}
S {}
E {}
L 4 0 5 0 30 {}
L 4 0 -30 0 -5 {}
L 4 -20 5 20 5 {}
L 4 -30 0 -20 -10 {}
L 4 -30 -10 -30 0 {}
L 4 -45 5 -30 -10 {}
L 4 -35 12.5 -25 2.5 {}
L 4 -35 2.5 -35 12.5 {}
L 4 -50 17.5 -35 2.5 {}
L 4 -30 -2.5 -20 -12.5 {}
L 4 -30 -12.5 -30 -2.5 {}
L 4 -45 2.5 -30 -12.5 {}
L 4 -35 10 -25 0 {}
L 4 -35 0 -35 10 {}
L 4 -50 15 -35 0 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout pinnumber=2}
T {@name} 7.5 -20 0 0 0.2 0.2 {}
T {@model} 7.5 12.5 0 0 0.25 0.2 {}
T {@#0:pinnumber} -5 -25 0 1 0.12 0.12 {}
T {@#1:pinnumber} -5 20 0 1 0.12 0.12 {}
T {@value} 7.5 12.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
P 4 4 -0 5 -10 -5 10 -5 -0 5 {fill=true}
]
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=logo
template="name=l1 author=\\"Stefan Schippers\\""
verilog_ignore=true
@ -313,17 +605,159 @@ L 6 225 0 1020 0 {}
L 6 -160 0 -95 0 {}
T {@schname} 235 5 0 0 0.4 0.4 {}
T {@author} 235 -25 0 0 0.4 0.4 {}
T {@time_last_modified} 1020 -20 0 1 0.4 0.3 {}
T {@time_last_modified} 1020 -25 0 1 0.4 0.3 {}
T {SCHEM} 5 -25 0 0 1 1 {}
P 5 13 5 -30 -25 0 5 30 -15 30 -35 10 -55 30 -75 30 -45 0 -75 -30 -55 -30 -35 -10 -15 -30 5 -30 {fill=true}
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C {lab_pin.sym} 170 -340 0 1 {name=p6 lab=VOUT embed=true}
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G {type=label
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B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
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]
C {lab_pin.sym} 170 -360 0 1 {name=p7 lab=VSS embed=true}
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C {lab_pin.sym} 170 -380 0 1 {name=p8 lab=VCC embed=true}
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C {zener.sym} 250 -190 2 0 {name=x4 model=BZX5V1 device=BZX5V1 area=1 footprint=minimelf spice_ignore=true embed=true}
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L 4 20 -5 20 5 {}
L 4 -20 5 -20 15 {}
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B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout pinnumber=2}
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T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@model} 15 6.25 0 0 0.2 0.2 {}
P 4 4 -0 5 -10 -5 10 -5 -0 5 {fill=true}
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C {gnd.sym} 250 -130 0 0 {name=l1 lab=VSS embed=true}
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v {xschem version=3.0.0 file_version=1.2}
G {type=label
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T {@lab} 7.5 5 0 0 0.2 0.2 {}
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C {res.sym} 550 -290 0 0 {name=R1 m=1 value=47K footprint=1206 device=resistor embed=true}
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V {}
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L 4 0 20 0 30 {}
L 4 0 20 7.5 17.5 {}
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L 4 -7.5 12.5 7.5 7.5 {}
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L 4 -7.5 2.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -12.5 {}
L 4 -7.5 -17.5 7.5 -12.5 {}
L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {lab_wire.sym} 330 -260 0 0 {name=l3 lab=Z embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -2.5 -1.25 2 0 0.27 0.27 {}
]
C {code.sym} 950 -260 0 0 {name=MODELS
tedax_ignore=true
only_toplevel=true
@ -1504,3 +1938,32 @@ D2 8 6 DN
V1 18 19 1.25
.ENDS
" tclcommand="xschem edit_vi_prop" embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=netlist_commands
template="name=s1 only_toplevel=false value=blabla"
format="
@value
"}
V {}
S {}
E {}
L 4 20 30 60 30 {}
L 4 20 40 40 40 {}
L 4 20 50 60 50 {}
L 4 20 60 50 60 {}
L 4 20 70 50 70 {}
L 4 20 80 90 80 {}
L 4 20 90 40 90 {}
L 4 20 20 70 20 {}
L 4 20 10 40 10 {}
L 4 100 10 110 10 {}
L 4 110 10 110 110 {}
L 4 20 110 110 110 {}
L 4 20 100 20 110 {}
L 4 100 0 100 100 {}
L 4 10 100 100 100 {}
L 4 10 0 10 100 {}
L 4 10 0 100 0 {}
T {@name} 15 -25 0 0 0.3 0.3 {}
]

293
xschem_library/pcb/pcb_test1_embed.sch
View File

@ -1,5 +1,6 @@
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2 }
G {}
K {}
V {}
S {}
E {}
@ -31,7 +32,7 @@ N 580 -420 580 -350 {lab=B}
N 520 -350 580 -350 {lab=B}
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=logo
template="name=l1 author=\\"Stefan Schippers\\""
verilog_ignore=true
@ -45,18 +46,31 @@ L 6 225 0 1020 0 {}
L 6 -160 0 -95 0 {}
T {@schname} 235 5 0 0 0.4 0.4 {}
T {@author} 235 -25 0 0 0.4 0.4 {}
T {@time_last_modified} 1020 -20 0 1 0.4 0.3 {}
T {@time_last_modified} 1020 -25 0 1 0.4 0.3 {}
T {SCHEM} 5 -25 0 0 1 1 {}
P 5 13 5 -30 -25 0 5 30 -15 30 -35 10 -55 30 -75 30 -45 0 -75 -30 -55 -30 -35 -10 -15 -30 5 -30 {fill=true}
]
C {74ls00.sym} 420 -350 0 0 {name=U1:2 risedel=100 falldel=200 embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=nand
format="@name @pinlist @value"
verilog_format="nand #(@risedel , @falldel ) @name ( @#2 , @#0 , @#1 );"
risedel=100
falldel=200
tedax_format="footprint @name @footprint
device @name @symname"
template="name=U1 footprint=\\"dip(14)\\" risedel=100 falldel=200 numslots=4 power=VCC ground=GND"
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=U1 footprint=\\"dip(14)\\"
numslots=4
power=VCC
ground=GND"
extra="power ground"
extra_pinnumber="14 7"}
V {}
@ -73,24 +87,72 @@ B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in pinnumber=2:5:10:13}
B 5 57.5 -2.5 62.5 2.5 {name=Z dir=out verilog_type=wire pinnumber=3:6:8:11}
A 4 5 0 30 270 180 {}
A 4 40 0 5 0 360 {}
T {@name} -20 -15 0 0 0.2 0.2 {}
T {@symname} -22.5 0 0 0 0.2 0.2 {}
T {@#0:pinnumber} -22.5 -22.5 0 0 0.12 0.12 {}
T {@#1:pinnumber} -22.5 17.5 0 0 0.12 0.12 {}
T {@#2:pinnumber} 32.5 -2.5 0 1 0.12 0.12 {}
T {@name} -20 -12.5 0 0 0.2 0.2 {}
T {@symname} -22.5 2.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -22.5 -25 0 0 0.2 0.2 {}
T {@#1:pinnumber} -22.5 17.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 45 7.5 0 0 0.2 0.2 {}
]
C {74ls00.sym} 870 -440 0 0 {name=U1:1 risedel=100 falldel=200 embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=nand
format="@name @pinlist @value"
verilog_format="nand #(@risedel , @falldel ) @name ( @#2 , @#0 , @#1 );"
risedel=100
falldel=200
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=U1 footprint=\\"dip(14)\\"
numslots=4
power=VCC
ground=GND"
extra="power ground"
extra_pinnumber="14 7"}
V {}
S {}
E {}
L 4 -40 -20 -25 -20 {}
L 4 -25 -30 -25 30 {}
L 4 -25 -30 5 -30 {}
L 4 -25 30 5 30 {}
L 4 -40 20 -25 20 {}
L 4 45 0 60 0 {}
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in pinnumber=1:4:9:12}
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in pinnumber=2:5:10:13}
B 5 57.5 -2.5 62.5 2.5 {name=Z dir=out verilog_type=wire pinnumber=3:6:8:11}
A 4 5 0 30 270 180 {}
A 4 40 0 5 0 360 {}
T {@name} -20 -12.5 0 0 0.2 0.2 {}
T {@symname} -22.5 2.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -22.5 -25 0 0 0.2 0.2 {}
T {@#1:pinnumber} -22.5 17.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 45 7.5 0 0 0.2 0.2 {}
]
C {74ls00.sym} 870 -440 0 0 {name=U1:1 risedel=100 falldel=200}
C {lab_pin.sym} 970 -440 0 1 {name=p0 lab=OUTPUT_Y}
C {capa.sym} 590 -160 0 0 {name=C0 m=1 value=100u device="electrolitic capacitor" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=capacitor
format="@name @pinlist @value m=@m"
tedax_format="footprint @name @footprint
value @name @value
device @name @device"
device @name @device
@comptag"
verilog_ignore=true
template="name=C0 m=1 value=1p footprint=1206 device=\\"ceramic capacitor\\""}
template="name=C1
m=1
value=1p
footprint=1206
device=\\"ceramic capacitor\\""
}
V {}
S {}
E {}
@ -100,24 +162,74 @@ L 4 -10 -5 10 -5 {}
L 4 -10 5 10 5 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=in pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=in pinnumber=2}
T {@value} 15 -5 0 0 0.25 0.2 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout pinnumber=2}
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {m=@m} 15 10 0 0 0.25 0.2 {}
T {@#0:pinnumber} -2.5 -25 0 1 0.12 0.12 {}
T {@#1:pinnumber} -2.5 20 0 1 0.12 0.12 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} 15 6.25 0 0 0.2 0.2 {}
]
C {74ls00.sym} 420 -460 0 0 {name=U1:4 risedel=100 falldel=200 power=VCC5
url="http://www.engrcs.com/components/74LS00.pdf"}
url="http://www.engrcs.com/components/74LS00.pdf" embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=nand
format="@name @pinlist @value"
verilog_format="nand #(@risedel , @falldel ) @name ( @#2 , @#0 , @#1 );"
risedel=100
falldel=200
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=U1 footprint=\\"dip(14)\\"
numslots=4
power=VCC
ground=GND"
extra="power ground"
extra_pinnumber="14 7"}
V {}
S {}
E {}
L 4 -40 -20 -25 -20 {}
L 4 -25 -30 -25 30 {}
L 4 -25 -30 5 -30 {}
L 4 -25 30 5 30 {}
L 4 -40 20 -25 20 {}
L 4 45 0 60 0 {}
B 5 -42.5 -22.5 -37.5 -17.5 {name=A dir=in pinnumber=1:4:9:12}
B 5 -42.5 17.5 -37.5 22.5 {name=B dir=in pinnumber=2:5:10:13}
B 5 57.5 -2.5 62.5 2.5 {name=Z dir=out verilog_type=wire pinnumber=3:6:8:11}
A 4 5 0 30 270 180 {}
A 4 40 0 5 0 360 {}
T {@name} -20 -12.5 0 0 0.2 0.2 {}
T {@symname} -22.5 2.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -22.5 -25 0 0 0.2 0.2 {}
T {@#1:pinnumber} -22.5 17.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 45 7.5 0 0 0.2 0.2 {}
]
C {7805.sym} 730 -190 0 0 {name=U0 url="https://www.sparkfun.com/datasheets/Components/LM7805.pdf" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=regulator
format="x@name @pinlist r@symname"
format="@spiceprefix@name @pinlist r@symname"
verilog_format="assign @#2 = @#0 ;"
tedax_format="footprint @name @footprint
device @name @device"
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=U1 device=7805 footprint=TO220"}
V {}
S {}
@ -132,11 +244,11 @@ L 4 0 20 0 30 {}
B 5 -62.5 -2.5 -57.5 2.5 {name=IN dir=in pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=GND dir=inout pinnumber=2}
B 5 57.5 -2.5 62.5 2.5 {name=OUT dir=out pinnumber=3}
T {@name} -17.5 -15 0 0 0.2 0.2 {}
T {@device} -17.5 0 0 0 0.2 0.2 {}
T {@#0:pinnumber} -47.5 -2.5 0 0 0.12 0.12 {}
T {@#1:pinnumber} -2.5 12.5 0 0 0.12 0.12 {}
T {@#2:pinnumber} 47.5 -2.5 0 1 0.12 0.12 {}
T {@name} -10 -17.5 0 0 0.2 0.2 {}
T {@device} -17.5 -32.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -47.5 -5 0 0 0.2 0.2 {}
T {@#1:pinnumber} -5 7.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 47.5 -5 0 1 0.2 0.2 {}
]
C {lab_pin.sym} 490 -190 0 0 {name=p20 lab=VCC12}
C {lab_pin.sym} 940 -190 0 1 {name=p22 lab=VCC5}
@ -144,14 +256,29 @@ C {lab_pin.sym} 590 -110 0 0 {name=p23 lab=ANALOG_GND}
C {capa.sym} 890 -160 0 0 {name=C4 m=1 value=10u device="tantalium capacitor"}
C {res.sym} 520 -190 1 0 {name=R0 m=1 value=4.7 device="carbon resistor" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name ( @#0 , @#1 ) ;"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device"
template="name=R0 m=1 value=1k footprint=1206 device=resistor"}
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
@ -168,19 +295,21 @@ L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout goto=1 pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout goto=0 pinnumber=2}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@value} 15 -3.75 0 0 0.2 0.2 {}
T {m=@m} 15 11.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -25 0 1 0.12 0.12 {}
T {@#1:pinnumber} -5 20 0 1 0.12 0.12 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {lab_wire.sym} 700 -460 0 0 {name=l3 lab=A}
C {lab_wire.sym} 700 -420 0 0 {name=l0 lab=B}
C {lab_wire.sym} 650 -190 0 0 {name=l1 lab=VCCFILT embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
@ -188,7 +317,7 @@ V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -3.75 -18.75 0 1 0.33 0.27 {}
T {@lab} -2.5 -1.25 2 0 0.27 0.27 {}
]
C {lab_pin.sym} 310 -370 0 0 {name=lONN1 lab=INPUT_A verilog_type=reg}
C {lab_pin.sym} 310 -330 0 0 {name=lONN2 lab=INPUT_B verilog_type=reg}
@ -199,7 +328,7 @@ C {lab_pin.sym} 40 -310 0 1 { name=lONN9 lab=VCC12 }
C {lab_pin.sym} 40 -290 0 1 { name=lONN14 lab=ANALOG_GND verilog_type=reg}
C {lab_pin.sym} 40 -270 0 1 { name=lONN15 lab=GND verilog_type=reg embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
@ -207,7 +336,7 @@ V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -7.5 -7.5 0 1 0.36 0.33 {}
T {@lab} -7.5 -8.125 0 1 0.33 0.33 {}
]
C {code.sym} 1030 -280 0 0 {name=TESTBENCH_CODE only_toplevel=false value="initial begin
$dumpfile(\\"dumpfile.vcd\\");
@ -235,58 +364,66 @@ assign VCC12=1;
" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=netlist_commands
template="name=s1 only_toplevel=false value=blabla"
tedax_ignore=true
format="
@value
"}
V {}
S {}
E {}
L 3 20 30 60 30 {}
L 3 20 40 40 40 {}
L 3 20 50 60 50 {}
L 3 20 60 50 60 {}
L 3 20 70 50 70 {}
L 3 20 80 90 80 {}
L 3 20 90 40 90 {}
L 3 20 20 70 20 {}
L 3 20 10 40 10 {}
L 5 100 10 110 10 {}
L 5 110 10 110 110 {}
L 5 20 110 110 110 {}
L 5 20 100 20 110 {}
L 5 100 0 100 100 {}
L 5 10 100 100 100 {}
L 5 10 0 10 100 {}
L 5 10 0 100 0 {}
L 4 20 30 60 30 {}
L 4 20 40 40 40 {}
L 4 20 50 60 50 {}
L 4 20 60 50 60 {}
L 4 20 70 50 70 {}
L 4 20 80 90 80 {}
L 4 20 90 40 90 {}
L 4 20 20 70 20 {}
L 4 20 10 40 10 {}
L 4 100 10 110 10 {}
L 4 110 10 110 110 {}
L 4 20 110 110 110 {}
L 4 20 100 20 110 {}
L 4 100 0 100 100 {}
L 4 10 100 100 100 {}
L 4 10 0 10 100 {}
L 4 10 0 100 0 {}
T {@name} 15 -25 0 0 0.3 0.3 {}
]
C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=timescale
spice_ignore=true
vhdl_ignore=true
tedax_ignore=true
template="name=s1 timestep=\\"100ps\\" precision=\\"100ps\\" "
verilog_format="`timescale @timestep/@precision"}
verilog_format="`timescale @timestep / @precision"}
V {}
S {}
E {}
L 4 0 -10 70 -10 {}
L 4 0 -10 0 10 {}
T {TIMESCALE} 5 -25 0 0 0.3 0.3 {}
T {`timescale @timestep/@precision} 15 -5 0 0 0.3 0.3 {}
T {`timescale @timestep\\/@precision} 15 -5 0 0 0.3 0.3 {}
]
C {conn_8x1.sym} 20 -390 0 0 {name=C1 footprint=connector(8,1) embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=connector
verilog_ignore=true
format="*connector(8,1) @pinlist"
tedax_format="footprint @name @footprint"
template="name=C1 footprint=connector(8,1)"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=c1 footprint=connector(8,1)"
}
V {}
S {}
@ -307,15 +444,15 @@ A 4 15 60 5 270 360 {}
A 4 15 80 5 270 360 {}
A 4 15 100 5 270 360 {}
A 4 15 120 5 270 360 {}
T {@#0:pinnumber} 6.25 -21.25 0 1 0.1 0.1 {}
T {@#1:pinnumber} 6.25 -1.25 0 1 0.1 0.1 {}
T {@#2:pinnumber} 6.25 18.75 0 1 0.1 0.1 {}
T {@#0:pinnumber} 6.25 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} 6.25 -6.25 0 1 0.2 0.2 {layer=13}
T {@#2:pinnumber} 6.25 13.75 0 1 0.2 0.2 {layer=13}
T {@name} -18.75 -43.75 0 0 0.2 0.2 {}
T {@#3:pinnumber} 6.25 38.75 0 1 0.1 0.1 {}
T {@#4:pinnumber} 6.25 58.75 0 1 0.1 0.1 {}
T {@#5:pinnumber} 6.25 78.75 0 1 0.1 0.1 {}
T {@#6:pinnumber} 6.25 98.75 0 1 0.1 0.1 {}
T {@#7:pinnumber} 6.25 118.75 0 1 0.1 0.1 {}
T {@#3:pinnumber} 6.25 33.75 0 1 0.2 0.2 {layer=13}
T {@#4:pinnumber} 6.25 53.75 0 1 0.2 0.2 {layer=13}
T {@#5:pinnumber} 6.25 73.75 0 1 0.2 0.2 {layer=13}
T {@#6:pinnumber} 6.25 93.75 0 1 0.2 0.2 {layer=13}
T {@#7:pinnumber} 6.25 113.75 0 1 0.2 0.2 {layer=13}
P 4 5 10 130 -10 130 -10 -30 10 -30 10 130 {}
]
C {lab_pin.sym} 40 -370 0 1 {name=l4 lab=INPUT_A verilog_type=reg}

642
xschem_library/pcb/pcb_voltage_protection_embed.sch
View File

@ -1,5 +1,6 @@
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2 }
G {}
K {}
V {}
S {}
E {}
@ -24,11 +25,18 @@ N 550 -320 650 -320 {lab=G}
N 550 -260 650 -260 {lab=#net1}
C {conn_3x1.sym} 150 -360 0 0 {name=C1 embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=connector
format="*connector(3,1) @pinlist"
tedax_format="footprint @name @footprint"
template="name=C1 footprint=connector(3,1)"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=c1 footprint=connector(3,1)"
}
V {}
S {}
@ -39,17 +47,18 @@ B 5 18.75 18.75 21.25 21.25 {name=conn_3 dir=inout pinnumber=3}
A 4 15 -20 5 270 360 {}
A 4 15 0 5 270 360 {}
A 4 15 20 5 270 360 {}
T {@#0:pinnumber} 6.25 -21.25 0 1 0.1 0.1 {}
T {@#1:pinnumber} 6.25 -1.25 0 1 0.1 0.1 {}
T {@#2:pinnumber} 6.25 18.75 0 1 0.1 0.1 {}
T {@#0:pinnumber} 7.5 -23.75 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} 7.5 -3.75 0 1 0.2 0.2 {layer=13}
T {@#2:pinnumber} 7.5 16.25 0 1 0.2 0.2 {layer=13}
T {@name} -18.75 -43.75 0 0 0.2 0.2 {}
P 4 5 10 30 -10 30 -10 -30 10 -30 10 30 {}
]
C {vdd.sym} 770 -490 0 0 {name=l6 lab=VCC embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
global=1
function0="H"
global=true
format="*.alias @lab"
template="name=l1 lab=VDD"}
V {}
@ -57,12 +66,12 @@ S {}
E {}
L 4 0 -20 0 0 {}
L 4 -10 -20 10 -20 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire goto=0}
T {@lab} -12.5 -35 0 0 0.2 0.2 {}
]
C {lab_pin.sym} 860 -300 0 1 {name=p0 lab=VOUT embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
@ -70,11 +79,11 @@ V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -7.5 -7.5 0 1 0.36 0.33 {}
T {@lab} -7.5 -8.125 0 1 0.33 0.33 {}
]
C {lab_wire.sym} 660 -360 0 0 {name=l9 lab=G embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
@ -82,19 +91,34 @@ V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -3.75 -18.75 0 1 0.33 0.27 {}
T {@lab} -2.5 -1.25 2 0 0.27 0.27 {}
]
C {res.sym} 770 -190 0 0 {name=Rload m=1 value=100 footprint=1206 device=resistor
tedax_ignore=true embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name ( @#0 , @#1 ) ;"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device"
template="name=R0 m=1 value=1k footprint=1206 device=resistor"}
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
@ -111,19 +135,22 @@ L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout goto=1 pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout goto=0 pinnumber=2}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@value} 15 -3.75 0 0 0.2 0.2 {}
T {m=@m} 15 11.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -25 0 1 0.12 0.12 {}
T {@#1:pinnumber} -5 20 0 1 0.12 0.12 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {gnd.sym} 770 -130 0 0 {name=l10 lab=VSS embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=label
global=1
function0="L"
global=true
format="*.alias @lab"
template="name=l1 lab=GND"}
V {}
@ -133,7 +160,7 @@ L 4 0 0 0 12.5 {}
L 4 -5 12.5 5 12.5 {}
L 4 0 17.5 5 12.5 {}
L 4 -5 12.5 0 17.5 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout goto=0}
T {@lab} 7.5 5 0 0 0.2 0.2 {}
]
C {code.sym} 950 -430 0 0 {name=STIMULI
@ -151,44 +178,54 @@ vvss vss 0 dc 0
.save all
" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=netlist_commands
template="name=s1 only_toplevel=false value=blabla"
tedax_ignore=true
format="
@value
"}
V {}
S {}
E {}
L 3 20 30 60 30 {}
L 3 20 40 40 40 {}
L 3 20 50 60 50 {}
L 3 20 60 50 60 {}
L 3 20 70 50 70 {}
L 3 20 80 90 80 {}
L 3 20 90 40 90 {}
L 3 20 20 70 20 {}
L 3 20 10 40 10 {}
L 5 100 10 110 10 {}
L 5 110 10 110 110 {}
L 5 20 110 110 110 {}
L 5 20 100 20 110 {}
L 5 100 0 100 100 {}
L 5 10 100 100 100 {}
L 5 10 0 10 100 {}
L 5 10 0 100 0 {}
L 4 20 30 60 30 {}
L 4 20 40 40 40 {}
L 4 20 50 60 50 {}
L 4 20 60 50 60 {}
L 4 20 70 50 70 {}
L 4 20 80 90 80 {}
L 4 20 90 40 90 {}
L 4 20 20 70 20 {}
L 4 20 10 40 10 {}
L 4 100 10 110 10 {}
L 4 110 10 110 110 {}
L 4 20 110 110 110 {}
L 4 20 100 20 110 {}
L 4 100 0 100 100 {}
L 4 10 100 100 100 {}
L 4 10 0 10 100 {}
L 4 10 0 100 0 {}
T {@name} 15 -25 0 0 0.3 0.3 {}
]
C {pnp.sym} 580 -390 0 0 {name=Q6 model=BC857 device=BC857 area=1 footprint=SOT23
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=2ahUKEwijlfagu4zfAhUN0xoKHTPBAb0QFjAAegQIAhAC&url=http%3A%2F%2Fwww.onsemi.com%2Fpub%2FCollateral%2FPN2907-D.PDF&usg=AOvVaw2wgr87fGZgGfBRhXzHGwZM" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=pnp
format="@name @pinlist @model area=@area"
format="@spiceprefix@name @pinlist @model area=@area m=@m"
tedax_format="footprint @name @footprint
device @name @device"
template="name=Q1 model=Q2N2907 device=2N2907 area=1"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=Q1
model=Q2N2907
device=2N2907
footprint=TO92
area=1
m=1"}
V {}
S {}
E {}
@ -199,21 +236,30 @@ L 4 0 10 20 30 {}
B 5 17.5 27.5 22.5 32.5 {name=C dir=inout pinnumber=3}
B 5 -22.5 -2.5 -17.5 2.5 {name=B dir=in pinnumber=1}
B 5 17.5 -32.5 22.5 -27.5 {name=E dir=inout pinnumber=2}
T {@device} 20 -12.5 0 0 0.2 0.2 {}
T {@name} 20 2.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -28.75 0 0 0.12 0.12 {}
T {@#0:pinnumber} 25 23.75 0 0 0.12 0.12 {}
T {@#1:pinnumber} -20 6.25 0 1 0.12 0.12 {}
T {@model} 20 -12.5 0 0 0.2 0.2 {}
T {@name} 20 0 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -25 0 0 0.2 0.2 {layer=13}
T {@#0:pinnumber} 25 12.5 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 6.25 0 1 0.2 0.2 {layer=13}
T {@#2:net_name} 25 -33.75 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 23.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -6.25 -12.5 0 1 0.15 0.15 {layer=15}
P 4 4 0 -10 15 -15 5 -25 0 -10 {fill=true}
]
C {zener.sym} 330 -190 2 0 {name=x3 model=BZX5V1 device=BZX5V1 area=1 footprint=acy(300) embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=diode
format="@name @pinlist @model"
format="@spiceprefix@name @pinlist @model"
tedax_format="footprint @name @footprint
device @name @device"
template="name=x1 model=XXX device=XXX"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=X1 model=XXX device=XXX"}
V {}
S {}
E {}
@ -224,30 +270,267 @@ L 4 20 -5 20 5 {}
L 4 -20 5 -20 15 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=inout pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout pinnumber=2}
T {@name} 2.5 -20 0 0 0.2 0.2 {}
T {@device} 2.5 12.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -25 0 1 0.12 0.12 {}
T {@#1:pinnumber} -5 20 0 1 0.12 0.12 {}
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 17.5 0 1 0.2 0.2 {layer=13}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@model} 15 6.25 0 0 0.2 0.2 {}
P 4 4 -0 5 -10 -5 10 -5 -0 5 {fill=true}
]
C {gnd.sym} 330 -130 0 0 {name=l13 lab=VSS embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="L"
global=true
format="*.alias @lab"
template="name=l1 lab=GND"}
V {}
S {}
E {}
L 4 0 0 0 12.5 {}
L 4 -5 12.5 5 12.5 {}
L 4 0 17.5 5 12.5 {}
L 4 -5 12.5 0 17.5 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout goto=0}
T {@lab} 7.5 5 0 0 0.2 0.2 {}
]
C {res.sym} 330 -460 0 0 {name=R4 m=1 value=4.7K footprint=1206 device=resistor embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
L 4 0 20 0 30 {}
L 4 0 20 7.5 17.5 {}
L 4 -7.5 12.5 7.5 17.5 {}
L 4 -7.5 12.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -12.5 {}
L 4 -7.5 -17.5 7.5 -12.5 {}
L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {vdd.sym} 330 -490 0 0 {name=l14 lab=VCC embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="H"
global=true
format="*.alias @lab"
template="name=l1 lab=VDD"}
V {}
S {}
E {}
L 4 0 -20 0 0 {}
L 4 -10 -20 10 -20 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire goto=0}
T {@lab} -12.5 -35 0 0 0.2 0.2 {}
]
C {vdd.sym} 600 -490 0 0 {name=l15 lab=VCC embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="H"
global=true
format="*.alias @lab"
template="name=l1 lab=VDD"}
V {}
S {}
E {}
L 4 0 -20 0 0 {}
L 4 -10 -20 10 -20 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout verilog_type=wire goto=0}
T {@lab} -12.5 -35 0 0 0.2 0.2 {}
]
C {res.sym} 600 -190 0 0 {name=R5 m=1 value=470 footprint=1206 device=resistor embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
L 4 0 20 0 30 {}
L 4 0 20 7.5 17.5 {}
L 4 -7.5 12.5 7.5 17.5 {}
L 4 -7.5 12.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -12.5 {}
L 4 -7.5 -17.5 7.5 -12.5 {}
L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {gnd.sym} 600 -130 0 0 {name=l16 lab=VSS embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
function0="L"
global=true
format="*.alias @lab"
template="name=l1 lab=GND"}
V {}
S {}
E {}
L 4 0 0 0 12.5 {}
L 4 -5 12.5 5 12.5 {}
L 4 0 17.5 5 12.5 {}
L 4 -5 12.5 0 17.5 {}
B 5 -2.5 -2.5 2.5 2.5 {name=p dir=inout goto=0}
T {@lab} 7.5 5 0 0 0.2 0.2 {}
]
C {lab_wire.sym} 360 -390 0 0 {name=l0 lab=B embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=label
format="*.alias @lab"
template="name=l1 sig_type=std_logic lab=xxx"}
V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@lab} -2.5 -1.25 2 0 0.27 0.27 {}
]
C {res.sym} 330 -340 0 0 {name=R2 m=1 value=510 footprint=1206 device=resistor embed=true}
[
v {xschem version=3.0.0 file_version=1.2}
G {type=resistor
function0="1"
function1="0"
format="@name @pinlist @value m=@m"
verilog_format="tran @name (@@P\\\\, @@M\\\\);"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=R1
value=1k
footprint=1206
device=resistor
m=1"
}
V {}
S {}
E {}
L 4 0 20 0 30 {}
L 4 0 20 7.5 17.5 {}
L 4 -7.5 12.5 7.5 17.5 {}
L 4 -7.5 12.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 7.5 {}
L 4 -7.5 2.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -2.5 {}
L 4 -7.5 -7.5 7.5 -12.5 {}
L 4 -7.5 -17.5 7.5 -12.5 {}
L 4 -7.5 -17.5 0 -20 {}
L 4 0 -30 0 -20 {}
L 4 2.5 -22.5 7.5 -22.5 {}
L 4 5 -25 5 -20 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=P dir=inout propag=1 pinnumber=1 goto=1}
B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout propag=0 pinnumber=2 goto=0}
T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
]
C {pmos.sym} 750 -360 0 0 {name=M2 m=1 model=IRLML6402 device=IRLML6402 footprint=SOT23
url="https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=2ahUKEwjs8pzxuozfAhWpz4UKHR4CDnMQFjAAegQIAhAC&url=https%3A%2F%2Fwww.infineon.com%2Fdgdl%2Firlml6402.pdf%3FfileId%3D5546d462533600a401535668c9822638&usg=AOvVaw21fCRax-ssVpLqDeGK8KiC" embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=pmos
format="x@name @pinlist @model m=@m"
format="@spiceprefix@name @pinlist @model @extra m=@m"
verilog_format="@symname #@del @name ( @@d , @@s , @@f );"
tedax_format="footprint @name @footprint
device @name @device"
template="name=M1 model=DMP2035U device=DMP2035U m=1"
verilog_format="@symname #@del @name ( @@d , @@s , @@g );"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=M1
model=DMP2035U
device=DMP2035U
m=1"
}
V {}
S {}
E {}
@ -262,44 +545,52 @@ B 5 17.5 27.5 22.5 32.5 {name=d dir=inout pinnumber=3}
B 5 -22.5 -2.5 -17.5 2.5 {name=g dir=in pinnumber=1}
B 5 17.5 -32.5 22.5 -27.5 {name=s dir=inout pinnumber=2}
A 4 -8.75 0 3.75 270 360 {}
T {@device} 10 -17.5 0 0 0.2 0.2 {}
T {@name} 10 0 0 0 0.2 0.2 {}
T {D} 22.5 12.5 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -28.75 0 0 0.12 0.12 {}
T {@#0:pinnumber} 25 23.75 0 0 0.12 0.12 {}
T {@#1:pinnumber} -20 6.25 0 1 0.12 0.12 {}
T {@device} 18.75 -13.75 0 0 0.2 0.2 {}
T {@name} 18.75 0 0 0 0.2 0.2 {}
T {D} 7.5 8.75 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -28.75 0 0 0.2 0.2 {layer=13}
T {@#0:pinnumber} 25 18.75 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -13.75 6.25 0 1 0.2 0.2 {layer=13}
]
C {led.sym} 650 -290 0 0 {name=x1 model=D1N5765 device=D1N5765 area=1 footprint=acy(300) embed=true}
[
v {xschem version=2.9.5_RC5 file_version=1.1}
v {xschem version=3.0.0 file_version=1.2}
G {type=diode
format="@name @pinlist @model"
format="@spiceprefix@name @pinlist @model"
tedax_format="footprint @name @footprint
device @name @device"
template="name=x1 model=XXX device=XXX"}
value @name @value
device @name @device
spicedev @name @spicedev
spiceval @name @spiceval
comptag @name @comptag"
template="name=X1 model=XXX device=XXX"}
V {}
S {}
E {}
L 4 0 5 0 30 {}
L 4 0 -30 0 -5 {}
L 4 -20 5 20 5 {}
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