poweramp.sch fixes in sim commands

This commit is contained in:
Stefan Frederik 2021-07-13 18:37:01 +02:00
parent df0fc572f3
commit 4e8e4cea20
2 changed files with 4 additions and 5 deletions

View File

@ -35,7 +35,7 @@ static int accept_wt_res(char *ver)
{
char *next;
if (!strncmp(ver, "OK ", 3) == 0)
if (strncmp(ver, "OK ", 3) == 0)
return 0;
ver += 3;

View File

@ -129,15 +129,14 @@ vvss vss 0 dc 0
** referenced file in simulation directory.
.include \\"models_poweramp.txt\\"
.control
save all
op
write poweramp.raw
tran 6e-7 0.06 uic
* op
tran 6e-7 0.03 uic
* .FOUR 20k v(outm,outp)
* .probe i(*)
plot outp outm
save all
save p(r*) p(v*)
write poweramp.raw
.endc
"}
C {vsource.sym} 150 -1170 0 0 {name=V1 value="dc 50 pwl 0 0 1m 50"}