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9095 Commits

Author SHA1 Message Date
Igor Zaworski 03024f3cef Better comments 
Signed-off-by: Igor Zaworski <izaworski@internships.antmicro.com>
 2026-02-10 09:02:26 +01:00
Igor Zaworski 37e5c7030c Interface class proper handling 
Signed-off-by: Igor Zaworski <izaworski@internships.antmicro.com>
 2026-02-10 09:02:26 +01:00
Igor Zaworski e45272af15 [#89217] Poc of init functions 
Virtual inheritance is not handled properly yet

Signed-off-by: Igor Zaworski <izaworski@internships.antmicro.com>
 2026-02-10 09:02:26 +01:00
Ryszard Rozak 6303eb45ce
Fix multidim dynamic array elements passed to ref argument (#7023) 2026-02-10 08:46:04 +01:00
Igor Zaworski a660fa54a7
Fix unique constraint in derived class (#7022) 2026-02-09 09:56:38 -05:00
github action a28bd5a085 Apply 'make format' 2026-02-09 03:48:11 +00:00
Leela Pakanati e36838ad8e
Fix tristate enables for -fno-inline (#7016) (#7019) 2026-02-08 22:47:09 -05:00
Wilson Snyder 5a236dd35d
Change INITIALSTATIC to also report on processes, per IEEE (#7020) 2026-02-08 20:47:12 -05:00
Wilson Snyder ba194f3790 Tests: Avoid implied static variables, to avoid future warning 2026-02-08 18:20:28 -05:00
Wilson Snyder 9ba625225d Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-08 17:54:04 -05:00
Wilson Snyder 8700617fae Internals: Cleanup CRESET verilog and other misc fixes 2026-02-08 17:53:56 -05:00
Geza Lore 3752102879
Internals: Clean up V3Reorder (#7015) 
This is primarily cleanup, but there are 2 functional changes included:
- It used to accidentally reorder bodies of AstNodeIf that were outside
  an AstAlways. Now it will not touch anything outside an AstAlways.
- Removed one redundant edge from the graph which perturbs the result of
  V3Graph::acyclic. This should make no difference for the actual
  intended result of reordering NBAs to eliminate shadow variables.
 2026-02-08 16:09:53 +00:00
Wilson Snyder e12c62c070 Change JSON dumps to not include booleans that are false (#6977). 
Fixes #6977.
 2026-02-08 07:59:55 -05:00
Wilson Snyder c1db30523f Commentary (#7014) 
Fixes #7014.
 2026-02-08 07:48:12 -05:00
Wilson Snyder 0c83594e1e Fix variable conflict when multiple cells with unused input defaults 2026-02-07 18:11:55 -05:00
Wilson Snyder bbb231dfe2 Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-07 14:16:12 -05:00
Wilson Snyder 9068e2e5b5 Commentary: Changes update 2026-02-07 14:15:43 -05:00
Geza Lore bb0e1c8c61
Optimize temporary insertion for concatenations in Dfg (#7013) 
Add a new Dfg pass 'pushDownSel'. This will try to move selects through
a tree of concatenations in order to eliminate temporary nodes holding
intermediate concatenation results. This can get rid of a lot of
variables when packed arrays are assigned in parts (e.g. bit-wise).
 2026-02-07 18:06:12 +00:00
github action abdac02b50 Apply 'make format' 2026-02-07 15:07:33 +00:00
Leela Pakanati 8922794088
Tests: Add test cases for interface array access with loop variable index (#1418 tests) (#7011) 2026-02-07 10:06:37 -05:00
Geza Lore 6100c39764
Internals: Assign trace codes starting from zero (#7007) 
Use uint32_t max value instead of zero as sentinel value for a trace
code being unassigned. Prep for follow on patch.

Note the actual trace file will still start codes from one, the codes
in the model are just an offset from the base code.
 2026-02-07 14:01:53 +00:00
Igor Zaworski dc26dd601d
Fix internal error - virtual interface not found (#7010) 2026-02-06 22:20:10 +00:00
Pawel Kojma 9a8538fafa
Support signed multiplication in constraints (#7008) 2026-02-06 10:14:54 -05:00
github action 60b52a4986 Apply 'make format' 2026-02-06 11:39:13 +00:00
Leela Pakanati b14d65a787
Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
Leela Pakanati 2215d01d6b
Fix hierarchical interface/modport issues (#5941) (#6997) 2026-02-05 22:15:30 -05:00
Veripool API Bot b82f6beffb Verilog format 2026-02-05 17:45:24 -05:00
Wilson Snyder c83ae4a3ca Commentary: Changes update 2026-02-05 17:43:33 -05:00
Wilson Snyder 9fab6bfcf0 Tests: Fix t_assert_elab_p.py reruns 2026-02-05 17:42:39 -05:00
Wilson Snyder bee456822e Internals: Fix missing newline on co_return output code 2026-02-05 12:57:26 -05:00
Wilson Snyder 1adedd0bfa Tests: Cover deassign 2026-02-05 12:57:26 -05:00
Geza Lore 4e9792c34c
Fix C++ types of non-inlined module ports (#7002) 
We use special C++ types for ports, e.g. SystemC types in --sc mode, and native C arrays for unpacked arrays in --cc mode. These types are not substitutable for internal types, e.g. VlUnpacked, however all the runtime primitives expect internal types.

I think the intention was to use these special IO types only for top level ports, but the current implementation also uses them for the ports of all non-inlined modules. This means the output C++ will not compile if such a port is passed to a runtime primitive (e.g. array 'sort' as in the new test) or DPI import.

Changed to use the special IO types only on the top level ports.

Note these are likely still broken if attempting to invoke on a top level port (we might be saved by wrapTop, but later optimizations might eliminate the intermediary)
 2026-02-05 14:49:07 +00:00
Geza Lore 4aa0ea3f27 Commentary: Changes update 2026-02-05 07:05:59 +00:00
github action 55eaa64386 Apply 'make format' 2026-02-04 21:27:14 +00:00
Leela Pakanati 57c3b8e51b
Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
Geza Lore 515841cf15 Commentary 2026-02-04 18:09:51 +00:00
Oleh Maksymenko 229a696ab8
Add decoded Verilog name in JSON output (#6919) (#6995) 2026-02-04 07:08:33 -05:00
Wilson Snyder 1dd80996cd Fix some error capitalization 2026-02-03 19:57:23 -05:00
Wilson Snyder aaa5c5e857 Tests: t_dist_warn_coverage.py: Understand wildcards (#6994 comment) 2026-02-03 19:51:23 -05:00
Christian Hecken 3c680ba5a4
Tests: Fix LCOV_EXCL matching in fully commented lines (#6994) 2026-02-03 19:03:43 -05:00
Christian Hecken a778870e69
Internals: Optimize VerilatedVpioVarBase::m_fullname (#6993) 2026-02-03 17:36:00 -05:00
Krzysztof Bieganski ad85d89817
Support `foreach` with nested dots (#6991) 
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2026-02-03 08:44:18 -05:00
Wilson Snyder f9c76e84a6 Fix purity of backtrace, from bb979a00 2026-02-02 22:47:24 -05:00
Wilson Snyder 0fcc68e4b8 Fix MSVC backtrace, from bb979a00 2026-02-02 21:00:56 -05:00
Wilson Snyder 76c4ae5683 Add back LICENSE file due to (f4pga/actions#49) 2026-02-02 19:34:10 -05:00
Wilson Snyder bb979a00c8 Fix `$stacktrace` to decode through internal-c++filt (#6985). 2026-02-02 19:01:24 -05:00
Wilson Snyder 9083b238e5 Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
github action 268f5c3367 Apply 'make format' 2026-02-02 03:38:19 +00:00
Leela Pakanati b2fa3fb54e
Fix parameterized class typedef as interface type parameter (#6983) (#6984) 2026-02-01 22:37:29 -05:00
Wilson Snyder 407fc74195 Internals: Use Var::isConst to allow constant substitution 2026-02-01 21:06:26 -05:00