Change JSON dumps to not include booleans that are false (#6977).
Fixes #6977.
This commit is contained in:
Wilson Snyder
parent
c1db30523f
commit
e12c62c070
1
Changes
1
Changes
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@ -33,6 +33,7 @@ Verilator 5.045 devel
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* Support signed multiplication in constraints (#7008). [Pawel Kojma, Antmicro Ltd.]
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* Remove deprecated `--xml-only`.
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* Remove deprecated `--make cmake`.
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* Change JSON dumps to not include booleans that are false (#6977).
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* Change metacomment extra underscore error to BADVLTPRAGMA warning (#6968). [Geza Lore, Testorrent USA, Inc.]
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* Optimize string temporaries to not be localized (#6969). [Geza Lore, Testorrent USA, Inc.]
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* Optimize wide word shifts by multiple of word size (#6970). [Geza Lore, Testorrent USA, Inc.]
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@ -1946,35 +1946,26 @@ for programmatic processing (e.g. with `astsee
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<https://github.com/antmicro/astsee>`_). To enable this dump format, use
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:vlopt:`--dump-tree-json` or :vlopt:`--json-only`.
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Structure:
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The potential fields in the JSON dump can be determined by searching for
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JSON in the `src/V3AstNodes.cpp` source file. The dump will only include
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booleans that are true, omitting those that are false.
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Structure example:
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::
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{
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/* Attributes that are common to all types of nodes */
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/* Attributes that are common to most types of nodes */
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"type": "VAR",
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"name": "cyc",
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"verilogName": "cyc",
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/* By default addresses and filenames use short/stable ids rather than real value */
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"addr": "(H)",
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"loc": "a,25:12,26:15", /* "fileid,firstLine:firstCol,lastLine:endCol" (endCol is right exclusive) */
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"editNum": 602,
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/* Fields that are specific to AstVar nodes: */
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/* Some fields that are specific to AstVar nodes: */
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"origName": "cyc",
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"isSc": false,
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"ioDirection": "NONE",
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"isConst": false,
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"isPullup": false,
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"isPulldown": false,
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"isUsedClock": false,
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"isSigPublic": false,
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"isLatched": false,
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"isUsedLoopIdx": false,
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"noReset": false,
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"attrIsolateAssign": false,
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"attrFileDescr": false,
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"isDpiOpenArray": false,
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"isFuncReturn": false,
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"isFuncLocal": false,
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"attrClocker": "UNKNOWN",
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"lifetime": "NONE",
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"varType": "VAR",
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@ -273,6 +273,7 @@ Laroche
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Laurens
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Lavino
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Leber
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Leela
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Leendert
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Lem
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Lesik
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@ -361,6 +362,7 @@ Ondrej
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Oron
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Oyvind
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PLI
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Pakanati
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Palaniappan
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Patricio
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Peltonen
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@ -623,6 +625,7 @@ bitstoreal
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blackbox
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bokke
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bool
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booleans
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brancoliticus
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buf
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bufif
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@ -56,7 +56,6 @@ void AstNode::dumpJsonPtr(std::ostream& os, const std::string& name, const AstNo
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// Shorthands for dumping fields that use func name as key
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#define dumpJsonNumFunc(os, func) dumpJsonNum(os, #func, func())
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#define dumpJsonBoolFunc(os, func) dumpJsonBool(os, #func, func())
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#define dumpJsonBoolFuncIf(os, func) dumpJsonBoolIf(os, #func, func())
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#define dumpJsonStrFunc(os, func) dumpJsonStr(os, #func, func())
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#define dumpJsonPtrFunc(os, func) dumpJsonPtr(os, #func, func())
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@ -402,7 +401,7 @@ void AstCReset::dump(std::ostream& str) const {
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if (constructing()) str << " [CONS]";
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}
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void AstCReset::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, constructing);
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dumpJsonBoolFuncIf(str, constructing);
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dumpJsonGen(str);
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}
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@ -444,8 +443,8 @@ void AstConsDynArray::dump(std::ostream& str) const {
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if (rhsIsValue()) str << " [RVAL]";
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}
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void AstConsDynArray::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, lhsIsValue);
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dumpJsonBoolFunc(str, rhsIsValue);
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dumpJsonBoolFuncIf(str, lhsIsValue);
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dumpJsonBoolFuncIf(str, rhsIsValue);
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dumpJsonGen(str);
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}
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@ -455,8 +454,8 @@ void AstConsQueue::dump(std::ostream& str) const {
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if (rhsIsValue()) str << " [RVAL]";
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}
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void AstConsQueue::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, lhsIsValue);
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dumpJsonBoolFunc(str, rhsIsValue);
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dumpJsonBoolFuncIf(str, lhsIsValue);
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dumpJsonBoolFuncIf(str, rhsIsValue);
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dumpJsonGen(str);
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}
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void AstConstraint::dump(std::ostream& str) const {
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@ -470,11 +469,11 @@ void AstConstraint::dump(std::ostream& str) const {
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if (isStatic()) str << " [STATIC]";
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}
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void AstConstraint::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isExternDef);
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dumpJsonBoolFunc(str, isExternExplicit);
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dumpJsonBoolFunc(str, isExternProto);
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dumpJsonBoolFunc(str, isKwdPure);
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dumpJsonBoolFunc(str, isStatic);
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dumpJsonBoolFuncIf(str, isExternDef);
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dumpJsonBoolFuncIf(str, isExternExplicit);
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dumpJsonBoolFuncIf(str, isExternProto);
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dumpJsonBoolFuncIf(str, isKwdPure);
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dumpJsonBoolFuncIf(str, isStatic);
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if (baseOverride().isAny()) dumpJsonStr(str, "baseOverride", baseOverride().ascii());
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dumpJsonGen(str);
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}
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@ -484,8 +483,8 @@ void AstConstraintExpr::dump(std::ostream& str) const {
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if (isSoft()) str << " [SOFT]";
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}
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void AstConstraintExpr::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isDisableSoft);
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dumpJsonBoolFunc(str, isSoft);
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dumpJsonBoolFuncIf(str, isDisableSoft);
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dumpJsonBoolFuncIf(str, isSoft);
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dumpJsonGen(str);
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}
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AstConst* AstConst::parseParamLiteral(FileLine* fl, const string& literal) {
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@ -544,8 +543,8 @@ void AstNew::dump(std::ostream& str) const {
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if (isScoped()) str << " [SCOPED]";
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}
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void AstNew::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isImplicit);
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dumpJsonBoolFunc(str, isScoped);
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dumpJsonBoolFuncIf(str, isImplicit);
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dumpJsonBoolFuncIf(str, isScoped);
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dumpJsonGen(str);
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}
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@ -1672,8 +1671,8 @@ void AstNodeProcedure::dump(std::ostream& str) const {
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}
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void AstNodeProcedure::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isSuspendable);
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dumpJsonBoolFunc(str, needProcess);
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dumpJsonBoolFuncIf(str, isSuspendable);
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dumpJsonBoolFuncIf(str, needProcess);
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dumpJsonGen(str);
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}
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@ -1777,7 +1776,7 @@ void AstCvtArrayToArray::dump(std::ostream& str) const {
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str << " srcElementBits=" << srcElementBits();
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}
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void AstCvtArrayToArray::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, reverse);
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dumpJsonBoolFuncIf(str, reverse);
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dumpJsonNumFunc(str, blockSize);
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dumpJsonNumFunc(str, dstElementBits);
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dumpJsonNumFunc(str, srcElementBits);
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@ -1796,7 +1795,7 @@ void AstCell::dump(std::ostream& str) const {
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void AstCell::dumpJson(std::ostream& str) const {
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dumpJsonStrFunc(str, origName);
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dumpJsonStrFunc(str, verilogName);
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dumpJsonBoolFunc(str, recursive);
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dumpJsonBoolFuncIf(str, recursive);
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dumpJsonGen(str);
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}
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void AstCellInline::dump(std::ostream& str) const {
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@ -1848,9 +1847,9 @@ void AstClass::dump(std::ostream& str) const {
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void AstClass::dumpJson(std::ostream& str) const {
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// dumpJsonNumFunc(str, declTokenNum); // Not dumped as adding token changes whole file
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dumpJsonBoolFuncIf(str, isCovergroup);
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dumpJsonBoolFunc(str, isExtended);
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dumpJsonBoolFunc(str, isInterfaceClass);
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dumpJsonBoolFunc(str, isVirtual);
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dumpJsonBoolFuncIf(str, isExtended);
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dumpJsonBoolFuncIf(str, isInterfaceClass);
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dumpJsonBoolFuncIf(str, isVirtual);
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if (baseOverride().isAny()) dumpJsonStr(str, "baseOverride", baseOverride().ascii());
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dumpJsonGen(str);
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}
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@ -1859,7 +1858,7 @@ void AstClassExtends::dump(std::ostream& str) const {
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if (isImplements()) str << " [IMPLEMENTS]";
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}
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void AstClassExtends::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isImplements);
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dumpJsonBoolFuncIf(str, isImplements);
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dumpJsonGen(str);
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}
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AstClass* AstClassExtends::classOrNullp() const {
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@ -1908,8 +1907,8 @@ void AstClocking::dump(std::ostream& str) const {
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if (isGlobal()) str << " [GLOBAL]";
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}
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void AstClocking::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isDefault);
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dumpJsonBoolFunc(str, isGlobal);
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dumpJsonBoolFuncIf(str, isDefault);
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dumpJsonBoolFuncIf(str, isGlobal);
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dumpJsonGen(str);
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}
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void AstConfig::dump(std::ostream& str) const {
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@ -1927,7 +1926,7 @@ void AstConfigRule::dump(std::ostream& str) const {
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if (isCell()) str << " [CELL]";
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}
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void AstConfigRule::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isCell);
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dumpJsonBoolFuncIf(str, isCell);
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dumpJsonGen(str);
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}
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void AstConfigUse::dump(std::ostream& str) const {
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@ -1935,7 +1934,7 @@ void AstConfigUse::dump(std::ostream& str) const {
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if (isConfig()) str << " [CONFIG]";
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}
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void AstConfigUse::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isConfig);
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dumpJsonBoolFuncIf(str, isConfig);
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dumpJsonGen(str);
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}
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void AstDisplay::dump(std::ostream& str) const {
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@ -1948,7 +1947,7 @@ void AstEnumDType::dump(std::ostream& str) const {
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str << " enum";
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}
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void AstEnumDType::dumpJson(std::ostream& str) const {
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dumpJsonBool(str, "enum", 1);
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dumpJsonBoolIf(str, "enum", 1);
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dumpJsonGen(str);
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}
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void AstEnumDType::dumpSmall(std::ostream& str) const {
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@ -1999,8 +1998,8 @@ void AstGenBlock::dump(std::ostream& str) const {
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if (unnamed()) str << " [UNNAMED]";
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}
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void AstGenBlock::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, implied);
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dumpJsonBoolFunc(str, unnamed);
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dumpJsonBoolFuncIf(str, implied);
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dumpJsonBoolFuncIf(str, unnamed);
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dumpJsonGen(str);
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}
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@ -2022,8 +2021,8 @@ void AstIfaceRefDType::dump(std::ostream& str) const {
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}
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}
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void AstIfaceRefDType::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isPortDecl);
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dumpJsonBoolFunc(str, isVirtual);
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dumpJsonBoolFuncIf(str, isPortDecl);
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dumpJsonBoolFuncIf(str, isVirtual);
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dumpJsonStrFunc(str, cellName);
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dumpJsonStrFunc(str, ifaceName);
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dumpJsonStrFunc(str, modportName);
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@ -2140,7 +2139,7 @@ void AstMemberDType::dump(std::ostream& str) const {
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}
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void AstMemberDType::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isConstrainedRand);
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dumpJsonBoolFuncIf(str, isConstrainedRand);
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dumpJsonStrFunc(str, name);
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dumpJsonStrFunc(str, tag);
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dumpJsonGen(str);
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@ -2203,8 +2202,8 @@ void AstModportFTaskRef::dump(std::ostream& str) const {
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}
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}
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void AstModportFTaskRef::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isExport);
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dumpJsonBoolFunc(str, isImport);
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dumpJsonBoolFuncIf(str, isExport);
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dumpJsonBoolFuncIf(str, isImport);
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dumpJsonGen(str);
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}
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void AstModportVarRef::dump(std::ostream& str) const {
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@ -2228,9 +2227,9 @@ void AstModule::dump(std::ostream& str) const {
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if (hasGenericIface()) str << " [HASGENERICIFACE]";
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}
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void AstModule::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isChecker);
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dumpJsonBoolFunc(str, isProgram);
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dumpJsonBoolFunc(str, hasGenericIface);
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dumpJsonBoolFuncIf(str, isChecker);
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dumpJsonBoolFuncIf(str, isProgram);
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dumpJsonBoolFuncIf(str, hasGenericIface);
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dumpJsonGen(str);
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}
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void AstPin::dump(std::ostream& str) const {
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@ -2245,8 +2244,8 @@ void AstPin::dump(std::ostream& str) const {
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if (svImplicit()) str << " [.SV]";
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}
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void AstPin::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, svDotName);
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dumpJsonBoolFunc(str, svImplicit);
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dumpJsonBoolFuncIf(str, svDotName);
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dumpJsonBoolFuncIf(str, svImplicit);
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dumpJsonGen(str);
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}
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string AstPin::prettyOperatorName() const {
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@ -2313,8 +2312,8 @@ void AstTypedef::dump(std::ostream& str) const {
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}
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void AstTypedef::dumpJson(std::ostream& str) const {
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// dumpJsonNumFunc(str, declTokenNum); // Not dumped as adding token changes whole file
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dumpJsonBoolFunc(str, attrPublic);
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dumpJsonBoolFunc(str, isUnderClass);
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dumpJsonBoolFuncIf(str, attrPublic);
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dumpJsonBoolFuncIf(str, isUnderClass);
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dumpJsonGen(str);
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}
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void AstTypedefFwd::dump(std::ostream& str) const {
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@ -2341,7 +2340,7 @@ void AstRange::dump(std::ostream& str) const {
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if (ascending()) str << " [ASCENDING]";
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}
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void AstRSProdList::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, randJoin);
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dumpJsonBoolFuncIf(str, randJoin);
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dumpJsonGen(str);
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}
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void AstRSProdList::dump(std::ostream& str) const {
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@ -2349,8 +2348,8 @@ void AstRSProdList::dump(std::ostream& str) const {
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if (randJoin()) str << " [RANDJOIN]";
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}
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void AstRange::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, ascending);
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dumpJsonBoolFunc(str, fromBracket);
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dumpJsonBoolFuncIf(str, ascending);
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dumpJsonBoolFuncIf(str, fromBracket);
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dumpJsonGen(str);
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}
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void AstParamTypeDType::dump(std::ostream& str) const {
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@ -2402,8 +2401,8 @@ void AstNodeUOrStructDType::dump(std::ostream& str) const {
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if (classOrPackagep()) str << " pkg=" << nodeAddr(classOrPackagep());
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}
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void AstNodeUOrStructDType::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, packed);
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dumpJsonBoolFunc(str, isFourstate);
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dumpJsonBoolFuncIf(str, packed);
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dumpJsonBoolFuncIf(str, isFourstate);
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dumpJsonGen(str);
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}
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void AstUnionDType::dump(std::ostream& str) const {
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@ -2413,8 +2412,8 @@ void AstUnionDType::dump(std::ostream& str) const {
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}
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void AstUnionDType::dumpJson(std::ostream& str) const {
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this->AstNodeUOrStructDType::dumpJson(str);
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dumpJsonBoolFunc(str, isSoft);
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dumpJsonBoolFunc(str, isTagged);
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dumpJsonBoolFuncIf(str, isSoft);
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dumpJsonBoolFuncIf(str, isTagged);
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}
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bool AstUnionDType::sameNode(const AstNode* samep) const {
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const AstUnionDType* const asamep = VN_DBG_AS(samep, UnionDType);
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@ -2441,8 +2440,8 @@ void AstNodeDType::dump(std::ostream& str) const {
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}
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}
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void AstNodeDType::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, generic);
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if (isSigned() && !isDouble()) dumpJsonBool(str, "signed", 1);
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dumpJsonBoolFuncIf(str, generic);
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if (isSigned() && !isDouble()) dumpJsonBoolIf(str, "signed", 1);
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dumpJsonGen(str);
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}
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void AstNodeDType::dumpSmall(std::ostream& str) const VL_MT_STABLE {
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@ -2468,7 +2467,7 @@ void AstNodeArrayDType::dump(std::ostream& str) const {
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str << " " << declRange();
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}
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void AstNodeArrayDType::dumpJson(std::ostream& str) const {
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dumpJsonBoolFunc(str, isCompound);
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dumpJsonBoolFuncIf(str, isCompound);
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dumpJsonStr(str, "declRange", cvtToStr(declRange()));
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dumpJsonGen(str);
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}
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@ -2575,11 +2574,11 @@ void AstNodeModule::dumpJson(std::ostream& str) const {
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dumpJsonStrFunc(str, origName);
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dumpJsonStrFunc(str, verilogName);
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dumpJsonNumFunc(str, level);
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dumpJsonBoolFunc(str, modPublic);
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dumpJsonBoolFunc(str, inLibrary);
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dumpJsonBoolFunc(str, dead);
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dumpJsonBoolFunc(str, recursiveClone);
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dumpJsonBoolFunc(str, recursive);
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dumpJsonBoolFuncIf(str, modPublic);
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dumpJsonBoolFuncIf(str, inLibrary);
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dumpJsonBoolFuncIf(str, dead);
|
||||
dumpJsonBoolFuncIf(str, recursiveClone);
|
||||
dumpJsonBoolFuncIf(str, recursive);
|
||||
dumpJsonStr(str, "timeunit", timeunit().ascii());
|
||||
if (libname() != "work") dumpJsonStr(str, "libname=", libname());
|
||||
dumpJsonGen(str);
|
||||
|
|
@ -2752,7 +2751,7 @@ void AstVarScope::dump(std::ostream& str) const {
|
|||
}
|
||||
}
|
||||
void AstVarScope::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, isTrace);
|
||||
dumpJsonBoolFuncIf(str, isTrace);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
bool AstVarScope::sameNode(const AstNode* samep) const {
|
||||
|
|
@ -2803,7 +2802,7 @@ void AstVarXRef::dump(std::ostream& str) const {
|
|||
}
|
||||
}
|
||||
void AstVarXRef::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, containsGenBlock);
|
||||
dumpJsonBoolFuncIf(str, containsGenBlock);
|
||||
dumpJsonStrFunc(str, dotted);
|
||||
dumpJsonStrFunc(str, inlinedDots);
|
||||
dumpJsonGen(str);
|
||||
|
|
@ -2868,35 +2867,35 @@ void AstVar::dump(std::ostream& str) const {
|
|||
void AstVar::dumpJson(std::ostream& str) const {
|
||||
dumpJsonStrFunc(str, origName);
|
||||
dumpJsonStrFunc(str, verilogName);
|
||||
dumpJsonBoolFunc(str, isSc);
|
||||
dumpJsonBoolFunc(str, isPrimaryIO);
|
||||
dumpJsonBoolFunc(str, isPrimaryClock);
|
||||
dumpJsonBoolFuncIf(str, isSc);
|
||||
dumpJsonBoolFuncIf(str, isPrimaryIO);
|
||||
dumpJsonBoolFuncIf(str, isPrimaryClock);
|
||||
dumpJsonStr(str, "direction", direction().ascii());
|
||||
dumpJsonBoolFunc(str, isConst);
|
||||
dumpJsonBoolFunc(str, isPullup);
|
||||
dumpJsonBoolFunc(str, isPulldown);
|
||||
dumpJsonBoolFunc(str, isSigPublic);
|
||||
dumpJsonBoolFunc(str, isLatched);
|
||||
dumpJsonBoolFunc(str, isUsedLoopIdx);
|
||||
dumpJsonBoolFuncIf(str, isConst);
|
||||
dumpJsonBoolFuncIf(str, isPullup);
|
||||
dumpJsonBoolFuncIf(str, isPulldown);
|
||||
dumpJsonBoolFuncIf(str, isSigPublic);
|
||||
dumpJsonBoolFuncIf(str, isLatched);
|
||||
dumpJsonBoolFuncIf(str, isUsedLoopIdx);
|
||||
dumpJsonBoolFuncIf(str, noCReset);
|
||||
dumpJsonBoolFunc(str, noReset);
|
||||
dumpJsonBoolFunc(str, attrIsolateAssign);
|
||||
dumpJsonBoolFunc(str, attrFileDescr);
|
||||
dumpJsonBoolFunc(str, isDpiOpenArray);
|
||||
dumpJsonBoolFunc(str, isFuncReturn);
|
||||
dumpJsonBoolFunc(str, isFuncLocal);
|
||||
dumpJsonBoolFunc(str, isStdRandomizeArg);
|
||||
dumpJsonBoolFuncIf(str, noReset);
|
||||
dumpJsonBoolFuncIf(str, attrIsolateAssign);
|
||||
dumpJsonBoolFuncIf(str, attrFileDescr);
|
||||
dumpJsonBoolFuncIf(str, isDpiOpenArray);
|
||||
dumpJsonBoolFuncIf(str, isFuncReturn);
|
||||
dumpJsonBoolFuncIf(str, isFuncLocal);
|
||||
dumpJsonBoolFuncIf(str, isStdRandomizeArg);
|
||||
dumpJsonStr(str, "lifetime", lifetime().ascii());
|
||||
dumpJsonStr(str, "varType", varType().ascii());
|
||||
if (dtypep()) dumpJsonStr(str, "dtypeName", dtypep()->name());
|
||||
dumpJsonBoolFunc(str, isSigUserRdPublic);
|
||||
dumpJsonBoolFunc(str, isSigUserRWPublic);
|
||||
dumpJsonBoolFunc(str, isGParam);
|
||||
dumpJsonBoolFunc(str, isParam);
|
||||
dumpJsonBoolFunc(str, attrScBv);
|
||||
dumpJsonBoolFunc(str, attrSFormat);
|
||||
dumpJsonBoolFunc(str, ignorePostWrite);
|
||||
dumpJsonBoolFunc(str, ignoreSchedWrite);
|
||||
dumpJsonBoolFuncIf(str, isSigUserRdPublic);
|
||||
dumpJsonBoolFuncIf(str, isSigUserRWPublic);
|
||||
dumpJsonBoolFuncIf(str, isGParam);
|
||||
dumpJsonBoolFuncIf(str, isParam);
|
||||
dumpJsonBoolFuncIf(str, attrScBv);
|
||||
dumpJsonBoolFuncIf(str, attrSFormat);
|
||||
dumpJsonBoolFuncIf(str, ignorePostWrite);
|
||||
dumpJsonBoolFuncIf(str, ignoreSchedWrite);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstScope::dump(std::ostream& str) const {
|
||||
|
|
@ -2921,8 +2920,8 @@ void AstScopeName::dump(std::ostream& str) const {
|
|||
str << " scopeEntr=\"" << m_scopeEntr << "\"";
|
||||
}
|
||||
void AstScopeName::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, dpiExport);
|
||||
dumpJsonBoolFunc(str, forFormat);
|
||||
dumpJsonBoolFuncIf(str, dpiExport);
|
||||
dumpJsonBoolFuncIf(str, forFormat);
|
||||
dumpJsonStr(str, "scopeAttr", m_scopeAttr);
|
||||
dumpJsonStr(str, "scopeEntr", m_scopeEntr);
|
||||
dumpJsonGen(str);
|
||||
|
|
@ -2932,7 +2931,7 @@ void AstSenTree::dump(std::ostream& str) const {
|
|||
if (isMulti()) str << " [MULTI]";
|
||||
}
|
||||
void AstSenTree::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, isMulti);
|
||||
dumpJsonBoolFuncIf(str, isMulti);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstSenItem::dump(std::ostream& str) const {
|
||||
|
|
@ -2986,7 +2985,7 @@ void AstDot::dump(std::ostream& str) const {
|
|||
if (colon()) str << " [::]";
|
||||
}
|
||||
void AstDot::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, colon);
|
||||
dumpJsonBoolFuncIf(str, colon);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstActive::dump(std::ostream& str) const {
|
||||
|
|
@ -3064,18 +3063,18 @@ bool AstNodeFTask::getPurityRecurse() const {
|
|||
return true;
|
||||
}
|
||||
void AstNodeFTask::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBool(str, "method", classMethod());
|
||||
dumpJsonBoolFunc(str, dpiExport);
|
||||
dumpJsonBoolFunc(str, dpiImport);
|
||||
dumpJsonBoolFunc(str, dpiOpenChild);
|
||||
dumpJsonBoolFunc(str, dpiOpenParent);
|
||||
dumpJsonBoolFunc(str, isExternDef);
|
||||
dumpJsonBoolFunc(str, isExternProto);
|
||||
dumpJsonBoolIf(str, "method", classMethod());
|
||||
dumpJsonBoolFuncIf(str, dpiExport);
|
||||
dumpJsonBoolFuncIf(str, dpiImport);
|
||||
dumpJsonBoolFuncIf(str, dpiOpenChild);
|
||||
dumpJsonBoolFuncIf(str, dpiOpenParent);
|
||||
dumpJsonBoolFuncIf(str, isExternDef);
|
||||
dumpJsonBoolFuncIf(str, isExternProto);
|
||||
dumpJsonBoolFuncIf(str, isVirtual);
|
||||
dumpJsonBoolFuncIf(str, needProcess);
|
||||
dumpJsonBoolFunc(str, prototype);
|
||||
dumpJsonBoolFunc(str, recursive);
|
||||
dumpJsonBoolFunc(str, taskPublic);
|
||||
dumpJsonBoolFuncIf(str, prototype);
|
||||
dumpJsonBoolFuncIf(str, recursive);
|
||||
dumpJsonBoolFuncIf(str, taskPublic);
|
||||
if (baseOverride().isAny()) dumpJsonStr(str, "baseOverride", baseOverride().ascii());
|
||||
dumpJsonStrFunc(str, cname);
|
||||
dumpJsonGen(str);
|
||||
|
|
@ -3085,7 +3084,7 @@ void AstNodeBlock::dump(std::ostream& str) const {
|
|||
if (unnamed()) str << " [UNNAMED]";
|
||||
}
|
||||
void AstNodeBlock::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, unnamed);
|
||||
dumpJsonBoolFuncIf(str, unnamed);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstBegin::dump(std::ostream& str) const {
|
||||
|
|
@ -3094,8 +3093,8 @@ void AstBegin::dump(std::ostream& str) const {
|
|||
if (needProcess()) str << " [NPRC]";
|
||||
}
|
||||
void AstBegin::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, implied);
|
||||
dumpJsonBoolFunc(str, needProcess);
|
||||
dumpJsonBoolFuncIf(str, implied);
|
||||
dumpJsonBoolFuncIf(str, needProcess);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstNodeCoverDecl::dump(std::ostream& str) const {
|
||||
|
|
@ -3162,7 +3161,7 @@ void AstStop::dump(std::ostream& str) const {
|
|||
if (isFatal()) str << " [FATAL]";
|
||||
}
|
||||
void AstStop::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, isFatal);
|
||||
dumpJsonBoolFuncIf(str, isFatal);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstTraceDecl::dump(std::ostream& str) const {
|
||||
|
|
@ -3213,8 +3212,8 @@ void AstCFile::dump(std::ostream& str) const {
|
|||
}
|
||||
|
||||
void AstCFile::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, source);
|
||||
dumpJsonBoolFunc(str, slow);
|
||||
dumpJsonBoolFuncIf(str, source);
|
||||
dumpJsonBoolFuncIf(str, slow);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstCFunc::dump(std::ostream& str) const {
|
||||
|
|
@ -3237,18 +3236,18 @@ void AstCFunc::dump(std::ostream& str) const {
|
|||
if (entryPoint()) str << " [ENTRY]";
|
||||
}
|
||||
void AstCFunc::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, slow);
|
||||
dumpJsonBoolFunc(str, isStatic);
|
||||
dumpJsonBoolFunc(str, dpiExportDispatcher);
|
||||
dumpJsonBoolFunc(str, dpiExportImpl);
|
||||
dumpJsonBoolFunc(str, dpiImportPrototype);
|
||||
dumpJsonBoolFunc(str, dpiImportWrapper);
|
||||
dumpJsonBoolFunc(str, dpiContext);
|
||||
dumpJsonBoolFunc(str, isConstructor);
|
||||
dumpJsonBoolFunc(str, isDestructor);
|
||||
dumpJsonBoolFunc(str, isVirtual);
|
||||
dumpJsonBoolFunc(str, isCoroutine);
|
||||
dumpJsonBoolFunc(str, needProcess);
|
||||
dumpJsonBoolFuncIf(str, slow);
|
||||
dumpJsonBoolFuncIf(str, isStatic);
|
||||
dumpJsonBoolFuncIf(str, dpiExportDispatcher);
|
||||
dumpJsonBoolFuncIf(str, dpiExportImpl);
|
||||
dumpJsonBoolFuncIf(str, dpiImportPrototype);
|
||||
dumpJsonBoolFuncIf(str, dpiImportWrapper);
|
||||
dumpJsonBoolFuncIf(str, dpiContext);
|
||||
dumpJsonBoolFuncIf(str, isConstructor);
|
||||
dumpJsonBoolFuncIf(str, isDestructor);
|
||||
dumpJsonBoolFuncIf(str, isVirtual);
|
||||
dumpJsonBoolFuncIf(str, isCoroutine);
|
||||
dumpJsonBoolFuncIf(str, needProcess);
|
||||
dumpJsonGen(str);
|
||||
// TODO: maybe try to shorten these flags somehow
|
||||
}
|
||||
|
|
@ -3327,7 +3326,7 @@ void AstCgOptionAssign::dump(std::ostream& str) const {
|
|||
this->AstNode::dump(str);
|
||||
}
|
||||
void AstCgOptionAssign::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, typeOption);
|
||||
dumpJsonBoolFuncIf(str, typeOption);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
void AstDelay::dump(std::ostream& str) const {
|
||||
|
|
@ -3335,7 +3334,7 @@ void AstDelay::dump(std::ostream& str) const {
|
|||
if (isCycleDelay()) str << " [CYCLE]";
|
||||
}
|
||||
void AstDelay::dumpJson(std::ostream& str) const {
|
||||
dumpJsonBoolFunc(str, isCycleDelay);
|
||||
dumpJsonBoolFuncIf(str, isCycleDelay);
|
||||
dumpJsonGen(str);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"(E)","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"UNLINKED","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"t","addr":"(F)","loc":"d,67:8,67:9","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"t","verilogName":"t","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"t","addr":"(F)","loc":"d,67:8,67:9","origName":"t","verilogName":"t","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"p","addr":"(G)","loc":"d,69:11,69:12","dtypep":"(H)","origName":"p","verilogName":"p","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"VAR","dtypeName":"Packet","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"INITIAL","name":"","addr":"(I)","loc":"d,71:4,71:11","isSuspendable":false,"needProcess":false,
|
||||
{"type":"VAR","name":"p","addr":"(G)","loc":"d,69:11,69:12","dtypep":"(H)","origName":"p","verilogName":"p","direction":"NONE","lifetime":"VSTATICI","varType":"VAR","dtypeName":"Packet","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"INITIAL","name":"","addr":"(I)","loc":"d,71:4,71:11",
|
||||
"stmtsp": [
|
||||
{"type":"BEGIN","name":"","addr":"(J)","loc":"d,71:12,71:17","implied":false,"needProcess":false,"unnamed":true,"declsp": [],
|
||||
{"type":"BEGIN","name":"","addr":"(J)","loc":"d,71:12,71:17","unnamed":true,"declsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"DISPLAY","name":"","addr":"(K)","loc":"d,73:7,73:13",
|
||||
"fmtp": [
|
||||
|
|
@ -15,28 +15,28 @@
|
|||
]}
|
||||
]}
|
||||
]},
|
||||
{"type":"PACKAGE","name":"$unit","addr":"(E)","loc":"a,0:0,0:0","origName":"__024unit","verilogName":"\\$unit ","level":2,"modPublic":false,"inLibrary":true,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"PACKAGE","name":"$unit","addr":"(E)","loc":"a,0:0,0:0","origName":"__024unit","verilogName":"\\$unit ","level":2,"inLibrary":true,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"CLASS","name":"Packet","addr":"(O)","loc":"d,7:1,7:6","isExtended":false,"isInterfaceClass":false,"isVirtual":false,"origName":"Packet","verilogName":"Packet","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","classOrPackagep":"UNLINKED","inlinesp": [],
|
||||
{"type":"CLASS","name":"Packet","addr":"(O)","loc":"d,7:1,7:6","origName":"Packet","verilogName":"Packet","level":3,"timeunit":"1ps","classOrPackagep":"UNLINKED","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"header","addr":"(P)","loc":"d,8:13,8:19","dtypep":"(Q)","origName":"header","verilogName":"header","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"int","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"length","addr":"(R)","loc":"d,9:13,9:19","dtypep":"(Q)","origName":"length","verilogName":"length","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"int","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"sublength","addr":"(S)","loc":"d,10:13,10:22","dtypep":"(Q)","origName":"sublength","verilogName":"sublength","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"int","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"if_4","addr":"(T)","loc":"d,11:13,11:17","dtypep":"(U)","origName":"if_4","verilogName":"if_4","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"iff_5_6","addr":"(V)","loc":"d,12:13,12:20","dtypep":"(U)","origName":"iff_5_6","verilogName":"iff_5_6","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"if_state_ok","addr":"(W)","loc":"d,13:13,13:24","dtypep":"(U)","origName":"if_state_ok","verilogName":"if_state_ok","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"array","addr":"(X)","loc":"d,15:13,15:18","dtypep":"(Y)","origName":"array","verilogName":"array","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"state","addr":"(Z)","loc":"d,17:11,17:16","dtypep":"(M)","origName":"state","verilogName":"state","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"FUNC","name":"strings_equal","addr":"(AB)","loc":"d,61:17,61:30","dtypep":"(U)","method":true,"dpiExport":false,"dpiImport":false,"dpiOpenChild":false,"dpiOpenParent":false,"isExternDef":false,"isExternProto":false,"prototype":false,"recursive":false,"taskPublic":false,"cname":"strings_equal",
|
||||
{"type":"VAR","name":"header","addr":"(P)","loc":"d,8:13,8:19","dtypep":"(Q)","origName":"header","verilogName":"header","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"int","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"length","addr":"(R)","loc":"d,9:13,9:19","dtypep":"(Q)","origName":"length","verilogName":"length","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"int","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"sublength","addr":"(S)","loc":"d,10:13,10:22","dtypep":"(Q)","origName":"sublength","verilogName":"sublength","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"int","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"if_4","addr":"(T)","loc":"d,11:13,11:17","dtypep":"(U)","origName":"if_4","verilogName":"if_4","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"iff_5_6","addr":"(V)","loc":"d,12:13,12:20","dtypep":"(U)","origName":"iff_5_6","verilogName":"iff_5_6","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"if_state_ok","addr":"(W)","loc":"d,13:13,13:24","dtypep":"(U)","origName":"if_state_ok","verilogName":"if_state_ok","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"array","addr":"(X)","loc":"d,15:13,15:18","dtypep":"(Y)","origName":"array","verilogName":"array","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"state","addr":"(Z)","loc":"d,17:11,17:16","dtypep":"(M)","origName":"state","verilogName":"state","direction":"NONE","lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"FUNC","name":"strings_equal","addr":"(AB)","loc":"d,61:17,61:30","dtypep":"(U)","method":true,"cname":"strings_equal",
|
||||
"fvarp": [
|
||||
{"type":"VAR","name":"strings_equal","addr":"(BB)","loc":"d,61:17,61:30","dtypep":"(U)","origName":"strings_equal","verilogName":"strings_equal","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noCReset":true,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":true,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"VAUTOM","varType":"MEMBER","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"strings_equal","addr":"(BB)","loc":"d,61:17,61:30","dtypep":"(U)","origName":"strings_equal","verilogName":"strings_equal","direction":"OUTPUT","noCReset":true,"isFuncReturn":true,"isFuncLocal":true,"lifetime":"VAUTOM","varType":"MEMBER","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],"classOrPackagep": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"a","addr":"(CB)","loc":"d,61:38,61:39","dtypep":"(M)","origName":"a","verilogName":"a","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"b","addr":"(DB)","loc":"d,61:48,61:49","dtypep":"(M)","origName":"b","verilogName":"b","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"a","addr":"(CB)","loc":"d,61:38,61:39","dtypep":"(M)","origName":"a","verilogName":"a","direction":"INPUT","isFuncLocal":true,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"b","addr":"(DB)","loc":"d,61:48,61:49","dtypep":"(M)","origName":"b","verilogName":"b","direction":"INPUT","isFuncLocal":true,"lifetime":"VAUTOMI","varType":"MEMBER","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(EB)","loc":"d,61:17,61:30","dtypep":"(U)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(FB)","loc":"d,61:17,61:30","dtypep":"(U)","constructing":false}
|
||||
{"type":"CRESET","name":"","addr":"(FB)","loc":"d,61:17,61:30","dtypep":"(U)"}
|
||||
],
|
||||
"lhsp": [
|
||||
{"type":"VARREF","name":"strings_equal","addr":"(GB)","loc":"d,61:17,61:30","dtypep":"(U)","access":"WR","varp":"(BB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
|
|
@ -55,8 +55,8 @@
|
|||
{"type":"VARREF","name":"strings_equal","addr":"(MB)","loc":"d,62:7,62:13","dtypep":"(U)","access":"WR","varp":"(BB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []}
|
||||
],"scopeNamep": []},
|
||||
{"type":"FUNC","name":"new","addr":"(NB)","loc":"d,7:1,7:6","dtypep":"(OB)","method":true,"dpiExport":false,"dpiImport":false,"dpiOpenChild":false,"dpiOpenParent":false,"isExternDef":false,"isExternProto":false,"prototype":false,"recursive":false,"taskPublic":false,"cname":"new","fvarp": [],"classOrPackagep": [],"stmtsp": [],"scopeNamep": []},
|
||||
{"type":"VAR","name":"constraint","addr":"(PB)","loc":"d,7:1,7:6","dtypep":"(QB)","origName":"constraint","verilogName":"constraint","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MEMBER","dtypeName":"VlRandomizer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"FUNC","name":"new","addr":"(NB)","loc":"d,7:1,7:6","dtypep":"(OB)","method":true,"cname":"new","fvarp": [],"classOrPackagep": [],"stmtsp": [],"scopeNamep": []},
|
||||
{"type":"VAR","name":"constraint","addr":"(PB)","loc":"d,7:1,7:6","dtypep":"(QB)","origName":"constraint","verilogName":"constraint","direction":"NONE","lifetime":"NONE","varType":"MEMBER","dtypeName":"VlRandomizer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],"extendsp": []}
|
||||
]}
|
||||
],"filesp": [],
|
||||
|
|
@ -68,7 +68,7 @@
|
|||
{"type":"BASICDTYPE","name":"string","addr":"(M)","loc":"d,73:7,73:13","dtypep":"(M)","keyword":"string","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"int","addr":"(Q)","loc":"d,8:9,8:12","dtypep":"(Q)","keyword":"int","range":"31:0","generic":true,"signed":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"bit","addr":"(U)","loc":"d,11:9,11:12","dtypep":"(U)","keyword":"bit","generic":true,"rangep": []},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(Y)","loc":"d,15:18,15:19","dtypep":"(Y)","isCompound":false,"declRange":"[0:1]","generic":false,"signed":true,"refDTypep":"(Q)","childDTypep": [],
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(Y)","loc":"d,15:18,15:19","dtypep":"(Y)","declRange":"[0:1]","signed":true,"refDTypep":"(Q)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(SB)","loc":"d,15:18,15:19","ascending":true,"fromBracket":true,
|
||||
"leftp": [
|
||||
|
|
@ -78,13 +78,13 @@
|
|||
{"type":"CONST","name":"32'h1","addr":"(UB)","loc":"d,15:19,15:20","dtypep":"(RB)"}
|
||||
]}
|
||||
]},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(OB)","loc":"d,7:1,7:6","dtypep":"(OB)","generic":false},
|
||||
{"type":"CLASSREFDTYPE","name":"Packet","addr":"(H)","loc":"d,69:4,69:10","dtypep":"(H)","generic":false,"classp":"(O)","classOrPackagep":"(O)","paramsp": []},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(OB)","loc":"d,7:1,7:6","dtypep":"(OB)"},
|
||||
{"type":"CLASSREFDTYPE","name":"Packet","addr":"(H)","loc":"d,69:4,69:10","dtypep":"(H)","classp":"(O)","classOrPackagep":"(O)","paramsp": []},
|
||||
{"type":"BASICDTYPE","name":"VlRandomizer","addr":"(QB)","loc":"d,7:1,7:6","dtypep":"(QB)","keyword":"VlRandomizer","generic":true,"rangep": []}
|
||||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(VB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(VB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(WB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(VB)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,42 +1,42 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"UNLINKED","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"test","addr":"(E)","loc":"d,22:8,22:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"test","verilogName":"test","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"test","addr":"(E)","loc":"d,22:8,22:12","origName":"test","verilogName":"test","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"N","addr":"(F)","loc":"d,24:12,24:13","dtypep":"(G)","origName":"N","verilogName":"N","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":true,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"GENVAR","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"GENBLOCK","name":"FOR_GENERATE","addr":"(H)","loc":"d,25:14,25:17","implied":true,"unnamed":false,"genforp": [],"itemsp": []},
|
||||
{"type":"GENBLOCK","name":"FOR_GENERATE[0]","addr":"(I)","loc":"d,27:21,27:31","implied":false,"unnamed":false,"genforp": [],
|
||||
{"type":"VAR","name":"N","addr":"(F)","loc":"d,24:12,24:13","dtypep":"(G)","origName":"N","verilogName":"N","direction":"NONE","isUsedLoopIdx":true,"lifetime":"VSTATICI","varType":"GENVAR","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"GENBLOCK","name":"FOR_GENERATE","addr":"(H)","loc":"d,25:14,25:17","implied":true,"genforp": [],"itemsp": []},
|
||||
{"type":"GENBLOCK","name":"FOR_GENERATE[0]","addr":"(I)","loc":"d,27:21,27:31","genforp": [],
|
||||
"itemsp": [
|
||||
{"type":"CELL","name":"submod_for","addr":"(J)","loc":"d,27:21,27:31","origName":"submod_for","verilogName":"submod_for","recursive":false,"modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"GENBLOCK","name":"genblk1","addr":"(L)","loc":"d,28:19,28:24","implied":false,"unnamed":true,"genforp": [],
|
||||
{"type":"CELL","name":"submod_for","addr":"(J)","loc":"d,27:21,27:31","origName":"submod_for","verilogName":"submod_for","modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"GENBLOCK","name":"genblk1","addr":"(L)","loc":"d,28:19,28:24","unnamed":true,"genforp": [],
|
||||
"itemsp": [
|
||||
{"type":"CELL","name":"submod_2","addr":"(M)","loc":"d,29:25,29:33","origName":"submod_2","verilogName":"submod_2","recursive":false,"modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
{"type":"CELL","name":"submod_2","addr":"(M)","loc":"d,29:25,29:33","origName":"submod_2","verilogName":"submod_2","modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]},
|
||||
{"type":"CELL","name":"submod_3","addr":"(N)","loc":"d,31:21,31:29","origName":"submod_3","verilogName":"submod_3","recursive":false,"modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
{"type":"CELL","name":"submod_3","addr":"(N)","loc":"d,31:21,31:29","origName":"submod_3","verilogName":"submod_3","modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]},
|
||||
{"type":"GENBLOCK","name":"FOR_GENERATE[1]","addr":"(O)","loc":"d,27:21,27:31","implied":false,"unnamed":false,"genforp": [],
|
||||
{"type":"GENBLOCK","name":"FOR_GENERATE[1]","addr":"(O)","loc":"d,27:21,27:31","genforp": [],
|
||||
"itemsp": [
|
||||
{"type":"CELL","name":"submod_for","addr":"(P)","loc":"d,27:21,27:31","origName":"submod_for","verilogName":"submod_for","recursive":false,"modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"GENBLOCK","name":"genblk1","addr":"(Q)","loc":"d,28:19,28:24","implied":false,"unnamed":true,"genforp": [],
|
||||
{"type":"CELL","name":"submod_for","addr":"(P)","loc":"d,27:21,27:31","origName":"submod_for","verilogName":"submod_for","modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"GENBLOCK","name":"genblk1","addr":"(Q)","loc":"d,28:19,28:24","unnamed":true,"genforp": [],
|
||||
"itemsp": [
|
||||
{"type":"CELL","name":"submod_2","addr":"(R)","loc":"d,29:25,29:33","origName":"submod_2","verilogName":"submod_2","recursive":false,"modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
{"type":"CELL","name":"submod_2","addr":"(R)","loc":"d,29:25,29:33","origName":"submod_2","verilogName":"submod_2","modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]},
|
||||
{"type":"CELL","name":"submod_3","addr":"(S)","loc":"d,31:21,31:29","origName":"submod_3","verilogName":"submod_3","recursive":false,"modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
{"type":"CELL","name":"submod_3","addr":"(S)","loc":"d,31:21,31:29","origName":"submod_3","verilogName":"submod_3","modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]}
|
||||
]},
|
||||
{"type":"MODULE","name":"submod","addr":"(K)","loc":"d,10:8,10:14","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"submod","verilogName":"submod","level":2,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"submod","addr":"(K)","loc":"d,10:8,10:14","origName":"submod","verilogName":"submod","level":2,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"GENBLOCK","name":"submod_gen","addr":"(T)","loc":"d,12:19,12:29","implied":false,"unnamed":false,"genforp": [],
|
||||
{"type":"GENBLOCK","name":"submod_gen","addr":"(T)","loc":"d,12:19,12:29","genforp": [],
|
||||
"itemsp": [
|
||||
{"type":"VAR","name":"l1_sig","addr":"(U)","loc":"d,13:14,13:20","dtypep":"(V)","origName":"l1_sig","verilogName":"l1_sig","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"GENBLOCK","name":"nested_gen","addr":"(W)","loc":"d,14:23,14:33","implied":false,"unnamed":false,"genforp": [],
|
||||
{"type":"VAR","name":"l1_sig","addr":"(U)","loc":"d,13:14,13:20","dtypep":"(V)","origName":"l1_sig","verilogName":"l1_sig","direction":"NONE","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"GENBLOCK","name":"nested_gen","addr":"(W)","loc":"d,14:23,14:33","genforp": [],
|
||||
"itemsp": [
|
||||
{"type":"CELL","name":"submod_nested","addr":"(X)","loc":"d,15:21,15:34","origName":"submod_nested","verilogName":"submod_nested","recursive":false,"modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
{"type":"CELL","name":"submod_nested","addr":"(X)","loc":"d,15:21,15:34","origName":"submod_nested","verilogName":"submod_nested","modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]},
|
||||
{"type":"CELL","name":"submod_l1","addr":"(Z)","loc":"d,17:17,17:26","origName":"submod_l1","verilogName":"submod_l1","recursive":false,"modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
{"type":"CELL","name":"submod_l1","addr":"(Z)","loc":"d,17:17,17:26","origName":"submod_l1","verilogName":"submod_l1","modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]},
|
||||
{"type":"CELL","name":"submod_l0","addr":"(AB)","loc":"d,19:13,19:22","origName":"submod_l0","verilogName":"submod_l0","recursive":false,"modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
{"type":"CELL","name":"submod_l0","addr":"(AB)","loc":"d,19:13,19:22","origName":"submod_l0","verilogName":"submod_l0","modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"submod2","addr":"(Y)","loc":"d,7:8,7:15","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"submod2","verilogName":"submod2","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],"stmtsp": []}
|
||||
{"type":"MODULE","name":"submod2","addr":"(Y)","loc":"d,7:8,7:15","origName":"submod2","verilogName":"submod2","level":3,"timeunit":"1ps","inlinesp": [],"stmtsp": []}
|
||||
],"filesp": [],
|
||||
"miscsp": [
|
||||
{"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
|
||||
|
|
@ -46,7 +46,7 @@
|
|||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(BB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(BB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(CB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(BB)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,22 +1,22 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"(E)","stdPackagep":"UNLINKED","evalp":"(F)","evalNbap":"(G)","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"(H)","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"$root","addr":"(I)","loc":"d,11:8,11:9","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"$root","verilogName":"$root","level":1,"modPublic":true,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"$root","addr":"(I)","loc":"d,11:8,11:9","origName":"$root","verilogName":"$root","level":1,"modPublic":true,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"clk","addr":"(J)","loc":"d,15:10,15:13","dtypep":"(K)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":true,"isPrimaryClock":true,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.e","addr":"(L)","loc":"d,24:9,24:10","dtypep":"(M)","origName":"e","verilogName":"e","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"VAR","dtypeName":"my_t","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vtrigprevexpr___TOP__clk__0","addr":"(N)","loc":"d,11:8,11:9","dtypep":"(K)","origName":"__Vtrigprevexpr___TOP__clk__0","verilogName":"__Vtrigprevexpr___TOP__clk__0","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VactPhaseResult","addr":"(O)","loc":"d,11:8,11:9","dtypep":"(P)","origName":"__VactPhaseResult","verilogName":"__VactPhaseResult","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VnbaPhaseResult","addr":"(Q)","loc":"d,11:8,11:9","dtypep":"(P)","origName":"__VnbaPhaseResult","verilogName":"__VnbaPhaseResult","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cyc","addr":"(R)","loc":"d,23:17,23:20","dtypep":"(S)","origName":"cyc","verilogName":"cyc","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"VAR","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VactIterCount","addr":"(T)","loc":"d,11:8,11:9","dtypep":"(U)","origName":"__VactIterCount","verilogName":"__VactIterCount","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VactTriggered","addr":"(V)","loc":"d,11:8,11:9","dtypep":"(W)","origName":"__VactTriggered","verilogName":"__VactTriggered","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VnbaTriggered","addr":"(X)","loc":"d,11:8,11:9","dtypep":"(W)","origName":"__VnbaTriggered","verilogName":"__VnbaTriggered","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"CELL","name":"$unit","addr":"(Y)","loc":"a,0:0,0:0","origName":"__024unit","verilogName":"\\$unit ","recursive":false,"modp":"(E)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"VAR","name":"clk","addr":"(J)","loc":"d,15:10,15:13","dtypep":"(K)","origName":"clk","verilogName":"clk","isPrimaryIO":true,"isPrimaryClock":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.e","addr":"(L)","loc":"d,24:9,24:10","dtypep":"(M)","origName":"e","verilogName":"e","direction":"NONE","lifetime":"VSTATICI","varType":"VAR","dtypeName":"my_t","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vtrigprevexpr___TOP__clk__0","addr":"(N)","loc":"d,11:8,11:9","dtypep":"(K)","origName":"__Vtrigprevexpr___TOP__clk__0","verilogName":"__Vtrigprevexpr___TOP__clk__0","direction":"NONE","lifetime":"NONE","varType":"MODULETEMP","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VactPhaseResult","addr":"(O)","loc":"d,11:8,11:9","dtypep":"(P)","origName":"__VactPhaseResult","verilogName":"__VactPhaseResult","direction":"NONE","noReset":true,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VnbaPhaseResult","addr":"(Q)","loc":"d,11:8,11:9","dtypep":"(P)","origName":"__VnbaPhaseResult","verilogName":"__VnbaPhaseResult","direction":"NONE","noReset":true,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cyc","addr":"(R)","loc":"d,23:17,23:20","dtypep":"(S)","origName":"cyc","verilogName":"cyc","direction":"NONE","lifetime":"VSTATICI","varType":"VAR","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VactIterCount","addr":"(T)","loc":"d,11:8,11:9","dtypep":"(U)","origName":"__VactIterCount","verilogName":"__VactIterCount","direction":"NONE","noReset":true,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VactTriggered","addr":"(V)","loc":"d,11:8,11:9","dtypep":"(W)","origName":"__VactTriggered","verilogName":"__VactTriggered","direction":"NONE","lifetime":"NONE","varType":"MODULETEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__VnbaTriggered","addr":"(X)","loc":"d,11:8,11:9","dtypep":"(W)","origName":"__VnbaTriggered","verilogName":"__VnbaTriggered","direction":"NONE","lifetime":"NONE","varType":"MODULETEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"CELL","name":"$unit","addr":"(Y)","loc":"a,0:0,0:0","origName":"__024unit","verilogName":"\\$unit ","modp":"(E)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"TOPSCOPE","name":"","addr":"(H)","loc":"d,11:8,11:9","senTreesp": [],
|
||||
"scopep": [
|
||||
{"type":"SCOPE","name":"TOP","addr":"(Z)","loc":"d,11:8,11:9","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(I)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_static","addr":"(AB)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_eval_static","addr":"(AB)","loc":"a,0:0,0:0","slow":true,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"STMTEXPR","name":"","addr":"(BB)","loc":"d,11:8,11:9",
|
||||
"exprp": [
|
||||
|
|
@ -30,7 +30,7 @@
|
|||
{"type":"VARREF","name":"__Vtrigprevexpr___TOP__clk__0","addr":"(IB)","loc":"d,63:22,63:25","dtypep":"(GB)","access":"WR","varp":"(N)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_static__TOP","addr":"(EB)","loc":"d,11:8,11:9","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_eval_static__TOP","addr":"(EB)","loc":"d,11:8,11:9","slow":true,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(JB)","loc":"d,23:23,23:24","dtypep":"(S)",
|
||||
"rhsp": [
|
||||
|
|
@ -40,16 +40,16 @@
|
|||
{"type":"VARREF","name":"t.cyc","addr":"(MB)","loc":"d,23:23,23:24","dtypep":"(S)","access":"WR","varp":"(R)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_initial","addr":"(NB)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_eval_initial","addr":"(NB)","loc":"a,0:0,0:0","slow":true,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"STMTEXPR","name":"","addr":"(OB)","loc":"d,11:8,11:9",
|
||||
"exprp": [
|
||||
{"type":"CCALL","name":"","addr":"(PB)","loc":"d,11:8,11:9","dtypep":"(DB)","funcName":"_eval_initial__TOP","funcp":"(QB)","argsp": []}
|
||||
]}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_initial__TOP","addr":"(QB)","loc":"d,11:8,11:9","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],
|
||||
{"type":"CFUNC","name":"_eval_initial__TOP","addr":"(QB)","loc":"d,11:8,11:9","slow":true,"scopep":"(Z)","argsp": [],
|
||||
"varsp": [
|
||||
{"type":"VAR","name":"__Vtemp_1","addr":"(RB)","loc":"d,49:120,49:121","dtypep":"(SB)","origName":"__Vtemp_1","verilogName":"__Vtemp_1","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"__Vtemp_1","addr":"(RB)","loc":"d,49:120,49:121","dtypep":"(SB)","origName":"__Vtemp_1","verilogName":"__Vtemp_1","direction":"NONE","lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(TB)","loc":"d,32:9,32:10","dtypep":"(UB)",
|
||||
|
|
@ -107,7 +107,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(SC)","loc":"d,38:142,38:147","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(SC)","loc":"d,38:142,38:147"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(TC)","loc":"d,39:10,39:12",
|
||||
"condp": [
|
||||
|
|
@ -181,7 +181,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(SD)","loc":"d,39:158,39:163","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(SD)","loc":"d,39:158,39:163"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(TD)","loc":"d,40:10,40:12",
|
||||
"condp": [
|
||||
|
|
@ -255,7 +255,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(SE)","loc":"d,40:142,40:147","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(SE)","loc":"d,40:142,40:147"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(TE)","loc":"d,41:10,41:12",
|
||||
"condp": [
|
||||
|
|
@ -353,7 +353,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(AG)","loc":"d,41:174,41:179","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(AG)","loc":"d,41:174,41:179"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(BG)","loc":"d,42:10,42:12",
|
||||
"condp": [
|
||||
|
|
@ -451,7 +451,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(IH)","loc":"d,42:158,42:163","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(IH)","loc":"d,42:158,42:163"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(JH)","loc":"d,43:10,43:12",
|
||||
"condp": [
|
||||
|
|
@ -549,7 +549,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(QI)","loc":"d,43:150,43:155","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(QI)","loc":"d,43:150,43:155"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(RI)","loc":"d,44:10,44:12",
|
||||
"condp": [
|
||||
|
|
@ -599,7 +599,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(KJ)","loc":"d,44:136,44:141","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(KJ)","loc":"d,44:136,44:141"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(LJ)","loc":"d,45:10,45:12",
|
||||
"condp": [
|
||||
|
|
@ -649,7 +649,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(CK)","loc":"d,45:142,45:147","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(CK)","loc":"d,45:142,45:147"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(DK)","loc":"d,46:10,46:12",
|
||||
"condp": [
|
||||
|
|
@ -723,7 +723,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(CL)","loc":"d,46:158,46:163","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(CL)","loc":"d,46:158,46:163"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(DL)","loc":"d,47:10,47:12",
|
||||
"condp": [
|
||||
|
|
@ -797,7 +797,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(CM)","loc":"d,47:142,47:147","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(CM)","loc":"d,47:142,47:147"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(DM)","loc":"d,49:10,49:12",
|
||||
"condp": [
|
||||
|
|
@ -854,7 +854,7 @@
|
|||
{"type":"VARREF","name":"__Vtemp_1","addr":"(YM)","loc":"d,49:120,49:121","dtypep":"(SB)","access":"RD","varp":"(RB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(ZM)","loc":"d,49:139,49:144","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(ZM)","loc":"d,49:139,49:144"}
|
||||
],"elsesp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(AN)","loc":"d,55:9,55:10","dtypep":"(UB)",
|
||||
"rhsp": [
|
||||
|
|
@ -864,9 +864,9 @@
|
|||
{"type":"VARREF","name":"t.e","addr":"(CN)","loc":"d,55:7,55:8","dtypep":"(UB)","access":"WR","varp":"(L)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_final","addr":"(DN)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],"stmtsp": []},
|
||||
{"type":"CFUNC","name":"_eval_settle","addr":"(EN)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],"stmtsp": []},
|
||||
{"type":"CFUNC","name":"_eval_triggers__act","addr":"(FN)","loc":"a,0:0,0:0","slow":false,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_eval_final","addr":"(DN)","loc":"a,0:0,0:0","slow":true,"scopep":"(Z)","argsp": [],"varsp": [],"stmtsp": []},
|
||||
{"type":"CFUNC","name":"_eval_settle","addr":"(EN)","loc":"a,0:0,0:0","slow":true,"scopep":"(Z)","argsp": [],"varsp": [],"stmtsp": []},
|
||||
{"type":"CFUNC","name":"_eval_triggers__act","addr":"(FN)","loc":"a,0:0,0:0","scopep":"(Z)","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(GN)","loc":"d,11:8,11:9","dtypep":"(HN)",
|
||||
"rhsp": [
|
||||
|
|
@ -925,9 +925,9 @@
|
|||
{"type":"TEXT","name":"","addr":"(GO)","loc":"d,11:8,11:9","text":"#endif"}
|
||||
]}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_dump_triggers__act","addr":"(CO)","loc":"a,0:0,0:0","slow":true,"isStatic":true,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)",
|
||||
{"type":"CFUNC","name":"_dump_triggers__act","addr":"(CO)","loc":"a,0:0,0:0","slow":true,"isStatic":true,"scopep":"(Z)",
|
||||
"argsp": [
|
||||
{"type":"VAR","name":"triggers","addr":"(HO)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"triggers","verilogName":"triggers","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"CONSTREF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"triggers","addr":"(HO)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"triggers","verilogName":"triggers","direction":"CONSTREF","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(IO)","loc":"a,0:0,0:0","dtypep":"(W)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(JO)","loc":"a,0:0,0:0","dtypep":"(W)","constructing":true}
|
||||
|
|
@ -935,7 +935,7 @@
|
|||
"lhsp": [
|
||||
{"type":"VARREF","name":"triggers","addr":"(KO)","loc":"a,0:0,0:0","dtypep":"(W)","access":"WR","varp":"(HO)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []},
|
||||
{"type":"VAR","name":"tag","addr":"(LO)","loc":"a,0:0,0:0","dtypep":"(SB)","origName":"tag","verilogName":"tag","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"CONSTREF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"tag","addr":"(LO)","loc":"a,0:0,0:0","dtypep":"(SB)","origName":"tag","verilogName":"tag","direction":"CONSTREF","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(MO)","loc":"a,0:0,0:0","dtypep":"(SB)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(NO)","loc":"a,0:0,0:0","dtypep":"(SB)","constructing":true}
|
||||
|
|
@ -1000,9 +1000,9 @@
|
|||
]}
|
||||
],"elsesp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_trigger_anySet__act","addr":"(VO)","loc":"a,0:0,0:0","slow":false,"isStatic":true,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)",
|
||||
{"type":"CFUNC","name":"_trigger_anySet__act","addr":"(VO)","loc":"a,0:0,0:0","isStatic":true,"scopep":"(Z)",
|
||||
"argsp": [
|
||||
{"type":"VAR","name":"in","addr":"(MP)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"in","verilogName":"in","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"CONSTREF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"in","addr":"(MP)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"in","verilogName":"in","direction":"CONSTREF","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(NP)","loc":"a,0:0,0:0","dtypep":"(W)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(OP)","loc":"a,0:0,0:0","dtypep":"(W)","constructing":true}
|
||||
|
|
@ -1012,7 +1012,7 @@
|
|||
],"timingControlp": []}
|
||||
],
|
||||
"varsp": [
|
||||
{"type":"VAR","name":"n","addr":"(QP)","loc":"a,0:0,0:0","dtypep":"(RP)","origName":"n","verilogName":"n","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"IData","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"n","addr":"(QP)","loc":"a,0:0,0:0","dtypep":"(RP)","origName":"n","verilogName":"n","direction":"NONE","noReset":true,"isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"IData","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(SP)","loc":"a,0:0,0:0","dtypep":"(RP)",
|
||||
|
|
@ -1072,9 +1072,9 @@
|
|||
{"type":"CONST","name":"1'h0","addr":"(NQ)","loc":"d,11:8,11:9","dtypep":"(GB)"}
|
||||
]}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_nba_sequent__TOP__0","addr":"(OQ)","loc":"d,23:17,23:20","slow":false,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],
|
||||
{"type":"CFUNC","name":"_nba_sequent__TOP__0","addr":"(OQ)","loc":"d,23:17,23:20","scopep":"(Z)","argsp": [],
|
||||
"varsp": [
|
||||
{"type":"VAR","name":"__Vdly__t.cyc","addr":"(PQ)","loc":"d,23:17,23:20","dtypep":"(S)","origName":"__Vdly__t__DOT__cyc","verilogName":"__Vdly__t.cyc","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vdly__t.cyc","addr":"(PQ)","loc":"d,23:17,23:20","dtypep":"(S)","origName":"__Vdly__t__DOT__cyc","verilogName":"__Vdly__t.cyc","direction":"NONE","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(QQ)","loc":"d,23:17,23:20","dtypep":"(S)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(RQ)","loc":"d,23:17,23:20","dtypep":"(S)","constructing":true}
|
||||
|
|
@ -1082,7 +1082,7 @@
|
|||
"lhsp": [
|
||||
{"type":"VARREF","name":"__Vdly__t.cyc","addr":"(SQ)","loc":"d,23:17,23:20","dtypep":"(S)","access":"WR","varp":"(PQ)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []},
|
||||
{"type":"VAR","name":"__Vdly__t.e","addr":"(TQ)","loc":"d,24:9,24:10","dtypep":"(M)","origName":"__Vdly__t__DOT__e","verilogName":"__Vdly__t.e","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"my_t","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vdly__t.e","addr":"(TQ)","loc":"d,24:9,24:10","dtypep":"(M)","origName":"__Vdly__t__DOT__e","verilogName":"__Vdly__t.e","direction":"NONE","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"my_t","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(UQ)","loc":"d,24:9,24:10","dtypep":"(M)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(VQ)","loc":"d,24:9,24:10","dtypep":"(M)","constructing":true}
|
||||
|
|
@ -1090,9 +1090,9 @@
|
|||
"lhsp": [
|
||||
{"type":"VARREF","name":"__Vdly__t.e","addr":"(WQ)","loc":"d,24:9,24:10","dtypep":"(M)","access":"WR","varp":"(TQ)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []},
|
||||
{"type":"VAR","name":"__Vtemp_1","addr":"(XQ)","loc":"d,70:123,70:124","dtypep":"(SB)","origName":"__Vtemp_1","verilogName":"__Vtemp_1","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vtemp_2","addr":"(YQ)","loc":"d,80:123,80:124","dtypep":"(SB)","origName":"__Vtemp_2","verilogName":"__Vtemp_2","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vtemp_3","addr":"(ZQ)","loc":"d,90:123,90:124","dtypep":"(SB)","origName":"__Vtemp_3","verilogName":"__Vtemp_3","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"__Vtemp_1","addr":"(XQ)","loc":"d,70:123,70:124","dtypep":"(SB)","origName":"__Vtemp_1","verilogName":"__Vtemp_1","direction":"NONE","lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vtemp_2","addr":"(YQ)","loc":"d,80:123,80:124","dtypep":"(SB)","origName":"__Vtemp_2","verilogName":"__Vtemp_2","direction":"NONE","lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"__Vtemp_3","addr":"(ZQ)","loc":"d,90:123,90:124","dtypep":"(SB)","origName":"__Vtemp_3","verilogName":"__Vtemp_3","direction":"NONE","lifetime":"NONE","varType":"STMTTEMP","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(AR)","loc":"d,23:17,23:20","dtypep":"(S)",
|
||||
|
|
@ -1211,7 +1211,7 @@
|
|||
{"type":"VARREF","name":"__Vtemp_1","addr":"(QS)","loc":"d,70:123,70:124","dtypep":"(SB)","access":"RD","varp":"(XQ)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(RS)","loc":"d,70:142,70:147","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(RS)","loc":"d,70:142,70:147"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(SS)","loc":"d,71:13,71:15",
|
||||
"condp": [
|
||||
|
|
@ -1261,7 +1261,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(JT)","loc":"d,71:139,71:144","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(JT)","loc":"d,71:139,71:144"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(KT)","loc":"d,72:13,72:15",
|
||||
"condp": [
|
||||
|
|
@ -1311,7 +1311,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(BU)","loc":"d,72:145,72:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(BU)","loc":"d,72:145,72:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(CU)","loc":"d,73:13,73:15",
|
||||
"condp": [
|
||||
|
|
@ -1385,7 +1385,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(BV)","loc":"d,73:145,73:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(BV)","loc":"d,73:145,73:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(CV)","loc":"d,74:13,74:15",
|
||||
"condp": [
|
||||
|
|
@ -1435,7 +1435,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(TV)","loc":"d,74:139,74:144","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(TV)","loc":"d,74:139,74:144"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(UV)","loc":"d,75:13,75:15",
|
||||
"condp": [
|
||||
|
|
@ -1485,7 +1485,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(LW)","loc":"d,75:145,75:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(LW)","loc":"d,75:145,75:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(MW)","loc":"d,76:13,76:15",
|
||||
"condp": [
|
||||
|
|
@ -1559,7 +1559,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(LX)","loc":"d,76:145,76:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(LX)","loc":"d,76:145,76:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"ASSIGNDLY","name":"","addr":"(MX)","loc":"d,77:12,77:14","dtypep":"(UB)",
|
||||
"rhsp": [
|
||||
|
|
@ -1636,7 +1636,7 @@
|
|||
{"type":"VARREF","name":"__Vtemp_2","addr":"(MY)","loc":"d,80:123,80:124","dtypep":"(SB)","access":"RD","varp":"(YQ)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(NY)","loc":"d,80:142,80:147","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(NY)","loc":"d,80:142,80:147"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(OY)","loc":"d,81:13,81:15",
|
||||
"condp": [
|
||||
|
|
@ -1686,7 +1686,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(FZ)","loc":"d,81:139,81:144","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(FZ)","loc":"d,81:139,81:144"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(GZ)","loc":"d,82:13,82:15",
|
||||
"condp": [
|
||||
|
|
@ -1736,7 +1736,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(XZ)","loc":"d,82:145,82:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(XZ)","loc":"d,82:145,82:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(YZ)","loc":"d,83:13,83:15",
|
||||
"condp": [
|
||||
|
|
@ -1810,7 +1810,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(XAB)","loc":"d,83:145,83:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(XAB)","loc":"d,83:145,83:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(YAB)","loc":"d,84:13,84:15",
|
||||
"condp": [
|
||||
|
|
@ -1860,7 +1860,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(PBB)","loc":"d,84:139,84:144","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(PBB)","loc":"d,84:139,84:144"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(QBB)","loc":"d,85:13,85:15",
|
||||
"condp": [
|
||||
|
|
@ -1910,7 +1910,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(HCB)","loc":"d,85:145,85:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(HCB)","loc":"d,85:145,85:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(ICB)","loc":"d,86:13,86:15",
|
||||
"condp": [
|
||||
|
|
@ -1984,7 +1984,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(HDB)","loc":"d,86:145,86:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(HDB)","loc":"d,86:145,86:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"ASSIGNDLY","name":"","addr":"(IDB)","loc":"d,87:12,87:14","dtypep":"(UB)",
|
||||
"rhsp": [
|
||||
|
|
@ -2061,7 +2061,7 @@
|
|||
{"type":"VARREF","name":"__Vtemp_3","addr":"(IEB)","loc":"d,90:123,90:124","dtypep":"(SB)","access":"RD","varp":"(ZQ)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(JEB)","loc":"d,90:142,90:147","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(JEB)","loc":"d,90:142,90:147"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(KEB)","loc":"d,91:13,91:15",
|
||||
"condp": [
|
||||
|
|
@ -2111,7 +2111,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(BFB)","loc":"d,91:139,91:144","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(BFB)","loc":"d,91:139,91:144"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(CFB)","loc":"d,92:13,92:15",
|
||||
"condp": [
|
||||
|
|
@ -2161,7 +2161,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(TFB)","loc":"d,92:145,92:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(TFB)","loc":"d,92:145,92:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(UFB)","loc":"d,93:13,93:15",
|
||||
"condp": [
|
||||
|
|
@ -2235,7 +2235,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(TGB)","loc":"d,93:145,93:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(TGB)","loc":"d,93:145,93:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(UGB)","loc":"d,94:13,94:15",
|
||||
"condp": [
|
||||
|
|
@ -2285,7 +2285,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(LHB)","loc":"d,94:139,94:144","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(LHB)","loc":"d,94:139,94:144"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(MHB)","loc":"d,95:13,95:15",
|
||||
"condp": [
|
||||
|
|
@ -2335,7 +2335,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(DIB)","loc":"d,95:145,95:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(DIB)","loc":"d,95:145,95:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"IF","name":"","addr":"(EIB)","loc":"d,96:13,96:15",
|
||||
"condp": [
|
||||
|
|
@ -2409,7 +2409,7 @@
|
|||
]}
|
||||
],"scopeNamep": []}
|
||||
],"filep": []},
|
||||
{"type":"STOP","name":"","addr":"(DJB)","loc":"d,96:145,96:150","isFatal":false}
|
||||
{"type":"STOP","name":"","addr":"(DJB)","loc":"d,96:145,96:150"}
|
||||
],"elsesp": []},
|
||||
{"type":"ASSIGNDLY","name":"","addr":"(EJB)","loc":"d,97:12,97:14","dtypep":"(UB)",
|
||||
"rhsp": [
|
||||
|
|
@ -2456,7 +2456,7 @@
|
|||
{"type":"VARREF","name":"t.e","addr":"(TJB)","loc":"d,24:9,24:10","dtypep":"(UB)","access":"WR","varp":"(L)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_nba","addr":"(G)","loc":"a,0:0,0:0","slow":false,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_eval_nba","addr":"(G)","loc":"a,0:0,0:0","scopep":"(Z)","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"IF","name":"","addr":"(UJB)","loc":"d,11:8,11:9",
|
||||
"condp": [
|
||||
|
|
@ -2481,9 +2481,9 @@
|
|||
]}
|
||||
],"elsesp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_trigger_orInto__act","addr":"(CKB)","loc":"a,0:0,0:0","slow":false,"isStatic":true,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)",
|
||||
{"type":"CFUNC","name":"_trigger_orInto__act","addr":"(CKB)","loc":"a,0:0,0:0","isStatic":true,"scopep":"(Z)",
|
||||
"argsp": [
|
||||
{"type":"VAR","name":"out","addr":"(DKB)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"out","verilogName":"out","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INOUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"out","addr":"(DKB)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"out","verilogName":"out","direction":"INOUT","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(EKB)","loc":"a,0:0,0:0","dtypep":"(W)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(FKB)","loc":"a,0:0,0:0","dtypep":"(W)","constructing":true}
|
||||
|
|
@ -2491,7 +2491,7 @@
|
|||
"lhsp": [
|
||||
{"type":"VARREF","name":"out","addr":"(GKB)","loc":"a,0:0,0:0","dtypep":"(W)","access":"WR","varp":"(DKB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []},
|
||||
{"type":"VAR","name":"in","addr":"(HKB)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"in","verilogName":"in","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"CONSTREF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"in","addr":"(HKB)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"in","verilogName":"in","direction":"CONSTREF","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(IKB)","loc":"a,0:0,0:0","dtypep":"(W)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(JKB)","loc":"a,0:0,0:0","dtypep":"(W)","constructing":true}
|
||||
|
|
@ -2501,7 +2501,7 @@
|
|||
],"timingControlp": []}
|
||||
],
|
||||
"varsp": [
|
||||
{"type":"VAR","name":"n","addr":"(LKB)","loc":"a,0:0,0:0","dtypep":"(RP)","origName":"n","verilogName":"n","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"IData","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"n","addr":"(LKB)","loc":"a,0:0,0:0","dtypep":"(RP)","origName":"n","verilogName":"n","direction":"NONE","noReset":true,"isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"IData","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(MKB)","loc":"a,0:0,0:0","dtypep":"(RP)",
|
||||
|
|
@ -2572,7 +2572,7 @@
|
|||
]}
|
||||
],"contsp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_phase__act","addr":"(LLB)","loc":"a,0:0,0:0","slow":false,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_eval_phase__act","addr":"(LLB)","loc":"a,0:0,0:0","scopep":"(Z)","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"STMTEXPR","name":"","addr":"(MLB)","loc":"d,11:8,11:9",
|
||||
"exprp": [
|
||||
|
|
@ -2591,9 +2591,9 @@
|
|||
{"type":"CONST","name":"1'h0","addr":"(TLB)","loc":"a,0:0,0:0","dtypep":"(GB)"}
|
||||
]}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_trigger_clear__act","addr":"(ULB)","loc":"a,0:0,0:0","slow":false,"isStatic":true,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)",
|
||||
{"type":"CFUNC","name":"_trigger_clear__act","addr":"(ULB)","loc":"a,0:0,0:0","isStatic":true,"scopep":"(Z)",
|
||||
"argsp": [
|
||||
{"type":"VAR","name":"out","addr":"(VLB)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"out","verilogName":"out","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"out","addr":"(VLB)","loc":"a,0:0,0:0","dtypep":"(W)","origName":"out","verilogName":"out","direction":"OUTPUT","isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(WLB)","loc":"a,0:0,0:0","dtypep":"(W)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(XLB)","loc":"a,0:0,0:0","dtypep":"(W)","constructing":true}
|
||||
|
|
@ -2603,7 +2603,7 @@
|
|||
],"timingControlp": []}
|
||||
],
|
||||
"varsp": [
|
||||
{"type":"VAR","name":"n","addr":"(ZLB)","loc":"a,0:0,0:0","dtypep":"(RP)","origName":"n","verilogName":"n","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"IData","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"n","addr":"(ZLB)","loc":"a,0:0,0:0","dtypep":"(RP)","origName":"n","verilogName":"n","direction":"NONE","noReset":true,"isFuncLocal":true,"lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"IData","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(AMB)","loc":"a,0:0,0:0","dtypep":"(RP)",
|
||||
|
|
@ -2656,9 +2656,9 @@
|
|||
]}
|
||||
],"contsp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_phase__nba","addr":"(TMB)","loc":"a,0:0,0:0","slow":false,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],
|
||||
{"type":"CFUNC","name":"_eval_phase__nba","addr":"(TMB)","loc":"a,0:0,0:0","scopep":"(Z)","argsp": [],
|
||||
"varsp": [
|
||||
{"type":"VAR","name":"__VnbaExecute","addr":"(UMB)","loc":"d,11:8,11:9","dtypep":"(P)","origName":"__VnbaExecute","verilogName":"__VnbaExecute","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"__VnbaExecute","addr":"(UMB)","loc":"d,11:8,11:9","dtypep":"(P)","origName":"__VnbaExecute","verilogName":"__VnbaExecute","direction":"NONE","noReset":true,"isFuncLocal":true,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(VMB)","loc":"a,0:0,0:0","dtypep":"(GB)",
|
||||
|
|
@ -2693,9 +2693,9 @@
|
|||
{"type":"VARREF","name":"__VnbaExecute","addr":"(HNB)","loc":"a,0:0,0:0","dtypep":"(GB)","access":"RD","varp":"(UMB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval","addr":"(F)","loc":"a,0:0,0:0","slow":false,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Z)","argsp": [],
|
||||
{"type":"CFUNC","name":"_eval","addr":"(F)","loc":"a,0:0,0:0","scopep":"(Z)","argsp": [],
|
||||
"varsp": [
|
||||
{"type":"VAR","name":"__VnbaIterCount","addr":"(INB)","loc":"d,11:8,11:9","dtypep":"(U)","origName":"__VnbaIterCount","verilogName":"__VnbaIterCount","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":true,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"__VnbaIterCount","addr":"(INB)","loc":"d,11:8,11:9","dtypep":"(U)","origName":"__VnbaIterCount","verilogName":"__VnbaIterCount","direction":"NONE","noReset":true,"isFuncLocal":true,"lifetime":"NONE","varType":"MODULETEMP","dtypeName":"bit","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(JNB)","loc":"d,11:8,11:9","dtypep":"(U)",
|
||||
|
|
@ -2831,7 +2831,7 @@
|
|||
]}
|
||||
],"contsp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_eval_debug_assertions","addr":"(NPB)","loc":"d,11:8,11:9","slow":false,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"UNLINKED","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_eval_debug_assertions","addr":"(NPB)","loc":"d,11:8,11:9","scopep":"UNLINKED","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"IF","name":"","addr":"(OPB)","loc":"d,15:10,15:13",
|
||||
"condp": [
|
||||
|
|
@ -2850,7 +2850,7 @@
|
|||
]}
|
||||
],"elsesp": []}
|
||||
]},
|
||||
{"type":"CFUNC","name":"_ctor_var_reset","addr":"(VPB)","loc":"d,11:8,11:9","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"UNLINKED","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_ctor_var_reset","addr":"(VPB)","loc":"d,11:8,11:9","slow":true,"scopep":"UNLINKED","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(WPB)","loc":"d,15:10,15:13","dtypep":"(K)",
|
||||
"rhsp": [
|
||||
|
|
@ -2897,9 +2897,9 @@
|
|||
]},
|
||||
{"type":"CUSE","name":"$unit","addr":"(OQB)","loc":"a,0:0,0:0","useType":"INT_FWD"}
|
||||
]},
|
||||
{"type":"PACKAGE","name":"$unit","addr":"(E)","loc":"a,0:0,0:0","origName":"__024unit","verilogName":"\\$unit ","level":2,"modPublic":false,"inLibrary":true,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"PACKAGE","name":"$unit","addr":"(E)","loc":"a,0:0,0:0","origName":"__024unit","verilogName":"\\$unit ","level":2,"inLibrary":true,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"__Venumtab_enum_next1","addr":"(DC)","loc":"d,17:12,17:16","dtypep":"(CC)","origName":"__Venumtab_enum_next1","verilogName":"__Venumtab_enum_next1","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATIC","varType":"MODULETEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
{"type":"VAR","name":"__Venumtab_enum_next1","addr":"(DC)","loc":"d,17:12,17:16","dtypep":"(CC)","origName":"__Venumtab_enum_next1","verilogName":"__Venumtab_enum_next1","direction":"NONE","isConst":true,"lifetime":"VSTATIC","varType":"MODULETEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
"valuep": [
|
||||
{"type":"INITARRAY","name":"","addr":"(PQB)","loc":"d,17:12,17:16","dtypep":"(CC)","initList":" [1]=(QQB) [3]=(RQB) [4]=(SQB)",
|
||||
"defaultp": [
|
||||
|
|
@ -2920,7 +2920,7 @@
|
|||
]}
|
||||
]}
|
||||
],"attrsp": []},
|
||||
{"type":"VAR","name":"__Venumtab_enum_prev1","addr":"(XI)","loc":"d,17:12,17:16","dtypep":"(WI)","origName":"__Venumtab_enum_prev1","verilogName":"__Venumtab_enum_prev1","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATIC","varType":"MODULETEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
{"type":"VAR","name":"__Venumtab_enum_prev1","addr":"(XI)","loc":"d,17:12,17:16","dtypep":"(WI)","origName":"__Venumtab_enum_prev1","verilogName":"__Venumtab_enum_prev1","direction":"NONE","isConst":true,"lifetime":"VSTATIC","varType":"MODULETEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
"valuep": [
|
||||
{"type":"INITARRAY","name":"","addr":"(XQB)","loc":"d,17:12,17:16","dtypep":"(WI)","initList":" [1]=(YQB) [3]=(ZQB) [4]=(ARB)",
|
||||
"defaultp": [
|
||||
|
|
@ -2941,7 +2941,7 @@
|
|||
]}
|
||||
]}
|
||||
],"attrsp": []},
|
||||
{"type":"VAR","name":"__Venumtab_enum_name1","addr":"(JM)","loc":"d,17:12,17:16","dtypep":"(IM)","origName":"__Venumtab_enum_name1","verilogName":"__Venumtab_enum_name1","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATIC","varType":"MODULETEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
{"type":"VAR","name":"__Venumtab_enum_name1","addr":"(JM)","loc":"d,17:12,17:16","dtypep":"(IM)","origName":"__Venumtab_enum_name1","verilogName":"__Venumtab_enum_name1","direction":"NONE","isConst":true,"lifetime":"VSTATIC","varType":"MODULETEMP","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
"valuep": [
|
||||
{"type":"INITARRAY","name":"","addr":"(FRB)","loc":"d,17:12,17:16","dtypep":"(IM)","initList":" [1]=(GRB) [3]=(HRB) [4]=(IRB)",
|
||||
"defaultp": [
|
||||
|
|
@ -2963,7 +2963,7 @@
|
|||
]}
|
||||
],"attrsp": []},
|
||||
{"type":"SCOPE","name":"$unit","addr":"(NRB)","loc":"a,0:0,0:0","aboveScopep":"(Z)","aboveCellp":"(Y)","modp":"(E)","varsp": [],"blocksp": [],"inlinesp": []},
|
||||
{"type":"CFUNC","name":"_ctor_var_reset","addr":"(ORB)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"UNLINKED","argsp": [],"varsp": [],
|
||||
{"type":"CFUNC","name":"_ctor_var_reset","addr":"(ORB)","loc":"a,0:0,0:0","slow":true,"scopep":"UNLINKED","argsp": [],"varsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGN","name":"","addr":"(PRB)","loc":"d,17:12,17:16","dtypep":"(CC)",
|
||||
"rhsp": [
|
||||
|
|
@ -2991,15 +2991,15 @@
|
|||
],
|
||||
"filesp": [
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck__Syms__Slow.cpp","addr":"(YRB)","loc":"a,0:0,0:0","source":true,"slow":true,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck__Syms.h","addr":"(ZRB)","loc":"a,0:0,0:0","source":false,"slow":false,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck.h","addr":"(ASB)","loc":"a,0:0,0:0","source":false,"slow":false,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck.cpp","addr":"(BSB)","loc":"a,0:0,0:0","source":true,"slow":false,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck__pch.h","addr":"(CSB)","loc":"a,0:0,0:0","source":false,"slow":false,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$root.h","addr":"(DSB)","loc":"a,0:0,0:0","source":false,"slow":false,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$unit.h","addr":"(ESB)","loc":"a,0:0,0:0","source":false,"slow":false,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck__Syms.h","addr":"(ZRB)","loc":"a,0:0,0:0","tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck.h","addr":"(ASB)","loc":"a,0:0,0:0","tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck.cpp","addr":"(BSB)","loc":"a,0:0,0:0","source":true,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck__pch.h","addr":"(CSB)","loc":"a,0:0,0:0","tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$root.h","addr":"(DSB)","loc":"a,0:0,0:0","tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$unit.h","addr":"(ESB)","loc":"a,0:0,0:0","tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$root__Slow.cpp","addr":"(FSB)","loc":"a,0:0,0:0","source":true,"slow":true,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$root__0__Slow.cpp","addr":"(GSB)","loc":"a,0:0,0:0","source":true,"slow":true,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$root__0.cpp","addr":"(HSB)","loc":"a,0:0,0:0","source":true,"slow":false,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$root__0.cpp","addr":"(HSB)","loc":"a,0:0,0:0","source":true,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$unit__Slow.cpp","addr":"(ISB)","loc":"a,0:0,0:0","source":true,"slow":true,"tblockp": []},
|
||||
{"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck_$unit__0__Slow.cpp","addr":"(JSB)","loc":"a,0:0,0:0","source":true,"slow":true,"tblockp": []}
|
||||
],
|
||||
|
|
@ -3009,7 +3009,7 @@
|
|||
{"type":"BASICDTYPE","name":"logic","addr":"(K)","loc":"d,33:24,33:27","dtypep":"(K)","keyword":"logic","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(HC)","loc":"d,53:16,53:17","dtypep":"(HC)","keyword":"logic","range":"31:0","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(KSB)","loc":"d,17:17,17:18","dtypep":"(KSB)","keyword":"logic","range":"3:0","generic":true,"rangep": []},
|
||||
{"type":"ENUMDTYPE","name":"t.my_t","addr":"(LSB)","loc":"d,17:12,17:16","dtypep":"(LSB)","enum":true,"generic":false,"refDTypep":"(KSB)","childDTypep": [],
|
||||
{"type":"ENUMDTYPE","name":"t.my_t","addr":"(LSB)","loc":"d,17:12,17:16","dtypep":"(LSB)","enum":true,"refDTypep":"(KSB)","childDTypep": [],
|
||||
"itemsp": [
|
||||
{"type":"ENUMITEM","name":"E01","addr":"(MSB)","loc":"d,18:24,18:27","dtypep":"(UB)","rangep": [],
|
||||
"valuep": [
|
||||
|
|
@ -3025,11 +3025,11 @@
|
|||
]}
|
||||
]},
|
||||
{"type":"BASICDTYPE","name":"integer","addr":"(S)","loc":"d,23:4,23:11","dtypep":"(S)","keyword":"integer","range":"31:0","generic":true,"signed":true,"rangep": []},
|
||||
{"type":"REFDTYPE","name":"my_t","addr":"(M)","loc":"d,24:4,24:8","dtypep":"(LSB)","generic":false,"typedefp":"UNLINKED","refDTypep":"(LSB)","classOrPackagep":"UNLINKED","typeofp": [],"classOrPackageOpp": [],"paramsp": []},
|
||||
{"type":"REFDTYPE","name":"my_t","addr":"(M)","loc":"d,24:4,24:8","dtypep":"(LSB)","typedefp":"UNLINKED","refDTypep":"(LSB)","classOrPackagep":"UNLINKED","typeofp": [],"classOrPackageOpp": [],"paramsp": []},
|
||||
{"type":"BASICDTYPE","name":"string","addr":"(SB)","loc":"d,28:4,28:10","dtypep":"(SB)","keyword":"string","generic":true,"rangep": []},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(CC)","loc":"d,17:12,17:16","dtypep":"(CC)","isCompound":false,"declRange":"[7:0]","generic":false,"refDTypep":"(LSB)","childDTypep": [],
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(CC)","loc":"d,17:12,17:16","dtypep":"(CC)","declRange":"[7:0]","refDTypep":"(LSB)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(SSB)","loc":"d,17:12,17:16","ascending":false,"fromBracket":false,
|
||||
{"type":"RANGE","name":"","addr":"(SSB)","loc":"d,17:12,17:16",
|
||||
"leftp": [
|
||||
{"type":"CONST","name":"32'h7","addr":"(TSB)","loc":"d,17:12,17:16","dtypep":"(HC)"}
|
||||
],
|
||||
|
|
@ -3037,9 +3037,9 @@
|
|||
{"type":"CONST","name":"32'h0","addr":"(USB)","loc":"d,17:12,17:16","dtypep":"(HC)"}
|
||||
]}
|
||||
]},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(WI)","loc":"d,17:12,17:16","dtypep":"(WI)","isCompound":false,"declRange":"[7:0]","generic":false,"refDTypep":"(LSB)","childDTypep": [],
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(WI)","loc":"d,17:12,17:16","dtypep":"(WI)","declRange":"[7:0]","refDTypep":"(LSB)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(VSB)","loc":"d,17:12,17:16","ascending":false,"fromBracket":false,
|
||||
{"type":"RANGE","name":"","addr":"(VSB)","loc":"d,17:12,17:16",
|
||||
"leftp": [
|
||||
{"type":"CONST","name":"32'h7","addr":"(WSB)","loc":"d,17:12,17:16","dtypep":"(HC)"}
|
||||
],
|
||||
|
|
@ -3047,9 +3047,9 @@
|
|||
{"type":"CONST","name":"32'h0","addr":"(XSB)","loc":"d,17:12,17:16","dtypep":"(HC)"}
|
||||
]}
|
||||
]},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(IM)","loc":"d,17:12,17:16","dtypep":"(IM)","isCompound":true,"declRange":"[7:0]","generic":false,"refDTypep":"(SB)","childDTypep": [],
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(IM)","loc":"d,17:12,17:16","dtypep":"(IM)","isCompound":true,"declRange":"[7:0]","refDTypep":"(SB)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(YSB)","loc":"d,17:12,17:16","ascending":false,"fromBracket":false,
|
||||
{"type":"RANGE","name":"","addr":"(YSB)","loc":"d,17:12,17:16",
|
||||
"leftp": [
|
||||
{"type":"CONST","name":"32'h7","addr":"(ZSB)","loc":"d,17:12,17:16","dtypep":"(HC)"}
|
||||
],
|
||||
|
|
@ -3058,11 +3058,11 @@
|
|||
]}
|
||||
]},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(LB)","loc":"d,23:23,23:24","dtypep":"(LB)","keyword":"logic","range":"31:0","generic":true,"signed":true,"rangep": []},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(DB)","loc":"a,0:0,0:0","dtypep":"(DB)","generic":false},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(DB)","loc":"a,0:0,0:0","dtypep":"(DB)"},
|
||||
{"type":"BASICDTYPE","name":"bit","addr":"(HN)","loc":"a,0:0,0:0","dtypep":"(HN)","keyword":"bit","range":"63:0","generic":true,"rangep": []},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(W)","loc":"d,11:8,11:9","dtypep":"(W)","isCompound":false,"declRange":"[0:0]","generic":false,"refDTypep":"(HN)","childDTypep": [],
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(W)","loc":"d,11:8,11:9","dtypep":"(W)","declRange":"[0:0]","refDTypep":"(HN)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(BTB)","loc":"d,11:8,11:9","ascending":false,"fromBracket":false,
|
||||
{"type":"RANGE","name":"","addr":"(BTB)","loc":"d,11:8,11:9",
|
||||
"leftp": [
|
||||
{"type":"CONST","name":"32'h0","addr":"(CTB)","loc":"d,11:8,11:9","dtypep":"(HC)"}
|
||||
],
|
||||
|
|
@ -3081,7 +3081,7 @@
|
|||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(ETB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(ETB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"TOP","addr":"(FTB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(ETB)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,48 +1,48 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"UNLINKED","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"t","addr":"(E)","loc":"d,7:8,7:9","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"t","verilogName":"t","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"t","addr":"(E)","loc":"d,7:8,7:9","origName":"t","verilogName":"t","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"q","addr":"(F)","loc":"d,15:22,15:23","dtypep":"(G)","origName":"q","verilogName":"q","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"clk","addr":"(H)","loc":"d,13:10,13:13","dtypep":"(I)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(J)","loc":"d,14:16,14:17","dtypep":"(G)","origName":"d","verilogName":"d","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"between","addr":"(K)","loc":"d,17:22,17:29","dtypep":"(G)","origName":"between","verilogName":"between","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"VAR","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"CELL","name":"cell1","addr":"(L)","loc":"d,20:4,20:9","origName":"cell1","verilogName":"cell1","recursive":false,"modp":"(M)",
|
||||
{"type":"VAR","name":"q","addr":"(F)","loc":"d,15:22,15:23","dtypep":"(G)","origName":"q","verilogName":"q","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"clk","addr":"(H)","loc":"d,13:10,13:13","dtypep":"(I)","origName":"clk","verilogName":"clk","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(J)","loc":"d,14:16,14:17","dtypep":"(G)","origName":"d","verilogName":"d","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"between","addr":"(K)","loc":"d,17:22,17:29","dtypep":"(G)","origName":"between","verilogName":"between","direction":"NONE","lifetime":"VSTATICI","varType":"VAR","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"CELL","name":"cell1","addr":"(L)","loc":"d,20:4,20:9","origName":"cell1","verilogName":"cell1","modp":"(M)",
|
||||
"pinsp": [
|
||||
{"type":"PIN","name":"q","addr":"(N)","loc":"d,20:12,20:13","svDotName":true,"svImplicit":false,"modVarp":"(O)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"q","addr":"(N)","loc":"d,20:12,20:13","svDotName":true,"modVarp":"(O)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"between","addr":"(P)","loc":"d,20:14,20:21","dtypep":"(G)","access":"WR","varp":"(K)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]},
|
||||
{"type":"PIN","name":"clk","addr":"(Q)","loc":"d,21:12,21:15","svDotName":true,"svImplicit":false,"modVarp":"(R)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"clk","addr":"(Q)","loc":"d,21:12,21:15","svDotName":true,"modVarp":"(R)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"clk","addr":"(S)","loc":"d,21:42,21:45","dtypep":"(I)","access":"RD","varp":"(H)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]},
|
||||
{"type":"PIN","name":"d","addr":"(T)","loc":"d,22:12,22:13","svDotName":true,"svImplicit":false,"modVarp":"(U)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"d","addr":"(T)","loc":"d,22:12,22:13","svDotName":true,"modVarp":"(U)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"d","addr":"(V)","loc":"d,22:42,22:43","dtypep":"(G)","access":"RD","varp":"(J)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]}
|
||||
],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"CELL","name":"cell2","addr":"(W)","loc":"d,25:6,25:11","origName":"cell2","verilogName":"cell2","recursive":false,"modp":"(X)",
|
||||
{"type":"CELL","name":"cell2","addr":"(W)","loc":"d,25:6,25:11","origName":"cell2","verilogName":"cell2","modp":"(X)",
|
||||
"pinsp": [
|
||||
{"type":"PIN","name":"d","addr":"(Y)","loc":"d,25:14,25:15","svDotName":true,"svImplicit":false,"modVarp":"(Z)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"d","addr":"(Y)","loc":"d,25:14,25:15","svDotName":true,"modVarp":"(Z)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"between","addr":"(AB)","loc":"d,25:16,25:23","dtypep":"(G)","access":"RD","varp":"(K)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]},
|
||||
{"type":"PIN","name":"q","addr":"(BB)","loc":"d,26:14,26:15","svDotName":true,"svImplicit":false,"modVarp":"(CB)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"q","addr":"(BB)","loc":"d,26:14,26:15","svDotName":true,"modVarp":"(CB)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"q","addr":"(DB)","loc":"d,26:42,26:43","dtypep":"(G)","access":"WR","varp":"(F)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]},
|
||||
{"type":"PIN","name":"clk","addr":"(EB)","loc":"d,27:14,27:17","svDotName":true,"svImplicit":false,"modVarp":"(FB)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"clk","addr":"(EB)","loc":"d,27:14,27:17","svDotName":true,"modVarp":"(FB)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"clk","addr":"(GB)","loc":"d,27:42,27:45","dtypep":"(I)","access":"RD","varp":"(H)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]}
|
||||
],"paramsp": [],"rangep": [],"intfRefsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mod2","addr":"(X)","loc":"d,46:8,46:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mod2","verilogName":"mod2","level":2,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mod2","addr":"(X)","loc":"d,46:8,46:12","origName":"mod2","verilogName":"mod2","level":2,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"clk","addr":"(FB)","loc":"d,48:10,48:13","dtypep":"(I)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(Z)","loc":"d,49:16,49:17","dtypep":"(G)","origName":"d","verilogName":"d","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"q","addr":"(CB)","loc":"d,50:22,50:23","dtypep":"(G)","origName":"q","verilogName":"q","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(HB)","loc":"d,53:13,53:14","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"VAR","name":"clk","addr":"(FB)","loc":"d,48:10,48:13","dtypep":"(I)","origName":"clk","verilogName":"clk","direction":"INPUT","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(Z)","loc":"d,49:16,49:17","dtypep":"(G)","origName":"d","verilogName":"d","direction":"INPUT","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"q","addr":"(CB)","loc":"d,50:22,50:23","dtypep":"(G)","origName":"q","verilogName":"q","direction":"OUTPUT","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(HB)","loc":"d,53:13,53:14","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(IB)","loc":"d,53:13,53:14","dtypep":"(G)",
|
||||
"rhsp": [
|
||||
|
|
@ -53,22 +53,22 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]}
|
||||
]},
|
||||
{"type":"MODULE","name":"mod1__W4","addr":"(M)","loc":"d,31:8,31:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mod1","verilogName":"mod1","level":2,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mod1__W4","addr":"(M)","loc":"d,31:8,31:12","origName":"mod1","verilogName":"mod1","level":2,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"WIDTH","addr":"(LB)","loc":"d,32:15,32:20","dtypep":"(MB)","origName":"WIDTH","verilogName":"WIDTH","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"GPARAM","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":true,"isParam":true,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
{"type":"VAR","name":"WIDTH","addr":"(LB)","loc":"d,32:15,32:20","dtypep":"(MB)","origName":"WIDTH","verilogName":"WIDTH","direction":"NONE","isConst":true,"lifetime":"VSTATICI","varType":"GPARAM","dtypeName":"logic","isGParam":true,"isParam":true,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
"valuep": [
|
||||
{"type":"CONST","name":"32'sh4","addr":"(NB)","loc":"d,19:18,19:19","dtypep":"(MB)"}
|
||||
],"attrsp": []},
|
||||
{"type":"VAR","name":"clk","addr":"(R)","loc":"d,34:24,34:27","dtypep":"(I)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(U)","loc":"d,35:30,35:31","dtypep":"(G)","origName":"d","verilogName":"d","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"q","addr":"(O)","loc":"d,36:30,36:31","dtypep":"(G)","origName":"q","verilogName":"q","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"IGNORED","addr":"(OB)","loc":"d,39:15,39:22","dtypep":"(MB)","origName":"IGNORED","verilogName":"IGNORED","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"LPARAM","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":true,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
{"type":"VAR","name":"clk","addr":"(R)","loc":"d,34:24,34:27","dtypep":"(I)","origName":"clk","verilogName":"clk","direction":"INPUT","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(U)","loc":"d,35:30,35:31","dtypep":"(G)","origName":"d","verilogName":"d","direction":"INPUT","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"q","addr":"(O)","loc":"d,36:30,36:31","dtypep":"(G)","origName":"q","verilogName":"q","direction":"OUTPUT","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"IGNORED","addr":"(OB)","loc":"d,39:15,39:22","dtypep":"(MB)","origName":"IGNORED","verilogName":"IGNORED","direction":"NONE","isConst":true,"lifetime":"VSTATICI","varType":"LPARAM","dtypeName":"logic","isParam":true,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
"valuep": [
|
||||
{"type":"CONST","name":"32'sh1","addr":"(PB)","loc":"d,39:25,39:26","dtypep":"(MB)"}
|
||||
],"attrsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(QB)","loc":"d,41:4,41:10","keyword":"always","isSuspendable":false,"needProcess":false,
|
||||
{"type":"ALWAYS","name":"","addr":"(QB)","loc":"d,41:4,41:10","keyword":"always",
|
||||
"sentreep": [
|
||||
{"type":"SENTREE","name":"","addr":"(RB)","loc":"d,41:11,41:12","isMulti":false,
|
||||
{"type":"SENTREE","name":"","addr":"(RB)","loc":"d,41:11,41:12",
|
||||
"sensesp": [
|
||||
{"type":"SENITEM","name":"","addr":"(SB)","loc":"d,41:13,41:20","edgeType":"POS",
|
||||
"sensp": [
|
||||
|
|
@ -93,11 +93,11 @@
|
|||
{"type":"BASICDTYPE","name":"logic","addr":"(I)","loc":"d,34:24,34:27","dtypep":"(I)","keyword":"logic","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(G)","loc":"d,15:16,15:17","dtypep":"(G)","keyword":"logic","range":"3:0","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(MB)","loc":"d,19:18,19:19","dtypep":"(MB)","keyword":"logic","range":"31:0","generic":true,"signed":true,"rangep": []},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(XB)","loc":"a,0:0,0:0","dtypep":"(XB)","generic":false}
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(XB)","loc":"a,0:0,0:0","dtypep":"(XB)"}
|
||||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(YB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(YB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(ZB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(YB)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,28 +1,28 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"(E)","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,7:8,7:9","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"$root","verilogName":"$root","level":1,"modPublic":true,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,7:8,7:9","origName":"$root","verilogName":"$root","level":1,"modPublic":true,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"q","addr":"(G)","loc":"d,15:22,15:23","dtypep":"(H)","origName":"q","verilogName":"q","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"clk","addr":"(I)","loc":"d,13:10,13:13","dtypep":"(J)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(K)","loc":"d,14:16,14:17","dtypep":"(H)","origName":"d","verilogName":"d","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.q","addr":"(L)","loc":"d,15:22,15:23","dtypep":"(H)","origName":"q","verilogName":"q","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.clk","addr":"(M)","loc":"d,13:10,13:13","dtypep":"(J)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.d","addr":"(N)","loc":"d,14:16,14:17","dtypep":"(H)","origName":"d","verilogName":"d","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.between","addr":"(O)","loc":"d,17:22,17:29","dtypep":"(H)","origName":"between","verilogName":"between","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"VAR","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.WIDTH","addr":"(P)","loc":"d,32:15,32:20","dtypep":"(Q)","origName":"WIDTH","verilogName":"WIDTH","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"GPARAM","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":true,"isParam":true,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
{"type":"VAR","name":"q","addr":"(G)","loc":"d,15:22,15:23","dtypep":"(H)","origName":"q","verilogName":"q","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"clk","addr":"(I)","loc":"d,13:10,13:13","dtypep":"(J)","origName":"clk","verilogName":"clk","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"d","addr":"(K)","loc":"d,14:16,14:17","dtypep":"(H)","origName":"d","verilogName":"d","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.q","addr":"(L)","loc":"d,15:22,15:23","dtypep":"(H)","origName":"q","verilogName":"q","direction":"NONE","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.clk","addr":"(M)","loc":"d,13:10,13:13","dtypep":"(J)","origName":"clk","verilogName":"clk","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.d","addr":"(N)","loc":"d,14:16,14:17","dtypep":"(H)","origName":"d","verilogName":"d","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.between","addr":"(O)","loc":"d,17:22,17:29","dtypep":"(H)","origName":"between","verilogName":"between","direction":"NONE","lifetime":"VSTATICI","varType":"VAR","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.WIDTH","addr":"(P)","loc":"d,32:15,32:20","dtypep":"(Q)","origName":"WIDTH","verilogName":"WIDTH","direction":"NONE","isConst":true,"lifetime":"VSTATICI","varType":"GPARAM","dtypeName":"logic","isGParam":true,"isParam":true,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
"valuep": [
|
||||
{"type":"CONST","name":"32'sh4","addr":"(R)","loc":"d,19:18,19:19","dtypep":"(Q)"}
|
||||
],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.clk","addr":"(S)","loc":"d,34:24,34:27","dtypep":"(J)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.d","addr":"(T)","loc":"d,35:30,35:31","dtypep":"(H)","origName":"d","verilogName":"d","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.q","addr":"(U)","loc":"d,36:30,36:31","dtypep":"(H)","origName":"q","verilogName":"q","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.IGNORED","addr":"(V)","loc":"d,39:15,39:22","dtypep":"(Q)","origName":"IGNORED","verilogName":"IGNORED","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"LPARAM","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":true,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
{"type":"VAR","name":"t.cell1.clk","addr":"(S)","loc":"d,34:24,34:27","dtypep":"(J)","origName":"clk","verilogName":"clk","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.d","addr":"(T)","loc":"d,35:30,35:31","dtypep":"(H)","origName":"d","verilogName":"d","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.q","addr":"(U)","loc":"d,36:30,36:31","dtypep":"(H)","origName":"q","verilogName":"q","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell1.IGNORED","addr":"(V)","loc":"d,39:15,39:22","dtypep":"(Q)","origName":"IGNORED","verilogName":"IGNORED","direction":"NONE","isConst":true,"lifetime":"VSTATICI","varType":"LPARAM","dtypeName":"logic","isParam":true,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
|
||||
"valuep": [
|
||||
{"type":"CONST","name":"32'sh1","addr":"(W)","loc":"d,39:25,39:26","dtypep":"(Q)"}
|
||||
],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell2.clk","addr":"(X)","loc":"d,48:10,48:13","dtypep":"(J)","origName":"clk","verilogName":"clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell2.d","addr":"(Y)","loc":"d,49:16,49:17","dtypep":"(H)","origName":"d","verilogName":"d","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell2.q","addr":"(Z)","loc":"d,50:22,50:23","dtypep":"(H)","origName":"q","verilogName":"q","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell2.clk","addr":"(X)","loc":"d,48:10,48:13","dtypep":"(J)","origName":"clk","verilogName":"clk","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell2.d","addr":"(Y)","loc":"d,49:16,49:17","dtypep":"(H)","origName":"d","verilogName":"d","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"t.cell2.q","addr":"(Z)","loc":"d,50:22,50:23","dtypep":"(H)","origName":"q","verilogName":"q","direction":"NONE","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"TOPSCOPE","name":"","addr":"(E)","loc":"d,7:8,7:9","senTreesp": [],
|
||||
"scopep": [
|
||||
{"type":"SCOPE","name":"TOP","addr":"(AB)","loc":"d,7:8,7:9","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(F)",
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
{"type":"VARSCOPE","name":"clk","addr":"(CB)","loc":"d,13:10,13:13","dtypep":"(J)","isTrace":true,"scopep":"(AB)","varp":"(I)"},
|
||||
{"type":"VARSCOPE","name":"d","addr":"(DB)","loc":"d,14:16,14:17","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(K)"},
|
||||
{"type":"VARSCOPE","name":"t.q","addr":"(EB)","loc":"d,15:22,15:23","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(L)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(FB)","loc":"d,15:22,15:23","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(FB)","loc":"d,15:22,15:23","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(GB)","loc":"d,15:22,15:23","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -42,7 +42,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"t.clk","addr":"(JB)","loc":"d,13:10,13:13","dtypep":"(J)","isTrace":true,"scopep":"(AB)","varp":"(M)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(KB)","loc":"d,13:10,13:13","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(KB)","loc":"d,13:10,13:13","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(LB)","loc":"d,13:10,13:13","dtypep":"(J)",
|
||||
"rhsp": [
|
||||
|
|
@ -53,7 +53,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"t.d","addr":"(OB)","loc":"d,14:16,14:17","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(N)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(PB)","loc":"d,14:16,14:17","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(PB)","loc":"d,14:16,14:17","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(QB)","loc":"d,14:16,14:17","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -66,7 +66,7 @@
|
|||
{"type":"VARSCOPE","name":"t.between","addr":"(TB)","loc":"d,17:22,17:29","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(O)"},
|
||||
{"type":"VARSCOPE","name":"t.cell1.WIDTH","addr":"(UB)","loc":"d,32:15,32:20","dtypep":"(Q)","isTrace":true,"scopep":"(AB)","varp":"(P)"},
|
||||
{"type":"VARSCOPE","name":"t.cell1.clk","addr":"(VB)","loc":"d,34:24,34:27","dtypep":"(J)","isTrace":true,"scopep":"(AB)","varp":"(S)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(WB)","loc":"d,34:24,34:27","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(WB)","loc":"d,34:24,34:27","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(XB)","loc":"d,34:24,34:27","dtypep":"(J)",
|
||||
"rhsp": [
|
||||
|
|
@ -77,7 +77,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"t.cell1.d","addr":"(AC)","loc":"d,35:30,35:31","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(T)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(BC)","loc":"d,35:30,35:31","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(BC)","loc":"d,35:30,35:31","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(CC)","loc":"d,35:30,35:31","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -88,7 +88,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"t.cell1.q","addr":"(FC)","loc":"d,36:30,36:31","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(U)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(GC)","loc":"d,36:30,36:31","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(GC)","loc":"d,36:30,36:31","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(HC)","loc":"d,36:30,36:31","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -100,7 +100,7 @@
|
|||
]},
|
||||
{"type":"VARSCOPE","name":"t.cell1.IGNORED","addr":"(KC)","loc":"d,39:15,39:22","dtypep":"(Q)","isTrace":true,"scopep":"(AB)","varp":"(V)"},
|
||||
{"type":"VARSCOPE","name":"t.cell2.clk","addr":"(LC)","loc":"d,48:10,48:13","dtypep":"(J)","isTrace":true,"scopep":"(AB)","varp":"(X)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(MC)","loc":"d,48:10,48:13","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(MC)","loc":"d,48:10,48:13","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(NC)","loc":"d,48:10,48:13","dtypep":"(J)",
|
||||
"rhsp": [
|
||||
|
|
@ -111,7 +111,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"t.cell2.d","addr":"(QC)","loc":"d,49:16,49:17","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(Y)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(RC)","loc":"d,49:16,49:17","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(RC)","loc":"d,49:16,49:17","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(SC)","loc":"d,49:16,49:17","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -122,7 +122,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"t.cell2.q","addr":"(VC)","loc":"d,50:22,50:23","dtypep":"(H)","isTrace":true,"scopep":"(AB)","varp":"(Z)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(WC)","loc":"d,50:22,50:23","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(WC)","loc":"d,50:22,50:23","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(XC)","loc":"d,50:22,50:23","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -134,9 +134,9 @@
|
|||
]}
|
||||
],
|
||||
"blocksp": [
|
||||
{"type":"ALWAYS","name":"","addr":"(AD)","loc":"d,41:4,41:10","keyword":"always","isSuspendable":false,"needProcess":false,
|
||||
{"type":"ALWAYS","name":"","addr":"(AD)","loc":"d,41:4,41:10","keyword":"always",
|
||||
"sentreep": [
|
||||
{"type":"SENTREE","name":"","addr":"(BD)","loc":"d,41:11,41:12","isMulti":false,
|
||||
{"type":"SENTREE","name":"","addr":"(BD)","loc":"d,41:11,41:12",
|
||||
"sensesp": [
|
||||
{"type":"SENITEM","name":"","addr":"(CD)","loc":"d,41:13,41:20","edgeType":"POS",
|
||||
"sensp": [
|
||||
|
|
@ -153,7 +153,7 @@
|
|||
{"type":"VARREF","name":"t.between","addr":"(GD)","loc":"d,42:6,42:7","dtypep":"(H)","access":"WR","varp":"(O)","varScopep":"(TB)","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []}
|
||||
]},
|
||||
{"type":"ALWAYS","name":"","addr":"(HD)","loc":"d,53:13,53:14","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(HD)","loc":"d,53:13,53:14","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(ID)","loc":"d,53:13,53:14","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -173,11 +173,11 @@
|
|||
{"type":"BASICDTYPE","name":"logic","addr":"(J)","loc":"d,34:24,34:27","dtypep":"(J)","keyword":"logic","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(H)","loc":"d,15:16,15:17","dtypep":"(H)","keyword":"logic","range":"3:0","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(Q)","loc":"d,19:18,19:19","dtypep":"(Q)","keyword":"logic","range":"31:0","generic":true,"signed":true,"rangep": []},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(LD)","loc":"a,0:0,0:0","dtypep":"(LD)","generic":false}
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(LD)","loc":"a,0:0,0:0","dtypep":"(LD)"}
|
||||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(MD)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(MD)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(ND)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(MD)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,17 +1,17 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"(E)","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,11:8,11:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"$root","verilogName":"$root","level":1,"modPublic":true,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,11:8,11:11","origName":"$root","verilogName":"$root","level":1,"modPublic":true,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"i_clk","addr":"(G)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.i_clk","addr":"(I)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.f.i_clk","addr":"(J)","loc":"d,7:24,7:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"i_clk","addr":"(G)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.i_clk","addr":"(I)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.f.i_clk","addr":"(J)","loc":"d,7:24,7:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"TOPSCOPE","name":"","addr":"(E)","loc":"d,11:8,11:11","senTreesp": [],
|
||||
"scopep": [
|
||||
{"type":"SCOPE","name":"TOP","addr":"(K)","loc":"d,11:8,11:11","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(F)",
|
||||
"varsp": [
|
||||
{"type":"VARSCOPE","name":"i_clk","addr":"(L)","loc":"d,11:24,11:29","dtypep":"(H)","isTrace":true,"scopep":"(K)","varp":"(G)"},
|
||||
{"type":"VARSCOPE","name":"top.i_clk","addr":"(M)","loc":"d,11:24,11:29","dtypep":"(H)","isTrace":true,"scopep":"(K)","varp":"(I)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(N)","loc":"d,11:24,11:29","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(N)","loc":"d,11:24,11:29","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(O)","loc":"d,11:24,11:29","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -22,7 +22,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"top.f.i_clk","addr":"(R)","loc":"d,7:24,7:29","dtypep":"(H)","isTrace":true,"scopep":"(K)","varp":"(J)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(S)","loc":"d,7:24,7:29","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(S)","loc":"d,7:24,7:29","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(T)","loc":"d,7:24,7:29","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(W)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(W)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(X)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(W)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,17 +1,17 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"(E)","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,11:8,11:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"$root","verilogName":"$root","level":1,"modPublic":true,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,11:8,11:11","origName":"$root","verilogName":"$root","level":1,"modPublic":true,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"i_clk","addr":"(G)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.i_clk","addr":"(I)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.f.i_clk","addr":"(J)","loc":"d,7:24,7:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"i_clk","addr":"(G)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.i_clk","addr":"(I)","loc":"d,11:24,11:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"top.f.i_clk","addr":"(J)","loc":"d,7:24,7:29","dtypep":"(H)","origName":"i_clk","verilogName":"i_clk","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"TOPSCOPE","name":"","addr":"(E)","loc":"d,11:8,11:11","senTreesp": [],
|
||||
"scopep": [
|
||||
{"type":"SCOPE","name":"TOP","addr":"(K)","loc":"d,11:8,11:11","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(F)",
|
||||
"varsp": [
|
||||
{"type":"VARSCOPE","name":"i_clk","addr":"(L)","loc":"d,11:24,11:29","dtypep":"(H)","isTrace":true,"scopep":"(K)","varp":"(G)"},
|
||||
{"type":"VARSCOPE","name":"top.i_clk","addr":"(M)","loc":"d,11:24,11:29","dtypep":"(H)","isTrace":true,"scopep":"(K)","varp":"(I)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(N)","loc":"d,11:24,11:29","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(N)","loc":"d,11:24,11:29","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(O)","loc":"d,11:24,11:29","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -22,7 +22,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"top.f.i_clk","addr":"(R)","loc":"d,7:24,7:29","dtypep":"(H)","isTrace":true,"scopep":"(K)","varp":"(J)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(S)","loc":"d,7:24,7:29","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(S)","loc":"d,7:24,7:29","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(T)","loc":"d,7:24,7:29","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(W)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(W)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(X)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(W)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,15 +1,15 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"(E)","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,7:8,7:21","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"$root","verilogName":"$root","level":1,"modPublic":true,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"$root","addr":"(F)","loc":"d,7:8,7:21","origName":"$root","verilogName":"$root","level":1,"modPublic":true,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"i_a","addr":"(G)","loc":"d,9:25,9:28","dtypep":"(H)","origName":"i_a","verilogName":"i_a","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"i_b","addr":"(I)","loc":"d,10:25,10:28","dtypep":"(H)","origName":"i_b","verilogName":"i_b","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"o_a","addr":"(J)","loc":"d,11:25,11:28","dtypep":"(K)","origName":"o_a","verilogName":"o_a","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"o_b","addr":"(L)","loc":"d,12:25,12:28","dtypep":"(K)","origName":"o_b","verilogName":"o_b","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.i_a","addr":"(M)","loc":"d,9:25,9:28","dtypep":"(H)","origName":"i_a","verilogName":"i_a","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.i_b","addr":"(N)","loc":"d,10:25,10:28","dtypep":"(H)","origName":"i_b","verilogName":"i_b","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.o_a","addr":"(O)","loc":"d,11:25,11:28","dtypep":"(K)","origName":"o_a","verilogName":"o_a","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.o_b","addr":"(P)","loc":"d,12:25,12:28","dtypep":"(K)","origName":"o_b","verilogName":"o_b","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"i_a","addr":"(G)","loc":"d,9:25,9:28","dtypep":"(H)","origName":"i_a","verilogName":"i_a","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"i_b","addr":"(I)","loc":"d,10:25,10:28","dtypep":"(H)","origName":"i_b","verilogName":"i_b","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"o_a","addr":"(J)","loc":"d,11:25,11:28","dtypep":"(K)","origName":"o_a","verilogName":"o_a","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"o_b","addr":"(L)","loc":"d,12:25,12:28","dtypep":"(K)","origName":"o_b","verilogName":"o_b","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.i_a","addr":"(M)","loc":"d,9:25,9:28","dtypep":"(H)","origName":"i_a","verilogName":"i_a","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.i_b","addr":"(N)","loc":"d,10:25,10:28","dtypep":"(H)","origName":"i_b","verilogName":"i_b","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.o_a","addr":"(O)","loc":"d,11:25,11:28","dtypep":"(K)","origName":"o_a","verilogName":"o_a","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"vlvbound_test.o_b","addr":"(P)","loc":"d,12:25,12:28","dtypep":"(K)","origName":"o_b","verilogName":"o_b","direction":"NONE","lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"TOPSCOPE","name":"","addr":"(E)","loc":"d,7:8,7:21","senTreesp": [],
|
||||
"scopep": [
|
||||
{"type":"SCOPE","name":"TOP","addr":"(Q)","loc":"d,7:8,7:21","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(F)",
|
||||
|
|
@ -19,7 +19,7 @@
|
|||
{"type":"VARSCOPE","name":"o_a","addr":"(T)","loc":"d,11:25,11:28","dtypep":"(K)","isTrace":true,"scopep":"(Q)","varp":"(J)"},
|
||||
{"type":"VARSCOPE","name":"o_b","addr":"(U)","loc":"d,12:25,12:28","dtypep":"(K)","isTrace":true,"scopep":"(Q)","varp":"(L)"},
|
||||
{"type":"VARSCOPE","name":"vlvbound_test.i_a","addr":"(V)","loc":"d,9:25,9:28","dtypep":"(H)","isTrace":true,"scopep":"(Q)","varp":"(M)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(W)","loc":"d,9:25,9:28","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(W)","loc":"d,9:25,9:28","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(X)","loc":"d,9:25,9:28","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -30,7 +30,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"vlvbound_test.i_b","addr":"(AB)","loc":"d,10:25,10:28","dtypep":"(H)","isTrace":true,"scopep":"(Q)","varp":"(N)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(BB)","loc":"d,10:25,10:28","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(BB)","loc":"d,10:25,10:28","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(CB)","loc":"d,10:25,10:28","dtypep":"(H)",
|
||||
"rhsp": [
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"vlvbound_test.o_a","addr":"(FB)","loc":"d,11:25,11:28","dtypep":"(K)","isTrace":true,"scopep":"(Q)","varp":"(O)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(GB)","loc":"d,11:25,11:28","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(GB)","loc":"d,11:25,11:28","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(HB)","loc":"d,11:25,11:28","dtypep":"(K)",
|
||||
"rhsp": [
|
||||
|
|
@ -52,7 +52,7 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"VARSCOPE","name":"vlvbound_test.o_b","addr":"(KB)","loc":"d,12:25,12:28","dtypep":"(K)","isTrace":true,"scopep":"(Q)","varp":"(P)"},
|
||||
{"type":"ALWAYS","name":"","addr":"(LB)","loc":"d,12:25,12:28","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(LB)","loc":"d,12:25,12:28","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(MB)","loc":"d,12:25,12:28","dtypep":"(K)",
|
||||
"rhsp": [
|
||||
|
|
@ -72,7 +72,7 @@
|
|||
{"type":"VARSCOPE","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(EC)","loc":"d,17:13,17:14","dtypep":"(WB)","isTrace":true,"scopep":"(Q)","varp":"(FC)"}
|
||||
],
|
||||
"blocksp": [
|
||||
{"type":"ALWAYS","name":"","addr":"(GC)","loc":"d,24:14,24:15","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(GC)","loc":"d,24:14,24:15","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"COMMENT","name":"Function: foo","addr":"(HC)","loc":"d,24:16,24:19"},
|
||||
{"type":"ASSIGN","name":"","addr":"(IC)","loc":"d,24:20,24:23","dtypep":"(H)",
|
||||
|
|
@ -84,21 +84,21 @@
|
|||
],"timingControlp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(LC)","loc":"d,16:17,16:20","dtypep":"(K)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(MC)","loc":"d,16:17,16:20","dtypep":"(K)","constructing":false}
|
||||
{"type":"CRESET","name":"","addr":"(MC)","loc":"d,16:17,16:20","dtypep":"(K)"}
|
||||
],
|
||||
"lhsp": [
|
||||
{"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__ret","addr":"(NC)","loc":"d,16:17,16:20","dtypep":"(K)","access":"WR","varp":"(UB)","varScopep":"(TB)","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(OC)","loc":"d,17:13,17:14","dtypep":"(WB)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(PC)","loc":"d,17:13,17:14","dtypep":"(WB)","constructing":false}
|
||||
{"type":"CRESET","name":"","addr":"(PC)","loc":"d,17:13,17:14","dtypep":"(WB)"}
|
||||
],
|
||||
"lhsp": [
|
||||
{"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__i","addr":"(QC)","loc":"d,17:13,17:14","dtypep":"(WB)","access":"WR","varp":"(XB)","varScopep":"(VB)","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(RC)","loc":"d,15:34,15:37","dtypep":"(K)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(SC)","loc":"d,15:34,15:37","dtypep":"(K)","constructing":false}
|
||||
{"type":"CRESET","name":"","addr":"(SC)","loc":"d,15:34,15:37","dtypep":"(K)"}
|
||||
],
|
||||
"lhsp": [
|
||||
{"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__Vfuncout","addr":"(TC)","loc":"d,15:34,15:37","dtypep":"(K)","access":"WR","varp":"(QB)","varScopep":"(PB)","classOrPackagep":"UNLINKED"}
|
||||
|
|
@ -194,7 +194,7 @@
|
|||
{"type":"VARREF","name":"o_a","addr":"(HE)","loc":"d,24:10,24:13","dtypep":"(K)","access":"WR","varp":"(J)","varScopep":"(T)","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"ALWAYS","name":"","addr":"(IE)","loc":"d,25:14,25:15","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(IE)","loc":"d,25:14,25:15","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"COMMENT","name":"Function: foo","addr":"(JE)","loc":"d,25:16,25:19"},
|
||||
{"type":"ASSIGN","name":"","addr":"(KE)","loc":"d,25:20,25:23","dtypep":"(H)",
|
||||
|
|
@ -206,21 +206,21 @@
|
|||
],"timingControlp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(NE)","loc":"d,16:17,16:20","dtypep":"(K)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(OE)","loc":"d,16:17,16:20","dtypep":"(K)","constructing":false}
|
||||
{"type":"CRESET","name":"","addr":"(OE)","loc":"d,16:17,16:20","dtypep":"(K)"}
|
||||
],
|
||||
"lhsp": [
|
||||
{"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(PE)","loc":"d,16:17,16:20","dtypep":"(K)","access":"WR","varp":"(DC)","varScopep":"(CC)","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": []},
|
||||
{"type":"ASSIGN","name":"","addr":"(QE)","loc":"d,17:13,17:14","dtypep":"(WB)",
|
||||
"rhsp": [
|
||||
{"type":"CRESET","name":"","addr":"(RE)","loc":"d,17:13,17:14","dtypep":"(WB)","constructing":false}
|
||||
{"type":"CRESET","name":"","addr":"(RE)","loc":"d,17:13,17:14","dtypep":"(WB)"}
|
||||
],
|
||||
"lhsp": [
|
||||
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@ -340,11 +340,11 @@
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@ -1,8 +1,8 @@
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|
||||
{"type":"VAR","name":"a2","addr":"(I)","loc":"d,15:9,15:11","dtypep":"(G)","origName":"a2","verilogName":"a2","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"ready","addr":"(J)","loc":"d,16:10,16:15","dtypep":"(G)","origName":"ready","verilogName":"ready","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"ready_reg","addr":"(K)","loc":"d,18:8,18:17","dtypep":"(G)","origName":"ready_reg","verilogName":"ready_reg","direction":"NONE","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"CELL","name":"and_cell","addr":"(L)","loc":"d,20:11,20:19","origName":"and_cell","verilogName":"and_cell","modp":"(M)",
|
||||
"pinsp": [
|
||||
{"type":"PIN","name":"a1","addr":"(N)","loc":"d,21:8,21:10","svDotName":true,"svImplicit":false,"modVarp":"(O)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"a1","addr":"(N)","loc":"d,21:8,21:10","svDotName":true,"modVarp":"(O)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"a1","addr":"(P)","loc":"d,21:11,21:13","dtypep":"(G)","access":"RD","varp":"(H)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]},
|
||||
{"type":"PIN","name":"a2","addr":"(Q)","loc":"d,22:8,22:10","svDotName":true,"svImplicit":false,"modVarp":"(R)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"a2","addr":"(Q)","loc":"d,22:8,22:10","svDotName":true,"modVarp":"(R)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"a2","addr":"(S)","loc":"d,22:11,22:13","dtypep":"(G)","access":"RD","varp":"(I)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]},
|
||||
{"type":"PIN","name":"zn","addr":"(T)","loc":"d,23:8,23:10","svDotName":true,"svImplicit":false,"modVarp":"(U)","modPTypep":"UNLINKED",
|
||||
{"type":"PIN","name":"zn","addr":"(T)","loc":"d,23:8,23:10","svDotName":true,"modVarp":"(U)","modPTypep":"UNLINKED",
|
||||
"exprp": [
|
||||
{"type":"VARREF","name":"ready_reg","addr":"(V)","loc":"d,23:11,23:20","dtypep":"(G)","access":"WR","varp":"(K)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
]}
|
||||
],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(W)","loc":"d,26:16,26:17","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"ALWAYS","name":"","addr":"(W)","loc":"d,26:16,26:17","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(X)","loc":"d,26:16,26:17","dtypep":"(G)",
|
||||
"rhsp": [
|
||||
|
|
@ -33,12 +33,12 @@
|
|||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]}
|
||||
]},
|
||||
{"type":"MODULE","name":"and2_x1","addr":"(M)","loc":"d,29:8,29:15","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"and2_x1","verilogName":"and2_x1","level":2,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"and2_x1","addr":"(M)","loc":"d,29:8,29:15","origName":"and2_x1","verilogName":"and2_x1","level":2,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"a1","addr":"(O)","loc":"d,30:16,30:18","dtypep":"(G)","origName":"a1","verilogName":"a1","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"a2","addr":"(R)","loc":"d,31:16,31:18","dtypep":"(G)","origName":"a2","verilogName":"a2","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"zn","addr":"(U)","loc":"d,32:17,32:19","dtypep":"(G)","origName":"zn","verilogName":"zn","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(AB)","loc":"d,34:13,34:14","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"VAR","name":"a1","addr":"(O)","loc":"d,30:16,30:18","dtypep":"(G)","origName":"a1","verilogName":"a1","direction":"INPUT","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"a2","addr":"(R)","loc":"d,31:16,31:18","dtypep":"(G)","origName":"a2","verilogName":"a2","direction":"INPUT","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"zn","addr":"(U)","loc":"d,32:17,32:19","dtypep":"(G)","origName":"zn","verilogName":"zn","direction":"OUTPUT","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(AB)","loc":"d,34:13,34:14","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(BB)","loc":"d,34:13,34:14","dtypep":"(G)",
|
||||
"rhsp": [
|
||||
|
|
@ -60,11 +60,11 @@
|
|||
{"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"(GB)",
|
||||
"typesp": [
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(G)","loc":"d,30:16,30:18","dtypep":"(G)","keyword":"logic","generic":true,"rangep": []},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(GB)","loc":"a,0:0,0:0","dtypep":"(GB)","generic":false}
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(GB)","loc":"a,0:0,0:0","dtypep":"(GB)"}
|
||||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(HB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(HB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(IB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(HB)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,28 +1,28 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"UNLINKED","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"m","addr":"(E)","loc":"d,12:8,12:9","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"m","verilogName":"m","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"m","addr":"(E)","loc":"d,12:8,12:9","origName":"m","verilogName":"m","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"clk_ip","addr":"(F)","loc":"d,14:11,14:17","dtypep":"(G)","origName":"clk_ip","verilogName":"clk_ip","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"rst_ip","addr":"(H)","loc":"d,15:11,15:17","dtypep":"(G)","origName":"rst_ip","verilogName":"rst_ip","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"foo_op","addr":"(I)","loc":"d,16:11,16:17","dtypep":"(G)","origName":"foo_op","verilogName":"foo_op","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"TYPEDEF","name":"my_struct","addr":"(J)","loc":"d,25:6,25:15","dtypep":"(K)","attrPublic":false,"isUnderClass":false,"childDTypep": [],"attrsp": []},
|
||||
{"type":"CELL","name":"itop","addr":"(L)","loc":"d,29:8,29:12","origName":"itop","verilogName":"itop","recursive":false,"modp":"(M)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"VAR","name":"itop","addr":"(N)","loc":"d,29:8,29:12","dtypep":"(O)","origName":"itop__Viftop","verilogName":"itop__Viftop","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"IFACEREF","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"this_struct","addr":"(P)","loc":"d,31:14,31:25","dtypep":"(Q)","origName":"this_struct","verilogName":"this_struct","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"VAR","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"dotted","addr":"(R)","loc":"d,33:16,33:22","dtypep":"(S)","origName":"dotted","verilogName":"dotted","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(T)","loc":"d,33:23,33:24","keyword":"cont_assign","isSuspendable":false,"needProcess":false,"sentreep": [],
|
||||
{"type":"VAR","name":"clk_ip","addr":"(F)","loc":"d,14:11,14:17","dtypep":"(G)","origName":"clk_ip","verilogName":"clk_ip","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"rst_ip","addr":"(H)","loc":"d,15:11,15:17","dtypep":"(G)","origName":"rst_ip","verilogName":"rst_ip","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"foo_op","addr":"(I)","loc":"d,16:11,16:17","dtypep":"(G)","origName":"foo_op","verilogName":"foo_op","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"TYPEDEF","name":"my_struct","addr":"(J)","loc":"d,25:6,25:15","dtypep":"(K)","childDTypep": [],"attrsp": []},
|
||||
{"type":"CELL","name":"itop","addr":"(L)","loc":"d,29:8,29:12","origName":"itop","verilogName":"itop","modp":"(M)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
|
||||
{"type":"VAR","name":"itop","addr":"(N)","loc":"d,29:8,29:12","dtypep":"(O)","origName":"itop__Viftop","verilogName":"itop__Viftop","direction":"NONE","lifetime":"VSTATICI","varType":"IFACEREF","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"this_struct","addr":"(P)","loc":"d,31:14,31:25","dtypep":"(Q)","origName":"this_struct","verilogName":"this_struct","direction":"NONE","lifetime":"VSTATICI","varType":"VAR","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"dotted","addr":"(R)","loc":"d,33:16,33:22","dtypep":"(S)","origName":"dotted","verilogName":"dotted","direction":"NONE","lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"ALWAYS","name":"","addr":"(T)","loc":"d,33:23,33:24","keyword":"cont_assign","sentreep": [],
|
||||
"stmtsp": [
|
||||
{"type":"ASSIGNW","name":"","addr":"(U)","loc":"d,33:23,33:24","dtypep":"(S)",
|
||||
"rhsp": [
|
||||
{"type":"VARXREF","name":"value","addr":"(V)","loc":"d,33:30,33:35","dtypep":"(W)","containsGenBlock":false,"dotted":"itop","inlinedDots":"","access":"RD","varp":"(X)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
{"type":"VARXREF","name":"value","addr":"(V)","loc":"d,33:30,33:35","dtypep":"(W)","dotted":"itop","inlinedDots":"","access":"RD","varp":"(X)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],
|
||||
"lhsp": [
|
||||
{"type":"VARREF","name":"dotted","addr":"(Y)","loc":"d,33:16,33:22","dtypep":"(S)","access":"WR","varp":"(R)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
|
||||
],"timingControlp": [],"strengthSpecp": []}
|
||||
]},
|
||||
{"type":"TASK","name":"f","addr":"(Z)","loc":"d,35:18,35:19","method":false,"dpiExport":false,"dpiImport":false,"dpiOpenChild":false,"dpiOpenParent":false,"isExternDef":false,"isExternProto":false,"prototype":false,"recursive":false,"taskPublic":false,"cname":"f","fvarp": [],"classOrPackagep": [],
|
||||
{"type":"TASK","name":"f","addr":"(Z)","loc":"d,35:18,35:19","cname":"f","fvarp": [],"classOrPackagep": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"m","addr":"(AB)","loc":"d,35:33,35:34","dtypep":"(BB)","origName":"m","verilogName":"m","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":true,"isStdRandomizeArg":false,"lifetime":"VAUTOMI","varType":"PORT","dtypeName":"string","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"m","addr":"(AB)","loc":"d,35:33,35:34","dtypep":"(BB)","origName":"m","verilogName":"m","direction":"INPUT","isFuncLocal":true,"lifetime":"VAUTOMI","varType":"PORT","dtypeName":"string","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"DISPLAY","name":"","addr":"(CB)","loc":"d,36:7,36:15",
|
||||
"fmtp": [
|
||||
{"type":"SFORMATF","name":"%@","addr":"(DB)","loc":"d,36:7,36:15","dtypep":"(BB)",
|
||||
|
|
@ -31,9 +31,9 @@
|
|||
],"scopeNamep": []}
|
||||
],"filep": []}
|
||||
],"scopeNamep": []},
|
||||
{"type":"INITIAL","name":"","addr":"(FB)","loc":"d,39:4,39:11","isSuspendable":false,"needProcess":false,
|
||||
{"type":"INITIAL","name":"","addr":"(FB)","loc":"d,39:4,39:11",
|
||||
"stmtsp": [
|
||||
{"type":"BEGIN","name":"","addr":"(GB)","loc":"d,39:12,39:17","implied":false,"needProcess":false,"unnamed":true,"declsp": [],
|
||||
{"type":"BEGIN","name":"","addr":"(GB)","loc":"d,39:12,39:17","unnamed":true,"declsp": [],
|
||||
"stmtsp": [
|
||||
{"type":"STMTEXPR","name":"","addr":"(HB)","loc":"d,41:7,41:8",
|
||||
"exprp": [
|
||||
|
|
@ -48,9 +48,9 @@
|
|||
]}
|
||||
]}
|
||||
]},
|
||||
{"type":"IFACE","name":"ifc","addr":"(M)","loc":"d,7:11,7:14","origName":"ifc","verilogName":"ifc","level":2,"modPublic":false,"inLibrary":true,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"IFACE","name":"ifc","addr":"(M)","loc":"d,7:11,7:14","origName":"ifc","verilogName":"ifc","level":2,"inLibrary":true,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"value","addr":"(X)","loc":"d,8:12,8:17","dtypep":"(W)","origName":"value","verilogName":"value","isSc":false,"isPrimaryIO":false,"isPrimaryClock":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"VAR","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"value","addr":"(X)","loc":"d,8:12,8:17","dtypep":"(W)","origName":"value","verilogName":"value","direction":"NONE","lifetime":"VSTATICI","varType":"VAR","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"MODPORT","name":"out_modport","addr":"(MB)","loc":"d,9:12,9:23",
|
||||
"varsp": [
|
||||
{"type":"MODPORTVARREF","name":"value","addr":"(NB)","loc":"d,9:32,9:37","direction":"OUTPUT","varp":"(X)","exprp": []}
|
||||
|
|
@ -60,24 +60,24 @@
|
|||
"miscsp": [
|
||||
{"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"(JB)",
|
||||
"typesp": [
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(JB)","loc":"d,41:7,41:8","dtypep":"(JB)","generic":false},
|
||||
{"type":"VOIDDTYPE","name":"","addr":"(JB)","loc":"d,41:7,41:8","dtypep":"(JB)"},
|
||||
{"type":"BASICDTYPE","name":"integer","addr":"(W)","loc":"d,8:4,8:11","dtypep":"(W)","keyword":"integer","range":"31:0","generic":true,"signed":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(G)","loc":"d,14:11,14:17","dtypep":"(G)","keyword":"logic","generic":true,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(OB)","loc":"d,21:7,21:12","dtypep":"(OB)","keyword":"logic","generic":false,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(PB)","loc":"d,22:7,22:12","dtypep":"(PB)","keyword":"logic","generic":false,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(QB)","loc":"d,23:7,23:12","dtypep":"(QB)","keyword":"logic","generic":false,"rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(RB)","loc":"d,24:7,24:12","dtypep":"(RB)","keyword":"logic","generic":false,"rangep": []},
|
||||
{"type":"STRUCTDTYPE","name":"m.my_struct","addr":"(K)","loc":"d,20:12,20:18","dtypep":"(K)","packed":true,"isFourstate":true,"generic":false,"classOrPackagep":"UNLINKED",
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(OB)","loc":"d,21:7,21:12","dtypep":"(OB)","keyword":"logic","rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(PB)","loc":"d,22:7,22:12","dtypep":"(PB)","keyword":"logic","rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(QB)","loc":"d,23:7,23:12","dtypep":"(QB)","keyword":"logic","rangep": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(RB)","loc":"d,24:7,24:12","dtypep":"(RB)","keyword":"logic","rangep": []},
|
||||
{"type":"STRUCTDTYPE","name":"m.my_struct","addr":"(K)","loc":"d,20:12,20:18","dtypep":"(K)","packed":true,"isFourstate":true,"classOrPackagep":"UNLINKED",
|
||||
"membersp": [
|
||||
{"type":"MEMBERDTYPE","name":"clk","addr":"(SB)","loc":"d,21:19,21:22","dtypep":"(OB)","isConstrainedRand":false,"name":"clk","tag":"this is clk","generic":false,"refDTypep":"(OB)","childDTypep": [],"valuep": []},
|
||||
{"type":"MEMBERDTYPE","name":"k","addr":"(TB)","loc":"d,22:19,22:20","dtypep":"(PB)","isConstrainedRand":false,"name":"k","tag":"","generic":false,"refDTypep":"(PB)","childDTypep": [],"valuep": []},
|
||||
{"type":"MEMBERDTYPE","name":"enable","addr":"(UB)","loc":"d,23:19,23:25","dtypep":"(QB)","isConstrainedRand":false,"name":"enable","tag":"enable","generic":false,"refDTypep":"(QB)","childDTypep": [],"valuep": []},
|
||||
{"type":"MEMBERDTYPE","name":"data","addr":"(VB)","loc":"d,24:19,24:23","dtypep":"(RB)","isConstrainedRand":false,"name":"data","tag":"data","generic":false,"refDTypep":"(RB)","childDTypep": [],"valuep": []}
|
||||
{"type":"MEMBERDTYPE","name":"clk","addr":"(SB)","loc":"d,21:19,21:22","dtypep":"(OB)","name":"clk","tag":"this is clk","refDTypep":"(OB)","childDTypep": [],"valuep": []},
|
||||
{"type":"MEMBERDTYPE","name":"k","addr":"(TB)","loc":"d,22:19,22:20","dtypep":"(PB)","name":"k","tag":"","refDTypep":"(PB)","childDTypep": [],"valuep": []},
|
||||
{"type":"MEMBERDTYPE","name":"enable","addr":"(UB)","loc":"d,23:19,23:25","dtypep":"(QB)","name":"enable","tag":"enable","refDTypep":"(QB)","childDTypep": [],"valuep": []},
|
||||
{"type":"MEMBERDTYPE","name":"data","addr":"(VB)","loc":"d,24:19,24:23","dtypep":"(RB)","name":"data","tag":"data","refDTypep":"(RB)","childDTypep": [],"valuep": []}
|
||||
]},
|
||||
{"type":"IFACEREFDTYPE","name":"","addr":"(O)","loc":"d,29:8,29:12","dtypep":"(O)","isPortDecl":false,"isVirtual":false,"cellName":"itop","ifaceName":"ifc","modportName":"","generic":false,"ifacep":"UNLINKED","cellp":"(L)","modportp":"UNLINKED","paramsp": []},
|
||||
{"type":"IFACEREFDTYPE","name":"","addr":"(O)","loc":"d,29:8,29:12","dtypep":"(O)","cellName":"itop","ifaceName":"ifc","modportName":"","ifacep":"UNLINKED","cellp":"(L)","modportp":"UNLINKED","paramsp": []},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(S)","loc":"d,31:27,31:28","dtypep":"(S)","keyword":"logic","range":"31:0","generic":true,"rangep": []},
|
||||
{"type":"REFDTYPE","name":"my_struct","addr":"(WB)","loc":"d,31:4,31:13","dtypep":"(K)","generic":false,"typedefp":"UNLINKED","refDTypep":"(K)","classOrPackagep":"UNLINKED","typeofp": [],"classOrPackageOpp": [],"paramsp": []},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(Q)","loc":"d,31:26,31:27","dtypep":"(Q)","isCompound":false,"declRange":"[0:1]","generic":false,"refDTypep":"(WB)","childDTypep": [],
|
||||
{"type":"REFDTYPE","name":"my_struct","addr":"(WB)","loc":"d,31:4,31:13","dtypep":"(K)","typedefp":"UNLINKED","refDTypep":"(K)","classOrPackagep":"UNLINKED","typeofp": [],"classOrPackageOpp": [],"paramsp": []},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(Q)","loc":"d,31:26,31:27","dtypep":"(Q)","declRange":"[0:1]","refDTypep":"(WB)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(XB)","loc":"d,31:26,31:27","ascending":true,"fromBracket":true,
|
||||
"leftp": [
|
||||
|
|
@ -91,7 +91,7 @@
|
|||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
|
|
@ -1,77 +1,77 @@
|
|||
{"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"UNLINKED","stlFirstIterationp":"UNLINKED",
|
||||
"modulesp": [
|
||||
{"type":"MODULE","name":"mh2","addr":"(E)","loc":"d,18:8,18:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh2","verilogName":"mh2","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh2","addr":"(E)","loc":"d,18:8,18:11","origName":"mh2","verilogName":"mh2","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_inout_wire_integer","addr":"(F)","loc":"d,18:27,18:47","dtypep":"(G)","origName":"x_inout_wire_integer","verilogName":"x_inout_wire_integer","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INOUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_inout_wire_integer","addr":"(F)","loc":"d,18:27,18:47","dtypep":"(G)","origName":"x_inout_wire_integer","verilogName":"x_inout_wire_integer","isPrimaryIO":true,"direction":"INOUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh5","addr":"(H)","loc":"d,24:8,24:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh5","verilogName":"mh5","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh5","addr":"(H)","loc":"d,24:8,24:11","origName":"mh5","verilogName":"mh5","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_input_wire_logic","addr":"(I)","loc":"d,24:19,24:37","dtypep":"(J)","origName":"x_input_wire_logic","verilogName":"x_input_wire_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_input_wire_logic","addr":"(I)","loc":"d,24:19,24:37","dtypep":"(J)","origName":"x_input_wire_logic","verilogName":"x_input_wire_logic","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh6","addr":"(K)","loc":"d,26:8,26:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh6","verilogName":"mh6","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh6","addr":"(K)","loc":"d,26:8,26:11","origName":"mh6","verilogName":"mh6","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_input_var_logic","addr":"(L)","loc":"d,26:23,26:40","dtypep":"(J)","origName":"x_input_var_logic","verilogName":"x_input_var_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_input_var_logic","addr":"(L)","loc":"d,26:23,26:40","dtypep":"(J)","origName":"x_input_var_logic","verilogName":"x_input_var_logic","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh7","addr":"(M)","loc":"d,28:8,28:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh7","verilogName":"mh7","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh7","addr":"(M)","loc":"d,28:8,28:11","origName":"mh7","verilogName":"mh7","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_input_var_integer","addr":"(N)","loc":"d,28:31,28:50","dtypep":"(G)","origName":"x_input_var_integer","verilogName":"x_input_var_integer","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_input_var_integer","addr":"(N)","loc":"d,28:31,28:50","dtypep":"(G)","origName":"x_input_var_integer","verilogName":"x_input_var_integer","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh8","addr":"(O)","loc":"d,30:8,30:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh8","verilogName":"mh8","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh8","addr":"(O)","loc":"d,30:8,30:11","origName":"mh8","verilogName":"mh8","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_output_wire_logic","addr":"(P)","loc":"d,30:20,30:39","dtypep":"(J)","origName":"x_output_wire_logic","verilogName":"x_output_wire_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_output_wire_logic","addr":"(P)","loc":"d,30:20,30:39","dtypep":"(J)","origName":"x_output_wire_logic","verilogName":"x_output_wire_logic","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh9","addr":"(Q)","loc":"d,32:8,32:11","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh9","verilogName":"mh9","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh9","addr":"(Q)","loc":"d,32:8,32:11","origName":"mh9","verilogName":"mh9","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_output_var_logic","addr":"(R)","loc":"d,32:24,32:42","dtypep":"(J)","origName":"x_output_var_logic","verilogName":"x_output_var_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_output_var_logic","addr":"(R)","loc":"d,32:24,32:42","dtypep":"(J)","origName":"x_output_var_logic","verilogName":"x_output_var_logic","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh10","addr":"(S)","loc":"d,34:8,34:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh10","verilogName":"mh10","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh10","addr":"(S)","loc":"d,34:8,34:12","origName":"mh10","verilogName":"mh10","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_output_wire_logic_signed_p6","addr":"(T)","loc":"d,34:33,34:62","dtypep":"(U)","origName":"x_output_wire_logic_signed_p6","verilogName":"x_output_wire_logic_signed_p6","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_output_wire_logic_signed_p6","addr":"(T)","loc":"d,34:33,34:62","dtypep":"(U)","origName":"x_output_wire_logic_signed_p6","verilogName":"x_output_wire_logic_signed_p6","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh11","addr":"(V)","loc":"d,36:8,36:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh11","verilogName":"mh11","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh11","addr":"(V)","loc":"d,36:8,36:12","origName":"mh11","verilogName":"mh11","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
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|
||||
{"type":"VAR","name":"x_output_var_integer","addr":"(W)","loc":"d,36:28,36:48","dtypep":"(G)","origName":"x_output_var_integer","verilogName":"x_output_var_integer","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh12","addr":"(X)","loc":"d,38:8,38:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh12","verilogName":"mh12","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh12","addr":"(X)","loc":"d,38:8,38:12","origName":"mh12","verilogName":"mh12","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
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|
||||
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|
||||
]},
|
||||
{"type":"MODULE","name":"mh13","addr":"(AB)","loc":"d,40:8,40:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh13","verilogName":"mh13","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
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|
||||
"stmtsp": [
|
||||
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|
||||
{"type":"VAR","name":"x_ref_var_logic_u6","addr":"(BB)","loc":"d,40:17,40:35","dtypep":"(CB)","origName":"x_ref_var_logic_u6","verilogName":"x_ref_var_logic_u6","isPrimaryIO":true,"direction":"REF","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh17","addr":"(DB)","loc":"d,50:8,50:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh17","verilogName":"mh17","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh17","addr":"(DB)","loc":"d,50:8,50:12","origName":"mh17","verilogName":"mh17","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
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|
||||
{"type":"VAR","name":"y_input_wire_logic","addr":"(FB)","loc":"d,50:57,50:75","dtypep":"(J)","origName":"y_input_wire_logic","verilogName":"y_input_wire_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_input_var_integer","addr":"(EB)","loc":"d,50:31,50:50","dtypep":"(G)","origName":"x_input_var_integer","verilogName":"x_input_var_integer","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_input_wire_logic","addr":"(FB)","loc":"d,50:57,50:75","dtypep":"(J)","origName":"y_input_wire_logic","verilogName":"y_input_wire_logic","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"WIRE","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh18","addr":"(GB)","loc":"d,52:8,52:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh18","verilogName":"mh18","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh18","addr":"(GB)","loc":"d,52:8,52:12","origName":"mh18","verilogName":"mh18","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_output_var_logic","addr":"(HB)","loc":"d,52:24,52:42","dtypep":"(J)","origName":"x_output_var_logic","verilogName":"x_output_var_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_input_wire_logic","addr":"(IB)","loc":"d,52:50,52:68","dtypep":"(J)","origName":"y_input_wire_logic","verilogName":"y_input_wire_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_output_var_logic","addr":"(HB)","loc":"d,52:24,52:42","dtypep":"(J)","origName":"x_output_var_logic","verilogName":"x_output_var_logic","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_input_wire_logic","addr":"(IB)","loc":"d,52:50,52:68","dtypep":"(J)","origName":"y_input_wire_logic","verilogName":"y_input_wire_logic","isPrimaryIO":true,"direction":"INPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh19","addr":"(JB)","loc":"d,54:8,54:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh19","verilogName":"mh19","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh19","addr":"(JB)","loc":"d,54:8,54:12","origName":"mh19","verilogName":"mh19","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_output_wire_logic_signed_p6","addr":"(KB)","loc":"d,54:33,54:62","dtypep":"(U)","origName":"x_output_wire_logic_signed_p6","verilogName":"x_output_wire_logic_signed_p6","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_output_var_integer","addr":"(LB)","loc":"d,54:72,54:92","dtypep":"(G)","origName":"y_output_var_integer","verilogName":"y_output_var_integer","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_output_wire_logic_signed_p6","addr":"(KB)","loc":"d,54:33,54:62","dtypep":"(U)","origName":"x_output_wire_logic_signed_p6","verilogName":"x_output_wire_logic_signed_p6","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_output_var_integer","addr":"(LB)","loc":"d,54:72,54:92","dtypep":"(G)","origName":"y_output_var_integer","verilogName":"y_output_var_integer","isPrimaryIO":true,"direction":"OUTPUT","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"integer","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh20","addr":"(MB)","loc":"d,56:8,56:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh20","verilogName":"mh20","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh20","addr":"(MB)","loc":"d,56:8,56:12","origName":"mh20","verilogName":"mh20","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"x_ref_var_logic_p6","addr":"(NB)","loc":"d,56:23,56:41","dtypep":"(Z)","origName":"x_ref_var_logic_p6","verilogName":"x_ref_var_logic_p6","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"REF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_ref_var_logic_p6","addr":"(OB)","loc":"d,56:43,56:61","dtypep":"(Z)","origName":"y_ref_var_logic_p6","verilogName":"y_ref_var_logic_p6","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"REF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"x_ref_var_logic_p6","addr":"(NB)","loc":"d,56:23,56:41","dtypep":"(Z)","origName":"x_ref_var_logic_p6","verilogName":"x_ref_var_logic_p6","isPrimaryIO":true,"direction":"REF","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_ref_var_logic_p6","addr":"(OB)","loc":"d,56:43,56:61","dtypep":"(Z)","origName":"y_ref_var_logic_p6","verilogName":"y_ref_var_logic_p6","isPrimaryIO":true,"direction":"REF","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]},
|
||||
{"type":"MODULE","name":"mh21","addr":"(PB)","loc":"d,58:8,58:12","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"mh21","verilogName":"mh21","level":1,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
|
||||
{"type":"MODULE","name":"mh21","addr":"(PB)","loc":"d,58:8,58:12","origName":"mh21","verilogName":"mh21","level":1,"timeunit":"1ps","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"VAR","name":"ref_var_logic_u6","addr":"(QB)","loc":"d,58:17,58:33","dtypep":"(RB)","origName":"ref_var_logic_u6","verilogName":"ref_var_logic_u6","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"REF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_ref_var_logic","addr":"(SB)","loc":"d,58:41,58:56","dtypep":"(J)","origName":"y_ref_var_logic","verilogName":"y_ref_var_logic","isSc":false,"isPrimaryIO":true,"isPrimaryClock":false,"direction":"REF","isConst":false,"isPullup":false,"isPulldown":false,"isSigPublic":true,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"isStdRandomizeArg":false,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
{"type":"VAR","name":"ref_var_logic_u6","addr":"(QB)","loc":"d,58:17,58:33","dtypep":"(RB)","origName":"ref_var_logic_u6","verilogName":"ref_var_logic_u6","isPrimaryIO":true,"direction":"REF","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
|
||||
{"type":"VAR","name":"y_ref_var_logic","addr":"(SB)","loc":"d,58:41,58:56","dtypep":"(J)","origName":"y_ref_var_logic","verilogName":"y_ref_var_logic","isPrimaryIO":true,"direction":"REF","isSigPublic":true,"lifetime":"VSTATICI","varType":"PORT","dtypeName":"logic","sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
|
||||
]}
|
||||
],"filesp": [],
|
||||
"miscsp": [
|
||||
{"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
|
||||
"typesp": [
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(RB)","loc":"d,58:34,58:35","dtypep":"(RB)","isCompound":false,"declRange":"[5:0]","generic":false,"refDTypep":"(J)","childDTypep": [],
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(RB)","loc":"d,58:34,58:35","dtypep":"(RB)","declRange":"[5:0]","refDTypep":"(J)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(TB)","loc":"d,58:34,58:35","ascending":false,"fromBracket":false,
|
||||
{"type":"RANGE","name":"","addr":"(TB)","loc":"d,58:34,58:35",
|
||||
"leftp": [
|
||||
{"type":"CONST","name":"32'sh5","addr":"(UB)","loc":"d,58:35,58:36","dtypep":"(VB)"}
|
||||
],
|
||||
|
|
@ -80,9 +80,9 @@
|
|||
]}
|
||||
]},
|
||||
{"type":"BASICDTYPE","name":"logic","addr":"(J)","loc":"d,58:41,58:56","dtypep":"(J)","keyword":"logic","generic":true,"rangep": []},
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(CB)","loc":"d,40:36,40:37","dtypep":"(CB)","isCompound":false,"declRange":"[5:0]","generic":false,"refDTypep":"(J)","childDTypep": [],
|
||||
{"type":"UNPACKARRAYDTYPE","name":"","addr":"(CB)","loc":"d,40:36,40:37","dtypep":"(CB)","declRange":"[5:0]","refDTypep":"(J)","childDTypep": [],
|
||||
"rangep": [
|
||||
{"type":"RANGE","name":"","addr":"(XB)","loc":"d,40:36,40:37","ascending":false,"fromBracket":false,
|
||||
{"type":"RANGE","name":"","addr":"(XB)","loc":"d,40:36,40:37",
|
||||
"leftp": [
|
||||
{"type":"CONST","name":"32'sh5","addr":"(YB)","loc":"d,40:37,40:38","dtypep":"(VB)"}
|
||||
],
|
||||
|
|
@ -97,7 +97,7 @@
|
|||
]},
|
||||
{"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"hasGenericIface":false,"origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","verilogName":"@CONST-POOL@","level":0,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
]}
|
||||
|
|
|
|||
Loading…
Reference in New Issue