2da7696f19
Update board.hpp
2022-10-30 15:05:22 +02:00
b3e25bc650
Add support for xc7s_csga225 and the Digilent CMOD S7 board.
2022-09-30 22:27:20 +02:00
3c9792645e
add support for CmodA7-35T digilent fpga board
2022-09-30 21:17:45 +02:00
61e959f93d
main,board,ftdiJtagBitbang: use pin ID instead of shift
2022-08-23 18:37:43 +02:00
b4d343ce05
board: adding sipeed Tang Primer 20k
2022-07-26 20:25:43 +02:00
2f30668dbc
ORBTrace Mini support (DFU mode)
2022-06-18 22:55:58 +02:00
5295544200
Correct part number for ZCU106 board
2022-05-16 00:44:59 -06:00
76f13604d1
Add initial support for ZCU106 development board
2022-05-14 02:48:23 -06:00
b60f37b56d
Support for the Papilio One board
2022-03-25 21:44:05 +01:00
3cef7f920d
board: Xilinx ZCU102
2022-03-19 10:08:51 +01:00
3210bcd9cb
Merge pull request #194 from infphyny/qmtech_5cefa5f23
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Add qmtechCycloneV_5cefa5f23 board and spiOverJtag/spiOverJtag_5cefa5…
2022-03-13 15:25:01 +01:00
2ed5eb5eec
Rename 5cefa5f23 to 5ce523, add documentation for board and fpga
2022-03-13 09:14:52 -04:00
7b36bdc893
Add qmtechCycloneV_5cefa5f23 board and spiOverJtag/spiOverJtag_5cefa5f23.rbf.gz bitstream to write flash
2022-03-12 09:25:22 -05:00
15fb5ac591
board: PYNQ-Z2
2022-03-12 14:54:24 +01:00
259914910f
board: Xilinx ZC706
2022-03-10 18:53:41 +01:00
28ebc98b1b
board: add CERN SPEC150
2022-03-03 15:40:42 +01:00
3cfdfb1856
Update board.hpp
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Use default cable. This is equivalent to 6MHz setting, albeit more versatile.
2022-02-21 23:05:37 -04:00
d4e8eef676
Add board and cable defaults for genesys2
2022-02-21 08:11:57 +00:00
7a7f1723ea
add support for colorlight-i9
2022-02-20 01:41:17 +01:00
6059c9dbfb
Remove the Tigard default cable, as the board does not have an on-board JTAG adapter.
2022-02-19 17:14:49 +10:30
7022e2101a
Add support for the QMTech Kintex7 Core Board
2022-02-19 14:22:55 +10:30
905e96dfec
Add digilent_zybo_z7 10/20 support
2022-02-15 21:01:11 -08:00
5aa34c6364
board: add Terasic DE1-SoC board
2022-02-09 17:22:38 +01:00
350570ad2d
board: add tangnano1k to board_list
2022-01-28 13:53:33 +02:00
db407a4263
adding xilinx AC701 development kit
2022-01-26 16:42:03 +01:00
f30cca46d8
no dash for zedboard fpga name
2022-01-26 16:29:35 +01:00
0d1905425c
add board zc702 in board.hpp
2022-01-26 16:21:52 +01:00
acf677dd46
tangnano9k: new board, with the same cable w/ tangnano4k
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-22 20:51:05 +08:00
ecc76baa97
board: alinx AXU2CGA
2022-01-13 08:55:26 +01:00
ce7f4566c3
board: ulx3s_dfu
2021-12-24 18:10:22 +01:00
fefea9fe8e
board: generic FTDI SPI
2021-12-22 19:12:02 +01:00
56a1e0310d
board: add arty S7 50
2021-12-21 18:21:39 +01:00
03c7d7faad
arty A7 100t support
2021-12-21 07:02:48 +01:00
f3e9a9fa6d
digilent_arty_z7 10/20 support
2021-12-20 18:10:17 +01:00
e026aa28c7
Digilent arty s7 25
2021-12-19 17:35:23 +01:00
18349fb6e8
efinix: add support for Titanium Ti60 f225 dev kit
2021-12-13 22:13:29 +01:00
d09e5da0ba
colognechip integration: initial commit
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This commit adds support for the Cologne Chip GateMate FPGA series. Both
Evaluation Board and Programmer Cable are supported. Configurations can be
loaded into the FPGA with both devices via JTAG or SPI. In addition to
reading/writing data from/to flashes directly via SPI, this can also be done
via the built-in JTAG-SPI-bypass. A direct wiring between programming hardware
and flash is no longer necessary in this case.
Signed-off-by: Patrick Urban <patrick.urban@web.de>
2021-12-10 12:12:32 +01:00
7ceaab0126
spiOverJtag: add bitstream for ECP4CE15F23
2021-11-28 16:51:42 +01:00
7ed432cba2
board: add QMTECH Cyclone IV Core Board
2021-11-14 08:45:11 +01:00
f843dc2eb2
ch552_jtag: driver for ch552_jtag firmware (ft2232c clone)
2021-11-06 10:33:25 +01:00
649554f3fd
efinix: add jtag support, introduce oe_pin in board configuration, add xyloni jtag interface
2021-10-23 08:44:23 +02:00
7d8c8b2dcb
Add Trion T120 BGA 576 Dev Kit support.
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This Dev Kit uses a FT2232 chip, so also rename efinix_spi with efinix_spi_ft4232
and introduce efinix_spi_ft2232.
2021-10-15 09:20:36 +02:00
e6c01f75ad
board: fix altsetting default for non-DFU boards, use signed type
2021-10-03 18:31:55 +02:00
a38d0b2d36
board: force 0 for altsetting in non-DFU type
2021-10-03 15:23:21 +02:00
144e376d36
board: add support for 1bitsquared iCEBreaker-bitsy
2021-10-03 12:42:35 +02:00
ea613fa97a
dfu/main: add args to select altsetting and add filter to select corresponding interface
2021-10-03 12:39:06 +02:00
11bdebd884
adding reference to Tang Nano 4K kit in doc
2021-09-02 13:54:34 +02:00
b8e2939776
board: add vid/pid for DFU at board level
2021-07-17 08:34:44 +02:00
894cda820f
board: add default frequency option for BITBANG and SPI boards
2021-07-14 08:05:36 +02:00
797785ce93
Allow board configuration table to contain a default clock speed (as some boards are known to work at higher speeds safely). Move Digilent Arty to 10MHz (tested).
2021-07-11 15:20:15 +01:00
Dvir Cohen
Bastian Löher
Hirosh Dabui
Gwenhael Goavec-Merou
Mike Lewis
Stephan Ruloff
Stéphane Chevigny
Torsten Reuschel
jonathan kimmitt
Rod Whitby
Hansem Ro
TG
Verneri Hirvonen
Fabien Marteau
Icenowy Zheng
Franck Jullien
Patrick Urban
Florent Kermarrec
ultraembedded