Merge pull request #194 from infphyny/qmtech_5cefa5f23
Add qmtechCycloneV_5cefa5f23 board and spiOverJtag/spiOverJtag_5cefa5…
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3210bcd9cb
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@ -76,6 +76,7 @@ Intel:
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- Description: Cyclone V E
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Model:
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- 5CEA2
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- 5CEA5
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- 5CEBA4
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URL: https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-v.html
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Memory: OK
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@ -361,6 +361,13 @@
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Memory: OK
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Flash: OK
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- ID: qmtechCycloneV_5ce523
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Description: QMTech CycloneV Core Board
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URL: https://fr.aliexpress.com/item/1005001782703399.html
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FPGA: Cyclone V 5CEFA5F23I7
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Memory: OK
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Flash: OK
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- ID: qmtechKintex7
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Description: QMTech Kintex7 Core Board
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URL: https://www.aliexpress.com/item/1005003668804223.html
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@ -397,7 +404,7 @@
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Flash: NA
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- ID: SPEC150
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Description: CERN Simple PCIe FMC carrier SPEC
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Description: CERN Simple PCIe FMC carrier SPEC
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URL: https://ohwr.org/project/spec150/wikis/home
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FPGA: Spartan6 xc6slx150Tfgg484
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Memory: OK
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@ -6,7 +6,7 @@ XILINX_PARTS := xc6slx16ftg256 xc6slx16csg324 xc6slx45csg324 xc6slx100fgg484 \
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xc7k325tffg676 xc7k325tffg900
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XILINX_BIT_FILES := $(addsuffix .bit.gz,$(addprefix spiOverJtag_, $(XILINX_PARTS)))
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ALTERA_PARTS := 10cl025256 ep4ce2217 ep4ce1523 5ce223 5ce423
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ALTERA_PARTS := 10cl025256 ep4ce2217 ep4ce1523 5ce223 5ce423 5ce523
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ALTERA_BIT_FILES := $(addsuffix .rbf.gz, $(addprefix spiOverJtag_, $(ALTERA_PARTS)))
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BIT_FILES := $(ALTERA_BIT_FILES) $(XILINX_BIT_FILES)
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@ -99,6 +99,7 @@ else:
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"ep4ce2217" : "EP4CE22F17C6",
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"ep4ce1523" : "EP4CE15F23C8",
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"5ce223" : "5CEFA2F23I7",
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"5ce523" : "5CEFA5F23I7",
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"5ce423" : "5CEBA4F23C8",
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"5cse423" : "5CSEMA4U23C6",
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"5cse623" : "5CSEBA6U23I7"}[part]
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Binary file not shown.
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@ -161,6 +161,7 @@ static std::map <std::string, target_board_t> board_list = {
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DFU_BOARD("orangeCrab", "", "dfu", 0x1209, 0x5af0, 0),
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JTAG_BOARD("qmtechCycloneIV", "ep4ce1523", "", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("qmtechCycloneV", "5ce223", "", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("qmtechCycloneV_5ce523", "5ce523", "", 0,0, CABLE_DEFAULT),
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JTAG_BOARD("qmtechKintex7", "xc7k325tffg676", "", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("genesys2", "xc7k325tffg900", "digilent_b", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("pynq_z2", "xc7z020clg400", "ft2232", 0, 0, CABLE_DEFAULT),
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