board: alinx AXU2CGA

This commit is contained in:
Gwenhael Goavec-Merou 2022-01-13 08:55:26 +01:00
parent 904bf46315
commit ecc76baa97
2 changed files with 8 additions and 0 deletions

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@ -72,6 +72,13 @@
Memory: OK
Flash: NT
- ID: axu2cga
Description: Alinx AXU2CGA Zynq MPSoC Dev Board
URL: http://www.alinx.com/en/index.php/default/content/101.html
FPGA: ZynqMPSoC XCZU2CG
Memory: OK
Flash: NA
- ID: basys3
Description: Digilent Basys3
URL: https://reference.digilentinc.com/reference/programmable-logic/basys-3/start

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@ -112,6 +112,7 @@ static std::map <std::string, target_board_t> board_list = {
JTAG_BOARD("arty_s7_50", "xc7s50csga324", "digilent", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("arty_z7_10", "xc7z010clg400", "digilent", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("arty_z7_20", "xc7z020clg400", "digilent", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("axu2cga", "xczu2cg", "", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("basys3", "xc7a35tcpg236", "digilent", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("nexysVideo", "xc7a200tsbg484", "digilent_b", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("kc705", "", "digilent", 0, 0, CABLE_DEFAULT),