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ngspice
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5,844 Commits 174 Branches 62 Tags 72 MiB
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5844 Commits

Author SHA1 Message Date
Holger Vogt 2b444a3423 remove unused parameters VDMOS_VBS/VBD and VDMOS_CAPBD/BS/GS/GD/GB 2018-05-04 20:34:51 +02:00
Holger Vogt 33a68b7321 return only half of the capacitance cgs and cgd 2018-05-04 20:34:50 +02:00
Holger Vogt 8f1b63c273 update of status 2018-05-04 20:34:49 +02:00
Holger Vogt d23ef75059 example with weak inversion comparison 2018-05-04 20:34:48 +02:00
Holger Vogt 4b78c0bc93 subthres for same example files added 
(not yet calibrated with LTSPICE subthres parameter)
 2018-05-04 20:34:48 +02:00
Holger Vogt 62297b2450 add weak inversion current capability 
calibration of parameter subthres with LTSPICE is still missing.
 2018-05-04 20:34:47 +02:00
rlar 013d70681f drop vdmos-1.el 2018-05-04 20:34:46 +02:00
rlar ce2e704f56 up, where to ? fixme, there are more ... 2018-05-04 20:34:45 +02:00
rlar ede0fb1caa cleanup 2018-05-04 20:34:44 +02:00
Holger Vogt eb552858e4 update of status 2018-05-04 20:34:43 +02:00
Holger Vogt 4a3c707036 add parallel resistor rds (between outer drain and source nodes, parallel to bulk diode) 2018-05-04 20:34:42 +02:00
Holger Vogt b7c6145f5e rename the device multiplier m to mu, not to mix it up with the Body diode grading coefficient m 2018-05-04 20:34:41 +02:00
Holger Vogt 7d2daf2025 make nodes 3 and 4 the same 2018-05-04 20:34:40 +02:00
Holger Vogt c5f47d3c1b Error message and exit if a vdmos device instance 
has different source and bulk node (have to be the same).
 2018-05-04 20:34:40 +02:00
Holger Vogt b13675ea44 remove unused code to calculate bulk-source and bulk-drain capacitors has been replaced already by capacitor from parallel bulk diode 2018-05-04 20:34:39 +02:00
Holger Vogt 5f3957ba6f update the examples for final vdmos model version 2018-05-04 20:34:38 +02:00
Holger Vogt e706098725 update to README.vdmos, actual status 2018-05-04 20:34:37 +02:00
Holger Vogt f9b66af074 add the mtriode parameter scale the triode region independently from saturation current 2018-05-04 20:34:36 +02:00
Holger Vogt 3b38624233 examples for mtriode parameter 2018-05-04 20:34:35 +02:00
Holger Vogt 40fe11db07 Body diode grading coefficient is m, not mj 2018-05-04 20:34:34 +02:00
Holger Vogt c38877a00c example input files for vdmos 2018-05-04 20:34:33 +02:00
Holger Vogt 2f719f7401 function 'inp_vdmos_model' to process vdmos model lines towards ngspice compatibility 2018-05-04 20:34:32 +02:00
Holger Vogt f3478d7f13 re-format code 2018-05-04 20:34:31 +02:00
Holger Vogt 9d00a9e28d re-format code (whitespace only) 2018-05-04 20:34:31 +02:00
Holger Vogt 45f52c859b enable breakdown capability of parallel bulk diode 2018-05-04 20:34:30 +02:00
Holger Vogt 2bf70fa259 add matrix entries for bulk diode 2018-05-04 20:34:29 +02:00
Holger Vogt 28d393950d update status 2018-05-04 20:34:28 +02:00
Holger Vogt bfec119e5b Use better name for some parameters, cosmetics 2018-05-04 20:34:27 +02:00
Holger Vogt 4ac7a641ec diode model for bulk diode added code taken from dio.c etc. capacitance calculation for vdmos bulk cap removed, is now completely with the diode. An internal node added for series diode resistance RB 
matrix entries not yet done!
 2018-05-04 20:34:26 +02:00
Holger Vogt 1ce7fef519 missing model parameters added 2018-05-04 20:34:25 +02:00
Holger Vogt a4dc84ae35 missing model parameters added 2018-05-04 20:34:24 +02:00
Holger Vogt 0dc0aa06c4 re-introdeuce parameter phi Resulting temperature dependency of vto still not available 2018-05-04 20:34:24 +02:00
Holger Vogt 070b448420 A short description of the contants of this branch 2018-05-04 20:34:23 +02:00
Holger Vogt 5b8c8072f3 mobility and substrate related parameters and equations removed 2018-05-04 20:34:22 +02:00
Holger Vogt 9df45731e9 depl cap calculation removed 2018-05-04 20:34:21 +02:00
Holger Vogt 0a213bea1a more on removing the sidewall capacitance 2018-05-04 20:34:20 +02:00
Holger Vogt ef547eb8ff sidewall capacitance calculation removed 2018-05-04 20:34:19 +02:00
Holger Vogt 7df59a750e useful parameter declarations moved to stay 2018-05-04 20:34:18 +02:00
Holger Vogt 0ebb7348ca remove drain and source resistance contributions 2018-05-04 20:34:18 +02:00
Holger Vogt 84005efe8b lateral diffusion and overlap capacitance removed 2018-05-04 20:34:17 +02:00
Holger Vogt e0ddc38519 default transconductance parameter kp set to 1 2018-05-04 20:34:16 +02:00
Holger Vogt e9e621de07 remove effective channel length, replace by l 2018-05-04 20:34:15 +02:00
Holger Vogt 47ef2bfaff remove unused parameters VDMOS_MOD_VTO 2018-05-04 20:34:14 +02:00
Holger Vogt d1497d8270 rename parameter "pb" --> "vj" 2018-05-04 20:34:13 +02:00
Holger Vogt 9c1b403f79 remove Gate.*OverlapCap 2018-05-04 20:34:12 +02:00
Holger Vogt dee9dc370f default m, W, L = 1 2018-05-04 20:34:11 +02:00
Holger Vogt 1aa3196ed9 another re-formatting for better readability (whitespace only) 2018-05-04 20:34:10 +02:00
Holger Vogt d63123a269 gate resistance und gate conductance added, prime gate node added, not yet o.k. when rg is set, probably wrong signedness 2018-05-04 20:34:09 +02:00
Holger Vogt 40b9b18b01 gate conductance added 2018-05-04 20:34:09 +02:00
Holger Vogt e0734a3ade re-format for better readability 2018-05-04 20:34:08 +02:00