gate conductance added

This commit is contained in:
Holger Vogt 2018-04-02 20:10:36 +02:00 committed by rlar
parent e0734a3ade
commit 40b9b18b01
5 changed files with 22 additions and 0 deletions

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@ -95,6 +95,7 @@ IFparm VDMOSmPTable[] = { /* model parameters */
IOP("lambda",VDMOS_MOD_LAMBDA,IF_REAL, "Channel length modulation"),
IOP("rd", VDMOS_MOD_RD, IF_REAL, "Drain ohmic resistance"),
IOP("rs", VDMOS_MOD_RS, IF_REAL, "Source ohmic resistance"),
IOP("rg", VDMOS_MOD_RG, IF_REAL, "Gate ohmic resistance"),
/*
Cjo Zero-bias body diode junction capacitance
Is Body diode saturation current

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@ -57,6 +57,7 @@ typedef struct sVDMOSinstance {
double VDMOSsourcePerimiter;
double VDMOSsourceConductance; /*conductance of source(or 0):set in setup*/
double VDMOSdrainConductance; /*conductance of drain(or 0):set in setup*/
double VDMOSgateConductance; /*conductance of gate(or 0):set in setup*/
double VDMOStemp; /* operating temperature of this instance */
double VDMOSdtemp; /* operating temperature of the instance relative to circuit temperature*/
@ -284,6 +285,7 @@ typedef struct sVDMOSmodel { /* model structure for a resistor */
double VDMOSjctSatCur; /* input - use tSatCur */
double VDMOSdrainResistance;
double VDMOSsourceResistance;
double VDMOSgateResistance;
double VDMOSsheetResistance;
double VDMOStransconductance; /* input - use tTransconductance */
double VDMOSgateSourceOverlapCapFactor;
@ -320,6 +322,7 @@ typedef struct sVDMOSmodel { /* model structure for a resistor */
unsigned VDMOSjctSatCurGiven :1;
unsigned VDMOSdrainResistanceGiven :1;
unsigned VDMOSsourceResistanceGiven :1;
unsigned VDMOSgateResistanceGiven :1;
unsigned VDMOSsheetResistanceGiven :1;
unsigned VDMOStransconductanceGiven :1;
unsigned VDMOSgateSourceOverlapCapFactorGiven :1;
@ -391,6 +394,7 @@ enum {
VDMOS_MOD_LAMBDA,
VDMOS_MOD_RD,
VDMOS_MOD_RS,
VDMOS_MOD_RG,
VDMOS_MOD_CBD,
VDMOS_MOD_CBS,
VDMOS_MOD_IS,

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@ -45,6 +45,9 @@ VDMOSmAsk(CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
case VDMOS_MOD_RS:
value->rValue = model->VDMOSsourceResistance;
return(OK);
case VDMOS_MOD_RG:
value->rValue = model->VDMOSgateResistance;
return(OK);
case VDMOS_MOD_CBD:
value->rValue = model->VDMOScapBD;
return(OK);

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@ -47,6 +47,10 @@ VDMOSmParam(int param, IFvalue *value, GENmodel *inModel)
model->VDMOSsourceResistance = value->rValue;
model->VDMOSsourceResistanceGiven = TRUE;
break;
case VDMOS_MOD_RG:
model->VDMOSgateResistance = value->rValue;
model->VDMOSgateResistanceGiven = TRUE;
break;
case VDMOS_MOD_CBD:
model->VDMOScapBD = value->rValue;
model->VDMOScapBDGiven = TRUE;

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@ -327,6 +327,16 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
} else {
here->VDMOSsourceConductance = 0;
}
if (model->VDMOSgateResistanceGiven) {
if (model->VDMOSgateResistance != 0) {
here->VDMOSgateConductance = here->VDMOSm /
model->VDMOSgateResistance;
} else {
here->VDMOSgateConductance = 0;
}
} else {
here->VDMOSgateConductance = 0;
}
}
}
return(OK);