This commit is contained in:
rlar 2018-04-14 17:42:32 +02:00
parent eb552858e4
commit ede0fb1caa
4 changed files with 4 additions and 34 deletions

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@ -91,6 +91,7 @@ IFparm VDMOSmPTable[] = { /* model parameters */
IOP("rd", VDMOS_MOD_RD, IF_REAL, "Drain ohmic resistance"),
IOP("rs", VDMOS_MOD_RS, IF_REAL, "Source ohmic resistance"),
IOP("rg", VDMOS_MOD_RG, IF_REAL, "Gate ohmic resistance"),
IOP("mtriode", VDMOS_MOD_MTRIODE, IF_REAL, "Conductance multiplier in triode region"),
/* body diode */

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@ -155,8 +155,10 @@ VDMOSdSetup(GENmodel *inModel, CKTcircuit *ckt)
double d3vondvbs3;
dvondvbs = d2vondvbs2 = d3vondvbs3 = 0.0;
vgst=(here->VDMOSmode==1?vgs:vgd);
vdsat=MAX(vgst,0);
if (vgst <= 0) {
/*
* cutoff region
@ -280,8 +282,6 @@ VDMOSdSetup(GENmodel *inModel, CKTcircuit *ckt)
/* von, vgst and vdsat have already been adjusted for
possible source-drain interchange */
phi = here->VDMOStPhi;
cox = 0;/*FIXME: can we do disto without knowing the oxide thickness?*/
if (vgst <= -phi) {

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@ -87,9 +87,6 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
vt = CONSTKoverQ * here->VDMOStemp;
Check = 1;
/*
*/
/* first, we compute a few useful values - these could be
* pre-computed, but for historical reasons are still done
@ -111,7 +108,6 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
* share some code, so we put them first - others later on
*/
if ((ckt->CKTmode & (MODEINITFLOAT | MODEINITPRED | MODEINITSMSIG
| MODEINITTRAN)) ||
((ckt->CKTmode & MODEINITFIX) && (!here->VDMOSoff))) {
@ -189,9 +185,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
here->VDMOScbd +
here->VDMOSgbd * delvbd +
here->VDMOSgbs * delvbs;
/*
*/
#ifndef NOBYPASS
/* now lets see if we can bypass (ugh) */
@ -253,9 +247,6 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
}
#endif /*NOBYPASS*/
/*
*/
/* ok - bypass is out, do it the hard way */
@ -294,9 +285,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
vbs = vbd + vds;
}
#endif /*NODELIMITING*/
/*
*/
} else {
@ -321,9 +310,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
vbs = vgs = vds = 0;
}
}
/*
*/
/*
* now all the preliminaries are over - we can start doing the
@ -353,9 +340,6 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
/* inverse mode */
here->VDMOSmode = -1;
}
/*
*/
{
/*
@ -411,19 +395,14 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
here->VDMOSgmbs = here->VDMOSgm * arg;
}
}
/*
* finished
*/
}
/*
*/
/* now deal with n vs p polarity */
here->VDMOSvon = model->VDMOStype * von;
here->VDMOSvdsat = model->VDMOStype * vdsat;
/* line 490 */
/*
* COMPUTE EQUIVALENT DRAIN CURRENT SOURCE
*/
@ -438,14 +417,9 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
*(ckt->CKTstate0 + here->VDMOSqbd) = 0;
here->VDMOScapbd = 0;
/*
*/
}
/* save things away for next time */
*(ckt->CKTstate0 + here->VDMOSvbs) = vbs;
@ -453,9 +427,6 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
*(ckt->CKTstate0 + here->VDMOSvgs) = vgs;
*(ckt->CKTstate0 + here->VDMOSvds) = vds;
/*
*/
/*
* vdmos capacitor model
@ -593,7 +564,6 @@ bypass :
/*
* load y matrix
*/
*(here->VDMOSDdPtr) += (here->VDMOSdrainConductance + here->VDMOSdsConductance);
*(here->VDMOSGgPtr) += (here->VDMOSgateConductance); //((gcgd + gcgs + gcgb));
*(here->VDMOSSsPtr) += (here->VDMOSsourceConductance + here->VDMOSdsConductance);

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@ -219,7 +219,6 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
here->VDIOtJctCap *= 1 + here->VDIOtGradingCoeff*
(400e-6*(here->VDMOStemp - REFTEMP) - gmanew);
here->VDIOtSatCur = model->VDIOjctSatCur * exp(
((here->VDMOStemp / model->VDMOStnom) - 1) *
model->VDMOSDeg / (model->VDMOSDn*vt) +