A short description of the contants of this branch
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README for VDMOS model in NGSPICE
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==================
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A simmple MOS model for vertical power transistors (VDMOS model) is under
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development. Originally it has been available in LTSPICE
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(see http://ltwiki.org/LTspiceHelp/LTspiceHelp/M_MOSFET.htm) or
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SuperSpice (https://www.anasoft.co.uk/MOS1Model.htm).
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It is based on the MOS1 model. The Meyer capacitance has been
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replaced by a special cap model. A body diode with series
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resistance is parallel to the D/S device nodes. It defines the
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reverse behavior, but also the breakdown of the transistor.
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This is a work in progress.
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Basic current equations for ac, dc and tran operations are
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available as well as the capacitance model. Still missing is the
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body diode and the subthreshold behavior.
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