67fbaa9e6aMake the name of the added voltage source more verbose (to avoid already existing source names).
pre-master-47
Holger Vogt
2026-06-12 17:38:07 +0200
1ff2ae384eFix Bug #775 - "Missing LDFLAGS in vlnggen", and add an option (-stc c++14) that was needed in testing on Windows.
Giles Atkinson
2026-06-09 11:15:28 +0100
aca07bbe6dFeature Request 72 - "Printing hidden errors to terminal" suggests showing errors in XSPICE code model support functions by default. But errors may occur routinely and be handled by code. To aid developers, setting variable "noisyxspice" will display the messages.
Giles Atkinson
2026-05-07 18:54:12 +0100
65b0133591Add new capabilities to the adc/dac_bridge XSPICE code models. If either bridge has a single analog connection and two or more digital connections it will act as a conventional multi-bit ADC or DAC. When the low threshold is higher than the high threshold, adc_bridge acts as a Schmitt trigger.
Giles Atkinson
2024-11-04 18:24:04 +0000
34cf37e190Simplify adc_bridge, also removing excess white space.
Giles Atkinson
2024-10-07 09:54:03 +0100
3db9f132a2New behavioral capacitor model: - Replace E source by G source with parallel resistor to improve convergence. - Add parallel resistor to avoid floating nodes - Reduce refecrence C to 1u (and thus the max. current).
Holger Vogt
2026-06-12 16:43:58 +0200
ebdcdebc6dFix Bug #775 - "Missing LDFLAGS in vlnggen", and add an option (-stc c++14) that was needed in testing on Windows.
ga_dev
Giles Atkinson
2026-06-09 11:15:28 +0100
aedd8fc2a2Feature Request 72 - "Printing hidden errors to terminal" suggests showing errors in XSPICE code model support functions by default. But errors may occur routinely and be handled by code. To aid developers, setting variable "noisyxspice" will display the messages.
Giles Atkinson
2026-05-07 18:54:12 +0100
b649ab78b9Add new capabilities to the adc/dac_bridge XSPICE code models. If either bridge has a single analog connection and two or more digital connections it will act as a conventional multi-bit ADC or DAC. When the low threshold is higher than the high threshold, adc_bridge acts as a Schmitt trigger.
Giles Atkinson
2024-11-04 18:24:04 +0000
5a53a2ecd2Simplify adc_bridge, also removing excess white space.
Giles Atkinson
2024-10-07 09:54:03 +0100
65fb8e245bPrepare for ngspice-47
Holger Vogt
2026-06-09 22:38:13 +0200
21907e5bf7Add error message if scale and data vector lengths do not match
Holger Vogt
2026-06-09 17:57:39 +0200
5228de8325Define a pre-processor flag HCI_FS1 set and used to identify the model specific code.
hv_degradation_integrated_4
Holger Vogt
2026-06-09 11:47:19 +0200
3d02373664DEVpred() of charge node needs state vector update before
dwarning
2026-06-09 08:08:41 +0200
f395bc49b2Update the copyright notice
Holger Vogt
2026-06-08 22:41:46 +0200
cb50f46129Add variable deginstance to select between subcircuit model and instance model for MOS transitor under degradation.
Holger Vogt
2026-06-08 20:37:37 +0200
461ab8c46aReplace lengthy call to CKTcircuit by new TSTOP and TSTEP macros
Holger Vogt
2026-06-07 19:22:40 +0200
007453ef89Set TSTEP and TSTOP also when MIF_DC, as this is needed when initialising a code model during op before a tran sim.
Holger Vogt
2026-06-07 19:21:19 +0200
6af77571e6To achieve convergence, 1 Ohm resistor on source side for current measurement, 1 Ohm resistor in series to gate node with parallel current source.
Holger Vogt
2026-05-25 16:12:18 +0200
5dd666d5b0Replace B source by F source (CCCS)
Holger Vogt
2026-03-10 12:53:15 +0100
ee4f42aba9Select deg per instance
Holger Vogt
2026-02-28 17:26:22 +0100
33e1735a21Re-enter option to compile with subcircuit support instead of delvto and factuo.
Holger Vogt
2026-02-20 13:46:53 +0100
cd313c2ea0Negative output in case of PMOS
Holger Vogt
2026-02-20 13:44:19 +0100
1ee936cce1Add variables deg_tfuture deg_limits to allow users setting lower limits of deg parameters and the extrapolation time in .spiceinit.
Holger Vogt
2026-02-19 11:42:07 +0100
46c52a5436Add command 'plainsim' to example.
Holger Vogt
2026-02-17 15:47:38 +0100
c2e306333eAdd parameter 'type' to .agemodel data to determine if NMOS or PMOS. Still the model name is scanned for _pmos or _nmos, but as this is IHP specific, type will be available as well.
Holger Vogt
2026-02-17 15:47:07 +0100
fb17cf1f39Add 'factuo' as redundandant synonym to 'mulu0' to enable degradation simulation with BSIM3 and BSIM4.
Holger Vogt
2026-02-17 12:53:10 +0100
08d6efea51Compatmode 'de' to control all degradation sim procedures. Differentiate between commands degsim: remove circuit, reload from storage, remove deg monitors, add instance deg parameters, used to prepare for simulation with degraded devices, and plainsim: remove circuit, reload from storage, remove deg monitors, no change to instances instance used to prepare for plain simulation without degradation.
Holger Vogt
2026-02-16 21:37:21 +0100
9f6df24505Add a command 'plainsim': Throw out the circuit struct, recreate it from the local storage, remove the deg monitors, no change to device instances.
Holger Vogt
2026-02-16 21:32:39 +0100
79848e5666Add printout of number of degraded devices Switch from adding extra B and V sources to using instance parameters delvto and factuo. Availability with BSIM4 has to be checked!
Holger Vogt
2026-02-15 00:48:30 +0100
c41aa13d88Add a limit 1e-6 to the degradation parameters, otherwise set to 0 Remove debug printout
Holger Vogt
2026-02-15 00:45:40 +0100
86fc365db1Add version with truncated models to debug-out3.txt
Holger Vogt
2026-02-15 00:44:29 +0100
92d70544c7Add function to delete the result hash table. Not yet used.
Holger Vogt
2026-02-14 12:34:20 +0100
bb013eef4eFunction add_degmodel() adds the degradation model to the netlist Add a 0 voltage source between internal and external source for current measurement. Add a B source parallel to drain and source for current reduction. Use the mean of d_idlin (result[1]) and d_idsat (result[2]) as proportional factor to current. Add a voltage source between external and internal gate to apply dlt_vth shift from result[0]
Holger Vogt
2026-02-13 16:59:06 +0100
dbe0f704edIf transistor instance is at top level, there will be no colon in the model name.
Holger Vogt
2026-02-13 16:56:00 +0100
d6b4ef5913Move setting up OMP from CKTsetup() to inp_readall(). Add a check for abvailable logical CPU cores, and use half of them as default.
Holger Vogt
2026-02-11 20:15:57 +0100
a5cb0d585cUse hash table modtabhash for finding model instead of linked list modtab. This speeds up parsing of (a large number of) code models enormously.
Holger Vogt
2026-02-11 20:13:13 +0100
d5c062d9cbCode model: Put the monitored degradation data onto the heap and into the hash table. prepare_degsim(): Re-read the netlist, remove the monitors, get the device instance name. Retrieve the degradation data from the result hash table.
Holger Vogt
2026-02-09 17:01:19 +0100
bb6a28a6b9Add a command 'degsim' to reset the circuit, remove the monitors, and add the degradation model to each degraded device. Use function preparedegsim() to add the model with parameters from degdatahash.
Holger Vogt
2026-02-08 15:47:04 +0100
e4f912718fAdd a hash table to store the degradation monitor results per instance.
Holger Vogt
2026-01-29 23:19:58 +0100
13fc973d01Add global has pointer for degradation data storage per instance, inizialse it.
Holger Vogt
2026-01-26 16:16:15 +0100
99e31de957Don't read .agemodel, if newcompat.de is not set.
Holger Vogt
2026-01-26 16:15:01 +0100
fa2a60e8f5Replace '[' and ']' by '@' Required by code model parsing, when [ or ] are part of instance or node name.
Holger Vogt
2026-01-26 14:12:51 +0100
d2918bab66Add non-nqs PSP model
Holger Vogt
2026-01-14 12:05:26 +0100
8f9ecc7c32Add device type (nmos, pmos), derived from model name. Invert PMOS voltages (pmos still in error though). Output monitor now watches id_lin integral.
Holger Vogt
2025-12-08 15:16:55 +0100
5387c8e609Enable using hashtables also for compiling with gcc.
Holger Vogt
2025-09-28 21:47:31 +0200
5eef90103bAdd a pre-processor flag XSPICECM during compilation of the xtradev code models. This allows some settings in hash.c, e.g. replacing fprintf functions not available in a code model.
Holger Vogt
2025-09-28 21:46:49 +0200
39aa1ec1beRead the hash table with the aging model parameters. Store the data in the static loc parameters used during function evaluation.
Holger Vogt
2025-09-28 15:51:25 +0200
f149f7a506Add a hash table paramhash to store the .agemodel model parameters.
Holger Vogt
2025-09-28 15:44:31 +0200
c511f44cd0Enable compiling hash.c as part of a code model shared library.
Holger Vogt
2025-09-28 15:42:59 +0200
d2e41568dbgetdata() Add model selection Add preliminary parameter selection (still requires the correct sequence of parameters).
Holger Vogt
2025-09-24 16:47:50 +0200
ce1be7639fRemove now unused parameters
Holger Vogt
2025-09-24 16:44:04 +0200
b164448e24Specify static locdata containing constfac, sintegral and prevtime instead of individual data.
Holger Vogt
2025-09-16 16:34:11 +0200
bd6b0be4a3Add function cm_get_deg_params(void) to obtain the set of gegeneration model püarameters stored in struct agemods.
Holger Vogt
2025-09-16 12:39:21 +0200
5827715db1simple netlist example with agemodel data.
Holger Vogt
2025-09-13 17:57:44 +0200
48cbcfe3dbRead the agemodel data, put them into global array agemods
Holger Vogt
2025-09-13 17:56:39 +0200
d263fba97eAlways call the function. Inside it will be decided, depending on not having ngbehavior=de, to disregard the agemodels.
Holger Vogt
2025-09-13 17:54:25 +0200
e74b7e67f4Add function readdegparams in file inpdeg.c
Holger Vogt
2025-08-27 23:56:44 +0200
1bca7095c8Add a compatibility mode 'de' for degradation simulation.
Holger Vogt
2025-08-25 10:59:02 +0200
5af898f2fbAdd INSTNAME and INSTMODNAME to code model macros
Holger Vogt
2025-08-20 19:42:14 +0200
1b1a8d6f15Scale function for *constfac, scale Boltzmann. Add *prevtime to allow checking for final time, and to avoid double acces to deg evaluation. Add missing parameter L. If other than 4 nodes, bail out.
Holger Vogt
2025-08-16 15:40:43 +0200
1cad3f0085Use real parameters as default (NMOS 0.13 saturation)
Holger Vogt
2025-08-16 15:27:30 +0200
ef63c61521Add degradation monitor code model to extradev
Holger Vogt
2025-08-16 09:26:24 +0200
f2805e15fbAdd two macros TSTEP and TSTOP to XSPICE
Holger Vogt
2025-08-16 09:24:45 +0200
fad198de7bImprove the error messages when reading a state file. Bail out when the read has not been successfull.
Holger Vogt
2026-06-06 16:15:24 +0200
58c312f733Add MODEDCTRANCURVE to enable returning capacitance upon dc sweep. Exclude integration if MODEDCTRANCURVE is active (forward, self-heat and reverse diode)..
Holger Vogt
2026-06-06 14:36:06 +0200
2a0a3ab403Add MODEDCTRANCURVE to enable returning capacitance upon dc sweep. Exclude integration if MODEDCTRANCURVE is active.
Holger Vogt
2026-06-06 14:34:52 +0200
ae06dfe978No integration, if dc sweep is to return cpacitances
Holger Vogt
2026-06-06 14:33:05 +0200
88e94b26c4Reset ckt->CKTag[0] and ckt->CKTag[1] upon successful return from transient simulation.
Holger Vogt
2026-06-03 16:40:45 +0200
507351ae01A digital NAND gate 9-stage ring oscillator (less than 30ms simulation time)
Holger Vogt
2026-06-06 14:26:25 +0200
b1717822d2Revert "A digital NAND gate 9-stage ring oscillator (less than 30ms simulation time)"
Holger Vogt
2026-06-06 12:46:43 +0200
2ef046704eA digital NAND gate 9-stage ring oscillator (less than 30ms simulation time)
Holger Vogt
2026-06-03 16:40:45 +0200
72620328a1Excluded integration during self-heating as well.
Holger Vogt
2026-06-01 19:48:50 +0200
d029ed02dbDiode: No integration if dc sweep, but keep calculating capacitances
Holger Vogt
2026-06-01 11:02:45 +0200
973b6b6d49No integration if dc sweep, but keep calculating capacitances
Holger Vogt
2026-05-31 15:57:26 +0200
02aa3418c7Added a text file that explains the 2 modifications I made.
jfisher/osdi-fixes
Justin Fisher
2026-05-27 10:21:34 +0200
009900c27aAdd pre_osdi alias and set sourcepath case preservation
Justin Fisher
2026-05-02 22:29:52 +0200
e53325583bDon't check for tperiod, which is not used when the distributed pulse is applied.
Holger Vogt
2026-05-26 16:02:36 +0200
037b6578f8gain cell as an example for the declarative small signal noise approach
master
Holger Vogt
2026-05-24 09:58:53 +0200