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remove drain and source resistance contributions

This commit is contained in:
Holger Vogt 2018-04-04 10:26:02 +02:00 committed by rlar
parent 84005efe8b
commit 0ebb7348ca
10 changed files with 4 additions and 167 deletions
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7
src/spicelib/devices/vdmos/vdmos.c
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@ -15,12 +15,6 @@ IFparm VDMOSpTable[] = { /* parameters */
IOPU("m", VDMOS_M, IF_REAL, "Multiplier"),
IOPU("l", VDMOS_L, IF_REAL, "Length"),
IOPU("w", VDMOS_W, IF_REAL, "Width"),
IOPU("ad", VDMOS_AD, IF_REAL, "Drain area"),
IOPU("as", VDMOS_AS, IF_REAL, "Source area"),
IOPU("pd", VDMOS_PD, IF_REAL, "Drain perimeter"),
IOPU("ps", VDMOS_PS, IF_REAL, "Source perimeter"),
IOPU("nrd", VDMOS_NRD, IF_REAL, "Drain squares"),
IOPU("nrs", VDMOS_NRS, IF_REAL, "Source squares"),
IP("off", VDMOS_OFF, IF_FLAG, "Device initially off"),
IOPU("icvds", VDMOS_IC_VDS, IF_REAL, "Initial D-S voltage"),
IOPU("icvgs", VDMOS_IC_VGS, IF_REAL, "Initial G-S voltage"),
@ -125,7 +119,6 @@ IFparm VDMOSmPTable[] = { /* model parameters */
IOP("gamma", VDMOS_MOD_GAMMA, IF_REAL, "Bulk threshold parameter"),
IOPA("cbd", VDMOS_MOD_CBD, IF_REAL, "B-D junction capacitance"),
IOPA("cbs", VDMOS_MOD_CBS, IF_REAL, "B-S junction capacitance"),
IOP("rsh", VDMOS_MOD_RSH, IF_REAL, "Sheet resistance"),
IOPA("cj", VDMOS_MOD_CJ, IF_REAL, "Bottom junction cap per area"),
IOP("mj", VDMOS_MOD_MJ, IF_REAL, "Bottom grading coefficient"),
IOPA("cjsw", VDMOS_MOD_CJSW, IF_REAL, "Side junction cap per area"),

18
src/spicelib/devices/vdmos/vdmosask.c
View File

@ -44,24 +44,6 @@ VDMOSask(CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
case VDMOS_W:
value->rValue = here->VDMOSw;
return(OK);
case VDMOS_AS:
value->rValue = here->VDMOSsourceArea;
return(OK);
case VDMOS_AD:
value->rValue = here->VDMOSdrainArea;
return(OK);
case VDMOS_PS:
value->rValue = here->VDMOSsourcePerimiter;
return(OK);
case VDMOS_PD:
value->rValue = here->VDMOSdrainPerimiter;
return(OK);
case VDMOS_NRS:
value->rValue = here->VDMOSsourceSquares;
return(OK);
case VDMOS_NRD:
value->rValue = here->VDMOSdrainSquares;
return(OK);
case VDMOS_OFF:
value->rValue = here->VDMOSoff;
return(OK);

20
src/spicelib/devices/vdmos/vdmosdefs.h
View File

@ -50,12 +50,6 @@ typedef struct sVDMOSinstance {
double VDMOSl; /* the length of the channel region */
double VDMOSw; /* the width of the channel region */
double VDMOSdrainArea; /* the area of the drain diffusion */
double VDMOSsourceArea; /* the area of the source diffusion */
double VDMOSdrainSquares; /* the length of the drain in squares */
double VDMOSsourceSquares; /* the length of the source in squares */
double VDMOSdrainPerimiter;
double VDMOSsourcePerimiter;
double VDMOSsourceConductance; /*conductance of source(or 0):set in setup*/
double VDMOSdrainConductance; /*conductance of drain(or 0):set in setup*/
double VDMOSgateConductance; /*conductance of gate(or 0):set in setup*/
@ -171,12 +165,6 @@ typedef struct sVDMOSinstance {
unsigned VDMOSmGiven :1;
unsigned VDMOSlGiven :1;
unsigned VDMOSwGiven :1;
unsigned VDMOSdrainAreaGiven :1;
unsigned VDMOSsourceAreaGiven :1;
unsigned VDMOSdrainSquaresGiven :1;
unsigned VDMOSsourceSquaresGiven :1;
unsigned VDMOSdrainPerimiterGiven :1;
unsigned VDMOSsourcePerimiterGiven :1;
unsigned VDMOSdNodePrimeSet :1;
unsigned VDMOSsNodePrimeSet :1;
unsigned VDMOSicVBSGiven :1;
@ -338,7 +326,6 @@ typedef struct sVDMOSmodel { /* model structure for a resistor */
unsigned VDMOSdrainResistanceGiven :1;
unsigned VDMOSsourceResistanceGiven :1;
unsigned VDMOSgateResistanceGiven :1;
unsigned VDMOSsheetResistanceGiven :1;
unsigned VDMOStransconductanceGiven :1;
unsigned VDMOSvt0Given :1;
unsigned VDMOScapBDGiven :1;
@ -377,12 +364,6 @@ typedef struct sVDMOSmodel { /* model structure for a resistor */
enum {
VDMOS_W = 1,
VDMOS_L,
VDMOS_AS,
VDMOS_AD,
VDMOS_PS,
VDMOS_PD,
VDMOS_NRS,
VDMOS_NRD,
VDMOS_OFF,
VDMOS_IC,
VDMOS_IC_VBS,
@ -417,7 +398,6 @@ enum {
VDMOS_MOD_MJSW,
VDMOS_MOD_JS,
VDMOS_MOD_TOX,
VDMOS_MOD_RSH,
VDMOS_MOD_U0,
VDMOS_MOD_FC,
VDMOS_MOD_NSUB,

10
src/spicelib/devices/vdmos/vdmosdset.c
View File

@ -82,17 +82,9 @@ VDMOSdSetup(GENmodel *inModel, CKTcircuit *ckt)
vt = CONSTKoverQ * here->VDMOStemp;
if( (here->VDMOStSatCurDens == 0) ||
(here->VDMOSdrainArea == 0) ||
(here->VDMOSsourceArea == 0)) {
DrainSatCur = here->VDMOSm * here->VDMOStSatCur;
SourceSatCur = here->VDMOSm * here->VDMOStSatCur;
} else {
DrainSatCur = here->VDMOStSatCurDens *
here->VDMOSm * here->VDMOSdrainArea;
SourceSatCur = here->VDMOStSatCurDens *
here->VDMOSm * here->VDMOSsourceArea;
}
Beta = here->VDMOStTransconductance * here->VDMOSm *
here->VDMOSw/here->VDMOSl;

10
src/spicelib/devices/vdmos/vdmosload.c
View File

@ -99,18 +99,8 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
* here. They may be moved at the expense of instance size
*/
if ((here->VDMOStSatCurDens == 0) ||
(here->VDMOSdrainArea == 0) ||
(here->VDMOSsourceArea == 0)) {
DrainSatCur = here->VDMOSm * here->VDMOStSatCur;
SourceSatCur = here->VDMOSm * here->VDMOStSatCur;
}
else {
DrainSatCur = here->VDMOStSatCurDens *
here->VDMOSm * here->VDMOSdrainArea;
SourceSatCur = here->VDMOStSatCurDens *
here->VDMOSm * here->VDMOSsourceArea;
}
Beta = here->VDMOStTransconductance * here->VDMOSm *
here->VDMOSw / here->VDMOSl;

3
src/spicelib/devices/vdmos/vdmosmask.c
View File

@ -96,9 +96,6 @@ VDMOSmAsk(CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
case VDMOS_MOD_TOX:
value->rValue = model->VDMOSoxideThickness;
return(OK);
case VDMOS_MOD_RSH:
value->rValue = model->VDMOSsheetResistance;
return(OK);
case VDMOS_MOD_U0:
value->rValue = model->VDMOSsurfaceMobility;
return(OK);

4
src/spicelib/devices/vdmos/vdmosmpar.c
View File

@ -91,10 +91,6 @@ VDMOSmParam(int param, IFvalue *value, GENmodel *inModel)
model->VDMOSoxideThickness = value->rValue;
model->VDMOSoxideThicknessGiven = TRUE;
break;
case VDMOS_MOD_RSH:
model->VDMOSsheetResistance = value->rValue;
model->VDMOSsheetResistanceGiven = TRUE;
break;
case VDMOS_MOD_U0:
model->VDMOSsurfaceMobility = value->rValue;
model->VDMOSsurfaceMobilityGiven = TRUE;

24
src/spicelib/devices/vdmos/vdmospar.c
View File

@ -49,30 +49,6 @@ VDMOSparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VDMOSl = value->rValue * scale;
here->VDMOSlGiven = TRUE;
break;
case VDMOS_AS:
here->VDMOSsourceArea = value->rValue * scale * scale;
here->VDMOSsourceAreaGiven = TRUE;
break;
case VDMOS_AD:
here->VDMOSdrainArea = value->rValue * scale * scale;
here->VDMOSdrainAreaGiven = TRUE;
break;
case VDMOS_PS:
here->VDMOSsourcePerimiter = value->rValue * scale;
here->VDMOSsourcePerimiterGiven = TRUE;
break;
case VDMOS_PD:
here->VDMOSdrainPerimiter = value->rValue * scale;
here->VDMOSdrainPerimiterGiven = TRUE;
break;
case VDMOS_NRS:
here->VDMOSsourceSquares = value->rValue;
here->VDMOSsourceSquaresGiven = TRUE;
break;
case VDMOS_NRD:
here->VDMOSdrainSquares = value->rValue;
here->VDMOSdrainSquaresGiven = TRUE;
break;
case VDMOS_OFF:
here->VDMOSoff = (value->iValue != 0);
break;

21
src/spicelib/devices/vdmos/vdmosset.c
View File

@ -96,9 +96,6 @@ VDMOSsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
here->VDMOSstates = *states;
*states += VDMOSnumStates;
if (!here->VDMOSdrainPerimiterGiven) {
here->VDMOSdrainPerimiter = 0;
}
if (!here->VDMOSicVBSGiven) {
here->VDMOSicVBS = 0;
}
@ -108,25 +105,13 @@ VDMOSsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
if (!here->VDMOSicVGSGiven) {
here->VDMOSicVGS = 0;
}
if (!here->VDMOSsourcePerimiterGiven) {
here->VDMOSsourcePerimiter = 0;
}
if (!here->VDMOSvdsatGiven) {
here->VDMOSvdsat = 0;
}
if (!here->VDMOSvonGiven) {
here->VDMOSvon = 0;
}
if (!here->VDMOSdrainSquaresGiven) {
here->VDMOSdrainSquares = 1;
}
if (!here->VDMOSsourceSquaresGiven) {
here->VDMOSsourceSquares = 1;
}
if ((model->VDMOSdrainResistance != 0
|| (model->VDMOSsheetResistance != 0
&& here->VDMOSdrainSquares != 0))) {
if (model->VDMOSdrainResistance != 0) {
if (here->VDMOSdNodePrime == 0) {
error = CKTmkVolt(ckt, &tmp, here->VDMOSname, "drain");
if (error) return(error);
@ -150,9 +135,7 @@ VDMOSsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
here->VDMOSdNodePrime = here->VDMOSdNode;
}
if ((model->VDMOSsourceResistance != 0 ||
(model->VDMOSsheetResistance != 0 &&
here->VDMOSsourceSquares != 0))) {
if (model->VDMOSsourceResistance != 0) {
if (here->VDMOSsNodePrime == 0) {
error = CKTmkVolt(ckt, &tmp, here->VDMOSname, "source");
if (error) return(error);

54
src/spicelib/devices/vdmos/vdmostemp.c
View File

@ -141,18 +141,12 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
arg = -egfet/(kt+kt)+1.1150877/(CONSTboltz*(REFTEMP+REFTEMP));
pbfact = -2*vt *(1.5*log(fact2)+CHARGE*arg);
if(!here->VDMOSdrainAreaGiven) {
here->VDMOSdrainArea = ckt->CKTdefaultMosAD;
}
if(!here->VDMOSmGiven) {
here->VDMOSm = 1;
}
if(!here->VDMOSlGiven) {
here->VDMOSl = 1;
}
if(!here->VDMOSsourceAreaGiven) {
here->VDMOSsourceArea = ckt->CKTdefaultMosAS;
}
if(!here->VDMOSwGiven) {
here->VDMOSw = 1;
}
@ -194,37 +188,17 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
(4e-4*(here->VDMOStemp-REFTEMP)-gmanew));
here->VDMOStCjsw *= capfact;
here->VDMOStDepCap = model->VDMOSfwdCapDepCoeff * here->VDMOStBulkPot;
if( (here->VDMOStSatCurDens == 0) ||
(here->VDMOSdrainArea == 0) ||
(here->VDMOSsourceArea == 0) ) {
if (here->VDMOStSatCurDens == 0) {
here->VDMOSsourceVcrit = here->VDMOSdrainVcrit =
vt*log(vt/(CONSTroot2*here->VDMOSm*here->VDMOStSatCur));
} else {
here->VDMOSdrainVcrit =
vt * log( vt / (CONSTroot2 *
here->VDMOSm *
here->VDMOStSatCurDens * here->VDMOSdrainArea));
here->VDMOSsourceVcrit =
vt * log( vt / (CONSTroot2 *
here->VDMOSm *
here->VDMOStSatCurDens * here->VDMOSsourceArea));
}
if(model->VDMOScapBDGiven) {
czbd = here->VDMOStCbd * here->VDMOSm;
} else {
if(model->VDMOSbulkCapFactorGiven) {
czbd=here->VDMOStCj*here->VDMOSm*here->VDMOSdrainArea;
} else {
czbd=0;
}
}
if(model->VDMOSsideWallCapFactorGiven) {
czbdsw= here->VDMOStCjsw * here->VDMOSdrainPerimiter *
here->VDMOSm;
} else {
czbdsw=0;
}
arg = 1-model->VDMOSfwdCapDepCoeff;
sarg = exp( (-model->VDMOSbulkJctBotGradingCoeff) * log(arg) );
sargsw = exp( (-model->VDMOSbulkJctSideGradingCoeff) * log(arg) );
@ -249,18 +223,9 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
if(model->VDMOScapBSGiven) {
czbs=here->VDMOStCbs * here->VDMOSm;
} else {
if(model->VDMOSbulkCapFactorGiven) {
czbs=here->VDMOStCj*here->VDMOSsourceArea * here->VDMOSm;
} else {
czbs=0;
}
}
if(model->VDMOSsideWallCapFactorGiven) {
czbssw = here->VDMOStCjsw * here->VDMOSsourcePerimiter *
here->VDMOSm;
} else {
czbssw=0;
}
arg = 1-model->VDMOSfwdCapDepCoeff;
sarg = exp( (-model->VDMOSbulkJctBotGradingCoeff) * log(arg) );
sargsw = exp( (-model->VDMOSbulkJctSideGradingCoeff) * log(arg) );
@ -292,14 +257,6 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
else {
here->VDMOSdrainConductance = 0;
}
} else if (model->VDMOSsheetResistanceGiven) {
if(model->VDMOSsheetResistance != 0) {
here->VDMOSdrainConductance =
here->VDMOSm /
(model->VDMOSsheetResistance*here->VDMOSdrainSquares);
} else {
here->VDMOSdrainConductance = 0;
}
} else {
here->VDMOSdrainConductance = 0;
}
@ -310,15 +267,6 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
} else {
here->VDMOSsourceConductance = 0;
}
} else if (model->VDMOSsheetResistanceGiven) {
if ((model->VDMOSsheetResistance != 0) &&
(here->VDMOSsourceSquares != 0)) {
here->VDMOSsourceConductance =
here->VDMOSm /
(model->VDMOSsheetResistance*here->VDMOSsourceSquares);
} else {
here->VDMOSsourceConductance = 0;
}
} else {
here->VDMOSsourceConductance = 0;
}