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Author SHA1 Message Date
Cary R 0e4dfa6732 Fix some compile warnings when using more modern compilers 2015-08-19 11:20:57 -07:00
Cary R 66b4843987 V0.8: Fix autoconf warning.
This just copies the same change that was done for development over to V0.8.
2011-11-23 10:48:42 -08:00
Cary R 4dee700ca5 V0.8: Add #! support for MinGW since newer shells support this. 2011-03-15 18:59:29 -07:00
Cary R 32e30f2d5b V0.8: Fix cleanup and cygwin out of source building
This patch adds a few missing files to clean/distclean and also
fixes the out of source directory building for cygwin/MinGW.
2011-03-14 16:56:03 -07:00
Cary R ac8fddfa01 V0.8: Update Makefile.in files to support cygwin compile.
Update the various Makefile.in files to support compiling in the source
directory with cygwin using a suffix (default).
2011-03-14 16:55:56 -07:00
Cary R 9aa80965bd V0.8: Remove more space issues. 2011-03-08 19:13:14 -08:00
Larry Doolittle ec0c4343e8 Drop trailing spaces
There weren't that many
2011-03-04 17:47:59 -08:00
Larry Doolittle 76103f2167 Spelling fixes
Mostly comments, but a few format strings
2011-03-04 17:46:57 -08:00
Larry Doolittle 09664bc52e Propagate default CFLAGS into vvp Makefile 2011-03-04 10:39:35 -08:00
Cary R 3f0e1bacc1 V0.8: Reduce synthesized DFF pessimism.
This patch updates the DFF UDP to have less pessimism.
2011-01-12 16:28:58 -08:00
Cary R 11fa67ebbe V0.8: rework latch synthesis and warn that async. set/clear are missing.
This patch reworks the latch synthesis that Alan submitted to be
more in line with the rest of the code and simplified it in a
few places. It also adds a warning that we do not currently
support synthesizing asynchronous set/clear signals for a latch.
2011-01-12 16:26:39 -08:00
Cary R 14926e7ce0 V0.8: Fail if both an LPM/wire and a reg drive a nexus.
In synthesis we transform registers into wires, but if there is bad
Verilog code where the register is written from non-synthesized code
then we can't do this! This patch adds a check in the code generator
for this and prints a error message instead of generating a .resolv
to combine the two, which is certainly not correct.
2011-01-12 16:24:50 -08:00
Cary R 34661e9af5 V0.8: Rework the NetLatch and back end code.
This patch reworks the NetLatch class to better match the NetFF class
(e.g. it adds a place for the async controls and value, adds a dump
routine, etc.) and moves it into the normal netlist.{h,cc} files. It
removes the unused Aload and Sload routines, etc. from the NetFF class.
It switches the latch to use the existing ff object to pass information
to the target and uses the existing FF routines as applicable.

ivl_lpm_async_clr()
ivl_lpm_async_set()
ivl_lpm_aset_value()
ivl_lpm_clk() for the gate
ivl_lpm_data()
ivl_lpm_q()

It adds support for generating a latch UDP just like is done for the
D flip-flop in the tgt-vvp code generator and fixes a bug in the
generation of the clear signal when both the Aclr and Aset signals
clear the register.
2011-01-12 16:19:32 -08:00
Cary R 678dd7bdaa V0.8: Add support for negedge FF and Aclr/Aset both clear.
This patch fixes the bugs reported in pr1757438. These are fpga/edif
code generation bugs. For a DFF we need to add an inverter for a
negedge device and if both the Aclr and Aset signals clear the FF
we need to create the OR of these signals to drive the Aclr pin.
2011-01-12 16:17:13 -08:00
Cary R 3a162ea69f V0.8: Fix dffsynth code generation bug.
If both the async. clr and set pins clear a flip-flop then we need to
create an OR gate to combine the two signals to connect to the single
DFF clr pin. This patch fixes the tgt-vvp code generator to implement
this functionality.
2011-01-12 16:14:52 -08:00
Cary R 5f3e5f6b35 V0.8: add a warning that a latch primitive is not supported.
At the moment a latch primitive is not supported by vvp.
2011-01-12 15:55:09 -08:00
Cary R 3cc12e8446 V0.8: Update PLI_BYTE definition.
The standard defines this as char not signed char. Using signed char was
causing some compiler warnings in the vpi tests with modern compilers.
2011-01-12 15:52:49 -08:00
Cary R 9bab275716 V0.8: Remove some more compile warnings.
This patch removes some more compile warnings when compiling using
the default gcc compiler for Ubuntu-10.10.
2011-01-12 15:52:32 -08:00
Cary R ae14a58bff V0.8: Remove deprecated #ident and fix some other compile warnings
This patch removes #ident since it is deprecated in recent gcc
versions. It also removes all the CVS comments and fixes a few
other compilation warnings. There are still a few compilation
warnings, but this takes care of most of them. Fixing the rest
will require a bit more thought.
2011-01-12 15:49:03 -08:00
Alan M. Feldstein 5b9a72dbbf Add -h option to usage output. 2010-11-25 09:24:18 -08:00
Alan M. Feldstein bd9923dbbd latch synthesis fix: Connect gate pin in netlist. 2010-11-25 09:21:46 -08:00
Cary R 35c68d8c58 V0.8: Ignore system tasks/functions NULL arguments in @* calculation.
System tasks and functions can be defined to have NULL arguments.
This patch makes the @* sensitivity list calculation skip these
NULL (constant) arguments.
2010-11-25 09:15:11 -08:00
Alan M. Feldstein 867c864132 Use appropriate makefile dependencies option for Sun Studio 12 C++ compiler. 2010-01-25 15:53:56 -08:00
Alan M. Feldstein b6e6225d81 Not all C++ compilers recognize (or need) -Wall. 2010-01-25 15:51:53 -08:00
Alan M. Feldstein 80ef9522dd Not all C compilers recognize (or need) -Wall. 2010-01-25 15:48:28 -08:00
Cary R 90d65ae48f Format the --enable-suffix help correctly.
(Cherry-picked from 537ba93fe4)
2009-10-08 16:49:33 -07:00
Stephen Williams 95a0face2b Minor portability fixes from Alan Feldstein. 2009-08-21 15:35:44 -07:00
Cary R c88583264c V0.8 add .gitignore file
Add a .gitignore file like V0.9 and development have. This is
a slightly modified version to match V0.8.
2009-08-02 11:13:58 -07:00
Cary R 89bcbc75d3 V0.8: Remove check for ivl in driver/main.c
This check could be useful, but it was making make check fail
since it was before base was redefined by -B. This check is
not in V0.9, so it was easier to just remove it from V0.8. This
would only happen if <path>/lib/ivl-0.8/ivl did not already
exist (on a pristine system).
2009-07-06 15:22:53 -07:00
Stephen Williams cfd0162176 Remove CVS .cvsignore files.
We are in git now. We don't want these files, they
are just clutter, especially in packages.
2009-01-02 15:59:34 -08:00
Werner Hoch e4df6f7966 Add missing DESTDIR to the Makefiles 2009-01-02 15:28:53 -08:00
Jared Casper 3e39109b0e Compatibility with gcc-4.3
Using auto_ptr in elab_net.cc (added in commit 15702f1, "Fix bad
memory reference." on 2008-11-28) requires #include <memory> when
compiling with gcc-4.3.
2008-12-12 07:41:16 -08:00
Cary R 27be6e88bc V0.8: backport of check primitive port count code.
This patch backports from multiple places checks that verify
that the various primitives are given the correct number of
port expressions.
2008-12-09 19:21:48 -08:00
Cary R 918b0a410f V0.8: backport $random fix.
Back port a $random fix from development.
2008-12-09 15:43:28 -08:00
Stephen Williams ec85377d13 Prepare for 0.8.7 release. 2008-12-09 09:47:42 -08:00
Cary R a22124a198 V0.8: Mostly back port the version checking code from development.
This is a back port from development of the code to put and check
that the vvp input file is the right version. It also adds the -V
flag to vvp. It does not add the VERSION_TAG information so will
only produce the single string ivl_version tag. The runtime will
read both forms since if it is feed a V0.9 file we want it to
complain nicely (no syntax error). To change the displayed version
for the various programs and checks change version.h.
2008-12-05 22:01:13 -08:00
Cary R e8bc5aefb4 V0.8: Get arrayed instance ports correct.
This is a back port from development of the code to get the
arrayed instance port order correct (MSB to LSB).
2008-12-05 21:57:57 -08:00
Cary R ca5d265350 V0.8: left shift of integer value needs to use integer size
This is a back port from development of the code to resize an
unsized constant value to 32 bits. Development used integer_width,
but that is not supported in V0.8. Development also supports using
the expression width which V0.8 does not.
2008-12-05 21:54:59 -08:00
Cary R 113312a0c1 V0.8: do not schedule function calls.
This patch mirrors what was done in development to force a function
call to be run immediately.
2008-11-28 10:16:23 -08:00
Cary R 12d5aa08e2 V0.8: A $signed can make a concat signed.
This patch mirrors what was done in development to fix the
signed concat problem.
2008-11-28 10:12:11 -08:00
Stephen Williams 15702f1b87 Fix bad memory reference.
The expression for the repeat expression was deleted before the
tests for expression sanity.
2008-11-28 10:00:57 -08:00
Stephen Williams 9b5ef0bbb9 Checkin some developer convenience scripts. 2008-11-28 09:32:22 -08:00
Cary R b8d9f19eb0 Use MOS instead of bufif devices for mux optimization.
This patch mirrors what was done in development to fix the mux
with one input as Z optimization. It should use a MOS device
instead of a bufif device.
2008-11-28 09:16:21 -08:00
Cary R 8d9f7e2e26 Include directory should be 0.8 not 0.0.
The include directory had the wrong version.
2008-11-28 09:11:58 -08:00
Stephen Williams 65326fd6a9 Put header files in include/iverilog dir.
The include/verilog directory is a bit too
generic. Use the include/iverilog dir instead.
2008-11-25 16:29:30 -08:00
Cary R bb92974839 V0.8: Fail on a zero width repeat
This patch mirrors what was done in development to fail for zero
width repeats. Actually development supports them in some contexts,
this is allowed in 1364-2005, but V0.8 doesn't support them at all.
2008-11-24 21:07:51 -08:00
Cary R 7dc473db8d V0.8: fix signed parameter multiply
This patch mirrors what was done in development to fix the
multiplication of signed values.
2008-11-24 21:03:11 -08:00
Cary R abc2aa17d2 V0.8: complain about a negative repeat value.
This patch mirrors what was done in development to complain
about a negative repeat value.
2008-11-24 21:00:58 -08:00
Cary R c8bffe728a V0.8: fix verinum XOR with z input
This patch mirrors what was done in development to fix the XOR
of a z bit in verinum.
2008-11-24 20:56:48 -08:00
Cary R d134f6f074 V0.8: fix $ungetc argument order.
This patch mirrors what was done in development to fix $ungetc.
2008-11-24 20:52:38 -08:00
Cary R 8deb2c0b60 V0.8: only return a real time value for $realtime.
This patch mirrors what was done in development to only return a
real value when realtime is called.
2008-11-24 20:49:53 -08:00
Cary R 451783056d V0.8: Can not have and undefined repeat.
This patch mirrors what was done in development to fail when the
repeat has an undefined value.
2008-11-24 20:44:28 -08:00
Cary R 322bbed7c7 V0.8: Don't crash on invalid input.
This patch mirrors what was done in development to prevent a crash
when given invalid input.
2008-11-24 20:42:48 -08:00
Cary R e8bb9b1f76 V0.8: `timescale can not be inside module definition.
This patch mirrors what was done in development to complain
about a `timescale inside of a module definition.
2008-11-24 20:39:49 -08:00
Cary R f112b77d3b V0.8: Fix single bit reductions with 1'bz input.
This patch mirrors what was done in development to support single
bit reductions correctly.
2008-11-20 20:25:39 -08:00
Cary R ddf68ca14c Don't let -I block -ivl!
When -I was added it was blocking -ivl since the string comparison
is case insensitive.
(cherry picked from commit a412149e2c)
2008-11-20 20:23:52 -08:00
Cary R d8fdcd5a38 Add verilog<suffix> to MinGW iverilog-vpi tool
When changing where the include files were located the MinGW
iverilog-vpi tool was missed.
(cherry picked from commit 45f2d68d33)
2008-11-20 20:12:45 -08:00
Stephen Williams 408e25f6bc Make the 0.8 series use --enable-suffix by default
This we are working on closing out this release series,
install with the 0.8 suffix enabled by default from
now on.
2008-11-20 09:53:52 -08:00
Cary R 3dd2c74ebe V0.8: For scheduled put values save the string and free it after the put.
Users expect that vpi_put_value() will keep a copy of the string
that is passed to it. This patch implements this buy copying the
string and then freeing it after the actual put_value call.
2008-11-20 09:31:52 -08:00
Cary R d260052940 Fix MinGW suffix configuration.
In the driver-vpi file we need to use g for the suffix replacement
so that both libraries get changed.

Also added an end line to the config.h.in file.
2008-11-20 07:35:30 -08:00
Stephen Williams 146f64992c Create support for the --enable-suffix configuration option.
This configure option causes the installed commands to have
a suffix string that makes them distinct from other versions
that also have a suffix string. This allows for multiple
installed versions of Icarus Verilog.

Also, move installed C/C++ header files into a subdirectory of
their own under the target include directory, to make clearer
the purpose and source of those files.

(cherry picked from commit 4bc90f7cfd)
2008-11-19 22:39:10 -08:00
Cary R 74e2343e52 V0.8: fix shifting of 0 or signed constant.
This patch matches the one from development. If just returns the
L-value if the shift is a NOP.
2008-11-16 11:07:58 -08:00
Cary R b4b9667def Fix signed divide for words that match the machine word.
There was an error when calculating the negative of a value that
was the same width as the native machine word. This patch is similar
to what was done in 0.9 to fix the problem there.
2008-11-16 11:05:04 -08:00
Cary R 5e401055e8 V0.8: do signed comparisons and fix verinum < and <=
This patch fixes the verinum < and <= operators to directly
compare the long result not the difference. Because of overflow
the difference can give an incorrect value. Using a long value
is technically wrong, but that will need to be a different
patch. It also fixes the eval_leeq_() routine to correctly build
the largest value in a signed comparison.
2008-08-23 09:30:37 -07:00
Cary R e89bce48ed Error message for missing system tasks/functions.
This patch adds an error message for the standard system
tasks and functions that are not currently implemented.
2008-08-23 09:23:49 -07:00
Cary R cf01d1a75f V0.8: Remork previous patch to use the correct method 2008-06-25 15:38:20 -07:00
Cary R 6df10a082b V0.8: fix memory leak in recent patch. 2008-06-25 12:52:04 -07:00
Cary R 22ad8c42bc V0.8: Copy file and line info during a macro expansion.
The file and line number information needs to be copied when
doing a macro expansion. This prevents a macro that expands to
an `ifdef of other construct that needs to push the stack
from core dumping because the file is NULL.
2008-06-25 11:26:02 -07:00
Cary R f418bea775 MinGW fixes (system return and vsnprintf)
The MinGW system() implementation appears to return the straight
return value instead of the waitpid() like result that more
normal systems return. Because of this just return the system()
result without processing for MinGW compilations.

Older version of the MinGW runtime (pre 3.14) just used the
underlying vsnprintf(). Which has some problems. The 3.14 version
has some nice improvements, but it has a sever bug when processing
"%*.*f", -1, -1, <some_real_value>.  Because of this we need to use
the underlying version without the enhancements for now.
2008-05-22 20:20:29 -07:00
Stephen Williams 568e601212 Do not use "synthesize" to elaborate nets if not necessary.
The synthesize was causing memories to be exploded, whis was then causing
memory word addresses to turn into bit index statements, causing bugs.
So don't synthesize if we are not actually synthesizing.
2008-05-22 09:37:19 -07:00
Cary R b7e7d3cb04 User tasks have empty nex_output().
This patch matches what is done in the development branch and
fixes the reported bug.
2008-05-13 11:09:12 -07:00
Cary R 8a1543aaaf V0.8: pad user function port in synthesize().
This patch removes the assert in synthesize() for user functions and
replaces it with a pad to width.
2008-02-25 16:07:29 -08:00
Cary R c6ba9269bc Fix some problems in driver-vpi/main.c
Fixed a few problems in driver-vpi/main.c that were preventing
the Verilog-A math library from compiling.
2008-02-25 16:02:40 -08:00
Michael Witten 3af373667a [PATCH] Removed #include asm/page.h on GNU/Linux
vvp/main.cc was including asm/page.h on GNU/Linux
systems, though that file does not often exist and
is not necessary.

Signed-off-by: Michael Witten <[email protected]>
2008-02-04 13:20:57 -08:00
Stephen Williams d49e44594b Fix reported build errors with gcc 4.3
Add missing includes to cstring et al.
2008-01-21 18:04:30 -08:00
Cary R 4d3f592b5f V0.8 add check target to {tgt-*,vpi}/Makefile.in
Add missing Makefile check targets to the tgt-* and vpi directories.
2008-01-16 11:07:47 -08:00
Cary R d1e82d3d12 V0.8: ignore edge-control specifiers
Update the specify code in V0.8 to ignore edge-control specifiers.
2008-01-15 15:57:40 -08:00
Cary R d70ccb6895 V0.8: update driver-vpi/* to match iverilog-vpi.sh
This patch updates the MinGW C version of iverilog-vpi to match the
shell version. This allows the vpi tests in the test suite to be run.
2008-01-09 08:10:39 -08:00
Cary R e34647f79c V0.8: Add vvp flag that allows $stop to act like $finish.
This patch adds a new flag to vvp "-n" that can be used to make
$stop and hence <Control-C> act like $finish. This may be desired
when using vvp in a non-interactive environment.
2008-01-09 08:08:19 -08:00
Cary R 24b097ce89 V0.8 fix for shift/reduce warning
This patch fixes the oversight in the previous patch and eliminated
the shift/reduce warning. Apply it after the previous one.
2007-12-31 17:52:27 -08:00
Cary R 83ee7e7988 V0.8: allow NULL ports in task calls.
This is a direct back port from development that allows tasks to
be called with no ports. This fixes one failure in the test suite.
2007-12-31 17:52:09 -08:00
Cary R f33d477166 V0.8: allow vthr_vector to be converted to real.
This is a direct back port from development that allows vthread
vectors to be converted to real values. This is the first step
in fixing two more failures in the test suite.
2007-12-29 15:02:11 -08:00
Cary R 3f16d3402a V0.8: add `elsif add some conditional directive syntax checks.
This is a direct back port from the development branch. It adds
the `elsif directive and adds check that the conditional
directives are used correctly.
2007-12-29 14:54:29 -08:00
Cary R 304a63d8e3 Fix protect/endprotect
This patch makes stable match the development branch. `protect/`endprotect
are not required to be on their own line.
2007-12-29 14:49:13 -08:00
Cary R 23d56d8198 V0.8: fix a few more specify block problems.
This patch fixes a few more specify block problems in the stable
branch.
2007-12-29 14:44:13 -08:00
Cary R a8f68fe416 V0.8: ignore ifnone in specify block
In specify blocks ignore the ifnone command.
2007-12-29 14:37:48 -08:00
Cary R 5dc4202929 V0.8: Back port development patch for pr1716276
This is a straight back port of the development patch for the
problem reported in pr1716276. This was causing the test case
to core dump under stable.
2007-12-29 14:29:27 -08:00
Cary R 281b4edbab v0.8: Do not run the first time step if the compilation failed.
This patch fixes another minor problem introduced by the process
end of simulation events. Specifically if the compilation has
indicated we should not run do not even start the main event loop.
2007-12-10 16:26:06 -08:00
Cary R 3eb86a2376 Process end of simulation events.
This is copied from the development branch. It allows the processing
of events that happen at the simulation finish time.
2007-12-06 18:54:15 -08:00
Cary R 1fb93c0565 Fix call back free problem.
This is copied from the development branch. The issue is that calling
vpi_free_object should not really free a call back handle since it is
the real call back object and doing so will invalidate it. This will
likely end with a core dump.
2007-12-06 18:50:31 -08:00
Holger Waechtler bdb900b25f Fix compile error on some gcc versions 2007-12-03 14:27:53 -08:00
Cary R 28da79dcc3 V0.8: Add the enhancements in iverilog-vpi from devel
Back port all the enhancements to iverilog-vpi made in the
development branch to the stable branch.
2007-11-29 18:05:06 -08:00
Cary R bbd61823b9 Update vpi/etc. files to correctly use PLI_INT32
This patch fixes the various PLI code that was incorrectly
using int for PLI_INT32 for functions that are used with the
vpi_systf_data and cd_data data structures.
2007-11-29 18:01:51 -08:00
Stephen Williams 0f716d6dca Prepare for 0.8.6 release. 2007-11-26 10:55:13 -08:00
Cary R a44236f8cb v0_8: A leading underscore is valid for macro substitutions.
For text macro substitutions the lexor did not allow leading underscores.
This patch fixes that omission. All other places that text macros may be
used appear to be correct.
2007-11-16 15:48:25 -08:00
Cary R 4be2ccb3fa Add error message for pr1489570.
This patch does not add the functionality needed to fix pr1489570, but
it does give an error message that is a bit more descriptive of the
current limitation (cannot do division or modulus with wide value).
2007-11-14 13:52:19 -08:00
Cary R 9f4dc5411f v0_8: make patch for pr1792108 synth aware.
This patch makes the behavior selection for pr1792108 depend on the
synth* functors.
2007-11-14 13:38:43 -08:00
Stephen Williams 545d20eba5 Error message for inconnected primitive ports.
Error message (instead of a seg fault) when a primitive port
is left unconnected.

Signed-off-by: Stephen Williams <[email protected]>
2007-10-31 11:41:04 -07:00
Stephen Williams b2159d1e64 Unary minus size assertion
Fix errors with unary subtraction producing logic gates with
inconsistent widths.

Signed-off-by: Stephen Williams <[email protected]>
2007-10-31 11:40:45 -07:00
Stephen Williams 4c8df2a370 No system functions in continuous assignments.
Do not support (in 0.8) system functions in continuous assignments.
Make a better error message.

Signed-off-by: Stephen Williams <[email protected]>
2007-10-31 11:40:35 -07:00
Stephen Williams eed0885dd0 Fix comparison of two negative numbers
Pairs of negative numbers that are equal do not set
the LT flag correctly at runtime.
2007-10-31 11:39:45 -07:00
Cary R 0fc10d0262 v0_8: fix @* to correctly handle non-input nets.
This is a slightly modified version of the patch from the development
branch. Specifically it only allows outputs in the sensitivity list for
non-synthesis back ends. The text from the development patch follows.

@* was only expanding to input nets. nex_input() for blocks was removing
any output net that was also an input. There was also a bug in how output
nets were removed. Only outputs currently defined were removed from the
input list.

always @(*) begin
  y = a;
  z = y;
end

would report "a" as an input. While

always @(*) begin
  z = y;
  y = a;
end

would report both "a" and "y" as inputs.

To fix this all nex_inputs now take a flag that when true (the default)
correctly removes any output from the input list. Both the above cases
will now return "a". If the flag is false outputs which are also inputs
will be included in the input list. This is what the @* elaboration code
uses to get the correct sensitivity list.
2007-10-30 17:49:35 -07:00
Cary R 1775c78aa9 v0_8: clear expression look aside for transient thread.
This is a back port of code from the development branch. The problem is
that for named blocks (which create a transient thread) the look aside
was not being cleared for the new thread. This resulted in an invalid
variable reference optimization.
2007-10-30 17:33:06 -07:00
Cary R 85652e24e0 v0_8: explicitly state the V0.8 cannot evaluate constant real expressions.
V0.8 does not have the code to evaluate constant real expressions. This
patch adds a line to the normal error message that says this explicitly.
2007-10-29 16:28:36 -07:00
Cary R eb4fc8fb7b Warn that bit based signals cannot be converted to real.
V0.8 does not have the code to covert bit based signals to a real value,
so print a more descriptive error message before quiting.
2007-10-29 16:24:55 -07:00
Cary R 043b7ae684 v0_8: warn about unused variable in for loop.
This patch back ports from the development branch a warning when
an undefined variable is used in a for loop.
2007-10-29 16:20:58 -07:00
Cary R 2946f30ffc v0_8: fix comparison in previous patch for pr1745132
If I had remembered to test the passing case I would have noticed
the comparison was wrong.
2007-10-29 16:15:07 -07:00
Cary R 5530aea6a3 v0_8: print an error message for an invalid bit selection.
This code may be used for more than just a bit select so the error message
is fairly generic. Though it should help in tracking down the real problem
(invalid Verilog code).
2007-10-29 16:14:49 -07:00
Cary R 40e09cd719 v0_8-add min_typ_max to expressions.
This patch adds min_typ_max to expressions. Remember when using a
min_typ_max triplet in an expression they must be enclosed with
parenthesis (1364-2001 section 4.3 page 58).
2007-10-29 16:08:34 -07:00
Cary R c67f3b0081 v0_8: implement $printtimescale.
This patch implements the $printtimescale system task. It is a back port
from the development branch. One thing to note is that the precision is
the global precision not the local precision. The patch to fix that could
also be back ported if needed, but it is significantly more work.
2007-10-29 16:02:08 -07:00
Cary R 95254aa27e v0_8: disable lxt support if libbzip2 is not found.
Configure was checking for libbzip2, but it was not doing anything with
the result. This patch disables lxt support if libbzip2 is not found.
2007-10-29 15:58:35 -07:00
Cary R 468e3bb702 v0_8 make C style comments work in false/suppressed ifdef/etc. blocks.
C style comments were not recognized as comments in false or
suppressed sections of ifdef/etc. blocks. This prohibited an
unneeded endif/else/etc. from being commented out with this
style of comment.
2007-10-29 15:50:29 -07:00
Alan M. Feldstein be8c8a8eb7 Removed UML not for publication.
Removed UML not for publication.
2007-10-24 16:18:02 -07:00
Alan M. Feldstein 5cae6b64af Fixed dangling latch gate inputs.
With -tfnf, observed
(latch  43020 1 43022 43021)
in the output file. That 3rd number is the ID of the gate nexus. However, it was only found as
(dangle 43022)
The purpose of this patch is to fix that in the common code.
2007-10-24 16:16:23 -07:00
steve f600e774d5 Add support for NAND gates. (Chris H) 2007-06-06 15:46:22 +00:00
steve d16dd26660 Support Latch synthesis (Alan Feldstein) 2007-05-30 17:48:53 +00:00
steve 8c04d669f9 DEBUG aids. (Alan Feldstein) 2007-05-30 17:48:26 +00:00
steve 5d2dcfd7f7 Fix uninitilized line number. 2007-05-25 18:35:45 +00:00
steve 0b3f1e4119 Better configuration messages (Alan Feldstein) 2007-05-16 23:51:42 +00:00
steve 8bd9fc7128 Supress error about types for default rule. 2007-04-26 00:50:54 +00:00
steve 1b551aaf94 Update to v0.8.4 release. 2007-03-23 23:26:51 +00:00
steve a3dda80fb2 Properly support signed task/function arguments. 2007-03-23 23:22:57 +00:00
steve 9e9d5ccfdd Fix compile time eval of <= comparison. 2007-03-23 23:02:31 +00:00
steve 07daee9438 Fix compile time evaluation of < operator. 2007-03-23 20:59:25 +00:00
steve 82808d8b5d Parse attribute attached to block items. 2007-03-23 19:31:22 +00:00
steve c045f51a7f Spelling fixes (larry doolittle) 2007-02-26 19:51:38 +00:00
steve d72eadb885 Get page size from sysconf. 2007-02-16 23:29:17 +00:00
steve e99f0a8f51 Comment about 10.3. 2007-02-09 05:30:22 +00:00
steve ed2cb380cd fix lexical handling of slashes in strings. 2007-02-09 05:29:24 +00:00
steve dc8e941260 Fix parse of bit select in notifier expression, 2006-12-03 04:58:20 +00:00
steve d486b81f23 Fix crash handling constant true conditional. 2006-11-27 01:47:14 +00:00
steve 59c2f16a5f Fix evaluate of constant condition expressions. 2006-11-27 01:32:24 +00:00
steve 1470a061fd Add synthesis of user defined functions. 2006-11-26 01:54:05 +00:00
steve c1333a21ef Prevent constant mux outputs from confusing itself. 2006-11-12 01:20:45 +00:00
steve 04ef0b7d80 Fix async blocks to take accumulated input. 2006-11-11 23:10:20 +00:00
steve 2fc9413d1f More detailed BuildRequires settings. 2006-11-11 21:21:50 +00:00
steve c94bdbcdb0 Make signal lookup use extended names. 2006-11-11 21:21:21 +00:00
steve 1820cd0244 Fix compile on Mac OS X 2006-11-02 17:47:52 +00:00
steve aa3cbbdf99 Error message for condit expression not synthesized. 2006-11-02 02:13:15 +00:00
steve 0a9b6f34ae Detect and synthesize enables using condit false. 2006-10-30 02:03:30 +00:00
steve 5c2c5453ac Fix code generation for signed numbers in real expressions. 2006-10-11 00:19:04 +00:00
steve 0c6bb476ea Get rounding of conversion correct. 2006-10-11 00:17:35 +00:00
steve 568924dcb5 Version stamp update 2006-10-04 17:08:59 +00:00
steve 33b3f7bdda Detect delay precision overflow. 2006-10-04 00:37:03 +00:00
steve 3a04e0a051 Fix a dangling reference to NetEParam objects in defparams. 2006-10-04 00:34:45 +00:00
steve 66ae377801 Snapshot v0.8.3 2006-10-03 21:34:40 +00:00
steve 898db57405 Describe the preconfigure steps. 2006-09-28 23:42:14 +00:00
steve 0fe45b5046 Fix host type detection in some configure scripts. 2006-09-22 03:29:02 +00:00
steve 20cfe99457 Fix left shift of small unsized constants. 2006-09-20 20:27:02 +00:00
steve 4ec8b38a5c Special handling of exploded memory arguments. 2006-09-15 23:56:05 +00:00
steve 79add47002 Build instruction typos and minor corrections. 2006-09-15 23:53:24 +00:00
steve c429f4c9a7 missing sig diagnostics. 2006-08-23 04:09:14 +00:00
steve 7f6a0b652a Do not count self as signifincant in nodangle. 2006-08-23 04:08:55 +00:00
steve 9f3f9154eb Fix missing sig on certain mux outputs.
Ignore condit statements (for synthesis) with no outputs.
2006-08-23 04:08:19 +00:00
steve 498fd06412 Add synthesis for casez statements. 2006-08-22 04:22:45 +00:00
steve 6d3b780791 Improve performance of unlink of heavily connected nexa. 2006-08-15 03:41:24 +00:00
steve a0ec981c50 Improved nexus management performance. 2006-08-08 02:17:48 +00:00
steve 930cd598a0 Typo clearing an event cell. 2006-08-06 18:09:42 +00:00
steve 77adab0f33 Remove excess PEString:: prefix for stubborn compilers. 2006-07-28 16:26:17 +00:00
steve 0e3768f829 Handle statement output override better in blocks. 2006-07-23 19:42:33 +00:00
steve 22884f2e64 Add support for full_case attribute. 2006-07-10 00:21:49 +00:00
steve 62da6aca28 Root dir variable does not include lib/ivl components. 2006-07-07 21:31:50 +00:00
steve 525ebddb0c Properly synthesize casex statements. 2006-07-02 00:50:15 +00:00
steve 521750c007 Fix ambiguity warnings. 2006-06-27 01:47:25 +00:00
steve 85d2833a62 Fix const/non-const warnings. 2006-06-27 01:37:14 +00:00
steve e2cc258283 Cure exit from main warning. 2006-06-27 01:33:17 +00:00
steve f09cf85c76 Fix unused var warning for mingw32 build. 2006-06-27 01:30:20 +00:00
steve c32de1dba0 Handle case where case output appears to be internal. 2006-06-26 00:05:46 +00:00
steve 628b866c36 Change Copyright tag to License. 2006-06-24 05:22:55 +00:00
steve 08dbe801c1 synthesis of NetCondit handles partial resets. 2006-06-23 03:49:46 +00:00
steve 101810df21 Handle simple memory addressing in expression synthesis. 2006-06-15 01:57:26 +00:00
steve 3877b636df synthesis for NetEBitSel. 2006-06-14 03:02:54 +00:00
steve 9d028a63f2 Remove redundant call to get_root_dir. 2006-06-14 03:01:49 +00:00
steve 35e5cea9df Add support for -Wunused warnings. 2006-06-12 00:16:50 +00:00
steve ec510071f1 Fix partial use of NetMux in sync condit statements. 2006-06-07 03:17:39 +00:00
steve 7413c533f6 Compilation warnings. 2006-06-02 23:42:48 +00:00
steve dde69cebb6 Handle condit clauses with unassigned outputs. 2006-06-01 03:01:48 +00:00
steve f942657ad5 NetESignal input is only selected bits. 2006-05-21 21:58:46 +00:00
steve fad1620828 Replace assertions with error messages. 2006-05-20 16:06:48 +00:00
steve a9931e7a58 Fix synthesis of l-value bit select in block. 2006-05-18 01:47:12 +00:00
steve 6cd4adb135 Fix synthesis of expressions with land of vectors. 2006-05-15 03:55:22 +00:00
steve 9643b86ab3 Update to use only Mingw for build. 2006-05-08 04:33:35 +00:00
steve 452eaeaea8 Handle memory assignments out of range during synthesis 2006-05-05 01:56:36 +00:00
steve 3a6e2df958 Fix uninitialized mem_lref_ member. 2006-05-02 02:00:15 +00:00
steve e73b7e2656 parse.cc and parse.h are made by the same steps. 2006-05-01 20:11:56 +00:00
steve 469ec11190 Merge fixes from devel tree. 2006-04-25 05:11:14 +00:00
steve e0bbfa512c Constant propagate addresses through NetRamDq read ports. 2006-04-23 04:26:13 +00:00
steve 94c9af2a5d Add cprop debugging. 2006-04-23 04:25:45 +00:00
steve 9f2e7df0ff vpp.conf is generated, so add it to cvsignore. 2006-04-23 02:44:29 +00:00
steve f02b2c9d7a Fix handling of exploded memories with partial or missing resets. 2006-04-16 19:26:37 +00:00
steve 058dac4290 Exploded memories accessed by constant indices. 2006-04-10 03:43:39 +00:00
steve ce4e21a962 Punt on set/reset if some sources are unconnected. 2006-04-01 01:37:58 +00:00
steve 065d6bc1e3 Add synth debug flag 2006-04-01 01:37:24 +00:00
steve 312d09dc1d Handle asynchronous demux/bit replacements. 2006-03-26 23:09:21 +00:00
steve faf7f30283 Add the .demux device. 2006-03-26 23:09:00 +00:00
steve 5d41e98c1f More installation directory flexibility. 2006-03-26 21:47:26 +00:00
steve 5e8330a4ff Better error messages when synthesis fails. 2006-03-18 18:43:21 +00:00
steve ef8964c65a Fix crash when memory exploding doesnot work 2006-03-16 05:40:18 +00:00
steve aa42ec381c Fix a spelling error in an error message. 2006-03-16 05:39:43 +00:00
steve c9d4aab9cb Right shifts really are allowed. 2006-03-16 05:39:20 +00:00
steve b8bc531f05 Fix the memsynth1 case. 2006-03-12 07:34:16 +00:00
steve 79cb8c883a Add support for negedge FFs by using attributes. 2006-02-25 05:03:28 +00:00
steve 27e633410c Add change callback to vpiMemory objects. 2006-02-19 16:57:31 +00:00
steve 7527c466ed Handle synthesis of FF vectors with l-value decoder. 2006-02-19 00:11:31 +00:00
steve 3ea1214160 More robust test for concat constant-ness. 2006-02-07 22:46:23 +00:00
steve 782542922d Detect nul arguments to concat expressions. 2006-02-07 22:45:54 +00:00
steve 1f8102c4dc Speed up processing of connect when one side is empty. 2006-01-27 02:05:46 +00:00
steve c4b34e8720 Document how the default statement handling works. 2006-01-27 01:58:53 +00:00
steve e494be7cbf Fix pin_Sel overrun. 2006-01-22 00:13:59 +00:00
steve eb0a78e9ce When mux has wide select but sparse choices, use 1hot translation. 2006-01-21 21:42:31 +00:00
steve e80138ec8c Restrict DFF to only one of Sset and Sclr. 2006-01-18 06:16:11 +00:00
steve 943316c6f6 Support DFF with synchronous inputs. 2006-01-18 06:15:45 +00:00
steve 52b8ed9077 Rework l-value handling to allow for more l-value type flexibility. 2006-01-18 01:23:23 +00:00
steve fc227aa3e1 Remember to set DLL= flag. 2006-01-14 20:13:38 +00:00
steve 41993815e9 Show synchronous set/clr of FF. 2006-01-14 20:13:22 +00:00
steve c5063f5d2f Case statement handles partial outputs. 2006-01-01 02:25:07 +00:00
steve f28aa11936 Allow for implicit case default in synchronous processes. 2006-01-01 01:30:39 +00:00
steve 3131fa68b7 Fix crashes caused bu synthesis of sqrt32.v. 2005-12-31 04:28:14 +00:00
steve def3809b3f Handle DFF definitions spread out within a block. 2005-12-19 01:13:47 +00:00
steve 3429c24a6a Properly fail when concat is not actually constant. 2005-12-18 21:06:01 +00:00
steve f47627d752 Fix missing outputs from synchronous conditionals to get out from in. 2005-12-15 02:38:51 +00:00
steve 9468f3d06f Handle both asynchronous set and reset. 2005-12-14 01:53:39 +00:00
steve b997de63a5 Account for sync vs async muxes. 2005-12-14 00:54:29 +00:00
steve f50f06ab4e Handle concatenations in l-values. 2005-12-10 04:26:32 +00:00
steve d5d03812cd Fix crash on block with assignments that assign lval to self. 2005-12-10 03:30:50 +00:00
steve b6d5a0675e Support constant concatenation of constants. 2005-12-07 03:28:44 +00:00
steve e63e830d62 Error messages for missing else clauses. 2005-12-07 02:14:37 +00:00
steve 74ca34bd82 Handle partial sets of conditional clauses. 2005-11-16 00:38:26 +00:00
steve c9d480028e Allow for block output to be set throughout the statements. 2005-11-13 22:28:48 +00:00
steve cc89ba66af Do not panic if case statement is nul. 2005-11-13 22:28:14 +00:00
steve 05e6d51004 Snapshot 0.8.2 2005-09-30 15:13:37 +00:00
steve ae583204e3 Snapshot 0.8.2 2005-09-30 15:01:44 +00:00
steve 018476f7cd More predictable ordering of items in NexusSet. 2005-09-25 23:30:31 +00:00
steve bfabeab6b9 Add Xilinx virtex as a reference EDIF device. 2005-09-25 16:35:36 +00:00
steve 4a3f1a3641 Attach line numbers to NetMux devices. 2005-09-11 02:56:37 +00:00
steve d97560caa7 Fix overly agressive constant propagation through MUX causing lost Z bits. 2005-09-11 02:50:51 +00:00
steve 393102d43a Evaluate magnitude compare with real operands. 2005-09-09 02:17:08 +00:00
steve 8e97a0e4d4 Support b1 edge in primitive tables. 2005-09-09 02:13:15 +00:00
steve 4ea789a2d7 More explicit internal error message. 2005-09-04 15:41:54 +00:00
steve 354f7ad920 More explicit internal error message. 2005-09-04 15:39:19 +00:00
steve f4a6206790 Handle b0 edges in primitives. 2005-09-04 15:33:19 +00:00
steve fd29ba3398 Reduce mux slices that are constant throughout range. 2005-08-28 22:00:39 +00:00
steve 44fbf60885 More thorough constant propagation through MUX devices. 2005-08-28 19:51:02 +00:00
steve a0d69113c3 More thorough constant propagation through MUX devices. 2005-08-28 19:50:03 +00:00
steve 86942ac592 Dump CMP_GE devices. 2005-08-28 17:37:28 +00:00
steve 075f9cbc4b Back-port edif_nexus_to_joint from tgt-edif. 2005-08-27 22:29:30 +00:00
steve 9dab368880 fix configure and build instructions for mingw build. 2005-08-27 22:19:37 +00:00
steve 5f6027fb66 Join cell0 and cell1 instances in LPM target. 2005-08-25 18:52:32 +00:00
steve 53156793fe Add support for implicit defaults in case and conditions. 2005-08-22 01:00:41 +00:00
steve 4644c220e8 Handle statements in blocks overriding previous statement outputs. 2005-08-21 22:49:54 +00:00
steve c30cd9afea Display NOR gates. 2005-08-21 22:27:57 +00:00
steve a8f45a18f0 Fix the comment in the EDIT header. 2005-08-21 22:25:51 +00:00
steve 6828e3e2ea Generate LPM for the CMP_EQ device. 2005-08-21 14:39:33 +00:00
steve 75eb372adf configure tgt-edif subdir. 2005-08-21 02:20:16 +00:00
steve 3b753fe52b Add the tgt-edif target. 2005-08-17 01:17:28 +00:00
steve 8c73fa7840 Fix compilation warnings/errors with newer compilers. 2005-08-13 00:45:53 +00:00
steve d310e656c7 Fix parse errors related to pr766. 2005-07-27 14:48:34 +00:00
steve 0510367b70 Fix compile errors with g++-4. 2005-07-06 22:41:34 +00:00
steve 3e11207a56 Fix gcc4 build issues. 2005-06-14 15:33:54 +00:00
steve 665f31271f popen must be matched by pclose. 2005-03-22 15:53:12 +00:00
steve 9a2b56675c Fix set_width to allow binary logical operands to be self determined. 2005-03-05 01:36:16 +00:00
steve c9f38f5ffa Improve distclean targets. 2005-02-23 18:40:23 +00:00
steve 5ea4152162 Spelling fixes from Larry. 2005-02-23 18:37:52 +00:00
steve 327c897d7e Spellig fixes. 2005-02-19 16:39:30 +00:00
steve 29ebe486b7 Fix multiple delete of an expression. 2005-02-19 16:38:14 +00:00
steve 4af0acb3be Fix (from Tony) for clock compression detection 2005-02-11 17:04:22 +00:00
steve 8435774c26 Fix evaluate of constants in netlist concatenation repeats. 2005-01-29 00:18:23 +00:00
steve 6172748c65 Add stub config files to CVS. 2005-01-28 18:30:11 +00:00
steve ca0ae9040a Add ability to compile real values into index registers. 2005-01-28 18:29:29 +00:00
steve d9cdbde3f6 More robust handling of file name argument to $fopen. 2005-01-01 20:07:41 +00:00
steve 307a97116f Fix leak of word registers in code generator. 2004-12-12 04:25:10 +00:00
steve 83d2c6dfd1 Update for 0.8 files. 2004-10-14 01:12:41 +00:00
419 changed files with 14024 additions and 16569 deletions
-26
View File
@@ -1,26 +0,0 @@
lexor_keyword.cc
parse.h
parse.cc
parse.cc.output
parse.output
syn-rules.cc
syn-rules.cc.output
syn-rules.output
lexor.cc
iverilog-vpi
iverilog-vpi.pdf
iverilog-vpi.ps
ivl
ivl.exp
dep
configure
Makefile
check
check.cc
config.status
config.log
config.cache
autom4te.cache
config.h
_pli_types.h
dosify
+82
View File
@@ -0,0 +1,82 @@
# Lines that start with '#' are comments.
#
# This file is for the development branch of Icarus Verilog.
#
# The following files will be ignored by git.
# Object files and libraries
*.[oa]
# From autoconf
configure
config.log
config.status
Makefile
/_pli_types.h
config.h
/tgt-vvp/vvp_config.h
/vpi/vpi_config.h
# Directories
autom4te.cache
dep
# Compiler back end and library files
/tgt-vvp/*.conf
*.tgt
*.vpi
/cadpli/cadpli.vpl
# lex, yacc and gperf output
/driver/cflexor.c
/driver/cfparse.c
/driver/cfparse.h
/driver/cfparse.output
/ivlpp/lexor.c
/ivlpp/parse.c
/ivlpp/parse.h
/ivlpp/parse.output
/lexor.cc
/lexor_keyword.cc
/parse.cc
/parse.h
/parse.output
/syn-rules.cc
/syn-rules.output
/vpi/sys_readmem_lex.c
/vvp/lexor.cc
/vvp/parse.cc
/vvp/parse.h
/vvp/parse.output
# Program created files
/vvp/tables.cc
# The executables.
*.exe
/driver/iverilog
/iverilog-vpi
/ivl
/ivlpp/ivlpp
/vvp/vvp
/ivl.exp
/vvp/vvp.exp
# Check output
/check.vvp
# The PostScript and PDF generated manual files.
/driver/iverilog.ps
/driver/iverilog.pdf
/iverilog-vpi.ps
/iverilog-vpi.pdf
/tgt-fpga/iverilog-fpga.ps
/tgt-fpga/iverilog-fpga.pdf
/vvp/vvp.ps
/vvp/vvp.pdf
+1 -38
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams ([email protected])
* Copyright (c) 2000-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Attrib.cc,v 1.6 2004/02/20 18:53:33 steve Exp $"
#endif
# include "config.h"
@@ -102,37 +99,3 @@ const verinum& Attrib::attr_value(unsigned idx) const
assert(idx < nlist_);
return list_[idx].val;
}
/*
* $Log: Attrib.cc,v $
* Revision 1.6 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.5 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.3 2002/05/23 03:08:50 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.2 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.1 2000/12/04 17:37:03 steve
* Add Attrib class for holding NetObj attributes.
*
*/
+1 -31
View File
@@ -1,7 +1,7 @@
#ifndef __Attrib_H
#define __Attrib_H
/*
* Copyright (c) 2000 Stephen Williams ([email protected])
* Copyright (c) 2000-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Attrib.h,v 1.5 2004/02/20 18:53:33 steve Exp $"
#endif
# include "StringHeap.h"
# include "verinum.h"
@@ -60,31 +57,4 @@ class Attrib {
Attrib& operator= (const Attrib&);
};
/*
* $Log: Attrib.h,v $
* Revision 1.5 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.4 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.2 2002/05/23 03:08:50 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.1 2000/12/04 17:37:03 steve
* Add Attrib class for holding NetObj attributes.
*
*/
#endif
+5 -5
View File
@@ -53,7 +53,7 @@ So, if your program doesn't compile, tell me so, tell me where the
error occurs, and include a complete Perfectly Valid Test Program(tm).
You tell me that it fails to compile for you, and I find that it
compiles for me, then hooray I fixed it. It can happen, you
know. What's on my disk is more recent then the latest snapshot.
know. What's on my disk is more recent than the latest snapshot.
If your program does compile, but generates incorrect output, I need
to know what it says and what you think it should say. From this I can
@@ -76,13 +76,13 @@ In this case, if possible include not only the sample verilog program,
but the generated netlist file(s) and a clear indication of what went
wrong. If it is not clear to me, I will ask for clarification.
* The Output is Correct, But Less Then Ideal
* The Output is Correct, But Less Than Ideal
If the output is strictly correct, but just not good enough for
practical use, I would like to know. These sorts of problems are
likely to be more subjective then a core dump, but are worthy of
likely to be more subjective than a core dump, but are worthy of
consideration. However, realize that outright errors will get more
attention then missed optimizations.
attention than missed optimizations.
THE MAKING OF A GOOD TEST PROGRAM
@@ -104,7 +104,7 @@ module may not be needed as long as the ``-s <name>'' switch is
given.
So when you send a test case, ask yourself "Can poor overworked Steve
invoke the error without any Verilog other then what is included?" And
invoke the error without any Verilog other than what is included?" And
while we are at it, please place a copyright notice in your test
program and include a GPL license statement if you can. Your test
program may find its way into the test suite, and the notices will
+1 -26
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
* Copyright (c) 2001-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: HName.cc,v 1.5 2002/11/02 03:27:52 steve Exp $"
#endif
# include "config.h"
# include "HName.h"
@@ -255,25 +252,3 @@ ostream& operator<< (ostream&out, const hname_t&that)
return out;
}
}
/*
* $Log: HName.cc,v $
* Revision 1.5 2002/11/02 03:27:52 steve
* Allow named events to be referenced by
* hierarchical names.
*
* Revision 1.4 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/01/05 04:36:06 steve
* include malloc.h only when available.
*
* Revision 1.2 2001/12/18 04:52:45 steve
* Include config.h for namespace declaration.
*
* Revision 1.1 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
*/
+1 -21
View File
@@ -1,7 +1,7 @@
#ifndef __HName_H
#define __HName_H
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
* Copyright (c) 2001-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: HName.h,v 1.4 2002/11/02 03:27:51 steve Exp $"
#endif
# include <iostream>
#ifdef __GNUC__
@@ -81,21 +78,4 @@ class hname_t {
extern bool operator < (const hname_t&, const hname_t&);
extern bool operator == (const hname_t&, const hname_t&);
/*
* $Log: HName.h,v $
* Revision 1.4 2002/11/02 03:27:51 steve
* Allow named events to be referenced by
* hierarchical names.
*
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2002/06/14 03:25:51 steve
* Compiler portability.
*
* Revision 1.1 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
*/
#endif
+4 -25
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams ([email protected])
* Copyright (c) 2000-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: LineInfo.cc,v 1.4 2003/01/17 05:49:03 steve Exp $"
#endif
# include "config.h"
@@ -34,12 +31,12 @@ LineInfo::~LineInfo()
{
}
string LineInfo::get_line() const
std::string LineInfo::get_line() const
{
ostringstream buf;
std::ostringstream buf;
buf << (file_? file_ : "") << ":" << lineno_;
string res = buf.str();
std::string res = buf.str();
return res;
}
@@ -58,21 +55,3 @@ void LineInfo::set_lineno(unsigned n)
{
lineno_ = n;
}
/*
* $Log: LineInfo.cc,v $
* Revision 1.4 2003/01/17 05:49:03 steve
* Use stringstream in place of sprintf.
*
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.1 2000/11/30 17:31:42 steve
* Change LineInfo to store const C strings.
*
*/
+4 -22
View File
@@ -1,7 +1,7 @@
#ifndef __LineInfo_H
#define __LineInfo_H
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,12 +18,11 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: LineInfo.h,v 1.7 2003/01/17 05:49:03 steve Exp $"
#endif
# include <string>
using namespace std;
/*
* This class holds line information for an internal object.
*
@@ -38,7 +37,7 @@ class LineInfo {
LineInfo();
~LineInfo();
string get_line() const;
std::string get_line() const;
void set_line(const LineInfo&that);
@@ -50,21 +49,4 @@ class LineInfo {
unsigned lineno_;
};
/*
* $Log: LineInfo.h,v $
* Revision 1.7 2003/01/17 05:49:03 steve
* Use stringstream in place of sprintf.
*
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2000/11/30 17:31:42 steve
* Change LineInfo to store const C strings.
*
* Revision 1.4 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.3 1999/02/15 02:06:15 steve
* Elaborate gate ranges.
*/
#endif
+106 -88
View File
@@ -15,21 +15,19 @@
# Software Foundation, Inc.,
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.169 2004/10/13 22:01:34 steve Exp $"
#
#
SHELL = /bin/sh
# This version string is only used in the version message printed
# by the compiler. It reflects the assigned version number for the
# product as a whole. Most components also print the CVS Name: token
# in order to get a more automatic version stamp as well.
VERSION = 0.8
# This string is used as an installation suffix. It modifies certain
# key install paths/files such that a build and install of Icarus Verilog
# with the same $(prefix) but a different $(suffix) will not interfere.
# The normal configuration leaves suffix empty
suffix = @install_suffix@
prefix = @prefix@
exec_prefix = @exec_prefix@
srcdir = @srcdir@
datarootdir = @datarootdir@
SUBDIRS = @subdirs@
@@ -37,7 +35,9 @@ VPATH = $(srcdir)
bindir = @bindir@
libdir = @libdir@
includedir = @includedir@
# This is actually the directory where we install our own header files.
# It is a little different from the generic includedir.
includedir = @includedir@/iverilog$(suffix)
mandir = @mandir@
libdir64 = @libdir64@
@@ -54,9 +54,11 @@ INSTALL_DATA = @INSTALL_DATA@
STRIP = @STRIP@
LEX = @LEX@
YACC = @YACC@
MAN = @MAN@
PS2PDF = @PS2PDF@
CPPFLAGS = @ident_support@ @DEFS@ -I. -I$(srcdir) @CPPFLAGS@
CXXFLAGS = -Wall @CXXFLAGS@
CPPFLAGS = @DEFS@ -I. -I$(srcdir) @CPPFLAGS@
CXXFLAGS = @WARNING_CXXFLAGS@ @CXXFLAGS@
PICFLAGS = @PICFLAG@
LDFLAGS = @rdynamic@ @LDFLAGS@
@@ -70,14 +72,14 @@ all: dep ivl@EXEEXT@
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in ivlpp tgt-verilog tgt-stub; \
do (cd $$dir ; $(MAKE) $@); done
cd driver ; $(MAKE) VERSION=$(VERSION) $@
cd driver ; $(MAKE) $@
# In the windows world, the installer will need a dosify program to
# dosify text files.
ifeq (@WIN32@,yes)
all: dep dosify.exe
dosify.exe: dosify.c
$(CC) -o dosify.exe dosify.c
dosify.exe: $(srcdir)/dosify.c
$(CC) -o dosify.exe $(srcdir)/dosify.c
endif
# This rule rules the compiler in the trivial hello.vl program to make
@@ -86,23 +88,44 @@ check: all
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) check); done
test -r check.conf || cp $(srcdir)/check.conf .
driver/iverilog -B. -BPivlpp -tcheck -ocheck.vvp $(srcdir)/examples/hello.vl
ifeq (@WIN32@,yes)
ifeq (@install_suffix@,)
vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
else
# On Windows if we have a suffix we must run the vvp part of
# the test with a suffix since it was built/linked that way.
ln vvp/vvp.exe vvp/vvp$(suffix).exe
vvp/vvp$(suffix) -M- -M./vpi ./check.vvp | grep 'Hello, World'
rm vvp/vvp$(suffix).exe
endif
else
vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
endif
clean:
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
do (cd $$dir ; $(MAKE) $@); done
rm -f *.o parse.cc parse.cc.output parse.h lexor.cc
rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc*
rm -rf dep ivl@EXEEXT@
rm -f *.o parse.cc parse.h lexor.cc
rm -f ivl.exp iverilog-vpi.pdf iverilog-vpi.ps parse.output
rm -f syn-rules.output dosify.exe ivl@EXEEXT@ check.vvp
rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc
rm -rf dep
distclean: clean
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp tgt-verilog tgt-stub driver; \
do (cd $$dir ; $(MAKE) $@); done
rm -f Makefile config.status config.log config.cache config.h
rm -f Makefile config.status config.log config.cache
rm -f config.h
rm -f _pli_types.h
ifneq (@srcdir@,.)
rm -f check.conf
rmdir $(SUBDIRS)
endif
rm -rf autom4te.cache
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-xnf.o
FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o xnfio.o
@@ -132,11 +155,11 @@ ifeq (@WIN32@,yes)
# The first step makes an ivl.exe that dlltool can use to make an
# export and import library, and the last link makes a, ivl.exe
# that really exports the things that the import library imports.
ivl@EXEEXT@: $O ivl.def
ivl@EXEEXT@: $O $(srcdir)/ivl.def
$(CXX) -o ivl@EXEEXT@ $O $(dllib) @EXTRALIBS@
dlltool --dllname ivl@EXEEXT@ --def ivl.def \
dlltool --dllname ivl@EXEEXT@ --def $(srcdir)/ivl.def \
--output-lib libivl.a --output-exp ivl.exp
$(CXX) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ ivl.exp $O $(dllib) @EXTRALIBS@
else
ivl@EXEEXT@: $O
$(CXX) $(LDFLAGS) -o ivl@EXEEXT@ $O $(dllib)
@@ -150,9 +173,13 @@ all: dep iverilog-vpi
iverilog-vpi: iverilog-vpi.sh
sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \
-e 's;@INCLUDEDIR@;@includedir@;' \
-e 's;@SUFFIX@;$(suffix);' \
-e 's;@IVCC@;$(CC);' \
-e 's;@IVCXX@;$(CXX);' \
-e 's;@IVCFLAGS@;$(CXXFLAGS);' \
-e 's;@LIBDIR64@;@libdir64@;' \
-e 's;@VPIDIR1@;@vpidir1@;' -e 's;@VPIDIR2@;@vpidir2@;' \
-e 's;@INCLUDEDIR@;$(includedir);' \
-e 's;@LIBDIR@;@libdir@;' $< > $@
chmod +x $@
endif
@@ -161,7 +188,7 @@ dep:
mkdir dep
%.o: %.cc
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -MD -c $< -o $*.o
$(CXX) $(CPPFLAGS) $(CXXFLAGS) @DEPENDENCY_CPPFLAGS@ -c $< -o $*.o $(DEBUGFLAGS)
mv $*.d dep/$*.d
@@ -169,10 +196,8 @@ lexor.o: lexor.cc parse.h
parse.o: parse.cc
parse.cc: $(srcdir)/parse.y
parse.cc parse.h: $(srcdir)/parse.y
$(YACC) --verbose -t -p VL -d -o parse.cc $(srcdir)/parse.y
parse.h: parse.cc
mv parse.cc.h parse.h 2>/dev/null || mv parse.hh parse.h
syn-rules.cc: $(srcdir)/syn-rules.y
@@ -187,105 +212,98 @@ lexor_keyword.cc: lexor_keyword.gperf
gperf -o -i 7 -C -k 1-3,$$ -L ANSI-C -H keyword_hash -N check_identifier -t $(srcdir)/lexor_keyword.gperf > lexor_keyword.cc || (rm -f lexor_keyword.cc ; false)
iverilog-vpi.ps: $(srcdir)/iverilog-vpi.man
man -t $(srcdir)/iverilog-vpi.man > iverilog-vpi.ps
$(MAN) -t $(srcdir)/iverilog-vpi.man > iverilog-vpi.ps
iverilog-vpi.pdf: iverilog-vpi.ps
ps2pdf iverilog-vpi.ps iverilog-vpi.pdf
$(PS2PDF) iverilog-vpi.ps iverilog-vpi.pdf
# Build and install the iverilog-vpi.pdf only if there is a man
# program *and* a ps2pdf program.
ifeq (@WIN32@,yes)
INSTALL_DOC = $(prefix)/iverilog-vpi.pdf $(mandir)/man1/iverilog-vpi.1
INSTALL_DOCDIR = $(mandir)/man1
all: dep iverilog-vpi.pdf
ifeq ($(MAN),none)
INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
else
INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
ifeq ($(PS2PDF),none)
INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
else
INSTALL_DOC = $(prefix)/iverilog-vpi$(suffix).pdf $(mandir)/man1/iverilog-vpi$(suffix).1
all: dep iverilog-vpi.pdf
endif
endif
INSTALL_DOCDIR = $(mandir)/man1
else
INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
INSTALL_DOCDIR = $(mandir)/man1
endif
ifeq (@MINGW32@,yes)
WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt
WIN32_INSTALL =
else
WIN32_INSTALL = $(bindir)/iverilog-vpi
WIN32_INSTALL = $(bindir)/iverilog-vpi$(suffix)
endif
XNF_INSTALL = $(libdir)/ivl/xnf.conf $(libdir)/ivl/xnf-s.conf
XNF_INSTALL = $(libdir)/ivl$(suffix)/xnf.conf $(libdir)/ivl$(suffix)/xnf-s.conf
install: all installdirs $(libdir)/ivl/ivl@EXEEXT@ $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC) $(XNF_INSTALL)
install: all installdirs $(libdir)/ivl$(suffix)/ivl@EXEEXT@ $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC) $(XNF_INSTALL)
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp driver; \
do (cd $$dir ; $(MAKE) $@); done
$(bindir)/iverilog-vpi: ./iverilog-vpi
$(INSTALL_SCRIPT) ./iverilog-vpi $(bindir)/iverilog-vpi
$(DESTDIR)$(bindir)/iverilog-vpi$(suffix): ./iverilog-vpi
$(INSTALL_SCRIPT) ./iverilog-vpi $(DESTDIR)$(bindir)/iverilog-vpi$(suffix)
$(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@
$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(libdir)/ivl/ivl@EXEEXT@
$(STRIP) $(strip_dynamic) $(libdir)/ivl/ivl@EXEEXT@
$(libdir)/ivl$(suffix)/ivl@EXEEXT@: ./ivl@EXEEXT@
$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(DESTDIR)$(libdir)/ivl$(suffix)/ivl@EXEEXT@
$(libdir)/ivl/xnf-s.conf: $(srcdir)/xnf-s.conf
$(INSTALL_DATA) $(srcdir)/xnf-s.conf $(libdir)/ivl/xnf-s.conf
$(DESTDIR)$(libdir)/ivl$(suffix)/xnf-s.conf: $(srcdir)/xnf-s.conf
$(INSTALL_DATA) $(srcdir)/xnf-s.conf $(DESTDIR)$(libdir)/ivl$(suffix)/xnf-s.conf
$(libdir)/ivl/xnf.conf: $(srcdir)/xnf.conf
$(INSTALL_DATA) $(srcdir)/xnf.conf $(libdir)/ivl/xnf.conf
$(DESTDIR)$(libdir)/ivl$(suffix)/xnf.conf: $(srcdir)/xnf.conf
$(INSTALL_DATA) $(srcdir)/xnf.conf $(DESTDIR)$(libdir)/ivl$(suffix)/xnf.conf
$(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
$(INSTALL_DATA) $(srcdir)/ivl_target.h $(includedir)/ivl_target.h
$(DESTDIR)$(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
$(INSTALL_DATA) $(srcdir)/ivl_target.h $(DESTDIR)$(includedir)/ivl_target.h
$(includedir)/_pli_types.h: _pli_types.h
$(INSTALL_DATA) $< $(includedir)/_pli_types.h
$(DESTDIR)$(includedir)/_pli_types.h: _pli_types.h
$(INSTALL_DATA) $< $(DESTDIR)$(includedir)/_pli_types.h
$(includedir)/vpi_user.h: $(srcdir)/vpi_user.h
$(INSTALL_DATA) $(srcdir)/vpi_user.h $(includedir)/vpi_user.h
$(DESTDIR)$(includedir)/vpi_user.h: $(srcdir)/vpi_user.h
$(INSTALL_DATA) $(srcdir)/vpi_user.h $(DESTDIR)$(includedir)/vpi_user.h
$(includedir)/acc_user.h: $(srcdir)/acc_user.h
$(INSTALL_DATA) $(srcdir)/acc_user.h $(includedir)/acc_user.h
$(DESTDIR)$(includedir)/acc_user.h: $(srcdir)/acc_user.h
$(INSTALL_DATA) $(srcdir)/acc_user.h $(DESTDIR)$(includedir)/acc_user.h
$(includedir)/veriuser.h: $(srcdir)/veriuser.h
$(INSTALL_DATA) $(srcdir)/veriuser.h $(includedir)/veriuser.h
$(DESTDIR)$(includedir)/veriuser.h: $(srcdir)/veriuser.h
$(INSTALL_DATA) $(srcdir)/veriuser.h $(DESTDIR)$(includedir)/veriuser.h
$(mandir)/man1/iverilog-vpi.1: $(srcdir)/iverilog-vpi.man
$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(mandir)/man1/iverilog-vpi.1
$(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1: $(srcdir)/iverilog-vpi.man
$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1
$(prefix)/iverilog-vpi.pdf: iverilog-vpi.pdf
$(INSTALL_DATA) iverilog-vpi.pdf $(prefix)/iverilog-vpi.pdf
$(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf: iverilog-vpi.pdf
$(INSTALL_DATA) iverilog-vpi.pdf $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf
# In windows installations, put a few examples and the quick_start
# into the destination directory.
ifeq (@MINGW32@,yes)
$(prefix)/hello.vl: $(srcdir)/examples/hello.vl
./dosify.exe $(srcdir)/examples/hello.vl tmp.vl
mv tmp.vl $(prefix)/hello.vl
$(prefix)/sqrt.vl: $(srcdir)/examples/sqrt.vl
./dosify.exe $(srcdir)/examples/sqrt.vl tmp.vl
mv tmp.vl $(prefix)/sqrt.vl
$(prefix)/sqrt-virtex.v: $(srcdir)/examples/sqrt-virtex.v
./dosify.exe $(srcdir)/examples/sqrt-virtex.v tmp.vl
mv tmp.vl $(prefix)/sqrt-virtex.v
$(prefix)/QUICK_START.txt: $(srcdir)/QUICK_START.txt
./dosify.exe $(srcdir)/QUICK_START.txt tmp.txt
mv tmp.txt $(prefix)/QUICK_START.txt
endif
installdirs: mkinstalldirs
$(srcdir)/mkinstalldirs $(bindir) $(includedir) $(libdir)/ivl \
$(mandir) $(mandir)/man1
$(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)/ivl$(suffix) \
$(DESTDIR)$(libdir)/ivl$(suffix)/include $(DESTDIR)$(mandir) $(DESTDIR)$(mandir)/man1
uninstall:
for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
for tgt in $(TARGETS); do (cd $$tgt ; $(MAKE) $@); done
for dir in vpi ivlpp driver; \
do (cd $$dir ; $(MAKE) $@); done
for f in xnf.conf xnf-s.conf ivl; \
do rm -f $(libdir)/ivl/$$f; done
-rmdir $(libdir)/ivl
for f in verilog iverilog-vpi gverilog@EXEEXT@; \
do rm -f $(bindir)/$$f; done
for f in xnf.conf xnf-s.conf ivl@EXEEXT@; \
do rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/$$f; done
-rmdir $(DESTDIR)$(libdir)/ivl$(suffix)/include
-rmdir $(DESTDIR)$(libdir)/ivl$(suffix)
for f in verilog$(suffix) iverilog-vpi$(suffix); \
do rm -f $(DESTDIR)$(bindir)/$$f; done
for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \
do rm -f $(includedir)/$$f; done
rm -f $(mandir)/man1/iverilog-vpi.1
do rm -f $(DESTDIR)$(includedir)/$$f; done
-test X$(suffix) = X || rmdir $(DESTDIR)$(includedir)
rm -f $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1
rm -f $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf
-include $(patsubst %.o, dep/%.d, $O)
+2 -93
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Module.cc,v 1.25 2004/10/04 01:10:51 steve Exp $"
#endif
# include "config.h"
@@ -91,7 +88,7 @@ const svector<PEIdent*>& Module::get_port(unsigned idx) const
unsigned Module::find_port(const char*name) const
{
assert(name != "");
assert(name != 0);
for (unsigned idx = 0 ; idx < ports.count() ; idx += 1) {
if (ports[idx] == 0) {
/* It is possible to have undeclared ports. These
@@ -146,91 +143,3 @@ const list<PProcess*>& Module::get_behaviors() const
{
return behaviors_;
}
/*
* $Log: Module.cc,v $
* Revision 1.25 2004/10/04 01:10:51 steve
* Clean up spurious trailing white space.
*
* Revision 1.24 2004/06/13 04:56:53 steve
* Add support for the default_nettype directive.
*
* Revision 1.23 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.22 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.21 2003/04/02 03:00:14 steve
* Cope with empty module ports while binding by name.
*
* Revision 1.20 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
* Revision 1.19 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.18 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.17 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.16 2001/10/20 05:21:51 steve
* Scope/module names are char* instead of string.
*
* Revision 1.15 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.14 2000/11/15 20:31:05 steve
* Fix warning about temporaries.
*
* Revision 1.13 2000/11/05 06:05:59 steve
* Handle connectsion to internally unconnected modules (PR#38)
*
* Revision 1.12 2000/05/16 04:05:15 steve
* Module ports are really special PEIdent
* expressions, because a name can be used
* many places in the port list.
*
* Revision 1.11 2000/03/12 17:09:40 steve
* Support localparam.
*
* Revision 1.10 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.9 2000/01/09 20:37:57 steve
* Careful with wires connected to multiple ports.
*
* Revision 1.8 1999/12/11 05:45:41 steve
* Fix support for attaching attributes to primitive gates.
*
* Revision 1.7 1999/09/17 02:06:25 steve
* Handle unconnected module ports.
*
* Revision 1.6 1999/08/04 02:13:02 steve
* Elaborate module ports that are concatenations of
* module signals.
*
* Revision 1.5 1999/08/03 04:14:49 steve
* Parse into pform arbitrarily complex module
* port declarations.
*
* Revision 1.4 1999/07/31 19:14:47 steve
* Add functions up to elaboration (Ed Carter)
*
* Revision 1.3 1999/07/03 02:12:51 steve
* Elaborate user defined tasks.
*
* Revision 1.2 1999/06/17 05:34:42 steve
* Clean up interface of the PWire class,
* Properly match wire ranges.
*
* Revision 1.1 1998/11/03 23:28:51 steve
* Introduce verilog to CVS.
*
*/
+1 -48
View File
@@ -1,7 +1,7 @@
#ifndef __Module_H
#define __Module_H
/*
* Copyright (c) 1998-2004 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Module.h,v 1.37 2004/06/13 04:56:53 steve Exp $"
#endif
# include <list>
# include <map>
@@ -164,48 +161,4 @@ class Module : public LineInfo {
Module& operator= (const Module&);
};
/*
* $Log: Module.h,v $
* Revision 1.37 2004/06/13 04:56:53 steve
* Add support for the default_nettype directive.
*
* Revision 1.36 2004/05/25 19:21:06 steve
* More identifier lists use perm_strings.
*
* Revision 1.35 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.34 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.33 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.32 2003/06/20 00:53:19 steve
* Module attributes from the parser
* through to elaborated form.
*
* Revision 1.31 2003/06/13 19:10:45 steve
* Properly manage real variables in subscopes.
*
* Revision 1.30 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
* Revision 1.29 2003/02/27 06:45:11 steve
* specparams as far as pform.
*
* Revision 1.28 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.27 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.26 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.25 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*/
#endif
+1 -16
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
* Copyright (c) 2003-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PData.cc,v 1.2 2003/11/10 20:11:01 steve Exp $"
#endif
# include "config.h"
# include "PData.h"
@@ -36,15 +33,3 @@ const hname_t&PData::name() const
{
return hname_;
}
/*
* $Log: PData.cc,v $
* Revision 1.2 2003/11/10 20:11:01 steve
* missing include of config.h
*
* Revision 1.1 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
*/
+1 -11
View File
@@ -1,7 +1,7 @@
#ifndef __PData_H
#define __PData_H
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
* Copyright (c) 2003-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PData.h,v 1.1 2003/01/26 21:15:58 steve Exp $"
#endif
# include "HName.h"
# include "netlist.h"
@@ -53,11 +50,4 @@ class PData : public LineInfo {
PData& operator= (const PData&);
};
/*
* $Log: PData.h,v $
* Revision 1.1 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
*/
#endif
+15 -51
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PDelays.cc,v 1.11 2003/06/21 01:21:42 steve Exp $"
#endif
# include "config.h"
@@ -72,6 +69,20 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
dex = tmp;
}
int shift = scope->time_unit() - des->get_precision();
if (sizeof(unsigned) <= 4 && shift > 9) {
cerr << expr->get_line() << ": error: Precision overflow"
<< " in scope " << scope->name() << "." << endl;
cerr << expr->get_line() << ": :"
<< " Units are 10e" << scope->time_unit()
<< " minus precision 10e" << des->get_precision()
<< " is 10e" << shift << "." << endl;
cerr << expr->get_line() << ": : Perhaps a timescale "
<< "is missing or incorrect?" << endl;
des->errors += 1;
return 0;
}
/* If the delay expression is a real constant or vector
constant, then evaluate it, scale it to the local time
units, and return an adjusted value. */
@@ -79,7 +90,6 @@ static unsigned long calculate_val(Design*des, NetScope*scope,
if (NetECReal*tmp = dynamic_cast<NetECReal*>(dex)) {
verireal fn = tmp->value();
int shift = scope->time_unit() - des->get_precision();
long delay = fn.as_long(shift);
if (delay < 0)
delay = 0;
@@ -143,49 +153,3 @@ void PDelays::eval_delays(Design*des, NetScope*scope,
decay_time = 0;
}
}
/*
* $Log: PDelays.cc,v $
* Revision 1.11 2003/06/21 01:21:42 steve
* Harmless fixup of warnings.
*
* Revision 1.10 2003/02/08 19:49:21 steve
* Calculate delay statement delays using elaborated
* expressions instead of pre-elaborated expression
* trees.
*
* Remove the eval_pexpr methods from PExpr.
*
* Revision 1.9 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.8 2001/12/29 20:19:31 steve
* Do not delete delay expressions of UDP instances.
*
* Revision 1.7 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.6 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.5 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.4 2001/01/20 02:15:50 steve
* apologize for not supporting non-constant delays.
*
* Revision 1.3 2001/01/14 23:04:55 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
*
* Allow parameters to be referenced by hierarchical name.
*
* Revision 1.2 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.1 1999/09/04 19:11:46 steve
* Add support for delayed non-blocking assignments.
*
*/
+1 -28
View File
@@ -1,7 +1,7 @@
#ifndef __PDelays_H
#define __PDelays_H
/*
* Copyright (c) 1999-2002 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PDelays.h,v 1.7 2002/08/12 01:34:58 steve Exp $"
#endif
# include "svector.h"
# include <string>
@@ -70,28 +67,4 @@ class PDelays {
ostream& operator << (ostream&o, const PDelays&);
/*
* $Log: PDelays.h,v $
* Revision 1.7 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2002/06/14 03:25:51 steve
* Compiler portability.
*
* Revision 1.5 2001/12/29 20:19:31 steve
* Do not delete delay expressions of UDP instances.
*
* Revision 1.4 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.3 2001/01/16 02:44:17 steve
* Use the iosfwd header if available.
*
* Revision 1.2 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.1 1999/09/04 19:11:46 steve
* Add support for delayed non-blocking assignments.
*
*/
#endif
+1 -28
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2004 Stephen Williams ([email protected])
* Copyright (c) 2004-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PEvent.cc,v 1.5 2004/02/19 06:57:10 steve Exp $"
#endif
# include "config.h"
@@ -37,27 +34,3 @@ perm_string PEvent::name() const
{
return name_;
}
/*
* $Log: PEvent.cc,v $
* Revision 1.5 2004/02/19 06:57:10 steve
* Memory and Event names use perm_string.
*
* Revision 1.4 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
* into this table. Also, permallocate event
* names from the beginning.
*
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.1 2000/04/01 19:31:57 steve
* Named events as far as the pform.
*
*/
+1 -38
View File
@@ -1,7 +1,7 @@
#ifndef __PEvent_H
#define __PEvent_H
/*
* Copyright (c) 2000-2004 Stephen Williams ([email protected])
* Copyright (c) 2000-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PEvent.h,v 1.9 2004/02/19 06:57:10 steve Exp $"
#endif
# include "LineInfo.h"
# include "StringHeap.h"
@@ -54,38 +51,4 @@ class PEvent : public LineInfo {
PEvent& operator= (const PEvent&);
};
/*
* $Log: PEvent.h,v $
* Revision 1.9 2004/02/19 06:57:10 steve
* Memory and Event names use perm_string.
*
* Revision 1.8 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
* into this table. Also, permallocate event
* names from the beginning.
*
* Revision 1.7 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.4 2001/01/16 02:44:18 steve
* Use the iosfwd header if available.
*
* Revision 1.3 2000/04/09 17:44:30 steve
* Catch event declarations during scope elaborate.
*
* Revision 1.2 2000/04/04 03:20:15 steve
* Simulate named event trigger and waits.
*
* Revision 1.1 2000/04/01 19:31:57 steve
* Named events as far as the pform.
*
*/
#endif
+3 -144
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-1999 Stephen Williams <[email protected]>
* Copyright (c) 1998-2010 Stephen Williams <[email protected]>
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PExpr.cc,v 1.35 2004/10/04 01:10:51 steve Exp $"
#endif
# include "config.h"
@@ -90,6 +87,8 @@ bool PEConcat::is_constant(Module *mod) const
{
bool constant = repeat_? repeat_->is_constant(mod) : true;
for (unsigned i = 0; constant && i < parms_.count(); ++i) {
if (parms_[i] == 0)
continue;
constant = constant && parms_[i]->is_constant(mod);
}
return constant;
@@ -259,143 +258,3 @@ bool PEUnary::is_constant(Module*m) const
{
return expr_->is_constant(m);
}
/*
* $Log: PExpr.cc,v $
* Revision 1.35 2004/10/04 01:10:51 steve
* Clean up spurious trailing white space.
*
* Revision 1.34 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.33 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.32 2002/11/09 19:20:48 steve
* Port expressions for output ports are lnets, not nets.
*
* Revision 1.31 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.30 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.29 2001/12/30 21:32:03 steve
* Support elaborate_net for PEString objects.
*
* Revision 1.28 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.27 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration.
*
* Revision 1.26 2001/11/07 04:26:46 steve
* elaborate_lnet uses scope instead of string path.
*
* Revision 1.25 2001/11/06 06:11:55 steve
* Support more real arithmetic in delay constants.
*
* Revision 1.24 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.23 2001/01/14 23:04:55 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
*
* Allow parameters to be referenced by hierarchical name.
*
* Revision 1.22 2001/01/12 04:31:27 steve
* Handle error idents in constants not in any scope (PR#97)
*
* Revision 1.21 2000/12/16 19:03:30 steve
* Evaluate <= and ?: in parameter expressions (PR#81)
*
* Revision 1.20 2000/12/10 22:01:35 steve
* Support decimal constants in behavioral delays.
*
* Revision 1.19 2000/06/30 15:50:20 steve
* Allow unary operators in constant expressions.
*
* Revision 1.18 2000/05/07 04:37:55 steve
* Carry strength values from Verilog source to the
* pform and netlist for gates.
*
* Change vvm constants to use the driver_t to drive
* a constant value. This works better if there are
* multiple drivers on a signal.
*
* Revision 1.17 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
*
* Revision 1.16 2000/04/12 04:23:57 steve
* Named events really should be expressed with PEIdent
* objects in the pform,
*
* Handle named events within the mix of net events
* and edges. As a unified lot they get caught together.
* wait statements are broken into more complex statements
* that include a conditional.
*
* Do not generate NetPEvent or NetNEvent objects in
* elaboration. NetEvent, NetEvWait and NetEvProbe
* take over those functions in the netlist.
*
* Revision 1.15 2000/04/01 19:31:57 steve
* Named events as far as the pform.
*
* Revision 1.14 2000/03/12 18:22:11 steve
* Binary and unary operators in parameter expressions.
*
* Revision 1.13 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.12 1999/12/31 17:38:37 steve
* Standardize some of the error messages.
*
* Revision 1.11 1999/10/31 04:11:27 steve
* Add to netlist links pin name and instance number,
* and arrange in vvm for pin connections by name
* and instance number.
*
* Revision 1.10 1999/09/25 02:57:29 steve
* Parse system function calls.
*
* Revision 1.9 1999/09/16 04:18:15 steve
* elaborate concatenation repeats.
*
* Revision 1.8 1999/09/15 04:17:52 steve
* separate assign lval elaboration for error checking.
*
* Revision 1.7 1999/07/22 02:05:20 steve
* is_constant method for PEConcat.
*
* Revision 1.6 1999/07/17 19:50:59 steve
* netlist support for ternary operator.
*
* Revision 1.5 1999/06/16 03:13:29 steve
* More syntax parse with sorry stubs.
*
* Revision 1.4 1999/06/10 04:03:52 steve
* Add support for the Ternary operator,
* Add support for repeat concatenation,
* Correct some seg faults cause by elaboration
* errors,
* Parse the casex anc casez statements.
*
* Revision 1.3 1999/05/16 05:08:42 steve
* Redo constant expression detection to happen
* after parsing.
*
* Parse more operators and expressions.
*
* Revision 1.2 1998/11/11 00:01:51 steve
* Check net ranges in declarations.
*
* Revision 1.1 1998/11/03 23:28:53 steve
* Introduce verilog to CVS.
*
*/
+6 -72
View File
@@ -1,7 +1,7 @@
#ifndef __PExpr_H
#define __PExpr_H
/*
* Copyright (c) 1998-2000 Stephen Williams <[email protected]>
* Copyright (c) 1998-2010 Stephen Williams <[email protected]>
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PExpr.h,v 1.66 2004/10/04 01:10:51 steve Exp $"
#endif
# include <string>
# include "netlist.h"
@@ -115,6 +112,8 @@ class PEConcat : public PExpr {
PEConcat(const svector<PExpr*>&p, PExpr*r =0);
~PEConcat();
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
virtual void dump(ostream&) const;
// Concatenated Regs can be on the left of procedural
@@ -324,7 +323,7 @@ class PEString : public PExpr {
virtual NetEConst*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
verinum* PEString::eval_const(const Design*, const NetScope*) const;
verinum* eval_const(const Design*, const NetScope*) const;
virtual bool is_constant(Module*) const;
@@ -374,7 +373,7 @@ class PEBinary : public PExpr {
unsigned long decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
virtual NetEBinary*elaborate_expr(Design*des, NetScope*,
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
bool sys_task_arg =false) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(const Design*des, const NetScope*sc) const;
@@ -384,7 +383,7 @@ class PEBinary : public PExpr {
PExpr*left_;
PExpr*right_;
NetEBinary*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp) const;
NetExpr*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp) const;
NetNet* elaborate_net_add_(Design*des, NetScope*scope,
unsigned lwidth,
@@ -490,69 +489,4 @@ class PECallFunction : public PExpr {
NetExpr* elaborate_sfunc_(Design*des, NetScope*scope) const;
};
/*
* $Log: PExpr.h,v $
* Revision 1.66 2004/10/04 01:10:51 steve
* Clean up spurious trailing white space.
*
* Revision 1.65 2003/02/08 19:49:21 steve
* Calculate delay statement delays using elaborated
* expressions instead of pre-elaborated expression
* trees.
*
* Remove the eval_pexpr methods from PExpr.
*
* Revision 1.64 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.63 2002/11/09 19:20:48 steve
* Port expressions for output ports are lnets, not nets.
*
* Revision 1.62 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.61 2002/06/04 05:38:43 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.60 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.59 2002/04/23 03:53:59 steve
* Add support for non-constant bit select.
*
* Revision 1.58 2002/04/14 03:55:25 steve
* Precalculate unary - if possible.
*
* Revision 1.57 2002/04/13 02:33:17 steve
* Detect missing indices to memories (PR#421)
*
* Revision 1.56 2002/03/09 04:02:26 steve
* Constant expressions are not l-values for task ports.
*
* Revision 1.55 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.54 2001/12/30 21:32:03 steve
* Support elaborate_net for PEString objects.
*
* Revision 1.53 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.52 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration.
*
* Revision 1.51 2001/11/07 04:26:46 steve
* elaborate_lnet uses scope instead of string path.
*
* Revision 1.50 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*/
#endif
+1 -29
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PFunction.cc,v 1.7 2004/05/31 23:34:36 steve Exp $"
#endif
# include "config.h"
@@ -51,28 +48,3 @@ void PFunction::set_return(PTaskFuncArg t)
{
return_type_ = t;
}
/*
* $Log: PFunction.cc,v $
* Revision 1.7 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.4 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
*
* Revision 1.3 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.2 1999/08/25 22:22:41 steve
* elaborate some aspects of functions.
*
*/
+1 -64
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2004 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGate.cc,v 1.16 2004/02/18 17:11:54 steve Exp $"
#endif
# include "config.h"
@@ -188,63 +185,3 @@ perm_string PGModule::get_type()
{
return type_;
}
/*
* $Log: PGate.cc,v $
* Revision 1.16 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.15 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
* Revision 1.14 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.13 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.12 2001/10/21 00:42:47 steve
* Module types in pform are char* instead of string.
*
* Revision 1.11 2001/10/19 01:55:32 steve
* Method to get the type_ member
*
* Revision 1.10 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.9 2000/05/06 15:41:56 steve
* Carry assignment strength to pform.
*
* Revision 1.8 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
* Revision 1.7 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.6 2000/02/18 05:15:02 steve
* Catch module instantiation arrays.
*
* Revision 1.5 1999/09/14 01:50:35 steve
* Handle gates without delays.
*
* Revision 1.4 1999/09/04 19:11:46 steve
* Add support for delayed non-blocking assignments.
*
* Revision 1.3 1999/08/01 21:18:55 steve
* elaborate rise/fall/decay for continuous assign.
*
* Revision 1.2 1999/08/01 16:34:50 steve
* Parse and elaborate rise/fall/decay times
* for gates, and handle the rules for partial
* lists of times.
*
* Revision 1.1 1999/02/15 02:06:15 steve
* Elaborate gate ranges.
*
*/
+1 -126
View File
@@ -1,7 +1,7 @@
#ifndef __PGate_H
#define __PGate_H
/*
* Copyright (c) 1998-2004 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PGate.h,v 1.29 2004/10/04 01:10:52 steve Exp $"
#endif
# include "svector.h"
# include "StringHeap.h"
@@ -225,126 +222,4 @@ class PGModule : public PGate {
bool elaborate_sig_mod_(Design*des, NetScope*scope, Module*mod) const;
};
/*
* $Log: PGate.h,v $
* Revision 1.29 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.28 2004/03/08 00:47:44 steve
* primitive ports can bind bi name.
*
* Revision 1.27 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.26 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.25 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
* Revision 1.24 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.23 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.22 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.21 2001/10/21 00:42:47 steve
* Module types in pform are char* instead of string.
*
* Revision 1.20 2001/10/19 01:55:32 steve
* Method to get the type_ member
*
* Revision 1.19 2001/04/22 23:09:45 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.18 2000/05/06 15:41:56 steve
* Carry assignment strength to pform.
*
* Revision 1.17 2000/05/02 16:27:38 steve
* Move signal elaboration to a seperate pass.
*
* Revision 1.16 2000/03/29 04:37:10 steve
* New and improved combinational primitives.
*
* Revision 1.15 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
* Revision 1.14 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.13 2000/02/18 05:15:02 steve
* Catch module instantiation arrays.
*
* Revision 1.12 2000/01/09 05:50:48 steve
* Support named parameter override lists.
*
* Revision 1.11 1999/12/11 05:45:41 steve
* Fix support for attaching attributes to primitive gates.
*
* Revision 1.10 1999/09/04 19:11:46 steve
* Add support for delayed non-blocking assignments.
*
* Revision 1.9 1999/08/23 16:48:39 steve
* Parameter overrides support from Peter Monta
* AND and XOR support wide expressions.
*
* Revision 1.8 1999/08/01 21:18:55 steve
* elaborate rise/fall/decay for continuous assign.
*
* Revision 1.7 1999/08/01 16:34:50 steve
* Parse and elaborate rise/fall/decay times
* for gates, and handle the rules for partial
* lists of times.
*
* Revision 1.6 1999/05/29 02:36:17 steve
* module parameter bind by name.
*
* Revision 1.5 1999/05/10 00:16:58 steve
* Parse and elaborate the concatenate operator
* in structural contexts, Replace vector<PExpr*>
* and list<PExpr*> with svector<PExpr*>, evaluate
* constant expressions with parameters, handle
* memories as lvalues.
*
* Parse task declarations, integer types.
*
* Revision 1.4 1999/02/15 02:06:15 steve
* Elaborate gate ranges.
*
* Revision 1.3 1999/01/25 05:45:56 steve
* Add the LineInfo class to carry the source file
* location of things. PGate, Statement and PProcess.
*
* elaborate handles module parameter mismatches,
* missing or incorrect lvalues for procedural
* assignment, and errors are propogated to the
* top of the elaboration call tree.
*
* Attach line numbers to processes, gates and
* assignment statements.
*
* Revision 1.2 1998/12/01 00:42:13 steve
* Elaborate UDP devices,
* Support UDP type attributes, and
* pass those attributes to nodes that
* are instantiated by elaboration,
* Put modules into a map instead of
* a simple list.
*
* Revision 1.1 1998/11/03 23:28:54 steve
* Introduce verilog to CVS.
*
*/
#endif
+1 -32
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PTask.cc,v 1.7 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
@@ -44,31 +41,3 @@ void PTask::set_statement(Statement*s)
assert(statement_ == 0);
statement_ = s;
}
/*
* $Log: PTask.cc,v $
* Revision 1.7 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.5 2001/04/19 03:04:47 steve
* Spurious assert of empty statemnt.
*
* Revision 1.4 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
*
* Revision 1.3 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.2 1999/07/24 02:11:19 steve
* Elaborate task input ports.
*
* Revision 1.1 1999/07/03 02:12:51 steve
* Elaborate user defined tasks.
*
*/
+3 -61
View File
@@ -1,7 +1,7 @@
#ifndef __PTask_H
#define __PTask_H
/*
* Copyright (c) 1999-2000 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PTask.h,v 1.13 2004/05/31 23:34:36 steve Exp $"
#endif
# include "LineInfo.h"
# include "svector.h"
@@ -70,7 +67,7 @@ class PTask : public LineInfo {
// Elaborate the statement to finish off the task definition.
void elaborate(Design*des, NetScope*scope) const;
void dump(ostream&, unsigned) const;
void dump(std::ostream&, unsigned) const;
private:
svector<PWire*>*ports_;
@@ -106,7 +103,7 @@ class PFunction : public LineInfo {
/* Elaborate the behavioral statement. */
void elaborate(Design *des, NetScope*) const;
void dump(ostream&, unsigned) const;
void dump(std::ostream&, unsigned) const;
private:
perm_string name_;
@@ -115,59 +112,4 @@ class PFunction : public LineInfo {
Statement *statement_;
};
/*
* $Log: PTask.h,v $
* Revision 1.13 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.12 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.11 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.10 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
*
* Revision 1.9 2000/07/30 18:25:43 steve
* Rearrange task and function elaboration so that the
* NetTaskDef and NetFuncDef functions are created during
* signal enaboration, and carry these objects in the
* NetScope class instead of the extra, useless map in
* the Design class.
*
* Revision 1.8 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
* Revision 1.7 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.6 1999/09/30 21:28:34 steve
* Handle mutual reference of tasks by elaborating
* task definitions in two passes, like functions.
*
* Revision 1.5 1999/09/01 20:46:19 steve
* Handle recursive functions and arbitrary function
* references to other functions, properly pass
* function parameters and save function results.
*
* Revision 1.4 1999/08/25 22:22:41 steve
* elaborate some aspects of functions.
*
* Revision 1.3 1999/07/31 19:14:47 steve
* Add functions up to elaboration (Ed Carter)
*
* Revision 1.2 1999/07/24 02:11:19 steve
* Elaborate task input ports.
*
* Revision 1.1 1999/07/03 02:12:51 steve
* Elaborate user defined tasks.
*
*/
#endif
+1 -18
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003-2004 Stephen Williams ([email protected])
* Copyright (c) 2003-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PUdp.cc,v 1.3 2004/03/08 00:47:44 steve Exp $"
#endif
# include "PUdp.h"
@@ -37,17 +34,3 @@ unsigned PUdp::find_port(const char*name)
return ports.count();
}
/*
* $Log: PUdp.cc,v $
* Revision 1.3 2004/03/08 00:47:44 steve
* primitive ports can bind bi name.
*
* Revision 1.2 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.1 2003/07/15 05:07:13 steve
* Move PUdp constructor into compiled file.
*
*/
+5 -57
View File
@@ -1,7 +1,7 @@
#ifndef __PUdp_H
#define __PUdp_H
/*
* Copyright (c) 1998-2004 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PUdp.h,v 1.12 2004/03/08 00:47:44 steve Exp $"
#endif
# include <map>
# include "StringHeap.h"
@@ -55,20 +52,20 @@ class PUdp {
public:
explicit PUdp(perm_string n, unsigned nports);
svector<string>ports;
svector<std::string>ports;
unsigned find_port(const char*name);
bool sequential;
svector<string>tinput;
svector<std::string>tinput;
svector<char> tcurrent;
svector<char> toutput;
verinum::V initial;
map<string,PExpr*> attributes;
std::map<std::string,PExpr*> attributes;
void dump(ostream&out) const;
void dump(std::ostream&out) const;
perm_string name_;
private:
@@ -78,53 +75,4 @@ class PUdp {
PUdp& operator= (const PUdp&);
};
/*
* $Log: PUdp.h,v $
* Revision 1.12 2004/03/08 00:47:44 steve
* primitive ports can bind bi name.
*
* Revision 1.11 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.10 2003/07/15 05:07:13 steve
* Move PUdp constructor into compiled file.
*
* Revision 1.9 2003/07/15 03:49:22 steve
* Spelling fixes.
*
* Revision 1.8 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.7 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.5 2001/04/22 23:09:45 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.4 2000/02/23 02:56:53 steve
* Macintosh compilers do not support ident.
*
* Revision 1.3 1999/06/15 03:44:53 steve
* Get rid of the STL vector template.
*
* Revision 1.2 1998/12/01 00:42:13 steve
* Elaborate UDP devices,
* Support UDP type attributes, and
* pass those attributes to nodes that
* are instantiated by elaboration,
* Put modules into a map instead of
* a simple list.
*
* Revision 1.1 1998/11/25 02:35:53 steve
* Parse UDP primitives all the way to pform.
*
*/
#endif
+1 -43
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PWire.cc,v 1.10 2002/08/12 01:34:58 steve Exp $"
#endif
# include "config.h"
# include "PWire.h"
@@ -137,42 +134,3 @@ void PWire::set_memory_idx(PExpr*ldx, PExpr*rdx)
lidx_ = ldx;
ridx_ = rdx;
}
/*
* $Log: PWire.cc,v $
* Revision 1.10 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.9 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.8 2002/01/26 05:28:28 steve
* Detect scalar/vector declarion mismatch.
*
* Revision 1.7 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.6 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.5 2001/01/06 02:29:35 steve
* Support arrays of integers.
*
* Revision 1.4 2000/12/11 00:31:43 steve
* Add support for signed reg variables,
* simulate in t-vvm signed comparisons.
*
* Revision 1.3 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.2 1999/09/10 05:02:09 steve
* Handle integers at task parameters.
*
* Revision 1.1 1999/06/17 05:34:42 steve
* Clean up interface of the PWire class,
* Properly match wire ranges.
*
*/
+1 -72
View File
@@ -1,7 +1,7 @@
#ifndef __PWire_H
#define __PWire_H
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: PWire.h,v 1.17 2004/02/20 18:53:33 steve Exp $"
#endif
# include "netlist.h"
# include "LineInfo.h"
@@ -98,72 +95,4 @@ class PWire : public LineInfo {
PWire& operator= (const PWire&);
};
/*
* $Log: PWire.h,v $
* Revision 1.17 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.16 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.15 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.14 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.13 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.12 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.11 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.10 2001/01/16 02:44:18 steve
* Use the iosfwd header if available.
*
* Revision 1.9 2000/12/11 00:31:43 steve
* Add support for signed reg variables,
* simulate in t-vvm signed comparisons.
*
* Revision 1.8 2000/05/02 16:27:38 steve
* Move signal elaboration to a seperate pass.
*
* Revision 1.7 2000/02/23 02:56:54 steve
* Macintosh compilers do not support ident.
*
* Revision 1.6 1999/11/27 19:07:57 steve
* Support the creation of scopes.
*
* Revision 1.5 1999/06/17 05:34:42 steve
* Clean up interface of the PWire class,
* Properly match wire ranges.
*
* Revision 1.4 1999/06/02 15:38:46 steve
* Line information with nets.
*
* Revision 1.3 1999/04/19 01:59:36 steve
* Add memories to the parse and elaboration phases.
*
* Revision 1.2 1998/11/23 00:20:22 steve
* NetAssign handles lvalues as pin links
* instead of a signal pointer,
* Wire attributes added,
* Ability to parse UDP descriptions added,
* XNF generates EXT records for signals with
* the PAD attribute.
*
* Revision 1.1 1998/11/03 23:28:55 steve
* Introduce verilog to CVS.
*
*/
#endif
+12 -5
View File
@@ -88,10 +88,6 @@ Normally, this command automatically figures out everything it needs
to know. It generally works pretty well. There are a few flags to the
configure script that modify its behavior:
--without-ipal
This turns off support for Icarus PAL, whether ipal
libraries are installed or not.
--prefix=<root>
The default is /usr/local, which causes the tool suite to
be compiled for install in /usr/local/bin,
@@ -107,6 +103,17 @@ configure script that modify its behavior:
compilation of 32bit compatible vvp (vvp32) and the vpi
modules that match.
--enable-suffix
--enable-suffix=<your-suffix>
--disable-suffix
Enable/disable changing the names of install files to use
a suffix string so that this version or install can co-
exist with other versions. This renames the installed
commands (iverilog, iverilog-vpi, vvp) and the installed
library files and include directory so that installations
with the same prefix but different suffix are guaranteed
to not interfere with each other.
2.2.1 Special AMD64 Instructions
(The Icarus Verilog RPM for x86_64 is build using these instructions.)
@@ -114,7 +121,7 @@ configure script that modify its behavior:
If you are building for Linux/AMD64 (a.k.a x86_64) then to get the
most out of your install, first make sure you have both 64bit and
32bit development libraries installed. Then configure with this
somewhat more compilcated command:
somewhat more complex command:
./configure libdir64='$(prefix)/lib64' vpidir1=vpi64 vpidir2=. --enable-vvp32
+1 -35
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-1999 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Statement.cc,v 1.29 2004/02/18 17:11:54 steve Exp $"
#endif
# include "config.h"
@@ -292,34 +289,3 @@ PWhile::~PWhile()
delete cond_;
delete statement_;
}
/*
* $Log: Statement.cc,v $
* Revision 1.29 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.28 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.27 2002/04/21 22:31:02 steve
* Redo handling of assignment internal delays.
* Leave it possible for them to be calculated
* at run time.
*
* Revision 1.26 2002/04/21 04:59:07 steve
* Add support for conbinational events by finding
* the inputs to expressions and some statements.
* Get case and assignment statements working.
*
* Revision 1.25 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.24 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.23 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*/
+5 -79
View File
@@ -1,7 +1,7 @@
#ifndef __Statement_H
#define __Statement_H
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: Statement.h,v 1.40 2004/02/20 18:53:33 steve Exp $"
#endif
# include <string>
# include "svector.h"
@@ -71,12 +68,15 @@ class PProcess : public LineInfo {
* fact, the Statement class is abstract and represents all the
* possible kinds of statements that exist in Verilog.
*/
class Statement : public LineInfo {
class Statement : public LineInfo, public Attrib {
public:
Statement() { }
virtual ~Statement() =0;
map<perm_string,PExpr*> attributes;
void dump_attributes(ostream&out, unsigned ind) const;
virtual void dump(ostream&out, unsigned ind) const;
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*scope) const;
@@ -454,78 +454,4 @@ class PWhile : public Statement {
Statement*statement_;
};
/*
* $Log: Statement.h,v $
* Revision 1.40 2004/02/20 18:53:33 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.39 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.38 2003/05/19 02:50:58 steve
* Implement the wait statement behaviorally instead of as nets.
*
* Revision 1.37 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.36 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.35 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.34 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.33 2002/04/21 22:31:02 steve
* Redo handling of assignment internal delays.
* Leave it possible for them to be calculated
* at run time.
*
* Revision 1.32 2002/04/21 04:59:07 steve
* Add support for conbinational events by finding
* the inputs to expressions and some statements.
* Get case and assignment statements working.
*
* Revision 1.31 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.30 2001/11/22 06:20:59 steve
* Use NetScope instead of string for scope path.
*
* Revision 1.29 2000/09/09 15:21:26 steve
* move lval elaboration to PExpr virtual methods.
*
* Revision 1.28 2000/09/03 17:58:35 steve
* Change elaborate_lval to return NetAssign_ objects.
*
* Revision 1.27 2000/07/26 05:08:07 steve
* Parse disable statements to pform.
*
* Revision 1.26 2000/05/11 23:37:26 steve
* Add support for procedural continuous assignment.
*
* Revision 1.25 2000/04/22 04:20:19 steve
* Add support for force assignment.
*
* Revision 1.24 2000/04/12 04:23:57 steve
* Named events really should be expressed with PEIdent
* objects in the pform,
*
* Handle named events within the mix of net events
* and edges. As a unified lot they get caught together.
* wait statements are broken into more complex statements
* that include a conditional.
*
* Do not generate NetPEvent or NetNEvent objects in
* elaboration. NetEvent, NetEvWait and NetEvProbe
* take over those functions in the netlist.
*/
#endif
+2 -31
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2004 Stephen Williams ([email protected])
* Copyright (c) 2002-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: StringHeap.cc,v 1.6 2004/02/18 17:11:54 steve Exp $"
#endif
# include "StringHeap.h"
#ifdef HAVE_MALLOC_H
@@ -131,7 +128,7 @@ perm_string StringHeapLex::make(const char*text)
return perm_string(add(text));
}
perm_string StringHeapLex::make(const string&text)
perm_string StringHeapLex::make(const std::string&text)
{
return perm_string(add(text.c_str()));
}
@@ -178,29 +175,3 @@ bool operator < (perm_string a, perm_string b)
return false;
}
/*
* $Log: StringHeap.cc,v $
* Revision 1.6 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.5 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
* into this table. Also, permallocate event
* names from the beginning.
*
* Revision 1.4 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.3 2003/01/16 21:44:46 steve
* Keep some debugging status.
*
* Revision 1.2 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.1 2002/08/04 19:13:16 steve
* dll uses StringHeap for named items.
*
*/
+4 -26
View File
@@ -1,7 +1,7 @@
#ifndef __StringHeap_H
#define __StringHeap_H
/*
* Copyright (c) 2002-2004 Stephen Williams ([email protected])
* Copyright (c) 2002-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,13 +18,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: StringHeap.h,v 1.5 2004/02/18 17:11:54 steve Exp $"
#endif
# include "config.h"
# include <string>
using namespace std;
class perm_string {
public:
@@ -101,7 +100,7 @@ class StringHeapLex : private StringHeap {
const char*add(const char*);
perm_string make(const char*);
perm_string make(const string&);
perm_string make(const std::string&);
unsigned add_count() const;
unsigned add_hit_count() const;
@@ -118,25 +117,4 @@ class StringHeapLex : private StringHeap {
StringHeapLex& operator= (const StringHeapLex&);
};
/*
* $Log: StringHeap.h,v $
* Revision 1.5 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.4 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
* into this table. Also, permallocate event
* names from the beginning.
*
* Revision 1.3 2003/01/16 21:44:46 steve
* Keep some debugging status.
*
* Revision 1.2 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.1 2002/08/04 19:13:16 steve
* dll uses StringHeap for named items.
*
*/
#endif
+2 -40
View File
@@ -1,7 +1,7 @@
#ifndef PLI_TYPES
#define PLI_TYPES
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
* Copyright (c) 2003-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: _pli_types.h.in,v 1.7 2003/11/12 02:38:44 steve Exp $"
#endif
# undef HAVE_INTTYPES_H
@@ -42,7 +39,7 @@ typedef int32_t PLI_INT32;
typedef signed short PLI_INT16;
typedef unsigned short PLI_UINT16;
typedef signed char PLI_BYTE8;
typedef char PLI_BYTE8;
typedef unsigned char PLI_UBYTE8;
# define PLI_UINT64_FMT PRIu64
@@ -88,39 +85,4 @@ typedef signed char PLI_BYTE8;
typedef unsigned char PLI_UBYTE8;
#endif
/*
* $Log: _pli_types.h.in,v $
* Revision 1.7 2003/11/12 02:38:44 steve
* Clean up manual definitions of PLI_UINT64_FMT.
*
* Revision 1.6 2003/11/08 20:06:21 steve
* Spelling fixes in comments.
*
* Revision 1.5 2003/10/29 03:28:27 steve
* Add the PLU_UINT64_FMT string for formatting output.
*
* Revision 1.4 2003/10/29 03:23:12 steve
* Portably handle time format of VCD prints.
*
* Revision 1.3 2003/10/02 21:30:06 steve
* Use configured TIME_FMT in vcd dump printf.
*
* Revision 1.2 2003/10/02 19:33:44 steve
* Put libraries in libdir64.
*
* Revision 1.1 2003/09/30 01:33:13 steve
* Add PLI_UINT64 to _pli_types.h.
*
* Revision 1.2 2003/05/26 04:39:16 steve
* Typo type name.
*
* Revision 1.1 2003/02/17 06:39:47 steve
* Add at least minimal implementations for several
* acc_ functions. Add support for standard ACC
* string handling.
*
* Add the _pli_types.h header file to carry the
* IEEE1364-2001 standard PLI type declarations.
*
*/
#endif
+1 -82
View File
@@ -1,7 +1,7 @@
#ifndef __acc_user_H
#define __acc_user_H
/*
* Copyright (c) 2002 Stephen Williams ([email protected])
* Copyright (c) 2002-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: acc_user.h,v 1.20 2003/12/17 15:45:07 steve Exp $"
#endif
/*
* This header file contains the definitions and declarations needed
@@ -273,82 +270,4 @@ extern char* acc_version(void);
EXTERN_C_END
/*
* $Log: acc_user.h,v $
* Revision 1.20 2003/12/17 15:45:07 steve
* Add acc_set_scope function.
*
* Revision 1.19 2003/10/10 02:57:45 steve
* Some PLI1 stubs.
*
* Revision 1.18 2003/06/13 19:23:41 steve
* Add a bunch more PLI1 routines.
*
* Revision 1.17 2003/06/04 01:56:20 steve
* 1) Adds configure logic to clean up compiler warnings
* 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
* tf_isetrealdelay, acc_handle_scope
* 3) makes acc_next reentrant
* 4) adds basic vpiWire type support
* 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
* 6) add vpiLeftRange/RigthRange to signals
*
* Revision 1.16 2003/05/30 04:18:31 steve
* Add acc_next function.
*
* Revision 1.15 2003/05/29 02:35:41 steve
* acc_fetch_type supports module.
*
* Revision 1.14 2003/05/29 02:21:45 steve
* Implement acc_fetch_defname and its infrastructure in vvp.
*
* Revision 1.13 2003/05/24 03:02:04 steve
* Add implementation of acc_handle_by_name.
*
* Revision 1.12 2003/05/18 00:16:35 steve
* Add PLI_TRACE tracing of PLI1 modules.
*
* Add tf_isetdelay and friends, and add
* callback return values for acc_vcl support.
*
* Revision 1.11 2003/04/24 18:57:05 steve
* Add acc_fetch_fulltype function.
*
* Revision 1.10 2003/04/20 02:48:39 steve
* Support value change callbacks.
*
* Revision 1.9 2003/04/12 18:57:13 steve
* More acc_ function stubs.
*
* Revision 1.8 2003/03/13 04:35:09 steve
* Add a bunch of new acc_ and tf_ functions.
*
* Revision 1.7 2003/02/17 06:39:47 steve
* Add at least minimal implementations for several
* acc_ functions. Add support for standard ACC
* string handling.
*
* Add the _pli_types.h header file to carry the
* IEEE1364-2001 standard PLI type declarations.
*
* Revision 1.6 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.5 2002/06/11 15:19:12 steve
* Add acc_fetch_argc/argv/version (mruff)
*
* Revision 1.4 2002/06/07 02:58:58 steve
* Add a bunch of acc/tf functions. (mruff)
*
* Revision 1.3 2002/06/02 19:03:29 steve
* Add acc_handle_tfarg and acc_next_topmode
*
* Revision 1.2 2002/05/30 02:06:05 steve
* Implement acc_product_version.
*
* Revision 1.1 2002/05/23 03:46:42 steve
* Add the acc_user.h header file.
*
*/
#endif
Vendored
+27 -38
View File
@@ -1,29 +1,22 @@
# AX_CPP_IDENT
# ------------
# Check if the C compiler supports #ident
# Define and substitute ident_support if so.
#
# It would be simpler and more consistent with the rest of the autoconf
# structure to AC_DEFINE(HAVE_CPP_IDENT) instead of
# ident_support='-DHAVE_CVS_IDENT=1' and AC_SUBST(ident_support), but that
# change would require all C files in the icarus top level directory to
# put #include <config.h> before the #ifdef HAVE_CVS_IDENT (and change
# HAVE_CVS_IDENT to HAVE_CPP_IDENT). That would also remove all special
# ident_support handling from the Makefile. Manyana.
#
AC_DEFUN([AX_CPP_IDENT],
[AC_CACHE_CHECK([for ident support in C compiler], ax_cv_cpp_ident,
[AC_TRY_COMPILE([
#ident "$Id: aclocal.m4,v 1.6 2004/10/04 01:10:52 steve Exp $"
],[while (0) {}],
[AS_VAR_SET(ax_cv_cpp_ident, yes)],
[AS_VAR_SET(ax_cv_cpp_ident, no)])])
if test $ax_cv_cpp_ident = yes; then
ident_support='-DHAVE_CVS_IDENT=1'
# AX_ENABLE_SUFFIX
# ----------------
# Create the configure option --enable-suffix[=suffix] to generate suffix
# strings for the installed commands. This allows for shared installs of
# different builds. Remember to change the default suffix string to some
# value appropriate for the current version.
AC_DEFUN([AX_ENABLE_SUFFIX],
[AC_ARG_ENABLE([suffix],[AC_HELP_STRING([--enable-suffix],
[Use/set the installation command suffix])],
[true],[enable_suffix=yes])
if test X$enable_suffix = Xyes; then
install_suffix='-0.8'
elif test X$enable_suffix = Xno; then
install_suffix=''
else
install_suffix="$enable_suffix"
fi
AC_SUBST(ident_support)
])# AC_CPP_IDENT
AC_SUBST(install_suffix)
])# AX_ENABLE_SUFFIX
# _AX_C_UNDERSCORES_MATCH_IFELSE(PATTERN, ACTION-IF-MATCH, ACTION-IF-NOMATCH)
# ------------------------------
@@ -32,7 +25,7 @@ AC_SUBST(ident_support)
# - the object file produced by AC_COMPILE_IFELSE is called "conftest.$ac_objext"
# - the nm(1) utility is available, and its name is "nm".
AC_DEFUN([_AX_C_UNDERSCORES_MATCH_IF],
[AC_COMPILE_IFELSE([void underscore(void){}],
[AC_COMPILE_IFELSE([AC_LANG_SOURCE([void underscore(void){}])],
[AS_IF([nm conftest.$ac_objext|grep $1 >/dev/null 2>/dev/null],[$2],[$3])],
[AC_MSG_ERROR([underscore test crashed])]
)])
@@ -48,7 +41,7 @@ AC_DEFUN([AX_C_UNDERSCORES_LEADING],
[AS_VAR_SET(ax_cv_c_underscores_leading, yes)],
[AS_VAR_SET(ax_cv_c_underscores_leading, no)])])
if test $ax_cv_c_underscores_leading = yes -a "$CYGWIN" != "yes" -a "$MINGW32" != "yes"; then
AC_DEFINE(NEED_LU)
AC_DEFINE([NEED_LU], [1], [Symbol names in object files produced by C compiler have leading underscores.])
fi
])# AX_C_UNDERSCORES_LEADING
@@ -63,7 +56,7 @@ AC_DEFUN([AX_C_UNDERSCORES_TRAILING],
[AS_VAR_SET(ax_cv_c_underscores_trailing, yes)],
[AS_VAR_SET(ax_cv_c_underscores_trailing, no)])])
if test $ax_cv_c_underscores_trailing = yes; then
AC_DEFINE(NEED_TU)
AC_DEFINE([NEED_TU], [1], [Symbol names in object files produced by C compiler have trailing underscores.])
fi
])# AX_C_UNDERSCORES_TRAILING
@@ -91,13 +84,9 @@ AC_MSG_RESULT($WIN32)
AC_DEFUN([AX_LD_EXTRALIBS],
[AC_MSG_CHECKING([for extra libs needed])
EXTRALIBS=
case "${host}" in
*-*-cygwin* )
if test "$MINGW32" = "yes"; then
EXTRALIBS="-liberty"
fi
;;
esac
if test "$MINGW32" = "yes"; then
EXTRALIBS="-liberty"
fi
AC_SUBST(EXTRALIBS)
AC_MSG_RESULT($EXTRALIBS)
])# AX_LD_EXTRALIBS
@@ -109,7 +98,7 @@ AC_DEFUN([AX_LD_SHAREDLIB_OPTS],
[AC_MSG_CHECKING([for shared library link flag])
shared=-shared
case "${host}" in
*-*-cygwin*)
*-*-cygwin* | *-*-mingw32*)
shared="-shared -Wl,--enable-auto-image-base"
;;
@@ -138,7 +127,7 @@ AC_DEFUN([AX_C_PICFLAG],
PICFLAG=-fPIC
case "${host}" in
*-*-cygwin*)
*-*-cygwin* | *-*-mingw32*)
PICFLAG=
;;
@@ -173,7 +162,7 @@ case "${host}" in
rdynamic=""
;;
*-*-cygwin*)
*-*-cygwin* | *-*-mingw32*)
rdynamic=""
;;
+6 -31
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002 Stephen Williams ([email protected])
* Copyright (c) 2002-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: async.cc,v 1.7 2004/01/18 23:26:54 steve Exp $"
#endif
# include "config.h"
@@ -66,6 +63,10 @@ bool NetEvWait::is_asynchronous()
NexusSet*inputs = statement_->nex_input();
/* All the inputs of the statement must be accounted for in
the sensitivity list. Otherwise, there are inputs that can
change without the event being triggered, and that implies
a latch, not a combinational circuit. */
if (! sense->contains(*inputs)) {
delete sense;
delete inputs;
@@ -85,36 +86,10 @@ bool NetProc::is_asynchronous()
return false;
}
bool NetProcTop::is_asynchronous()
bool NetProcTop::is_asynchronous() const
{
if (type_ == NetProcTop::KINITIAL)
return false;
return statement_->is_asynchronous();
}
/*
* $Log: async.cc,v $
* Revision 1.7 2004/01/18 23:26:54 steve
* The is_combinational function really need not recurse.
*
* Revision 1.6 2003/12/20 00:33:39 steve
* More thorough check that NetEvWait is asynchronous.
*
* Revision 1.5 2003/09/04 20:28:05 steve
* Support time0 resolution of combinational threads.
*
* Revision 1.4 2002/08/18 22:07:16 steve
* Detect temporaries in sequential block synthesis.
*
* Revision 1.3 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.2 2002/07/04 00:24:16 steve
* initial statements are not asynchronous.
*
* Revision 1.1 2002/06/30 02:21:31 steve
* Add structure for asynchronous logic synthesis.
*
*/
+8
View File
@@ -70,6 +70,14 @@ warning.)
* Other Attributes
(* ivl_full_case *)
This attribute only has meaning when attached to case statements,
and only when doing synthesis. The statement means to ignore the
possibility that some cases are not defined. Presume that the
device really is fully specified and do not emit any warnings
about missing guards.
[ none defined yet ]
+2 -2
View File
@@ -9,10 +9,10 @@
echo "Autoconf in root..."
autoconf
for dir in vpip vpi vvp tgt-vvp tgt-fpga libveriuser cadpli
for dir in vpip vpi vvp tgt-vvp tgt-edif tgt-fpga libveriuser cadpli
do
echo "Autoconf in $dir..."
( cd ./$dir ; autoconf --include=.. )
( cd ./$dir ; autoconf -f --include=.. )
done
echo "Precompiling lexor_keyword.gperf"
-7
View File
@@ -1,7 +0,0 @@
Makefile
cadpli.vpl
dep
configure
config.log
config.status
autom4te.cache
+10 -12
View File
@@ -15,13 +15,10 @@
# Software Foundation, Inc.,
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.11 2004/10/04 01:09:07 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.0
suffix = @install_suffix@
prefix = @prefix@
exec_prefix = @exec_prefix@
@@ -33,7 +30,7 @@ bindir = @bindir@
libdir = @libdir@
includedir = $(prefix)/include
vpidir = @libdir@/ivl/@vpidir1@
vpidir = @libdir@/ivl$(suffix)/@vpidir1@
strip_dynamic=@strip_dynamic@
@@ -42,7 +39,7 @@ INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @ident_support@ -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
CPPFLAGS = -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
STRIP = @STRIP@
@@ -52,7 +49,7 @@ SHARED = @shared@
all:
ifeq (@enable_vvp32@,yes)
vpidir32 = $(libdir)/ivl/@vpidir2@
vpidir32 = $(libdir)/ivl$(suffix)/@vpidir2@
ALL32 = all32
INSTALL32 = install32
UNINSTALL32 = uninistall32
@@ -86,17 +83,18 @@ clean:
distclean: clean
rm -f Makefile config.status config.log config.cache
rm -rf autom4te.cache
install: all installdirs $(vpidir)/cadpli.vpl $(INSTALL32)
$(vpidir)/cadpli.vpl: ./cadpli.vpl
$(INSTALL_PROGRAM) ./cadpli.vpl $(vpidir)/cadpli.vpl
$(DESTDIR)$(vpidir)/cadpli.vpl: ./cadpli.vpl
$(INSTALL_PROGRAM) ./cadpli.vpl $(DESTDIR)$(vpidir)/cadpli.vpl
installdirs: ../mkinstalldirs
$(srcdir)/../mkinstalldirs $(vpidir)
$(srcdir)/../mkinstalldirs $(DESTDIR)$(vpidir)
uninstall: $(UNINSTALL32)
rm -f $(vpidir)/cadpli.vpl
rm -f $(DESTDIR)$(vpidir)/cadpli.vpl
ifeq (@enable_vvp32@,yes)
include $(srcdir)/enable_vvp32.mk
+1 -35
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003 Stephen Williams ([email protected])
* Copyright (c) 2003-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cadpli.c,v 1.7 2004/09/10 00:15:45 steve Exp $"
#endif
# include <vpi_user.h>
# include <veriuser.h>
@@ -87,34 +84,3 @@ void (*vlog_startup_routines[])() = {
thunker_register,
0
};
/*
* $Log: cadpli.c,v $
* Revision 1.7 2004/09/10 00:15:45 steve
* Remove bad casts.
*
* Revision 1.6 2004/09/05 21:19:51 steve
* Better type safety.
*
* Revision 1.5 2003/08/26 16:26:02 steve
* ifdef idents correctly.
*
* Revision 1.4 2003/04/30 01:28:06 steve
* Remove veriusertfs stuf.
*
* Revision 1.3 2003/02/22 04:04:38 steve
* Only include malloc.h if it is present.
*
* Revision 1.2 2003/02/17 00:01:25 steve
* Use a variant of ivl_dlfcn to do dynamic loading
* from within the cadpli module.
*
* Change the +cadpli flag to -cadpli, to keep the
* plusargs namespace clear.
*
* Revision 1.1 2003/02/16 02:23:54 steve
* Add the cadpli interface module.
*
*/
+3 -3
View File
@@ -10,6 +10,8 @@ AC_SUBST(EXEEXT)
# Combined check for Microsoft-related bogosities; sets WIN32 if found
AX_WIN32
AX_ENABLE_SUFFIX
AC_PROG_INSTALL
# vvp32 is by default disabled
@@ -37,7 +39,7 @@ AC_SUBST(DLLIB)
AX_CPP_PRECOMP
# Compiler option for position independent code, needed whan making shared objects.
# Compiler option for position independent code, needed when making shared objects.
AX_C_PICFLAG
# Linker option used when compiling the target
@@ -60,8 +62,6 @@ AX_C_UNDERSCORES_TRAILING
## end of test for underscores
#######################
AX_CPP_IDENT
# where to put vpi subdirectories
AC_MSG_CHECKING(for VPI subdirectories)
if test x${vpidir1} = x
+1 -20
View File
@@ -1,7 +1,7 @@
#ifndef __ivl_dlfcn_H
#define __ivl_dlfcn_H
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
* Copyright (c) 2001-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: ivl_dlfcn.h,v 1.3 2004/10/04 01:10:56 steve Exp $"
#endif
#if defined(__MINGW32__)
# include <windows.h>
@@ -94,20 +91,4 @@ inline const char*dlerror(void)
{ return strerror( errno ); }
#endif
/*
* $Log: ivl_dlfcn.h,v $
* Revision 1.3 2004/10/04 01:10:56 steve
* Clean up spurious trailing white space.
*
* Revision 1.2 2003/12/12 05:43:08 steve
* Some systems dlsym requires leading _ or not on whim.
*
* Revision 1.1 2003/02/17 00:01:25 steve
* Use a variant of ivl_dlfcn to do dynamic loading
* from within the cadpli module.
*
* Change the +cadpli flag to -cadpli, to keep the
* plusargs namespace clear.
*
*/
#endif
+6 -45
View File
@@ -1,7 +1,7 @@
#ifndef __compiler_H
#define __compiler_H
/*
* Copyright (c) 1999-2004 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: compiler.h,v 1.26 2004/10/04 01:10:52 steve Exp $"
#endif
# include <list>
# include <map>
@@ -78,12 +75,17 @@ extern bool warn_timescale;
/* Warn about legal but questionable module port bindings. */
extern bool warn_portbinding;
/* Warn about unused or unassigned variables. */
extern bool warn_unused;
/* This is true if verbose output is requested. */
extern bool verbose_flag;
extern bool debug_scopes;
extern bool debug_eval_tree;
extern bool debug_elaborate;
extern bool debug_synth;
extern bool debug_cprop;
/* Path to a directory useful for finding subcomponents. */
extern const char*basedir;
@@ -134,45 +136,4 @@ struct sfunc_return_type {
extern const struct sfunc_return_type* lookup_sys_func(const char*name);
extern int load_sys_func_table(const char*path);
/*
* $Log: compiler.h,v $
* Revision 1.26 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.25 2004/09/25 01:58:44 steve
* Add a debug_elaborate flag
*
* Revision 1.24 2004/09/10 23:51:42 steve
* Fix the evaluation of constant ternary expressions.
*
* Revision 1.23 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.22 2004/03/10 04:51:24 steve
* Add support for system function table files.
*
* Revision 1.21 2004/03/09 04:29:42 steve
* Separate out the lookup_sys_func table, for eventual
* support for function type tables.
*
* Remove ipal compile flags.
*
* Revision 1.20 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.19 2003/11/13 05:55:33 steve
* Move the DLL= flag to target config files.
*
* Revision 1.18 2003/11/08 20:06:21 steve
* Spelling fixes in comments.
*
* Revision 1.17 2003/09/25 00:25:14 steve
* Summary list of missing modules.
*
* Revision 1.16 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
* into this table. Also, permallocate event
* names from the beginning.
*/
#endif
+1 -41
View File
@@ -1,7 +1,7 @@
#ifndef __config_H /* -*- c++ -*- */
#define __config_H
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
* Copyright (c) 2001-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: config.h.in,v 1.11 2004/10/04 01:10:52 steve Exp $"
#endif
#if defined(__cplusplus)
# if !defined(__GNUC__)
@@ -48,41 +45,4 @@
# undef HAVE_SYS_WAIT_H
# undef WORDS_BIGENDIAN
/*
* $Log: config.h.in,v $
* Revision 1.11 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.10 2003/08/26 16:26:01 steve
* ifdef idents correctly.
*
* Revision 1.9 2003/07/03 16:29:55 steve
* spemm WORDS_BIGENDIAN correctly.
*
* Revision 1.8 2003/03/07 02:44:33 steve
* Implement $realtobits.
*
* Revision 1.7 2003/02/20 00:49:24 steve
* detect -lz and -lbz2 libraries.
*
* Revision 1.6 2003/01/10 19:01:04 steve
* Only use libiberty.h if available.
*
* Revision 1.5 2002/08/11 23:39:33 steve
* Remove VVM option.
*
* Revision 1.4 2002/02/16 03:18:53 steve
* Make vvm optional, normally off.
*
* Revision 1.3 2001/10/18 16:16:23 steve
* Include HAVE_SYS_WAIT in config.h (PR#306)
*
* Revision 1.2 2001/09/15 18:27:04 steve
* Make configure detect malloc.h
*
* Revision 1.1 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
*/
#endif // __config_H
+17 -7
View File
@@ -9,6 +9,9 @@ AC_PROG_CC
AC_PROG_CXX
AC_CHECK_TOOL(STRIP, strip, true)
AC_CHECK_PROGS(XGPERF,gperf,none)
AC_CHECK_PROGS(MAN,man,none)
AC_CHECK_PROGS(PS2PDF,ps2pdf,none)
if test "$XGPERF" = "none"
then
echo ""
@@ -46,8 +49,12 @@ AX_WIN32
#enable_vvp32=no
AC_SUBST(enable_vvp32)
AC_CHECK_DECL(__SUNPRO_C,AC_SUBST(WARNING_CFLAGS,),AC_SUBST(WARNING_CFLAGS,-Wall))
AC_LANG_CPLUSPLUS
AC_LANG(C++)
AC_CHECK_DECL(__SUNPRO_CC,AC_SUBST(WARNING_CXXFLAGS,),AC_SUBST(WARNING_CXXFLAGS,-Wall))
AC_CHECK_DECL(__SUNPRO_CC,AC_SUBST(DEPENDENCY_CPPFLAGS,-xMD),AC_SUBST(DEPENDENCY_CPPFLAGS,-MD))
AC_CHECK_HEADERS(getopt.h malloc.h inttypes.h libiberty.h iosfwd sys/wait.h)
@@ -56,9 +63,12 @@ AC_CHECK_LIB(z, gzwrite, HAVE_LIBZ=yes, HAVE_LIBZ=no)
AC_SUBST(HAVE_LIBZ)
if test "$WIN32" = "yes"; then
AC_CHECK_LIB(bz2, main)
AC_CHECK_LIB(bz2, main, HAVE_LIBBZ2=yes, HAVE_LIBBZ2=no)
else
AC_CHECK_LIB(bz2, BZ2_bzdopen)
AC_CHECK_LIB(bz2, BZ2_bzdopen, HAVE_LIBBZ2=yes, HAVE_LIBBZ2=no)
fi
AC_SUBST(HAVE_LIBBZ2)
AC_MSG_CHECKING(for sys/times)
AC_TRY_LINK(
@@ -66,7 +76,7 @@ AC_TRY_LINK(
#include <sys/times.h>
,{clock_t a = times(0)/sysconf(_SC_CLK_TCK);},
do_times=yes
AC_DEFINE(HAVE_TIMES,1),
AC_DEFINE([HAVE_TIMES], [1], [The times system call is available in the host operating system.]),
do_times=no
)
AC_MSG_RESULT($do_times)
@@ -86,14 +96,16 @@ AC_SUBST(DLLIB)
AC_PROG_INSTALL
AC_LANG_C
AC_LANG(C)
AC_C_BIGENDIAN
# $host
AX_ENABLE_SUFFIX
AX_LD_EXTRALIBS
# Compiler option for position independent code, needed whan making shared objects.
# Compiler option for position independent code, needed when making shared objects.
# CFLAGS inherited by cadpli/Makefile?
AX_C_PICFLAG
@@ -118,8 +130,6 @@ AX_C_UNDERSCORES_TRAILING
## end of test for underscores
#######################
AX_CPP_IDENT
# If not otherwise specified, set the libdir64 variable
# to the same as libdir.
AC_MSG_CHECKING(for libdir64 path)
@@ -141,6 +151,6 @@ AC_SUBST(vpidir1)
AC_SUBST(vpidir2)
AC_MSG_RESULT(${vpidir1} ${vpidir2})
AC_CONFIG_SUBDIRS(vvp vpi tgt-vvp tgt-fpga libveriuser cadpli)
AC_CONFIG_SUBDIRS(vvp vpi tgt-vvp tgt-edif tgt-fpga libveriuser cadpli)
AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+346 -101
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2003 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,15 +16,13 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cprop.cc,v 1.47 2004/02/20 18:53:34 steve Exp $"
#endif
# include "config.h"
# include "netlist.h"
# include "netmisc.h"
# include "functor.h"
# include "compiler.h"
# include <assert.h>
@@ -47,6 +45,9 @@ struct cprop_functor : public functor_t {
virtual void lpm_ff(Design*des, NetFF*obj);
virtual void lpm_logic(Design*des, NetLogic*obj);
virtual void lpm_mux(Design*des, NetMux*obj);
virtual void lpm_mux_large(Design*des, NetMux*obj);
virtual void lpm_ram_dq(Design*des, NetRamDq*obj);
bool lpm_ram_dq_const_address_(Design*des, NetRamDq*obj);
};
void cprop_functor::signal(Design*des, NetNet*obj)
@@ -306,10 +307,8 @@ void cprop_functor::lpm_ff(Design*des, NetFF*obj)
obj->width()-unlinked_count);
connect(tmp->pin_Clock(), obj->pin_Clock());
connect(tmp->pin_Enable(), obj->pin_Enable());
connect(tmp->pin_Aload(), obj->pin_Aload());
connect(tmp->pin_Aset(), obj->pin_Aset());
connect(tmp->pin_Aclr(), obj->pin_Aclr());
connect(tmp->pin_Sload(), obj->pin_Sload());
connect(tmp->pin_Sset(), obj->pin_Sset());
connect(tmp->pin_Sclr(), obj->pin_Sclr());
@@ -842,84 +841,378 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
/*
* This detects the case where the mux selects between a value and
* Vz. In this case, replace the device with a bufif with the sel
* Vz. In this case, replace the device with a MOS with the sel
* input used to enable the output.
*/
void cprop_functor::lpm_mux(Design*des, NetMux*obj)
{
if (obj->size() > 2) {
lpm_mux_large(des, obj);
return;
}
if (obj->size() != 2)
return;
if (obj->sel_width() != 1)
return;
/* If the first input is all constant Vz, then replace the
NetMux with an array of BUFIF1 devices, with the enable
connected to the select input. */
NetScope*scope = obj->scope();
bool flag = true;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (! obj->pin_Data(idx, 0).nexus()->drivers_constant()) {
flag = false;
break;
}
bool cflag_a = obj->pin_Data(idx, 0).nexus()->drivers_constant();
bool cflag_b = obj->pin_Data(idx, 1).nexus()->drivers_constant();
if (obj->pin_Data(idx, 0).nexus()->driven_value() != verinum::Vz) {
flag = false;
break;
}
/* If both data inputs are constant, we'll be able to do
a substitution. */
if (cflag_a && cflag_b)
continue;
verinum::V va = cflag_a
? obj->pin_Data(idx, 0).nexus()->driven_value()
: verinum::Vx;
verinum::V vb = cflag_b
? obj->pin_Data(idx, 1).nexus()->driven_value()
: verinum::Vx;
/* If only one Data input is constant, but a constant
HiZ, then we will be able to do a MOS
substitution. */
if (cflag_a && va==verinum::Vz)
continue;
if (cflag_b && vb==verinum::Vz)
continue;
/* Otherwise, we cannot accurately do a substitution. If
one input is non-constant, then that input may have a
HiZ value, and there is no Verilog logic other than a
MUX that can pass a HiZ value. */
flag = false;
}
if (flag) {
NetScope*scope = obj->scope();
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
NetLogic*tmp = new NetLogic(obj->scope(),
scope->local_symbol(),
3, NetLogic::BUFIF1);
if (! flag) {
return;
}
connect(obj->pin_Result(idx), tmp->pin(0));
/* Create a temporary net to hold the result value that we
build up. When we are done, we will connect this to the
Result pins of the mux, then delete the mux *and* this
net. That will cause all the proper connectivity to
happen. */
NetNet result_tmp(scope, scope->local_symbol(),
NetNet::WIRE, obj->width());
/* We know that every slice has at least one constant. Run
through the slices again, creating boolean devices to
replace the MUX slice. */
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
/* If the Sel==0 input is constant Z, make a NMOS. */
if (obj->pin_Data(idx, 0).nexus()->drivers_constant()
&& obj->pin_Data(idx, 0).nexus()->driven_value()==verinum::Vz) {
NetLogic*tmp = new NetLogic(scope,
scope->local_symbol(),
3, NetLogic::NMOS);
connect(result_tmp.pin(idx), tmp->pin(0));
connect(obj->pin_Data(idx,1), tmp->pin(1));
connect(obj->pin_Sel(0), tmp->pin(2));
des->add_node(tmp);
continue;
}
count += 1;
delete obj;
return;
}
/* If the Sel==1 input is constant Z, make a PMOS. */
if (obj->pin_Data(idx, 1).nexus()->drivers_constant()
&& obj->pin_Data(idx, 1).nexus()->driven_value()==verinum::Vz) {
/* If instead the second input is all constant Vz, replace the
NetMux with an array of BUFIF0 devices. */
flag = true;
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
if (! obj->pin_Data(idx, 1).nexus()->drivers_constant()) {
flag = false;
break;
}
if (obj->pin_Data(idx, 1).nexus()->driven_value() != verinum::Vz) {
flag = false;
break;
}
}
if (flag) {
NetScope*scope = obj->scope();
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
NetLogic*tmp = new NetLogic(obj->scope(),
NetLogic*tmp = new NetLogic(scope,
scope->local_symbol(),
3, NetLogic::BUFIF0);
connect(obj->pin_Result(idx), tmp->pin(0));
3, NetLogic::PMOS);
connect(result_tmp.pin(idx), tmp->pin(0));
connect(obj->pin_Data(idx,0), tmp->pin(1));
connect(obj->pin_Sel(0), tmp->pin(2));
des->add_node(tmp);
continue;
}
count += 1;
delete obj;
/* At this point, the only cases that are left are where
the data inputs are both constant, and neither are
HiZ. From this we know how to generate the output
from only the S input. */
if (! (obj->pin_Data(idx, 0).nexus()->drivers_constant()
&& obj->pin_Data(idx, 1).nexus()->drivers_constant())) {
cerr << obj->get_line() << ": internal error: "
<< "Drivers not constant where expected?"
<< " obj->width()=" << obj->width()
<< " idx=" << idx
<< endl;
obj->dump_node(cerr, 4);
}
assert(obj->pin_Data(idx, 0).nexus()->drivers_constant()
&& obj->pin_Data(idx, 1).nexus()->drivers_constant());
verinum::V a = obj->pin_Data(idx, 0).nexus()->driven_value();
verinum::V b = obj->pin_Data(idx, 1).nexus()->driven_value();
if (a == b) {
connect(result_tmp.pin(idx), obj->pin_Data(idx,0));
continue;
}
if (a == verinum::V0 && b == verinum::V1) {
connect(result_tmp.pin(idx), obj->pin_Sel(0));
continue;
}
if (a == verinum::V1 && b == verinum::V0) {
NetLogic*tmp = new NetLogic(scope,
scope->local_symbol(),
2, NetLogic::NOT);
connect(result_tmp.pin(idx), tmp->pin(0));
connect(obj->pin_Sel(0), tmp->pin(1));
des->add_node(tmp);
continue;
}
/* A==0: Q = B & S */
if (a == verinum::V0) {
NetLogic*tmp = new NetLogic(scope,
scope->local_symbol(),
3, NetLogic::AND);
connect(result_tmp.pin(idx), tmp->pin(0));
connect(obj->pin_Data(idx,1), tmp->pin(1));
connect(obj->pin_Sel(0), tmp->pin(2));
des->add_node(tmp);
continue;
}
/* B==1: Q = A | S */
if (b == verinum::V1) {
NetLogic*tmp = new NetLogic(scope,
scope->local_symbol(),
3, NetLogic::OR);
connect(result_tmp.pin(idx), tmp->pin(0));
connect(obj->pin_Data(idx,0), tmp->pin(1));
connect(obj->pin_Sel(0), tmp->pin(2));
des->add_node(tmp);
continue;
}
/* A==1: Q = B | ~S */
if (a == verinum::V1) {
NetLogic*inv = new NetLogic(scope,
scope->local_symbol(),
2, NetLogic::NOT);
NetNet*invs = new NetNet(scope,
scope->local_symbol(),
NetNet::TRI, 1);
invs->local_flag(true);
connect(inv->pin(0), invs->pin(0));
connect(inv->pin(1), obj->pin_Sel(0));
des->add_node(inv);
NetLogic*tmp = new NetLogic(scope,
scope->local_symbol(),
3, NetLogic::OR);
connect(result_tmp.pin(idx), tmp->pin(0));
connect(obj->pin_Data(idx,1), tmp->pin(1));
connect(inv->pin(0), tmp->pin(2));
des->add_node(tmp);
continue;
}
/* B==0: Q = A & ~S */
if (b == verinum::V0) {
NetLogic*inv = new NetLogic(scope,
scope->local_symbol(),
2, NetLogic::NOT);
NetNet*invs = new NetNet(scope,
scope->local_symbol(),
NetNet::TRI, 1);
invs->local_flag(true);
connect(inv->pin(0), invs->pin(0));
connect(inv->pin(1), obj->pin_Sel(0));
des->add_node(inv);
NetLogic*tmp = new NetLogic(scope,
scope->local_symbol(),
3, NetLogic::AND);
connect(result_tmp.pin(idx), tmp->pin(0));
connect(obj->pin_Data(idx,0), tmp->pin(1));
connect(inv->pin(0), tmp->pin(2));
des->add_node(tmp);
continue;
}
assert(0);
}
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1)
connect(result_tmp.pin(idx), obj->pin_Result(idx));
delete obj;
count += 1;
}
void cprop_functor::lpm_mux_large(Design*des, NetMux*obj)
{
NetScope*scope = obj->scope();
unsigned width = obj->width();
unsigned size = obj->size();
/* This test looks for bit slices that are constant
throughout. If we find any, we can reduce the width of the
MUX to eliminate the fixed value. */
/* After the following for loop, this array of bools will
contain "true" for each bit slice that is constant and
identical, and "false" otherwise. The reduce_width will
count the number of true entries in the flags array. */
bool*flags = new bool[width];
unsigned reduce_width = 0;
for (unsigned bit = 0 ; bit < width ; bit += 1) {
flags[bit] = true;
/* If not even the first selection is constant, then the
slice cannot be reduced. */
if (! obj->pin_Data(bit, 0).nexus()->drivers_constant()) {
flags[bit] = false;
continue;
}
/* If any of the remaining selections in non-consant, or
constant with a different value, then this slice
cannot be reduced. */
verinum::V val = obj->pin_Data(bit, 0).nexus()->driven_value();
for (unsigned idx = 1; flags[bit] && idx < size ; idx += 1) {
if (!obj->pin_Data(bit,idx).nexus()->drivers_constant()) {
flags[bit] = false;
break;
}
if (val != obj->pin_Data(bit,idx).nexus()->driven_value()) {
flags[bit] = false;
break;
}
}
if (! flags[bit]) {
/* This bit slice is too complex. Go on. */
continue;
}
reduce_width += 1;
}
/* If no slices can be reduced, then we are finished. */
if (reduce_width == 0) {
delete[]flags;
return;
}
/* Handle the very special case that all the slices can be
reduced. We don't need a MUX at all! */
if (reduce_width == width) {
for (unsigned idx = 0 ; idx < width ; idx += 1)
connect(obj->pin_Result(idx), obj->pin_Data(idx,0));
delete obj;
count += 1;
delete[]flags;
return;
}
/* Create a reduced mux with the same name and size, but fewer
slices. Connect all the slices that we are keeping. */
NetMux*tmp = new NetMux(scope, obj->name(),
width-reduce_width, size, obj->sel_width());
tmp->set_line(*obj);
for (unsigned idx = 0 ; idx < obj->sel_width() ; idx += 1)
connect(obj->pin_Sel(idx), tmp->pin_Sel(idx));
unsigned dst_bit = 0;
for (unsigned bit = 0 ; bit < width ; bit += 1) {
if (flags[bit]) {
connect(obj->pin_Result(bit), obj->pin_Data(bit,0));
continue;
}
connect(obj->pin_Result(bit), tmp->pin_Result(dst_bit));
for (unsigned idx = 0 ; idx < size ; idx += 1)
connect(obj->pin_Data(bit,idx), tmp->pin_Data(dst_bit,idx));
dst_bit += 1;
}
/* Add the new node. Delete the old node. Signal that we
change the design and may use a rescan. */
des->add_node(tmp);
delete obj;
delete[]flags;
count += 1;
}
void cprop_functor::lpm_ram_dq(Design*des, NetRamDq*obj)
{
if (lpm_ram_dq_const_address_(des,obj))
return;
}
/*
* Try to evaluate a constant address input. If we find it, then
* replace the NetRamDq with a direct link to the addressed word.
*/
bool cprop_functor::lpm_ram_dq_const_address_(Design*des, NetRamDq*obj)
{
NetMemory*mem = obj->mem();
NetNet* reg = mem->reg_from_explode();
/* I only know how to do this on exploded memories. */
if (reg == 0)
return false;
verinum sel (0UL, obj->awidth());
for (unsigned idx = 0 ; idx < obj->awidth() ; idx += 1) {
if (! obj->pin_Address(idx).nexus()->drivers_constant())
return false;
sel.set(idx, obj->pin_Address(idx).nexus()->driven_value());
}
unsigned long address = sel.as_ulong();
/* If the address is outside the ram, then leave this to the
code generator to figure out. */
if (address >= obj->size())
return false;
unsigned base = address * obj->width();
assert(base+obj->width() <= reg->pin_count());
for (unsigned idx = 0 ; idx < obj->width() ; idx += 1)
connect(reg->pin(base+idx), obj->pin_Q(idx));
if (debug_cprop) {
cerr << obj->get_line() << ": debug: Replace read port with"
<< " fixed link to word " << address << "." << endl;
}
delete obj;
count += 1;
return true;
}
/*
* This functor looks to see if the constant is connected to nothing
* but signals. If that is the case, delete the dangling constant and
@@ -1035,51 +1328,3 @@ void cprop(Design*des)
cprop_dc_functor dc;
des->functor(&dc);
}
/*
* $Log: cprop.cc,v $
* Revision 1.47 2004/02/20 18:53:34 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.46 2003/11/08 17:53:34 steve
* Do not remove constants accessible to VPI.
*
* Revision 1.45 2003/10/31 02:40:06 steve
* Donot elide FF that has set or clr connections.
*
* Revision 1.44 2003/04/25 05:06:32 steve
* Handle X values in constant == nets.
*
* Revision 1.43 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.42 2003/02/26 01:29:24 steve
* LPM objects store only their base names.
*
* Revision 1.41 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.40 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.39 2002/08/20 04:12:22 steve
* Copy gate delays when doing gate delay substitutions.
*
* Revision 1.38 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.37 2002/06/25 01:33:22 steve
* Cache calculated driven value.
*
* Revision 1.36 2002/06/24 01:49:38 steve
* Make link_drive_constant cache its results in
* the Nexus, to improve cprop performance.
*
* Revision 1.35 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*/
+62 -301
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: design_dump.cc,v 1.149 2004/10/04 01:10:52 steve Exp $"
#endif
# include "config.h"
@@ -77,6 +74,8 @@ void NetNet::dump_net(ostream&o, unsigned ind) const
o << " (local)";
if (signed_)
o << " signed";
if (mref_)
o << " mref_=" << mref_->name();
switch (port_type_) {
case NetNet::NOT_A_PORT:
break;
@@ -171,7 +170,8 @@ void NetObj::dump_node_pins(ostream&o, unsigned ind) const
if (pin(idx).is_linked()) {
const Nexus*nex = pin(idx).nexus();
o << nex << " " << nex->name();
const char*nex_name = nex->name();
o << nex << " " << (nex_name? nex_name : "????");
}
o << endl;
@@ -216,6 +216,23 @@ void NetCompare::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetDecode::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_DECODE (NetDecode): " << name()
<< " ff=" << ff_->name() << ", word width=" << width() << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetDemux::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_DEMUX (NetDemux): " << name()
<< " bus width=" << width() << ", address width=" << awidth()
<< ", word count=" << size() << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetDivide::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "NET_DIVIDE (NetDivide): " << name() << endl;
@@ -240,6 +257,7 @@ void NetMux::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "Multiplexer (NetMux): " << name()
<< " scope=" << scope()->name() << endl;
o << setw(ind+6) << "" << "source=" << get_line() << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
@@ -271,6 +289,21 @@ void NetConst::dump_node(ostream&o, unsigned ind) const
void NetFF::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_FF: " << name()
<< " scope=" << (scope()? scope()->name() : "")
<< " aset_value=" << aset_value_
<< " sset_value=" << sset_value_;
if (demux_) o << " demux=" << demux_->name();
o << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetLatch::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_LATCH: " << name()
<< " scope=" << (scope()? scope()->name() : "")
<< " aset_value=" << aset_value_ << endl;
@@ -355,8 +388,17 @@ void NetModulo::dump_node(ostream&o, unsigned ind) const
void NetRamDq::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_RAM_DQ (" << mem_->name() << "): "
<< name() << endl;
o << setw(ind) << "" << "LPM_RAM_DQ (";
if (mem_) {
if (NetNet*tmp = mem_->reg_from_explode())
o << "exploded mem=" << tmp->name();
else
o << "mem=" << mem_->name();
}
o << "): " << name() << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
@@ -432,7 +474,7 @@ void NetProcTop::dump(ostream&o, unsigned ind) const
void NetAssign_::dump_lval(ostream&o) const
{
if (sig_) {
o << sig_->name();
o << "sig=" << sig_->name();
if (bmux_) {
o << "[" << *bmux_ << "]";
@@ -443,7 +485,7 @@ void NetAssign_::dump_lval(ostream&o) const
// Is there an obvious way to flag memories in the dump
// as different from the _real_ bit mux case?
// o << "**memory**";
o << mem_->name() << "[";
o << "mem=" << mem_->name() << "[";
if (bmux_) o << *bmux_;
else o << "**oops**";
o << "]";
@@ -537,6 +579,8 @@ void NetCase::dump(ostream&o, unsigned ind) const
break;
}
dump_proc_attr(o, ind+2);
for (unsigned idx = 0 ; idx < nitems_ ; idx += 1) {
o << setw(ind+2) << "";
if (items_[idx].guard)
@@ -842,6 +886,15 @@ void NetProc::dump(ostream&o, unsigned ind) const
o << setw(ind) << "" << "// " << typeid(*this).name() << endl;
}
void NetProc::dump_proc_attr(ostream&o, unsigned ind) const
{
unsigned idx;
for (idx = 0 ; idx < attr_cnt() ; idx += 1) {
o << setw(ind) << "" << "(* " << attr_key(idx) << " = "
<< attr_value(idx) << " *)" << endl;
}
}
/* Dump an expression that no one wrote a dump method for. */
void NetExpr::dump(ostream&o) const
{
@@ -1086,295 +1139,3 @@ void Design::dump(ostream&o) const
idx->dump(o, 0);
}
/*
* $Log: design_dump.cc,v $
* Revision 1.149 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.148 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.147 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.146 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.145 2003/12/17 16:52:39 steve
* Debug dumps for synth2.
*
* Revision 1.144 2003/07/26 03:34:42 steve
* Start handling pad of expressions in code generators.
*
* Revision 1.143 2003/07/05 20:42:08 steve
* Fix some enumeration warnings.
*
* Revision 1.142 2003/06/20 00:53:19 steve
* Module attributes from the parser
* through to elaborated form.
*
* Revision 1.141 2003/06/18 03:55:18 steve
* Add arithmetic shift operators.
*
* Revision 1.140 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.139 2003/04/22 04:48:29 steve
* Support event names as expressions elements.
*
* Revision 1.138 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.137 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.136 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.135 2002/10/23 01:47:17 steve
* Fix synth2 handling of aset/aclr signals where
* flip-flops are split by begin-end blocks.
*
* Revision 1.134 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.133 2002/08/19 00:06:11 steve
* Allow release to handle removal of target net.
*
* Revision 1.132 2002/08/13 05:35:00 steve
* Do not elide named blocks.
*
* Revision 1.131 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.130 2002/08/04 18:28:14 steve
* Do not use hierarchical names of memories to
* generate vvp labels. -tdll target does not
* used hierarchical name string to look up the
* memory objects in the design.
*
* Revision 1.129 2002/06/19 04:20:03 steve
* Remove NetTmp and add NetSubnet class.
*
* Revision 1.128 2002/06/14 21:38:41 steve
* Fix expression width for repeat concatenations.
*
* Revision 1.127 2002/06/08 23:42:46 steve
* Add NetRamDq synthsesis from memory l-values.
*
* Revision 1.126 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.125 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.124 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.123 2002/05/05 21:11:49 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.122 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.121 2001/12/31 00:03:05 steve
* Include s indicator in dump of signed numbers.
*
* Revision 1.120 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.119 2001/11/19 01:46:38 steve
* Print typename is fallback expression node dump.
*
* Revision 1.118 2001/10/19 21:53:24 steve
* Support multiple root modules (Philip Blundell)
*
* Revision 1.117 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.116 2001/07/27 04:51:44 steve
* Handle part select expressions as variants of
* NetESignal/IVL_EX_SIGNAL objects, instead of
* creating new and useless temporary signals.
*
* Revision 1.115 2001/07/27 02:41:55 steve
* Fix binding of dangling function ports. do not elide them.
*
* Revision 1.114 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.113 2001/04/29 20:19:10 steve
* Add pullup and pulldown devices.
*
* Revision 1.112 2001/04/22 23:09:46 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.111 2001/02/17 05:13:36 steve
* Check that the port really exists here.
*
* Revision 1.110 2001/01/18 03:16:35 steve
* NetMux needs a scope. (PR#115)
*
* Revision 1.109 2001/01/13 22:20:08 steve
* Parse parameters within nested scopes.
*
* Revision 1.108 2000/12/16 01:45:47 steve
* Detect recursive instantiations (PR#2)
*
* Revision 1.107 2000/12/11 00:31:43 steve
* Add support for signed reg variables,
* simulate in t-vvm signed comparisons.
*
* Revision 1.106 2000/12/10 06:41:59 steve
* Support delays on continuous assignment from idents. (PR#40)
*
* Revision 1.105 2000/12/04 17:37:03 steve
* Add Attrib class for holding NetObj attributes.
*
* Revision 1.104 2000/11/11 01:52:09 steve
* change set for support of nmos, pmos, rnmos, rpmos, notif0, and notif1
* change set to correct behavior of bufif0 and bufif1
* (Tim Leight)
*
* Also includes fix for PR#27
*
* Revision 1.103 2000/11/11 00:03:36 steve
* Add support for the t-dll backend grabing flip-flops.
*
* Revision 1.102 2000/11/04 06:36:24 steve
* Apply sequential UDP rework from Stephan Boettcher (PR#39)
*
* Revision 1.101 2000/10/28 00:51:41 steve
* Add scope to threads in vvm, pass that scope
* to vpi sysTaskFunc objects, and add vpi calls
* to access that information.
*
* $display displays scope in %m (PR#1)
*
* Revision 1.100 2000/10/07 19:45:42 steve
* Put logic devices into scopes.
*
* Revision 1.99 2000/10/06 23:46:50 steve
* ivl_target updates, including more complete
* handling of ivl_nexus_t objects. Much reduced
* dependencies on pointers to netlist objects.
*
* Revision 1.98 2000/09/26 01:35:42 steve
* Remove the obsolete NetEIdent class.
*
* Revision 1.97 2000/09/17 21:26:15 steve
* Add support for modulus (Eric Aardoom)
*
* Revision 1.96 2000/09/10 02:18:16 steve
* elaborate complex l-values
*
* Revision 1.95 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.94 2000/07/30 18:25:43 steve
* Rearrange task and function elaboration so that the
* NetTaskDef and NetFuncDef functions are created during
* signal enaboration, and carry these objects in the
* NetScope class instead of the extra, useless map in
* the Design class.
*
* Revision 1.93 2000/07/29 03:55:38 steve
* fix problem coalescing events w/ probes.
*
* Revision 1.92 2000/07/27 05:13:44 steve
* Support elaboration of disable statements.
*
* Revision 1.91 2000/07/22 22:09:03 steve
* Parse and elaborate timescale to scopes.
*
* Revision 1.90 2000/07/14 06:12:57 steve
* Move inital value handling from NetNet to Nexus
* objects. This allows better propogation of inital
* values.
*
* Clean up constant propagation a bit to account
* for regs that are not really values.
*
* Revision 1.89 2000/07/07 04:53:53 steve
* Add support for non-constant delays in delay statements,
* Support evaluating ! in constant expressions, and
* move some code from netlist.cc to net_proc.cc.
*
* Revision 1.88 2000/06/25 19:59:42 steve
* Redesign Links to include the Nexus class that
* carries properties of the connected set of links.
*
* Revision 1.87 2000/06/24 22:55:19 steve
* Get rid of useless next_link method.
*
* Revision 1.86 2000/06/13 03:24:48 steve
* Index in memory assign should be a NetExpr.
*
* Revision 1.85 2000/05/11 23:37:27 steve
* Add support for procedural continuous assignment.
*
* Revision 1.84 2000/05/07 18:20:07 steve
* Import MCD support from Stephen Tell, and add
* system function parameter support to the IVL core.
*
* Revision 1.83 2000/05/07 04:37:56 steve
* Carry strength values from Verilog source to the
* pform and netlist for gates.
*
* Change vvm constants to use the driver_t to drive
* a constant value. This works better if there are
* multiple drivers on a signal.
*
* Revision 1.82 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
*
* Revision 1.81 2000/05/02 03:13:30 steve
* Move memories to the NetScope object.
*
* Revision 1.80 2000/05/02 00:58:11 steve
* Move signal tables to the NetScope class.
*
* Revision 1.79 2000/04/28 21:00:29 steve
* Over agressive signal elimination in constant probadation.
*
* Revision 1.78 2000/04/23 03:45:24 steve
* Add support for the procedural release statement.
*
* Revision 1.77 2000/04/22 04:20:19 steve
* Add support for force assignment.
*
* Revision 1.76 2000/04/12 20:02:52 steve
* Finally remove the NetNEvent and NetPEvent classes,
* Get synthesis working with the NetEvWait class,
* and get started supporting multiple events in a
* wait in vvm.
*/
-2
View File
@@ -1,2 +0,0 @@
Makefile
iverilog-vpi.exe
+18 -12
View File
@@ -15,20 +15,20 @@
# Software Foundation, Inc.,
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.7 2004/10/13 22:01:34 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.8
suffix = @install_suffix@
prefix = @prefix@
exec_prefix = @exec_prefix@
srcdir = @srcdir@
datarootdir = @datarootdir@
VPATH = $(srcdir)
suffix = @install_suffix@
bindir = $(exec_prefix)/bin
libdir = $(exec_prefix)/lib
includedir = $(prefix)/include
@@ -41,14 +41,14 @@ INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
CPPFLAGS = -I. -I$(srcdir)/.. @CPPFLAGS@ @DEFS@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
all: iverilog-vpi@EXEEXT@
clean:
rm -f *.o
rm -f *.o config.h
rm -f iverilog-vpi@EXEEXT@
distclean: clean
@@ -60,21 +60,27 @@ iverilog-vpi@EXEEXT@: $O
$(CC) $(LDFLAGS) $O -o iverilog-vpi@EXEEXT@ @EXTRALIBS@
main.o: main.c
main.o: main.c config.h
$(CC) $(CPPFLAGS) $(CFLAGS) -c $(srcdir)/main.c
config.h: config.h.in
sed -e 's;@IVLCC@;@CC@;' -e 's;@IVLCXX@;@CXX@;' \
-e 's;@SUFFIX@;$(suffix);g' \
-e 's;@IVLCFLAGS@;@CXXFLAGS@;' \
-e 's;@SHARED@;@shared@;' $< > $@
# Windows specific...
res.o: res.rc
windres -i res.rc -o res.o
#
install: all installdirs $(bindir)/iverilog-vpi@EXEEXT@
install: all installdirs $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
$(bindir)/iverilog-vpi@EXEEXT@: ./iverilog-vpi@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi@EXEEXT@
$(bindir)/iverilog-vpi$(suffix)@EXEEXT@: ./iverilog-vpi@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
installdirs: ../mkinstalldirs
$(srcdir)/../mkinstalldirs $(bindir)
uninstall:
rm -f $(bindir)/iverilog-vpi@EXEEXT@
rm -f $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
+9
View File
@@ -0,0 +1,9 @@
/* For now do not put the Icarus Verilog include or library paths here.
* They are generated from a registry entry the user must set (-ivl=).
* This may change in the future once I have thought about it more. */
#define IVERILOG_VPI_CC "@IVLCC@"
#define IVERILOG_VPI_CXX "@IVLCXX@"
#define IVERILOG_VPI_CFLAGS " @IVLCFLAGS@"
#define IVERILOG_VPI_LDFLAGS "@SHARED@"
#define IVERILOG_VPI_LDLIBS "-lveriuser@SUFFIX@ -lvpi@SUFFIX@"
#define IVERILOG_SUFFIX "@SUFFIX@"
+189 -113
View File
@@ -32,28 +32,28 @@
#include <windows.h>
/* Macros used for compiling and linking */
static void setup_ivl_environment();
static void assign(char **ptr, char *str);
#define IVERILOG_VPI_CC "gcc" /* no .exe extension */
#define IVERILOG_VPI_CXX "gcc" /* no .exe extension */
#define IVERILOG_VPI_CFLAGS "-O" /* -I appended later */
#define IVERILOG_VPI_LD "gcc" /* no .exe extension */
#define IVERILOG_VPI_LDFLAGS "-shared -Wl,--enable-auto-image-base"
#define IVERILOG_VPI_LDLIBS "-lveriuser -lvpi" /* -L prepended later */
/* The compile options: compiler, flags, etc. are in here */
#include "config.h"
/* pointers to global strings */
static struct global_strings {
char *pCCSRC; /* list of C source files */
char *pCXSRC; /* list of C++ source files */
char *pCCSRC; /* list of C source files (*.c) */
char *pCXSRC; /* list of C++ source files (*.cc, *.cpp) */
char *pOBJ; /* list of object files */
char *pLIB; /* list of library files */
char *pINCS; /* list of include directories */
char *pDEFS; /* list of definitions */
char *pOUT; /* output file name (.vpi extension), if 0 length then no source files specified */
char *pMINGW; /* path to MinGW directory */
char *pIVL; /* path to IVL directory */
char *pCFLAGS; /* CFLAGS option */
char *pLDLIBS; /* LDLIBS option */
char *pNewPath; /* new PATH environment variable setting */
char *pLD; /* what to use for a linker */
} gstr;
@@ -70,12 +70,15 @@ static void myExit(int exitVal)
deInitDynString(gstr.pCXSRC);
deInitDynString(gstr.pOBJ);
deInitDynString(gstr.pLIB);
deInitDynString(gstr.pINCS);
deInitDynString(gstr.pDEFS);
deInitDynString(gstr.pOUT);
deInitDynString(gstr.pMINGW);
deInitDynString(gstr.pIVL);
deInitDynString(gstr.pCFLAGS);
deInitDynString(gstr.pLDLIBS);
deInitDynString(gstr.pNewPath);
free(gstr.pLD);
exit(exitVal);
}
@@ -84,9 +87,9 @@ static void myExit(int exitVal)
static void usage()
{
fprintf(stderr,"usage: iverilog-vpi [--name=name] [-llibrary] [-mingw=dir] [-ivl=dir] sourcefile...\n");
fprintf(stderr," or iverilog-vpi -mingw=dir\n");
fprintf(stderr," or iverilog-vpi -ivl=dir\n");
fprintf(stderr,"usage: iverilog-vpi" IVERILOG_SUFFIX " [src and obj files]...\n");
fprintf(stderr," or iverilog-vpi" IVERILOG_SUFFIX " -mingw=dir\n");
fprintf(stderr," or iverilog-vpi" IVERILOG_SUFFIX " -ivl=dir\n");
myExit(1);
}
@@ -110,12 +113,16 @@ static void init()
initDynString(&gstr.pCXSRC);
initDynString(&gstr.pOBJ);
initDynString(&gstr.pLIB);
initDynString(&gstr.pINCS);
initDynString(&gstr.pDEFS);
initDynString(&gstr.pOUT);
initDynString(&gstr.pMINGW);
initDynString(&gstr.pIVL);
initDynString(&gstr.pCFLAGS);
initDynString(&gstr.pLDLIBS);
initDynString(&gstr.pNewPath);
/* By default use the C compiler to link the programs. */
assign(&gstr.pLD, IVERILOG_VPI_CC);
}
/* return true if "str" is terminated with with "end", case insensitive */
@@ -277,63 +284,124 @@ static int parse(int argc, char *argv[])
char dot_c_ext[] = ".c";
char dot_cc_ext[] = ".cc";
char dot_cpp_ext[] = ".cpp";
char dot_o_ext[] = ".o";
char name_option[] = "--name=";
char lib_option[] = "-l";
char inc_option[] = "-I";
char mingw_option[] = "-mingw=";
char ivl_option[] = "-ivl=";
char def_option[] = "-D";
if (argc == 1)
return 0;
if (argc == 1) return 0;
for (idx=1; idx<argc; ++idx) {
if (endsIn(dot_c_ext,argv[idx])) { /* check for C source files */
/* Check for C source files (*.c) */
if (endsIn(dot_c_ext, argv[idx])) {
++srcFileCnt;
append(&gstr.pCCSRC,argv[idx]);
append(&gstr.pCCSRC," ");
append(&gstr.pCCSRC, argv[idx]);
append(&gstr.pCCSRC, " ");
if (!*gstr.pOUT)
assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_c_ext));
assignn(&gstr.pOUT, argv[idx],
strlen(argv[idx])-strlen(dot_c_ext));
}
else if (endsIn(dot_cc_ext,argv[idx])) { /* check for C++ source files */
/* Check for C++ source files (*.cc) */
else if (endsIn(dot_cc_ext, argv[idx])) {
/* We need to link with the C++ compiler. */
assign(&gstr.pLD, IVERILOG_VPI_CXX);
++srcFileCnt;
append(&gstr.pCXSRC,argv[idx]);
append(&gstr.pCXSRC," ");
append(&gstr.pCXSRC, argv[idx]);
append(&gstr.pCXSRC, " ");
if (!*gstr.pOUT)
assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_cc_ext));
assignn(&gstr.pOUT, argv[idx],
strlen(argv[idx])-strlen(dot_cc_ext));
}
else if (endsIn(dot_o_ext,argv[idx])) { /* check for compiled object files */
/* Check for C++ source files (*.cpp) */
else if (endsIn(dot_cpp_ext, argv[idx])) {
/* We need to link with the C++ compiler. */
assign(&gstr.pLD, IVERILOG_VPI_CXX);
++srcFileCnt;
append(&gstr.pCXSRC, argv[idx]);
append(&gstr.pCXSRC, " ");
if (!*gstr.pOUT)
assignn(&gstr.pOUT, argv[idx],
strlen(argv[idx])-strlen(dot_cpp_ext));
}
/* Check for compiled object files */
else if (endsIn(dot_o_ext, argv[idx])) {
++srcFileCnt;
append(&gstr.pOBJ,argv[idx]);
append(&gstr.pOBJ," ");
append(&gstr.pOBJ, argv[idx]);
if (!*gstr.pOUT)
assignn(&gstr.pOUT,argv[idx],strlen(argv[idx])-strlen(dot_o_ext));
assignn(&gstr.pOUT, argv[idx],
strlen(argv[idx])-strlen(dot_o_ext));
}
else if (startsWith(name_option,argv[idx])) { /* check for --name option */
assignn(&gstr.pOUT,argv[idx]+sizeof(name_option)-1,strlen(argv[idx])-(sizeof(name_option)-1));
/* Check for the -mingw option */
else if (startsWith(mingw_option, argv[idx]))
assignn(&gstr.pMINGW, argv[idx]+sizeof(mingw_option)-1,
strlen(argv[idx])-(sizeof(mingw_option)-1));
/* Check for the -ivl option */
else if (startsWith(ivl_option, argv[idx]))
assignn(&gstr.pIVL, argv[idx]+sizeof(ivl_option)-1,
strlen(argv[idx])-(sizeof(ivl_option)-1));
/* Check for the --name option */
else if (startsWith(name_option, argv[idx])) {
assignn(&gstr.pOUT, argv[idx]+sizeof(name_option)-1,
strlen(argv[idx])-(sizeof(name_option)-1));
}
else if (startsWith(lib_option,argv[idx])) { /* check for -l option */
append(&gstr.pLIB,argv[idx]);
append(&gstr.pLIB," ");
/* Check for the -l option */
else if (startsWith(lib_option, argv[idx])) {
append(&gstr.pLIB, " ");
append(&gstr.pLIB, argv[idx]);
}
else if (startsWith(mingw_option,argv[idx])) /* check for -mingw option */
assignn(&gstr.pMINGW,argv[idx]+sizeof(mingw_option)-1,strlen(argv[idx])-(sizeof(mingw_option)-1));
else if (startsWith(ivl_option,argv[idx])) /* check for -ivl option */
assignn(&gstr.pIVL,argv[idx]+sizeof(ivl_option)-1,strlen(argv[idx])-(sizeof(ivl_option)-1));
else
return 0; /* different from iverilog-vpi.sh, we don't ignore accept arguments */
/* Check for the -I option */
else if (startsWith(inc_option, argv[idx])) {
append(&gstr.pINCS, " ");
append(&gstr.pINCS, argv[idx]);
}
/* Check for the -D option */
else if (startsWith(def_option, argv[idx])) {
append(&gstr.pDEFS, " ");
append(&gstr.pDEFS, argv[idx]);
}
/* Check for the --cflags option */
else if (stricmp("--cflags", argv[idx]) == 0) {
setup_ivl_environment();
printf("%s\n", gstr.pCFLAGS);
myExit(0);
}
/* Check for the --ldflags option */
else if (stricmp("--ldflags", argv[idx]) == 0) {
printf("%s\n", IVERILOG_VPI_LDFLAGS);
myExit(0);
}
/* Check for the --ldlibs option */
else if (stricmp("--ldlibs", argv[idx]) == 0) {
setup_ivl_environment();
printf("%s\n", gstr.pLDLIBS);
myExit(0);
}
/* Check for the --install-dir option */
else if (stricmp("--install-dir", argv[idx]) == 0) {
setup_ivl_environment();
printf("%s\\\\lib\\\\ivl" IVERILOG_SUFFIX "\\\\.\n", gstr.pIVL);
myExit(0);
}
/* This is different than iverilog-vpi.sh, we don't
* ignore unknown arguments */
else return 0;
}
if (0 == srcFileCnt)
assign(&gstr.pOUT,""); /* in case they used --name with no source files */
/* In case there is a --name without source/object files */
if (0 == srcFileCnt) assign(&gstr.pOUT,"");
if (!*gstr.pOUT) { /* normally it's an error if there are no *.c,*.cc,*.o files */
if (!*gstr.pMINGW && !*gstr.pIVL) /* unless they are just setting the IVL or MinGW registry entries */
usage();
}
else {
append(&gstr.pOUT,".vpi"); /* the result file should have a .vpi extension */
append(&gstr.pOUT," ");
}
/* Normally it's an error if there are no source or object files */
/* Unless we are setting the IVL or MinGW registry entries */
if (!*gstr.pOUT) {
if (!*gstr.pMINGW && !*gstr.pIVL) return 0;
} else
/* We have a valid result file so add the .vpi extension */
append(&gstr.pOUT, ".vpi");
return 1;
}
@@ -376,14 +444,14 @@ static void checkIvlDir(char *root)
initDynString(&path);
assign(&path,gstr.pIVL);
appendBackSlash(&path);
append(&path,"bin\\vvp.exe");
append(&path,"bin\\vvp" IVERILOG_SUFFIX ".exe");
irv = _stat(path,&stat_buf);
deInitDynString(path);
if (irv) {
fprintf(stderr,"error: %s does not appear to be the valid root directory of\n",root);
fprintf(stderr," Icarus Verilog. Use the -ivl option of iverilog-vpi.exe to\n");
fprintf(stderr," Icarus Verilog. Use the -ivl option of iverilog-vpi" IVERILOG_SUFFIX " to\n");
fprintf(stderr," point to the Icarus Verilog root directory. For a Windows\n");
fprintf(stderr," command shell the option would be something like -ivl=c:\\iverilog\n");
fprintf(stderr," For a Cygwin shell the option would be something like\n");
@@ -403,9 +471,7 @@ static void setup_mingw_environment()
if (*gstr.pMINGW) {
checkMingwDir(gstr.pMINGW);
SetRegistryKey(IVL_REGKEY_MINGW,gstr.pMINGW);
}
else
if (!GetRegistryKey(IVL_REGKEY_MINGW,&gstr.pMINGW)) {
} else if (!GetRegistryKey(IVL_REGKEY_MINGW,&gstr.pMINGW)) {
fprintf(stderr,"error: can not locate the MinGW root directory, use the -mingw option of\n");
fprintf(stderr," iverilog-vpi.exe to point to the MinGW root directory. For\n");
fprintf(stderr," a Windows command shell the option would be something like\n");
@@ -414,13 +480,16 @@ static void setup_mingw_environment()
myExit(5);
}
assign(&gstr.pNewPath,"PATH="); /* create new path */
/* Create new path with MinGW in it */
assign(&gstr.pNewPath,"PATH=");
append(&gstr.pNewPath,gstr.pMINGW);
appendBackSlash(&gstr.pNewPath);
append(&gstr.pNewPath, "\\");
append(&gstr.pNewPath,"bin;");
append(&gstr.pNewPath,pOldPATH);
_putenv(gstr.pNewPath); /* place new path in environment variable */
/* Place new path in environment */
_putenv(gstr.pNewPath);
}
/* see if we can find iverilog root */
@@ -432,67 +501,73 @@ static void setup_ivl_environment()
if (*gstr.pIVL) {
checkIvlDir(gstr.pIVL);
SetRegistryKey(IVL_REGKEY_IVL,gstr.pIVL);
}
else
if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
} else if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
fprintf(stderr,"error: can not locate the Icarus Verilog root directory, use the -ivl option\n");
fprintf(stderr," of iverilog-vpi.exe to point to the Icarus Verilog root directory.\n");
fprintf(stderr," of iverilog-vpi" IVERILOG_SUFFIX " to point to the Icarus Verilog root directory.\n");
fprintf(stderr," For a Windows command shell the option would be something like\n");
fprintf(stderr," -ivl=c:\\iverilog For a Cygwin shell the option would be something\n");
fprintf(stderr," like -ivl=c:\\\\iverilog\n");
myExit(6);
}
/* build up the CFLAGS option string */
assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS);
append(&gstr.pCFLAGS," -I");
/* Build up the CFLAGS option string */
assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS " -I");
append(&gstr.pCFLAGS,gstr.pIVL);
appendBackSlash(&gstr.pCFLAGS);
append(&gstr.pCFLAGS,"include");
/* build up the LDFLAGS option string */
append(&gstr.pCFLAGS,"\\include\\\\iverilog" IVERILOG_SUFFIX);
/* Build up the LDFLAGS option string */
assign(&gstr.pLDLIBS,"-L");
append(&gstr.pLDLIBS,gstr.pIVL);
appendBackSlash(&gstr.pLDLIBS);
append(&gstr.pLDLIBS,"lib ");
append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS);
append(&gstr.pLDLIBS,"\\lib " IVERILOG_VPI_LDLIBS);
}
/* compile source modules */
static void compile(char *pSource, char **pObject, char *ext, int *compile_errors, char *compiler)
static void compile(char *pSource, char **pObject, int *compile_errors, char *compiler)
{
char *ptr1 = pSource;
char *ptr2 = strchr(pSource,' ');
char *buf=0,*src=0,*obj=0;
char *ptr2 = strchr(ptr1, ' ');
char *buf=0, *src=0, *obj=0;
while (ptr2) {
int len = ptr2 - ptr1;
assignn(&src,ptr1,len);
char *ostart;
int olen;
assignn(&src, ptr1, len);
assignn(&obj,ptr1,len-strlen(ext)); /* strip off the extension */
append (&obj,".o");
/* Build the object file name */
ostart = strrchr(ptr1, '/');
if (ostart == NULL) ostart = ptr1;
else ostart += 1;
olen = strrchr(ptr1, '.') - ostart;
assignn(&obj, ostart, olen);
append(&obj, ".o");
assign (&buf,compiler);
append (&buf," -c -o ");
append (&buf,obj);
append (&buf," ");
append (&buf,gstr.pCFLAGS);
append (&buf," ");
append (&buf,src);
/* Build the compile line */
assign(&buf, compiler);
append(&buf, " -c -o ");
append(&buf, obj);
append(&buf, " ");
append(&buf, gstr.pDEFS);
append(&buf, " ");
append(&buf, gstr.pCFLAGS);
append(&buf, " ");
append(&buf, gstr.pINCS);
append(&buf, " ");
append(&buf, src);
append (pObject,obj);
append (pObject," ");
append (pObject, " ");
append (pObject, obj);
printf("%s\n",buf);
printf("Compiling %s...\n", src);
if (system(buf))
++*compile_errors;
if (system(buf)) ++*compile_errors;
ptr1 = ptr2 + 1; /* advance to next token */
ptr2 = strchr(ptr1,' ');
/* advance to next token */
ptr1 = ptr2 + 1;
ptr2 = strchr(ptr1, ' ');
}
free(buf);
@@ -507,43 +582,44 @@ static void compile_and_link()
char *buf=0;
int iRet, compile_errors = 0;
/* print out the mingw and ivl directories to help the user debug problems */
/* To make the output match iverilog-vpi.sh do not print out the
* root directories */
printf("info: %s will be used as the MinGW root directory.\n",gstr.pMINGW);
// printf("MinGW root directory: %s.\n", gstr.pMINGW);
checkMingwDir(gstr.pMINGW);
printf("info: %s will be used as the Icarus Verilog root directory.\n",gstr.pIVL);
// printf("Icarus Verilog root directory: %s.\n", gstr.pIVL);
checkIvlDir(gstr.pIVL);
/* compile */
compile(gstr.pCCSRC,&gstr.pOBJ,".c" ,&compile_errors,IVERILOG_VPI_CC ); /* compile the C source files */
compile(gstr.pCXSRC,&gstr.pOBJ,".cc",&compile_errors,IVERILOG_VPI_CXX); /* compile the C++ source files */
/* compile the C source files (*.c) */
compile(gstr.pCCSRC, &gstr.pOBJ, &compile_errors, IVERILOG_VPI_CC );
/* compile the C++ source files (*.cc, *.cpp) */
compile(gstr.pCXSRC, &gstr.pOBJ, &compile_errors, IVERILOG_VPI_CXX);
if (compile_errors) {
fprintf(stderr,"iverilog-vpi: Some %d files failed to compile.\n",compile_errors);
fprintf(stderr,"iverilog-vpi: %d file(s) failed to compile.\n",
compile_errors);
myExit(2);
}
/* link */
/* link */
assign(&buf, gstr.pLD);
append(&buf, " -o ");
append(&buf, gstr.pOUT);
append(&buf, " ");
append(&buf, IVERILOG_VPI_LDFLAGS);
append(&buf, " ");
append(&buf, gstr.pOBJ);
append(&buf, " ");
append(&buf, gstr.pLIB);
append(&buf, " ");
append(&buf, gstr.pLDLIBS);
assign(&buf,IVERILOG_VPI_LD);
append(&buf," -o ");
append(&buf,gstr.pOUT); /* has a trailing space */
append(&buf,IVERILOG_VPI_LDFLAGS);
append(&buf," ");
append(&buf,gstr.pOBJ) /* has a trailing space */;
append(&buf,gstr.pLIB); /* has a trailing space */
append(&buf,gstr.pLDLIBS);
printf("%s\n",buf);
printf("Making %s from %s...\n", gstr.pOUT,gstr.pOBJ);
iRet = system(buf);
free(buf);
if (iRet)
myExit(3);
if (iRet) myExit(3);
}
/* program execution starts here */
@@ -552,14 +628,14 @@ int main(int argc, char *argv[])
{
init();
if (!parse(argc,argv))
usage();
if (!parse(argc,argv)) usage();
setup_mingw_environment();
setup_ivl_environment();
if (*gstr.pOUT) /* are there any *.c,*.cc,*.o files specified */
compile_and_link();
/* are there any source or object files specified */
if (*gstr.pOUT) compile_and_link();
myExit(0);
return 0; // eliminate warnings.
}
-15
View File
@@ -1,15 +0,0 @@
a.out
Makefile
parse.c
parse.h
parse.output
lexor.c
cfparse.c
cfparse.h
cfparse.output
cflexor.c
foo.*
iverilog
iverilog.ps
iverilog.pdf
tmp.pdf
+35 -24
View File
@@ -15,17 +15,15 @@
# Software Foundation, Inc.,
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.24 2004/10/13 22:01:34 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.8
suffix = @install_suffix@
prefix = @prefix@
exec_prefix = @exec_prefix@
srcdir = @srcdir@
datarootdir = @datarootdir@
VPATH = $(srcdir)
@@ -40,9 +38,11 @@ CC = @CC@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
MAN = @MAN@
PS2PDF = @PS2PDF@
CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
CFLAGS = -Wall @CFLAGS@
CPPFLAGS = -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
CFLAGS = @WARNING_CFLAGS@ @CFLAGS@
LDFLAGS = @LDFLAGS@
all: iverilog@EXEEXT@
@@ -50,10 +50,12 @@ all: iverilog@EXEEXT@
clean:
rm -f *.o lexor.c parse.c parse.h parse.output
rm -f cflexor.c cfparse.c cfparse.h cfparse.output
rm -f iverilog.ps iverilog.pdf
rm -f iverilog@EXEEXT@
distclean: clean
rm -f Makefile
rm -rf autom4te.cache
O = main.o substit.o cflexor.o cfparse.o
@@ -68,41 +70,50 @@ cfparse.h cfparse.c: cfparse.y
main.o: main.c globals.h
$(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
$(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl$(suffix)"' -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(DEBUGFLAGS) $(srcdir)/main.c
build_string.o: build_string.c globals.h
cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h
cfparse.o: cfparse.c globals.h cfparse_misc.h
iverilog.ps: $(srcdir)/iverilog.man
man -t $(srcdir)/iverilog.man > iverilog.ps
$(MAN) -t $(srcdir)/iverilog.man > iverilog.ps
iverilog.pdf: iverilog.ps
ps2pdf iverilog.ps iverilog.pdf
$(PS2PDF) iverilog.ps iverilog.pdf
ifeq (@WIN32@,yes)
INSTALL_DOC = $(prefix)/iverilog.pdf $(mandir)/man1/iverilog.1
INSTALL_DOCDIR = $(mandir)/man1
all: iverilog.pdf
ifeq ($(MAN),none)
INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
else
INSTALL_DOC = $(mandir)/man1/iverilog.1
ifeq ($(PS2PDF),none)
INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
else
INSTALL_DOC = $(prefix)/iverilog$(suffix).pdf $(mandir)/man1/iverilog$(suffix).1
all: iverilog.pdf
endif
endif
INSTALL_DOCDIR = $(mandir)/man1
else
INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
INSTALL_DOCDIR = $(mandir)/man1
endif
install: all installdirs $(bindir)/iverilog@EXEEXT@ $(INSTALL_DOC)
install: all installdirs $(bindir)/iverilog$(suffix)@EXEEXT@ $(INSTALL_DOC)
$(bindir)/iverilog@EXEEXT@: ./iverilog@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(bindir)/iverilog@EXEEXT@
$(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@: ./iverilog@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@
$(mandir)/man1/iverilog.1: $(srcdir)/iverilog.man
$(INSTALL_DATA) $(srcdir)/iverilog.man $(mandir)/man1/iverilog.1
$(DESTDIR)$(mandir)/man1/iverilog$(suffix).1: $(srcdir)/iverilog.man
$(INSTALL_DATA) $(srcdir)/iverilog.man $(DESTDIR)$(mandir)/man1/iverilog$(suffix).1
$(prefix)/iverilog.pdf: iverilog.pdf
$(INSTALL_DATA) iverilog.pdf $(prefix)/iverilog.pdf
$(DESTDIR)$(prefix)/iverilog$(suffix).pdf: iverilog.pdf
$(INSTALL_DATA) iverilog.pdf $(DESTDIR)$(prefix)/iverilog$(suffix).pdf
installdirs: ../mkinstalldirs
$(srcdir)/../mkinstalldirs $(bindir) $(INSTALL_DOCDIR)
$(srcdir)/../mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(INSTALL_DOCDIR)
uninstall:
rm -f $(bindir)/iverilog@EXEEXT@
rm -f $(mandir)/man1/iverilog.1
rm -f $(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@
rm -f $(DESTDIR)$(mandir)/man1/iverilog$(suffix).1
rm -f $(DESTDIR)$(prefix)/iverilog$(suffix).pdf
+4 -4
View File
@@ -1,7 +1,10 @@
%option nounput
%option noinput
%{
/*
* Copyright (c) 2001 Stephen Williams ([email protected])
* Copyright (c) 2001-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +21,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cflexor.lex,v 1.8 2004/10/04 01:10:56 steve Exp $"
#endif
# include "cfparse.h"
# include "cfparse_misc.h"
+1 -5
View File
@@ -1,6 +1,6 @@
%{
/*
* Copyright (c) 20001 Stephen Williams ([email protected])
* Copyright (c) 2001-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -17,10 +17,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cfparse.y,v 1.10 2003/09/26 21:25:58 steve Exp $"
#endif
# include "globals.h"
# include "cfparse_misc.h"
+1 -26
View File
@@ -1,7 +1,7 @@
#ifndef __cfparse_misc_H
#define __cfparse_misc_H
/*
* Copyright (c) 2001 Picture Elements, Inc.
* Copyright (c) 2001-2010 Picture Elements, Inc.
* Stephen Williams (steve@picturel.com)
*
* This source code is free software; you can redistribute it
@@ -19,9 +19,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: cfparse_misc.h,v 1.6 2004/02/15 18:03:30 steve Exp $"
#endif
/*
* The vlltype supports the passing of detailed source file location
@@ -42,26 +39,4 @@ int cflex(void);
int cferror(const char *);
int cfparse(void);
/*
* $Log: cfparse_misc.h,v $
* Revision 1.6 2004/02/15 18:03:30 steve
* Cleanup of warnings.
*
* Revision 1.5 2003/09/26 21:25:58 steve
* Warnings cleanup.
*
* Revision 1.4 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/01/02 02:39:34 steve
* Use my own cfltype to defend against bison 1.30.
*
* Revision 1.2 2001/11/12 18:47:32 steve
* Support +incdir in command files, and ignore other
* +args flags. Also ignore -a and -v flags.
*
* Revision 1.1 2001/11/12 01:26:36 steve
* More sophisticated command file parser.
*
*/
#endif
+3 -32
View File
@@ -1,7 +1,7 @@
#ifndef __globals_H
#define __globals_H
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: globals.h,v 1.19 2003/11/18 06:31:46 steve Exp $"
#endif
# include <stddef.h>
@@ -31,10 +28,10 @@ extern const char*base;
extern char* iconfig_path;
extern char* iconfig_common_path;
/* Ths is the optional -M<dependfile> value, if one was supplied. */
/* This is the optional -M<dependfile> value, if one was supplied. */
extern const char*depfile;
/* Ths is the optional -N<path> value, if one was supplied. */
/* This is the optional -N<path> value, if one was supplied. */
extern const char*npath;
/* This is the name of the output file that the user selected. */
@@ -75,30 +72,4 @@ extern char warning_flags[];
extern char* library_flags;
extern char* library_flags2;
/*
* $Log: globals.h,v $
* Revision 1.19 2003/11/18 06:31:46 steve
* Remove the iverilog.conf file.
*
* Revision 1.18 2003/11/13 04:09:49 steve
* Pass flags through the temporary config file.
*
* Revision 1.17 2003/11/01 04:21:57 steve
* Add support for a target static config file.
*
* Revision 1.16 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/06/23 20:10:51 steve
* Variable substitution in command files.
*
* Revision 1.14 2002/05/28 20:40:37 steve
* ivl indexes the search path for libraries, and
* supports case insensitive module-to-file lookup.
*
* Revision 1.13 2002/05/28 00:50:40 steve
* Add the ivl -C flag for bulk configuration
* from the driver, and use that to run library
* modules through the preprocessor.
*/
#endif
+8 -2
View File
@@ -1,4 +1,4 @@
.TH iverilog 1 "$Date: 2004/10/04 01:10:56 $" Version "$Date: 2004/10/04 01:10:56 $"
.TH iverilog 1 "$Date: 2006/06/12 00:16:53 $" Version "$Date: 2006/06/12 00:16:53 $"
.SH NAME
iverilog - Icarus Verilog compiler
@@ -184,7 +184,7 @@ implies the synthesis \fB-S\fP flag.
.SH "WARNING TYPES"
These are the types of warnings that can be selected by the \fB-W\fP
switch. All the warning types (other then \fBall\fP) can also be
switch. All the warning types (other than \fBall\fP) can also be
prefixed with \fBno-\fP to turn off that warning. This is most useful
after a \fB-Wall\fP argument to suppress isolated warning types.
@@ -212,6 +212,12 @@ inherit timescale from another file. Both probably mean that
timescales are inconsistent, and simulation timing can be confusing
and dependent on compilation order.
.TP 8
.B unused
This enables warnings for unused variables. This may detect variables
that are not assigned, or variables and nets that are not used, or
similar possible misuses of variables and nets.
.SH "SYSTEM FUNCTION TABLE FILES"
If the source file name as a \fB.sft\fP suffix, then it is taken to be
a system function table file. A System function table file is used to
+124 -81
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2001 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,11 +16,9 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: main.c,v 1.65 2004/06/17 14:47:22 steve Exp $"
#endif
# include "config.h"
# include "version.h"
const char NOTICE[] =
" This program is free software; you can redistribute it and/or modify\n"
@@ -39,7 +37,7 @@ const char NOTICE[] =
;
const char HELP[] =
"Usage: iverilog [-ESvV] [-B base] [-c cmdfile] [-g1|-g2|-g3.0]\n"
"Usage: iverilog [-EhSvV] [-B base] [-c cmdfile] [-g1|-g2|-g3.0]\n"
" [-D macro[=defn]] [-I includedir] [-M depfile] [-m module]\n"
" [-N file] [-o filename] [-p flag=value]\n"
" [-s topmodule] [-t target] [-T min|typ|max]\n"
@@ -88,6 +86,10 @@ extern const char*optarg;
# define IVL_ROOT "."
#endif
#ifndef IVL_ROOT_VARIABLE
# define IVL_ROOT_VARIABLE "IVERILOG_ROOT"
#endif
# include "globals.h"
#include "cfparse_misc.h" /* cfparse() */
@@ -262,15 +264,77 @@ static int t_default(char*cmd, unsigned ncmd)
}
#endif
#ifdef DEBUG
char *original_cmd = malloc( strlen( cmd ) + (size_t)1 );
strcpy( original_cmd, cmd );
if (verbose_flag)
cmd = realloc( cmd, strlen( original_cmd ) + (size_t)19 ); /* more than enough memory for the ivlpp command and ">/tmp/ivlpp_stdout" */
if( cmd == NULL ){
exit( EXIT_FAILURE );
}
char *debug_ivl = malloc( strlen( original_cmd ) + (size_t)5 ); /* more than enough memory for "gdb " and ivl program_name */
strcpy( debug_ivl, "gdb " );
static char whitespace[] = " \t\f\r\v\n";
char *token;
int found_pipe = 0;
unsigned long token_counter = 0UL;
strcpy( cmd, "" );
for( token = strtok( original_cmd, whitespace ); token != NULL; token = strtok( NULL, whitespace ) ){
if( strcmp( token, "|" ) == 0 ){
found_pipe = 1;
}
if( found_pipe ){
token_counter++;
}
if( token_counter == 0UL ){
strcat( cmd, token );
strcat( cmd, " " ); /* harmless space after last token, and it was already there anyway */
}
if( token_counter == 2UL ){
strcat( debug_ivl, token );
}
if( token_counter > 2UL ){
printf( "%s\n", token );
}
}
free( original_cmd );
#ifdef __MINGW32__
strcat( cmd, ">%TMP%\\ivlpp_stdout" );
#else
strcat( cmd, ">/tmp/ivlpp_stdout" );
#endif
#endif
if (verbose_flag) {
printf("translate: %s\n", cmd);
fflush(stdout);
}
rc = system(cmd);
#ifdef DEBUG
if( verbose_flag ){
printf( "%s\n", debug_ivl );
}
system( debug_ivl ); /* For simplicity, ignore any return value, which is implementation dependent anyway. */
free( debug_ivl );
#endif
remove(source_path);
if ( ! getenv("IVERILOG_ICONFIG"))
remove(iconfig_path);
#ifdef __MINGW32__ /* MinGW just returns the exit status, so return it! */
return rc;
#else
if (rc != 0) {
if (rc == 127) {
fprintf(stderr, "Failed to execute: %s\n", cmd);
@@ -285,13 +349,14 @@ static int t_default(char*cmd, unsigned ncmd)
}
return 0;
#endif
}
static void process_warning_switch(const char*name)
{
if (strcmp(name,"all") == 0) {
strcat(warning_flags, "ipt");
strcat(warning_flags, "iptu");
} else if (strcmp(name,"implicit") == 0) {
if (! strchr(warning_flags+2, 'i'))
@@ -302,6 +367,9 @@ static void process_warning_switch(const char*name)
} else if (strcmp(name,"timescale") == 0) {
if (! strchr(warning_flags+2, 't'))
strcat(warning_flags, "t");
} else if (strcmp(name,"unused") == 0) {
if (! strchr(warning_flags+2, 'u'))
strcat(warning_flags, "u");
} else if (strcmp(name,"no-implicit") == 0) {
char*cp = strchr(warning_flags+2, 'i');
if (cp) while (*cp) {
@@ -320,6 +388,12 @@ static void process_warning_switch(const char*name)
cp[0] = cp[1];
cp += 1;
}
} else if (strcmp(name,"no-unused") == 0) {
char*cp = strchr(warning_flags+2, 'u');
if (cp) while (*cp) {
cp[0] = cp[1];
cp += 1;
}
}
}
@@ -409,14 +483,13 @@ int process_generation(const char*name)
return 0;
}
int main(int argc, char **argv)
/*
* This function fills in th ivl_root directory with the appropriate
* path, based on operating system, build time configuration, and
* environment.
*/
static char* get_root_dir()
{
char*cmd;
unsigned ncmd;
int e_flag = 0;
int version_flag = 0;
int opt, idx, rc;
#ifdef __MINGW32__
{ char * s;
char basepath[1024];
@@ -443,18 +516,37 @@ int main(int argc, char **argv)
s = strrchr(ivl_root, sep);
if (s) *s = 0;
strcat(ivl_root, "\\lib\\ivl");
base = ivl_root;
}
#else
/* In a UNIX environment, the IVL_ROOT from the Makefile is
dependable. It points to the $prefix/lib/ivl directory,
where the sub-parts are installed. */
strcpy(ivl_root, IVL_ROOT);
base = ivl_root;
{ char*var = 0;
/* In other systems, use the configured root. */
strcpy(ivl_root, IVL_ROOT);
/* In any case, the IVL_ROOT variable can be used to override
the install location at run time. If it is set, use that
value instead. */
if ( (var = getenv(IVL_ROOT_VARIABLE)) ) {
strncpy(ivl_root, var, MAXSIZE);
strcat(ivl_root, "/lib/ivl");
}
}
#endif
return ivl_root;
}
int main(int argc, char **argv)
{
char*cmd;
unsigned ncmd;
int e_flag = 0;
int version_flag = 0;
int opt, idx, rc;
base = get_root_dir();
/* Create a temporary file for communicating input parameters
to the preprocessor. */
source_path = strdup(my_tempfile("ivrlg", &source_file));
@@ -502,10 +594,10 @@ int main(int argc, char **argv)
base=optarg;
}
break;
case 'c':
case 'c':
command_filename = malloc(strlen(optarg)+1);
strcpy(command_filename, optarg);
break;
strcpy(command_filename, optarg);
break;
case 'D':
process_define(optarg);
break;
@@ -523,9 +615,9 @@ int main(int argc, char **argv)
if (rc != 0)
return -1;
break;
case 'h':
fprintf(stderr, "%s\n", HELP);
return 1;
case 'h':
fprintf(stderr, "%s\n", HELP);
return 1;
case 'I':
process_include_dir(optarg);
@@ -594,8 +686,8 @@ int main(int argc, char **argv)
pbase = base;
if (version_flag || verbose_flag) {
printf("Icarus Verilog version " VERSION " ($Name: $)\n");
printf("Copyright 1998-2003 Stephen Williams\n");
printf("Icarus Verilog version " VERSION "\n\n");
printf("Copyright 1998-2010 Stephen Williams\n");
puts(NOTICE);
if (version_flag)
@@ -649,7 +741,7 @@ int main(int argc, char **argv)
if (source_count == 0) {
fprintf(stderr, "%s: No input files.\n", argv[0]);
fprintf(stderr, "%s\n", HELP);
fprintf(stderr, "%s\n", HELP);
return 1;
}
@@ -732,52 +824,3 @@ int main(int argc, char **argv)
return 0;
}
/*
* $Log: main.c,v $
* Revision 1.65 2004/06/17 14:47:22 steve
* Add a .sft file for the system functions.
*
* Revision 1.64 2004/03/10 04:51:25 steve
* Add support for system function table files.
*
* Revision 1.63 2004/02/15 18:03:30 steve
* Cleanup of warnings.
*
* Revision 1.62 2003/12/12 04:36:48 steve
* Fix make check to support -tconf configuration method.
*
* Revision 1.61 2003/11/18 06:31:46 steve
* Remove the iverilog.conf file.
*
* Revision 1.60 2003/11/13 05:55:33 steve
* Move the DLL= flag to target config files.
*
* Revision 1.59 2003/11/13 04:09:49 steve
* Pass flags through the temporary config file.
*
* Revision 1.58 2003/11/01 04:21:57 steve
* Add support for a target static config file.
*
* Revision 1.57 2003/10/26 22:43:42 steve
* Improve -V messages,
*
* Revision 1.56 2003/09/26 21:25:58 steve
* Warnings cleanup.
*
* Revision 1.55 2003/09/23 05:57:15 steve
* Pass -m flag from driver via iconfig file.
*
* Revision 1.54 2003/09/22 01:12:09 steve
* Pass more ivl arguments through the iconfig file.
*
* Revision 1.53 2003/08/26 16:26:02 steve
* ifdef idents correctly.
*
* Revision 1.52 2003/02/22 04:55:36 steve
* portbind adds p, not i, flag.
*
* Revision 1.51 2003/02/22 04:12:49 steve
* Add the portbind warning.
*/
+1 -25
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: substit.c,v 1.5 2003/12/19 01:27:10 steve Exp $"
#endif
# include <string.h>
# include <stdlib.h>
@@ -92,24 +89,3 @@ char* substitutions(const char*str)
return buf;
}
/*
* $Log: substit.c,v $
* Revision 1.5 2003/12/19 01:27:10 steve
* Fix various unsigned compare warnings.
*
* Revision 1.4 2002/08/12 01:35:01 steve
* conditional ident string using autoconfig.
*
* Revision 1.3 2002/08/11 23:47:04 steve
* Add missing Log and Ident strings.
*
* Revision 1.2 2002/06/25 01:33:01 steve
* include malloc.h only when available.
*
* Revision 1.1 2002/06/23 20:10:51 steve
* Variable substitution in command files.
*
*/
+4 -67
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2002 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: dup_expr.cc,v 1.18 2004/06/17 16:06:18 steve Exp $"
#endif
# include "config.h"
@@ -29,6 +26,7 @@ NetEBComp* NetEBComp::dup_expr() const
{
NetEBComp*result = new NetEBComp(op_, left_->dup_expr(),
right_->dup_expr());
result->set_line(*this);
return result;
}
@@ -90,6 +88,7 @@ NetESignal* NetESignal::dup_expr() const
NetESignal*tmp = new NetESignal(net_, msi_, lsi_);
assert(tmp);
tmp->expr_width(expr_width());
tmp->set_line(*this);
return tmp;
}
@@ -118,6 +117,7 @@ NetEUFunc* NetEUFunc::dup_expr() const
tmp = new NetEUFunc(func_, result_var_->dup_expr(), tmp_parms);
assert(tmp);
tmp->set_line(*this);
return tmp;
}
@@ -140,66 +140,3 @@ NetEVariable* NetEVariable::dup_expr() const
NetEVariable*tmp = new NetEVariable(var_);
return tmp;
}
/*
* $Log: dup_expr.cc,v $
* Revision 1.18 2004/06/17 16:06:18 steve
* Help system function signedness survive elaboration.
*
* Revision 1.17 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.16 2003/10/31 02:47:11 steve
* NetEUReduce has its own dup_expr method.
*
* Revision 1.15 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.14 2003/04/22 04:48:29 steve
* Support event names as expressions elements.
*
* Revision 1.13 2003/03/15 18:08:43 steve
* Comparison operators do have defined width.
*
* Revision 1.12 2003/03/15 04:46:28 steve
* Better organize the NetESFunc return type guesses.
*
* Revision 1.11 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.10 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.9 2002/11/09 00:25:27 steve
* Add dup_expr for user defined function calls.
*
* Revision 1.8 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.7 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.6 2001/11/19 01:54:14 steve
* Port close cropping behavior from mcrgb
* Move window array reset to libmc.
*
* Revision 1.5 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.4 2000/05/07 18:20:07 steve
* Import MCD support from Stephen Tell, and add
* system function parameter support to the IVL core.
*
* Revision 1.3 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
*/
+2 -42
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_anet.cc,v 1.10 2004/10/04 01:10:52 steve Exp $"
#endif
# include "config.h"
@@ -84,7 +81,7 @@ NetNet* PEConcat::elaborate_anet(Design*des, NetScope*scope) const
concat operator from least significant to most significant,
which is opposite from how they are given in the list.
Allow for a repeat count other then 1 by repeating the
Allow for a repeat count other than 1 by repeating the
connect loop as many times as necessary. */
NetNet*osig = new NetNet(scope, scope->local_symbol(),
@@ -164,40 +161,3 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
return sig;
}
/*
* $Log: elab_anet.cc,v $
* Revision 1.10 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.9 2003/09/19 03:50:12 steve
* Remove find_memory method from Design class.
*
* Revision 1.8 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
* Revision 1.7 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.6 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.5 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.3 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.2 2001/01/06 02:29:36 steve
* Support arrays of integers.
*
* Revision 1.1 2000/12/06 06:31:09 steve
* Check lvalue of procedural continuous assign (PR#29)
*
*/
+90 -161
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_expr.cc,v 1.91 2004/10/04 01:10:52 steve Exp $"
#endif
# include "config.h"
# include "compiler.h"
@@ -43,7 +40,7 @@ NetExpr* PExpr::elaborate_expr(Design*des, NetScope*, bool) const
* and right sides, and creating one of a variety of different NetExpr
* types.
*/
NetEBinary* PEBinary::elaborate_expr(Design*des, NetScope*scope, bool) const
NetExpr* PEBinary::elaborate_expr(Design*des, NetScope*scope, bool) const
{
assert(left_);
assert(right_);
@@ -73,7 +70,7 @@ NetEBinary* PEBinary::elaborate_expr(Design*des, NetScope*scope, bool) const
}
}
NetEBinary*tmp = elaborate_expr_base_(des, lp, rp);
NetExpr*tmp = elaborate_expr_base_(des, lp, rp);
return tmp;
}
@@ -82,11 +79,11 @@ NetEBinary* PEBinary::elaborate_expr(Design*des, NetScope*scope, bool) const
* operands are elaborated as necessary, and all I need to do is make
* the correct NetEBinary object and connect the parameters.
*/
NetEBinary* PEBinary::elaborate_expr_base_(Design*des,
NetExpr*lp, NetExpr*rp) const
NetExpr* PEBinary::elaborate_expr_base_(Design*des,
NetExpr*lp, NetExpr*rp) const
{
bool flag;
NetEBinary*tmp;
NetExpr*tmp;
switch (op_) {
default:
@@ -112,6 +109,51 @@ NetEBinary* PEBinary::elaborate_expr_base_(Design*des,
break;
case 'l': // <<
if (NetEConst*lpc = dynamic_cast<NetEConst*> (lp)) {
if (NetEConst*rpc = dynamic_cast<NetEConst*> (rp)) {
// Handle the super-special case that both
// operands are constants. Precalculate the
// entire value here.
verinum lpval = lpc->value();
unsigned shift = rpc->value().as_ulong();
verinum result = lpc->value() << shift;
// If the l-value has explicit size, use that.
if (lpval.has_len()) {
result = verinum(result, lpval.len());
}
tmp = new NetEConst(result);
if (debug_elaborate)
cerr << get_line() << ": debug: "
<< "Precalculate " << *this
<< " to constant " << *tmp << endl;
} else {
// Handle the special case that the left
// operand is constant. If it is unsized, we
// may have to expand it to an integer width.
verinum lpval = lpc->value();
if (lpval.len() < 32 && !lpval.has_len()) {
lpval = verinum(lpval, 32);
lpc = new NetEConst(lpval);
lpc->set_line(*lp);
}
tmp = new NetEBShift(op_, lpc, rp);
if (debug_elaborate)
cerr << get_line() << ": debug: "
<< "Adjust " << *this
<< " to this " << *tmp
<< " to allow for integer widths." << endl;
}
} else {
// Left side is not constant, so handle it the
// default way.
tmp = new NetEBShift(op_, lp, rp);
}
tmp->set_line(*this);
break;
case 'r': // >>
case 'R': // >>>
tmp = new NetEBShift(op_, lp, rp);
@@ -387,13 +429,16 @@ NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope, bool) const
if (NetNet*res = dscope->find_signal(dscope->basename())) {
NetESignal*eres = new NetESignal(res);
NetEUFunc*func = new NetEUFunc(dscope, eres, parms);
eres->set_line(*this);
func->set_line(*this);
return func;
}
if (NetVariable*res = dscope->find_variable(dscope->basename())) {
NetEVariable*eres = new NetEVariable(res);
eres->set_line(*res);
NetEUFunc*func = new NetEUFunc(dscope, eres, parms);
eres->set_line(*res);
func->set_line(*this);
return func;
}
@@ -425,6 +470,29 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope, bool) const
des->errors += 1;
}
if (!rep->value().is_defined()) {
cerr << get_line() << ": error: Concatenation repeat "
<< "may not be undefined (" << rep->value()
<< ")." << endl;
des->errors += 1;
return 0;
}
if (rep->value().is_negative()) {
cerr << get_line() << ": error: Concatenation repeat "
<< "may not be negative (" << rep->value().as_long()
<< ")." << endl;
des->errors += 1;
return 0;
}
if (rep->value().is_zero()) {
cerr << get_line() << ": error: Concatenation repeat "
<< "may not be zero." << endl;
des->errors += 1;
return 0;
}
repeat = rep;
}
@@ -497,6 +565,17 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
NetScope*found_in = symbol_search(des, scope, path_,
net, mem, var, par, eve);
if (net && mem) {
assert(net == mem->reg_from_explode());
net = 0;
}
if (net && net->mref()) {
mem = net->mref();
assert(net == mem->reg_from_explode());
net = 0;
}
// If the identifier name is a parameter name, then return
// a reference to the parameter expression.
if (par != 0) {
@@ -742,6 +821,7 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
}
NetESignal*node = new NetESignal(net);
node->set_line(*this);
assert(idx_ == 0);
// Non-constant bit select? punt and make a subsignal
@@ -1002,154 +1082,3 @@ NetExpr* PEUnary::elaborate_expr(Design*des, NetScope*scope, bool) const
return tmp;
}
/*
* $Log: elab_expr.cc,v $
* Revision 1.91 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.90 2004/08/28 15:42:11 steve
* Add support for $unsigned.
*
* Revision 1.89 2004/08/26 03:52:07 steve
* Add the $is_signed function.
*
* Revision 1.88 2004/06/17 16:06:18 steve
* Help system function signedness survive elaboration.
*
* Revision 1.87 2004/06/04 23:34:15 steve
* Special case for unary - of real literal.
*
* Revision 1.86 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.85 2004/03/09 04:29:42 steve
* Separate out the lookup_sys_func table, for eventual
* support for function type tables.
*
* Remove ipal compile flags.
*
* Revision 1.84 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.83 2004/01/21 04:57:40 steve
* Generate error when missing concatenation operands.
*
* Revision 1.82 2003/10/09 16:52:52 steve
* Put parameter name in NetEConstParam, not scope.
*
* Revision 1.81 2003/09/19 03:30:05 steve
* Fix name search in elab_lval.
*
* Revision 1.80 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.79 2003/06/18 03:55:18 steve
* Add arithmetic shift operators.
*
* Revision 1.78 2003/06/10 04:29:57 steve
* PR735: bit select indices are signed constants.
*
* Revision 1.77 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.76 2003/04/22 04:48:29 steve
* Support event names as expressions elements.
*
* Revision 1.75 2003/04/19 04:19:38 steve
* Set line number for ternary expressions.
*
* Revision 1.74 2003/04/02 04:25:26 steve
* Fix xz extension of constants.
*
* Revision 1.73 2003/03/25 03:00:04 steve
* Scope names can be relative.
*
* Revision 1.72 2003/03/15 04:46:28 steve
* Better organize the NetESFunc return type guesses.
*
* Revision 1.71 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.70 2003/03/07 02:44:34 steve
* Implement $realtobits.
*
* Revision 1.69 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.68 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.67 2002/12/21 00:55:57 steve
* The $time system task returns the integer time
* scaled to the local units. Change the internal
* implementation of vpiSystemTime the $time functions
* to properly account for this. Also add $simtime
* to get the simulation time.
*
* Revision 1.66 2002/09/21 21:28:18 steve
* Allow constant bit selects out of range.
*
* Revision 1.65 2002/09/18 04:08:45 steve
* Spelling errors.
*
* Revision 1.64 2002/09/12 15:49:43 steve
* Add support for binary nand operator.
*
* Revision 1.63 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.62 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.61 2002/06/14 21:38:41 steve
* Fix expression width for repeat concatenations.
*
* Revision 1.60 2002/05/24 00:44:54 steve
* Add support for $bits (SystemVerilog)
*
* Revision 1.59 2002/05/06 02:30:27 steve
* Allow parameters in concatenation of widths are defined.
*
* Revision 1.58 2002/05/05 21:11:49 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.57 2002/04/27 05:03:46 steve
* Preserve stringiness string part select and concatenation.
*
* Revision 1.56 2002/04/27 02:38:04 steve
* Support selecting bits from parameters.
*
* Revision 1.55 2002/04/25 05:04:31 steve
* Evaluate constant bit select of constants.
*
* Revision 1.54 2002/04/14 21:16:48 steve
* Evaluate logical not at elaboration time.
*
* Revision 1.53 2002/04/14 03:55:25 steve
* Precalculate unary - if possible.
*
* Revision 1.52 2002/04/13 02:33:17 steve
* Detect missing indices to memories (PR#421)
*
* Revision 1.51 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.50 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.49 2002/01/11 05:25:45 steve
* The stime system function is 32bits.
*/
+1 -107
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_lval.cc,v 1.29 2004/10/04 01:10:52 steve Exp $"
#endif
# include "config.h"
@@ -349,106 +346,3 @@ NetAssign_* PENumber::elaborate_lval(Design*des, NetScope*) const
des->errors += 1;
return 0;
}
/*
* $Log: elab_lval.cc,v $
* Revision 1.29 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.28 2004/08/28 14:59:44 steve
* More detailed error message about bad variable.
*
* Revision 1.27 2003/09/19 03:30:05 steve
* Fix name search in elab_lval.
*
* Revision 1.26 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.25 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.24 2003/01/19 00:35:39 steve
* Detect null arguments to concatenation operator.
*
* Revision 1.23 2002/11/21 23:27:51 steve
* Precalculate indices to l-value arrays.
*
* Revision 1.22 2002/11/21 18:15:40 steve
* Fix const test of msb in assignment l-values.
*
* Revision 1.21 2002/11/02 01:10:49 steve
* Detect memories without work index in l-value.
*
* Revision 1.20 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.19 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.18 2002/03/09 04:02:26 steve
* Constant expressions are not l-values for task ports.
*
* Revision 1.17 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.16 2001/11/08 05:15:50 steve
* Remove string paths from PExpr elaboration.
*
* Revision 1.15 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.14 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.13 2001/07/25 03:10:48 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.12 2001/02/09 03:16:48 steve
* Report bit/part select out of range errors. (PR#133)
*
* Revision 1.11 2001/01/10 03:13:23 steve
* Build task outputs as lval instead of nets. (PR#98)
*
* Revision 1.10 2001/01/06 06:31:58 steve
* declaration initialization for time variables.
*
* Revision 1.9 2001/01/06 02:29:36 steve
* Support arrays of integers.
*
* Revision 1.8 2000/12/12 06:14:51 steve
* sorry for concatenated memories in l-values. (PR#76)
*
* Revision 1.7 2000/12/01 02:55:37 steve
* Detect part select errors on l-values.
*
* Revision 1.6 2000/10/31 17:49:02 steve
* Support time variables.
*
* Revision 1.5 2000/10/26 17:09:46 steve
* Fix handling of errors in behavioral lvalues. (PR#28)
*
* Revision 1.4 2000/09/10 15:43:59 steve
* Some error checking.
*
* Revision 1.3 2000/09/10 03:59:59 steve
* Agressively merge NetAssign_ within concatenations.
*
* Revision 1.2 2000/09/10 02:18:16 steve
* elaborate complex l-values
*
* Revision 1.1 2000/09/09 15:21:26 steve
* move lval elaboration to PExpr virtual methods.
*
*/
+64 -207
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_net.cc,v 1.138 2004/10/04 03:09:38 steve Exp $"
#endif
# include "config.h"
@@ -28,6 +25,8 @@
# include "compiler.h"
# include <iostream>
# include <cstring>
# include <memory>
/*
* This is a state flag that determines whether an elaborate_net must
@@ -193,7 +192,7 @@ NetNet* PEBinary::elaborate_net_add_(Design*des, NetScope*scope,
/* The owidth is the output width of the lpm_add_sub
device. If the desired width is greater then the width of
device. If the desired width is greater than the width of
the operands, then widen the adder and let code below pad
the operands. If this is an adder, we can take advantage of
the carry bit. */
@@ -498,7 +497,7 @@ NetNet* PEBinary::elaborate_net_cmp_(Design*des, NetScope*scope,
use of the situation, or 0 if it cannot. */
if (NetEConst*tmp = dynamic_cast<NetEConst*>(rexp)) {
lsig = lexp->synthesize(des);
lsig = left_->elaborate_net(des, scope, 0, 0, 0, 0);
if (lsig == 0) {
cerr << get_line() << ": internal error: "
"Cannot elaborate net for " << *lexp << endl;
@@ -518,7 +517,7 @@ NetNet* PEBinary::elaborate_net_cmp_(Design*des, NetScope*scope,
if (NetEConst*tmp = dynamic_cast<NetEConst*>(lexp)) {
rsig = rexp->synthesize(des);
rsig = right_->elaborate_net(des, scope, 0, 0, 0, 0);
assert(rsig);
delete rexp;
@@ -532,13 +531,13 @@ NetNet* PEBinary::elaborate_net_cmp_(Design*des, NetScope*scope,
}
if (lsig == 0) {
lsig = lexp->synthesize(des);
lsig = left_->elaborate_net(des, scope, 0, 0, 0, 0);
assert(lsig);
delete lexp;
}
if (rsig == 0) {
rsig = rexp->synthesize(des);
rsig = right_->elaborate_net(des, scope, 0, 0, 0, 0);
assert(rsig);
delete rexp;
}
@@ -736,7 +735,7 @@ NetNet* PEBinary::elaborate_net_cmp_(Design*des, NetScope*scope,
/*
* Elaborate a divider gate. This function create a NetDivide gate
* which has exactly the right sized DataA, DataB and Result ports. If
* the l-value is wider then the result, then pad.
* the l-value is wider than the result, then pad.
*/
NetNet* PEBinary::elaborate_net_div_(Design*des, NetScope*scope,
unsigned lwidth,
@@ -790,7 +789,7 @@ NetNet* PEBinary::elaborate_net_div_(Design*des, NetScope*scope,
// Make an output signal that is the width of the l-value.
// Due to above calculation of rwidth, we know that the result
// will be no more then the l-value, so it is safe to connect
// will be no more than the l-value, so it is safe to connect
// all the result pins to the osig.
NetNet*osig = new NetNet(scope, scope->local_symbol(),
@@ -802,7 +801,7 @@ NetNet* PEBinary::elaborate_net_div_(Design*des, NetScope*scope,
connect(div->pin_Result(idx), osig->pin(idx));
// If the lvalue is larger then the result, then pad the
// If the lvalue is larger than the result, then pad the
// output with constant 0. This can happen for example in
// cases like this:
// wire [3;0] a, b;
@@ -860,7 +859,7 @@ NetNet* PEBinary::elaborate_net_mod_(Design*des, NetScope*scope,
for (unsigned idx = 0 ; idx < cnt ; idx += 1)
connect(mod->pin_Result(idx), osig->pin(idx));
/* If the lvalue is larger then the result, then pad the
/* If the lvalue is larger than the result, then pad the
output with constant 0. */
if (cnt < osig->pin_count()) {
NetConst*tmp = new NetConst(scope, scope->local_symbol(),
@@ -1031,7 +1030,7 @@ NetNet* PEBinary::elaborate_net_mul_(Design*des, NetScope*scope,
for (unsigned idx = 0 ; idx < cnt ; idx += 1)
connect(mult->pin_Result(idx), osig->pin(idx));
/* If the lvalue is larger then the result, then pad the
/* If the lvalue is larger than the result, then pad the
output with constant 0. */
if (cnt < osig->pin_count()) {
NetConst*tmp = new NetConst(scope, scope->local_symbol(),
@@ -1216,6 +1215,13 @@ NetNet* PECallFunction::elaborate_net(Design*des, NetScope*scope,
return sub;
}
if (path_.peek_name(0)[0] == '$') {
cerr << get_line() << ": sorry: System functions " << path_ <<
" not supported in continuous assignments." << endl;
des->errors += 1;
return 0;
}
/* Look up the function definition. */
NetFuncDef*def = des->find_function(scope, path_);
if (def == 0) {
@@ -1229,7 +1235,7 @@ NetNet* PECallFunction::elaborate_net(Design*des, NetScope*scope,
NetScope*dscope = def->scope();
assert(dscope);
/* This must be a ufuction that returns a signal. */
/* This must be a function that returns a signal. */
assert(def->return_sig());
/* check the validity of the parameters. */
@@ -1312,21 +1318,47 @@ NetNet* PEConcat::elaborate_net(Design*des, NetScope*scope,
unsigned repeat = 1;
if (repeat_) {
verinum*rep = repeat_->eval_const(des, scope);
if (rep == 0) {
auto_ptr<NetExpr> etmp (elab_and_eval(des, scope, repeat_));
assert(etmp.get());
NetEConst*erep = dynamic_cast<NetEConst*>(etmp.get());
if (erep == 0) {
cerr << get_line() << ": internal error: Unable to "
<< "evaluate constant repeat expression." << endl;
des->errors += 1;
return 0;
}
repeat = rep->as_ulong();
repeat = erep->value().as_ulong();
if (repeat == 0) {
cerr << get_line() << ": error: Invalid repeat value."
cerr << get_line() << ": error: Concatenation repeat "
"may not be 0."
<< endl;
des->errors += 1;
delete rep;
return 0;
}
if (!erep->value().is_defined()) {
cerr << get_line() << ": error: Concatenation repeat "
<< "may not be undefined (" << erep->value()
<< ")." << endl;
des->errors += 1;
return 0;
}
if (erep->value().is_negative()) {
cerr << get_line() << ": error: Concatenation repeat "
<< "may not be negative (" << erep->value().as_long()
<< ")." << endl;
des->errors += 1;
return 0;
}
if (erep->value().is_zero()) {
cerr << get_line() << ": error: Concatenation repeat "
<< "may not be zero." << endl;
des->errors += 1;
return 0;
}
}
@@ -1386,7 +1418,7 @@ NetNet* PEConcat::elaborate_net(Design*des, NetScope*scope,
concat operator from least significant to most significant,
which is opposite from how they are given in the list.
Allow for a repeat count other then 1 by repeating the
Allow for a repeat count other than 1 by repeating the
connect loop as many times as necessary. */
NetNet*osig = new NetNet(scope, scope->local_symbol(),
@@ -1435,6 +1467,7 @@ NetNet* PEIdent::elaborate_net_bitmux_(Design*des, NetScope*scope,
NetMux*mux = new NetMux(scope, scope->local_symbol(), 1,
sig_width, sel->pin_count());
mux->set_line(*this);
/* Connect the signal bits to the mux. Account for the
direction of the numbering (lsb to msb vs. msb to lsb) by
@@ -1601,7 +1634,7 @@ NetNet* PEIdent::elaborate_net(Design*des, NetScope*scope,
with the sig type.
Be careful to check the bit ordering. If the msb is
less significant then the msb, then the source is
less significant than the msb, then the source is
broken. I can hack it in order to go on, but report
an error. */
@@ -2240,7 +2273,7 @@ NetNet* PETernary::elaborate_net(Design*des, NetScope*scope,
assert(expr_sig->pin_count() == 1);
/* This is the width of the LPM_MUX device that I'm about to
create. It may be smaller then the desired output, but I'll
create. It may be smaller than the desired output, but I'll
handle padding below.
Create a NetNet object wide enough to hold the
@@ -2268,6 +2301,7 @@ NetNet* PETernary::elaborate_net(Design*des, NetScope*scope,
(true) connected to tru_sig. */
NetMux*mux = new NetMux(scope, scope->local_symbol(), dwidth, 2, 1);
mux->set_line(*this);
connect(mux->pin_Sel(0), expr_sig->pin(0));
/* Connect the data inputs. */
@@ -2413,6 +2447,9 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
reduction=true; gtype = NetLogic::XNOR; break;
case '-': // Unary 2's complement.
if (owidth == 0)
owidth = sub_sig->pin_count();
sig = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, owidth);
sig->local_flag(true);
@@ -2459,15 +2496,15 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
default:
NetAddSub*sub = new NetAddSub(scope, scope->local_symbol(),
sig->pin_count());
owidth);
sub->attribute(perm_string::literal("LPM_Direction"), verinum("SUB"));
des->add_node(sub);
for (unsigned idx = 0 ; idx < sig->pin_count(); idx += 1)
for (unsigned idx = 0 ; idx < owidth ; idx += 1)
connect(sig->pin(idx), sub->pin_Result(idx));
for (unsigned idx = 0; idx < sub_sig->pin_count(); idx += 1)
for (unsigned idx = 0; idx < owidth; idx += 1)
connect(sub_sig->pin(idx), sub->pin_DataB(idx));
verinum tmp_num (verinum::V0, sub->width(), true);
@@ -2477,8 +2514,7 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
des->add_node(tmp_con);
NetNet*tmp_sig = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE,
sub_sig->pin_count());
NetNet::WIRE, owidth);
tmp_sig->local_flag(true);
for (unsigned idx = 0; idx < sig->pin_count(); idx += 1) {
@@ -2510,182 +2546,3 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
return sig;
}
/*
* $Log: elab_net.cc,v $
* Revision 1.138 2004/10/04 03:09:38 steve
* Fix excessive error message.
*
* Revision 1.137 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.136 2004/10/04 00:25:46 steve
* Error message to match assertion.
*
* Revision 1.135 2004/09/24 04:25:19 steve
* Detect and prevent implicit declaration of hierarchical names.
*
* Revision 1.134 2004/08/28 15:42:12 steve
* Add support for $unsigned.
*
* Revision 1.133 2004/06/30 02:16:26 steve
* Implement signed divide and signed right shift in nets.
*
* Revision 1.132 2004/06/24 15:22:23 steve
* Code cleanup from Larry.
*
* Revision 1.131 2004/06/22 18:41:48 steve
* Fix broken calcuation of NE for constant.
*
* Revision 1.130 2004/06/18 16:38:22 steve
* compare-to-constant uses sig len, not val len.
*
* Revision 1.129 2004/06/16 23:32:58 steve
* Handle equality compare to constants specially.
*
* Revision 1.128 2004/06/13 04:56:53 steve
* Add support for the default_nettype directive.
*
* Revision 1.127 2004/06/01 01:04:57 steve
* Fix synthesis method for logical and/or
*
* Revision 1.126 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.125 2004/02/20 18:53:34 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.124 2004/02/18 17:11:54 steve
* Use perm_strings for named langiage items.
*
* Revision 1.123 2004/02/15 04:23:48 steve
* Fix evaluation of compare to constant expression.
*
* Revision 1.122 2003/10/30 04:31:34 steve
* Catch real variables in net expressions.
*
* Revision 1.121 2003/10/20 01:44:28 steve
* memory index need not be self determined width.
*
* Revision 1.120 2003/09/23 03:31:28 steve
* Catch unsized expressions in continuous assigns.
*
* Revision 1.119 2003/09/19 03:50:12 steve
* Remove find_memory method from Design class.
*
* Revision 1.118 2003/09/13 01:30:07 steve
* Missing case warnings.
*
* Revision 1.117 2003/09/03 04:29:18 steve
* Only build a mux as wide as can be selected.
*
* Revision 1.116 2003/08/28 04:11:17 steve
* Spelling patch.
*
* Revision 1.115 2003/08/05 03:01:58 steve
* Primitive outputs have same limitations as continuous assignment.
*
* Revision 1.114 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
* Revision 1.113 2003/05/01 01:13:57 steve
* More complete bit range internal error message,
* Better test of part select ranges on non-zero
* signal ranges.
*
* Revision 1.112 2003/04/11 05:18:08 steve
* Handle signed magnitude compare all the
* way through to the vvp code generator.
*
* Revision 1.111 2003/03/29 05:51:25 steve
* Sign extend NetMult inputs if result is signed.
*
* Revision 1.110 2003/03/26 06:16:38 steve
* Some better internal error messages.
*
* Revision 1.109 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.108 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.107 2003/02/26 01:29:24 steve
* LPM objects store only their base names.
*
* Revision 1.106 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.105 2003/01/19 00:35:39 steve
* Detect null arguments to concatenation operator.
*
* Revision 1.104 2003/01/17 05:48:35 steve
* Remove useless variable.
*
* Revision 1.103 2002/12/06 03:08:19 steve
* Reword some error messages for clarity.
*
* Revision 1.102 2002/11/09 19:20:48 steve
* Port expressions for output ports are lnets, not nets.
*
* Revision 1.101 2002/09/18 04:29:55 steve
* Add support for binary NOR operator.
*
* Revision 1.100 2002/09/12 15:49:43 steve
* Add support for binary nand operator.
*
* Revision 1.99 2002/09/08 01:37:13 steve
* Fix padding of operand of unary minus.
*
* Revision 1.98 2002/08/31 03:48:50 steve
* Fix reverse bit ordered bit select in continuous assignment.
*
* Revision 1.97 2002/08/21 02:28:03 steve
* Carry mux output delays.
*
* Revision 1.96 2002/08/14 03:57:27 steve
* Constants can self-size themselves in unsized contexts.
*
* Revision 1.95 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.94 2002/08/05 04:18:45 steve
* Store only the base name of memories.
*
* Revision 1.93 2002/07/05 21:26:17 steve
* Avoid emitting to vvp local net symbols.
*
* Revision 1.92 2002/06/22 04:22:40 steve
* Wide unary minus in continuous assignments.
*
* Revision 1.91 2002/06/19 04:20:03 steve
* Remove NetTmp and add NetSubnet class.
*
* Revision 1.90 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.89 2002/04/23 03:53:59 steve
* Add support for non-constant bit select.
*
* Revision 1.88 2002/04/22 00:53:39 steve
* Do not allow implicit wires in sensitivity lists.
*
* Revision 1.87 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.86 2002/01/23 05:23:17 steve
* No implicit declaration in assign l-values.
*
* Revision 1.85 2002/01/03 04:19:01 steve
* Add structural modulus support down to vvp.
*
* Revision 1.84 2001/12/31 04:23:59 steve
* Elaborate multiply nets with constant operands ad NetConst.
*/
+2 -90
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_pexpr.cc,v 1.21 2004/02/20 06:22:56 steve Exp $"
#endif
# include "config.h"
@@ -53,7 +50,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
return 0;
}
NetEBinary*tmp = elaborate_expr_base_(des, lp, rp);
NetExpr*tmp = elaborate_expr_base_(des, lp, rp);
return tmp;
}
@@ -228,88 +225,3 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
}
return tmp;
}
/*
* $Log: elab_pexpr.cc,v $
* Revision 1.21 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.20 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.19 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.18 2002/12/05 02:14:33 steve
* Support bit select in constant expressions.
*
* Revision 1.17 2002/11/09 01:40:19 steve
* Postpone parameter width check to evaluation.
*
* Revision 1.16 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/05/06 02:30:27 steve
* Allow parameters in concatenation of widths are defined.
*
* Revision 1.14 2002/05/05 21:11:50 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.13 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.12 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.11 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.10 2001/10/07 03:38:08 steve
* parameter names do not have defined size.
*
* Revision 1.9 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.8 2001/01/14 23:04:56 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
*
* Allow parameters to be referenced by hierarchical name.
*
* Revision 1.7 2001/01/02 04:21:13 steve
* Support a bunch of unary operators in parameter expressions.
*
* Revision 1.6 2000/12/16 19:03:30 steve
* Evaluate <= and ?: in parameter expressions (PR#81)
*
* Revision 1.5 2000/06/13 05:22:16 steve
* Support concatenation in parameter expressions.
*
* Revision 1.4 2000/06/01 02:31:39 steve
* Parameters can be strings.
*
* Revision 1.3 2000/03/12 18:22:11 steve
* Binary and unary operators in parameter expressions.
*
* Revision 1.2 2000/03/12 04:35:22 steve
* Allow parameter identifiers in parameter expressions.
*
* Revision 1.1 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
*/
+11 -89
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,14 +16,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_scope.cc,v 1.35 2004/09/10 00:15:17 steve Exp $"
#endif
# include "config.h"
# include "compiler.h"
# include <iostream>
# include <stdio.h>
# include <cstring>
/*
* Elaboration happens in two passes, generally. The first scans the
@@ -245,7 +243,7 @@ bool Module::elaborate_scope(Design*des, NetScope*scope) const
}
// Scan through all the named events in this scope. We do not
// need anything more then the current scope to do this
// need anything more than the current scope to do this
// elaboration, so do it now. This allows for normal
// elaboration to reference these events.
@@ -432,6 +430,9 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
; cur != replace.end() ; cur ++ ) {
PExpr*tmp = (*cur).second;
// No expression means that the parameter is not
// replaced at all.
if (tmp == 0) continue;
NetExpr*val = tmp->elaborate_pexpr(des, sc);
bool flag = my_scope->replace_parameter((*cur).first, val);
if (! flag) {
@@ -444,7 +445,11 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
/* Stash the instance array of scopes into the parent
scope. Later elaboration passes will use this vector to
further elaborate the array. */
further elaborate the array.
Note that the array is ordered from LSB to MSB. We will use
that fact in the main elaborate to connect things in the
correct order. */
sc->instance_arrays[get_name()] = instances;
}
@@ -631,86 +636,3 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
if (statement_)
statement_ -> elaborate_scope(des, scope);
}
/*
* $Log: elab_scope.cc,v $
* Revision 1.35 2004/09/10 00:15:17 steve
* Missing stdio.h header for warnings.
*
* Revision 1.34 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.33 2004/08/26 04:02:03 steve
* Add support for localparam ranges.
*
* Revision 1.32 2004/06/13 04:56:54 steve
* Add support for the default_nettype directive.
*
* Revision 1.31 2004/05/25 19:21:06 steve
* More identifier lists use perm_strings.
*
* Revision 1.30 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.29 2004/02/19 07:06:57 steve
* LPM, logic and Variables have perm_string names.
*
* Revision 1.28 2004/02/18 17:11:55 steve
* Use perm_strings for named langiage items.
*
* Revision 1.27 2003/09/13 01:01:51 steve
* Spelling fixes.
*
* Revision 1.26 2003/08/28 04:11:17 steve
* Spelling patch.
*
* Revision 1.25 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.24 2003/06/20 00:53:19 steve
* Module attributes from the parser
* through to elaborated form.
*
* Revision 1.23 2003/06/16 00:34:08 steve
* Functions can have sub-scope.
*
* Revision 1.22 2003/06/13 19:10:46 steve
* Properly manage real variables in subscopes.
*
* Revision 1.21 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.20 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.19 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.18 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.17 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.16 2002/09/01 03:01:48 steve
* Properly cast signedness of parameters with ranges.
*
* Revision 1.15 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.14 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.13 2001/12/30 04:47:57 steve
* Properly handle empty target in positionla parameter override.
*
* Revision 1.12 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*/
+2 -96
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2004 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,13 +16,11 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elab_sig.cc,v 1.36 2004/09/27 22:34:10 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include <cstdlib>
# include "Module.h"
# include "PExpr.h"
@@ -620,95 +618,3 @@ void PWire::elaborate_sig(Design*des, NetScope*scope) const
sig->attribute(attrib_list[idx].key, attrib_list[idx].val);
}
}
/*
* $Log: elab_sig.cc,v $
* Revision 1.36 2004/09/27 22:34:10 steve
* Cleanup and factoring of autoconf.
*
* Revision 1.35 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.34 2004/05/31 23:34:37 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.33 2004/02/18 17:11:55 steve
* Use perm_strings for named langiage items.
*
* Revision 1.32 2003/09/20 05:24:00 steve
* Evaluate memory index constants using elab_and_eval.
*
* Revision 1.31 2003/07/15 03:49:22 steve
* Spelling fixes.
*
* Revision 1.30 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.29 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
* Revision 1.28 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.27 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.26 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.25 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.24 2002/08/05 04:18:45 steve
* Store only the base name of memories.
*
* Revision 1.23 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.22 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.21 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.20 2002/01/26 05:28:28 steve
* Detect scalar/vector declarion mismatch.
*
* Revision 1.19 2002/01/23 03:35:17 steve
* Detect incorrect function ports.
*
* Revision 1.18 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.17 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.16 2001/11/01 05:21:26 steve
* Catch ports that have no direction.
*
* Revision 1.15 2001/10/31 03:11:15 steve
* detect module ports not declared within the module.
*
* Revision 1.14 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.13 2001/05/25 02:21:34 steve
* Detect input and input ports declared as reg.
*
* Revision 1.12 2001/02/17 05:15:33 steve
* Allow task ports to be given real types.
*
* Revision 1.11 2001/02/10 20:29:39 steve
* In the context of range declarations, use elab_and_eval instead
* of the less robust eval_const methods.
*/
+253 -154
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2004 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: elaborate.cc,v 1.308 2004/10/04 01:10:52 steve Exp $"
#endif
# include "config.h"
@@ -67,6 +64,21 @@ void PGate::elaborate(Design*des, NetScope*scope) const
typeid(*this).name() << endl;
}
void process_attributes(Design*des, NetScope*scope,
Attrib*dest, const map<perm_string,PExpr*>&table)
{
struct attrib_list_t*attrib_list = 0;
unsigned attrib_list_n = 0;
attrib_list = evaluate_attributes(table, attrib_list_n,
des, scope);
for (unsigned adx = 0 ; adx < attrib_list_n ; adx += 1)
dest->attribute(attrib_list[adx].key,
attrib_list[adx].val);
delete[]attrib_list;
}
/*
* Elaborate the continuous assign. (This is *not* the procedural
* assign.) Elaborate the lvalue and rvalue, and do the assignment.
@@ -245,7 +257,7 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
assert(lval && rval);
/* If the r-value insists on being smaller then the l-value
/* If the r-value insists on being smaller than the l-value
(perhaps it is explicitly sized) the pad it out to be the
right width so that something is connected to all the bits
of the l-value. */
@@ -274,7 +286,7 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
name = scope->local_symbol();
/* If the Verilog source has a range specification for the
gates, then I am expected to make more then one
gates, then I am expected to make more than one
gate. Figure out how many are desired. */
if (msb_) {
NetExpr*msb_exp = elab_and_eval(des, scope, msb_);
@@ -354,76 +366,212 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
switch (type()) {
case AND:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::AND);
if (pin_count() < 2) {
cerr << get_line() << ": error: the AND "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::AND);
}
break;
case BUF:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::BUF);
if (pin_count() < 2) {
cerr << get_line() << ": error: the BUF "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else if (pin_count() > 2) {
cerr << get_line() << ": sorry: the BUF "
"primitive may only have one output in V0.8." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::BUF);
}
break;
case BUFIF0:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::BUFIF0);
if (pin_count() != 3) {
cerr << get_line() << ": error: the BUFIF0 "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::BUFIF0);
}
break;
case BUFIF1:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::BUFIF1);
if (pin_count() != 3) {
cerr << get_line() << ": error: the BUFIF1 "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::BUFIF1);
}
break;
case NAND:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NAND);
if (pin_count() < 2) {
cerr << get_line() << ": error: the NAND "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NAND);
}
break;
case NMOS:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NMOS);
if (pin_count() != 3) {
cerr << get_line() << ": error: the NMOS "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NMOS);
}
break;
case NOR:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOR);
if (pin_count() < 2) {
cerr << get_line() << ": error: the NOR "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOR);
}
break;
case NOT:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOT);
if (pin_count() < 2) {
cerr << get_line() << ": error: the NOT "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else if (pin_count() > 2) {
cerr << get_line() << ": sorry: the NOT "
"primitive may only have one output in V0.8." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOT);
}
break;
case NOTIF0:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOTIF0);
if (pin_count() != 3) {
cerr << get_line() << ": error: the NOTIF0 "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOTIF0);
}
break;
case NOTIF1:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOTIF1);
if (pin_count() != 3) {
cerr << get_line() << ": error: the NOTIF1 "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::NOTIF1);
}
break;
case OR:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::OR);
if (pin_count() < 2) {
cerr << get_line() << ": error: the OR "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::OR);
}
break;
case RNMOS:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::RNMOS);
if (pin_count() != 3) {
cerr << get_line() << ": error: the RNMOS "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::RNMOS);
}
break;
case RPMOS:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::RPMOS);
if (pin_count() != 3) {
cerr << get_line() << ": error: the RPMOS "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::RPMOS);
}
break;
case PMOS:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::PMOS);
if (pin_count() != 3) {
cerr << get_line() << ": error: the PMOS "
"primitive must have three arguments." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::PMOS);
}
break;
case PULLDOWN:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::PULLDOWN);
if (pin_count() != 1) {
cerr << get_line() << ": sorry: the PULLDOWN "
"primitive may only have one output in V0.8." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::PULLDOWN);
}
break;
case PULLUP:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::PULLUP);
if (pin_count() != 1) {
cerr << get_line() << ": sorry: the PULLUP "
"primitive may only have one output in V0.8." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::PULLUP);
}
break;
case XNOR:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::XNOR);
if (pin_count() < 2) {
cerr << get_line() << ": error: the XNOR "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::XNOR);
}
break;
case XOR:
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::XOR);
if (pin_count() < 2) {
cerr << get_line() << ": error: the XOR "
"primitive must have an input." << endl;
des->errors += 1;
return;
} else {
cur[idx] = new NetLogic(scope, inm, pin_count(),
NetLogic::XOR);
}
break;
default:
cerr << get_line() << ": internal error: unhandled "
@@ -454,6 +602,12 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
for (unsigned idx = 0 ; idx < pin_count() ; idx += 1) {
const PExpr*ex = pin(idx);
if (ex == 0) {
cerr << get_line() << ": error: Logic gate port "
"expressions are not optional." << endl;
des->errors += 1;
return;
}
NetNet*sig = (idx == 0)
? ex->elaborate_lnet(des, scope, true)
: ex->elaborate_net(des, scope, 0, 0, 0, 0);
@@ -642,7 +796,9 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
unsigned prts_pin_count = 0;
for (unsigned inst = 0 ; inst < instance.count() ; inst += 1) {
NetScope*inst_scope = instance[inst];
// Scan the instances from MSB to LSB. The port
// will be assembled in that order as well.
NetScope*inst_scope = instance[instance.count()-inst-1];
// Scan the module sub-ports for this instance...
for (unsigned ldx = 0 ; ldx < mport.count() ; ldx += 1) {
@@ -1179,6 +1335,7 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const
tmp->set_line(*this);
NetESignal*sig = new NetESignal(tmp);
sig->set_line(*this);
/* Generate an assignment of the l-value to the temporary... */
string n = scope->local_hsymbol();
@@ -1215,6 +1372,7 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const
/* And build up the complex statement. */
NetBlock*bl = new NetBlock(NetBlock::SEQU, 0);
bl->set_line(*this);
bl->append(a1);
bl->append(st);
@@ -1318,6 +1476,7 @@ NetProc* PBlock::elaborate(Design*des, NetScope*scope) const
}
NetBlock*cur = new NetBlock(type, nscope);
cur->set_line(*this);
bool fail_flag = false;
if (nscope == 0)
@@ -1388,6 +1547,7 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
NetCase*res = new NetCase(type_, expr, icount);
res->set_line(*this);
process_attributes(des, scope, res, attributes);
/* Iterate over all the case items (guard/statement pairs)
elaborating them. If the guard has no expression, then this
@@ -1403,8 +1563,12 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
/* If there are no expressions, then this is the
default case. */
NetProc*st = 0;
if (cur->stat)
if (cur->stat) {
st = cur->stat->elaborate(des, scope);
} else {
st = new NetBlock(NetBlock::SEQU, scope);
st->set_line(*this);
}
res->set_case(inum, 0, st);
inum += 1;
@@ -1413,16 +1577,19 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
/* If there are one or more expressions, then
iterate over the guard expressions, elaborating
a separate case for each. (Yes, the statement
will be elaborated again for each.) */
a separate case for each. If the statement is
nul, then put an appropriate stub in place. */
NetExpr*gu = 0;
NetProc*st = 0;
assert(cur->expr[e]);
gu = elab_and_eval(des, scope, cur->expr[e]);
if (cur->stat)
if (cur->stat) {
st = cur->stat->elaborate(des, scope);
} else {
st = new NetBlock(NetBlock::SEQU, scope);
st->set_line(*this);
}
res->set_case(inum, gu, st);
inum += 1;
}
@@ -1451,15 +1618,29 @@ NetProc* PCondit::elaborate(Design*des, NetScope*scope) const
if (NetEConst*ce = dynamic_cast<NetEConst*>(expr)) {
verinum val = ce->value();
delete expr;
if (val[0] == verinum::V1)
return if_->elaborate(des, scope);
verinum::V val_reduced = verinum::V0;
for (unsigned idx = 0 ; idx < val.len() ; idx += 1)
val_reduced = val_reduced | val[idx];
if (val_reduced == verinum::V1)
if (if_) {
return if_->elaborate(des, scope);
} else {
NetBlock*tmp = new NetBlock(NetBlock::SEQU, 0);
tmp->set_line(*this);
return tmp;
}
else if (else_)
return else_->elaborate(des, scope);
else
return new NetBlock(NetBlock::SEQU, 0);
else {
NetBlock*tmp = new NetBlock(NetBlock::SEQU, 0);
tmp->set_line(*this);
return tmp;
}
}
// If the condition expression is more then 1 bits, then
// If the condition expression is more than 1 bits, then
// generate a comparison operator to get the result down to
// one bit. Turn <e> into <e> != 0;
@@ -1625,6 +1806,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
}
NetBlock*block = new NetBlock(NetBlock::SEQU, 0);
block->set_line(*this);
/* Detect the case where the definition of the task is known
@@ -1702,6 +1884,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
continue;
NetESignal*sig = new NetESignal(port);
sig->set_line(*this);
/* Generate the assignment statement. */
NetAssign*ass = new NetAssign(lv, sig);
@@ -1922,10 +2105,15 @@ NetProc* PEventStatement::elaborate_st(Design*des, NetScope*scope,
if (expr_.count() == 0) {
assert(enet);
NexusSet*nset = enet->nex_input();
/* For synthesis we want just the inputs, but for the rest we
* want inputs and outputs that may cause a value to change. */
extern bool synthesis; /* Synthesis flag from main.cc */
bool rem_out = false;
if (synthesis) rem_out = true;
NexusSet*nset = enet->nex_input(rem_out);
if (nset == 0) {
cerr << get_line() << ": internal error: No NexusSet"
<< " from statement." << endl;
cerr << get_line() << ": error: Unable to elaborate:"
<< endl;
enet->dump(cerr, 6);
des->errors += 1;
return enet;
@@ -2072,7 +2260,7 @@ NetProc* PEventStatement::elaborate_wait(Design*des, NetScope*scope,
return 0;
}
// If the condition expression is more then 1 bits, then
// If the condition expression is more than 1 bits, then
// generate a reduction operator to get the result down to
// one bit. In other words, Turn <e> into |<e>;
@@ -2314,6 +2502,13 @@ NetProc* PForStatement::elaborate(Design*des, NetScope*scope) const
the for loop. This is also a very specific assignment
statement. Put this into the "body" block. */
sig = des->find_signal(scope, id2->path());
if (sig == 0) {
cerr << get_line() << ": error: Unable to find variable "
<< id2->path() << " in for-loop increment expression." << endl;
des->errors += 1;
return body;
}
assert(sig);
lv = new NetAssign_(sig);
@@ -2481,6 +2676,7 @@ void PTask::elaborate(Design*des, NetScope*task) const
NetProc*st;
if (statement_ == 0) {
st = new NetBlock(NetBlock::SEQU, 0);
st->set_line(*this);
} else {
@@ -2765,100 +2961,3 @@ Design* elaborate(list<perm_string>roots)
return des;
}
/*
* $Log: elaborate.cc,v $
* Revision 1.308 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.307 2004/09/05 21:07:26 steve
* Support degenerat wait statements.
*
* Revision 1.306 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.305 2004/06/30 15:32:02 steve
* Propagate source line number in synthetic delay statements.
*
* Revision 1.304 2004/06/20 15:59:06 steve
* Only pad the width of vector r-values.
*
* Revision 1.303 2004/06/13 04:56:54 steve
* Add support for the default_nettype directive.
*
* Revision 1.302 2004/05/31 23:34:37 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.301 2004/05/25 03:42:58 steve
* Handle wait with constant-false expression.
*
* Revision 1.300 2004/03/08 00:47:44 steve
* primitive ports can bind bi name.
*
* Revision 1.299 2004/03/08 00:10:29 steve
* Verilog2001 new style port declartions for primitives.
*
* Revision 1.298 2004/03/07 20:04:10 steve
* MOre thorough use of elab_and_eval function.
*
* Revision 1.297 2004/02/20 18:53:34 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.296 2004/02/18 17:11:55 steve
* Use perm_strings for named langiage items.
*
* Revision 1.295 2004/01/21 04:35:03 steve
* Get rid of useless warning.
*
* Revision 1.294 2004/01/13 03:42:49 steve
* Handle wide expressions in wait condition.
*
* Revision 1.293 2003/10/26 04:49:51 steve
* Attach line number information to for loop parts.
*
* Revision 1.292 2003/09/25 00:25:14 steve
* Summary list of missing modules.
*
* Revision 1.291 2003/09/20 06:08:53 steve
* Evaluate nb-assign r-values using elab_and_eval.
*
* Revision 1.290 2003/09/20 06:00:37 steve
* Evaluate gate array index constants using elab_and_eval.
*
* Revision 1.289 2003/09/20 01:05:35 steve
* Obsolete find_symbol and find_event from the Design class.
*
* Revision 1.288 2003/09/13 01:01:51 steve
* Spelling fixes.
*
* Revision 1.287 2003/09/04 20:28:05 steve
* Support time0 resolution of combinational threads.
*
* Revision 1.286 2003/08/28 04:11:17 steve
* Spelling patch.
*
* Revision 1.285 2003/08/05 03:01:58 steve
* Primitive outputs have same limitations as continuous assignment.
*
* Revision 1.284 2003/07/02 04:19:16 steve
* Elide empty begin-end in conditionals.
*
* Revision 1.283 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
* Revision 1.282 2003/06/13 19:10:20 steve
* Handle assign of real to vector.
*
* Revision 1.281 2003/05/19 02:50:58 steve
* Implement the wait statement behaviorally instead of as nets.
*
* Revision 1.280 2003/05/04 20:04:08 steve
* Fix truncation of signed constant in constant addition.
*
* Revision 1.279 2003/04/24 05:25:55 steve
* Include port name in port assignment error message.
*/
+18 -161
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: emit.cc,v 1.77 2004/10/04 01:10:53 steve Exp $"
#endif
# include "config.h"
@@ -32,6 +29,7 @@
# include "netlist.h"
# include <typeinfo>
# include <cassert>
# include <cstring>
bool NetNode::emit_node(struct target_t*tgt) const
{
@@ -86,6 +84,16 @@ bool NetConst::emit_node(struct target_t*tgt) const
return tgt->net_const(this);
}
bool NetDecode::emit_node(struct target_t*tgt) const
{
return tgt->lpm_decode(this);
}
bool NetDemux::emit_node(struct target_t*tgt) const
{
return tgt->lpm_demux(this);
}
bool NetDivide::emit_node(struct target_t*tgt) const
{
tgt->lpm_divide(this);
@@ -104,6 +112,12 @@ bool NetForce::emit_node(struct target_t*tgt) const
return true;
}
bool NetLatch::emit_node(struct target_t*tgt) const
{
tgt->lpm_latch(this);
return true;
}
bool NetModulo::emit_node(struct target_t*tgt) const
{
tgt->lpm_modulo(this);
@@ -507,160 +521,3 @@ bool emit(const Design*des, const char*type)
<< " not found." << endl;
return false;
}
/*
* $Log: emit.cc,v $
* Revision 1.77 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.76 2004/05/31 23:34:37 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.75 2003/09/13 01:30:07 steve
* Missing case warnings.
*
* Revision 1.74 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.73 2003/04/22 04:48:29 steve
* Support event names as expressions elements.
*
* Revision 1.72 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.71 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.70 2002/11/03 20:36:10 steve
* Error message for mising code generator type.
*
* Revision 1.69 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.68 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.67 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.66 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.65 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.64 2002/01/19 19:02:08 steve
* Pass back target errors processing conditionals.
*
* Revision 1.63 2001/10/19 21:53:24 steve
* Support multiple root modules (Philip Blundell)
*
* Revision 1.62 2001/08/25 23:50:02 steve
* Change the NetAssign_ class to refer to the signal
* instead of link into the netlist. This is faster
* and uses less space. Make the NetAssignNB carry
* the delays instead of the NetAssign_ lval objects.
*
* Change the vvp code generator to support multiple
* l-values, i.e. concatenations of part selects.
*
* Revision 1.61 2001/07/27 04:51:44 steve
* Handle part select expressions as variants of
* NetESignal/IVL_EX_SIGNAL objects, instead of
* creating new and useless temporary signals.
*
* Revision 1.60 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.59 2001/04/22 23:09:46 steve
* More UDP consolidation from Stephan Boettcher.
*
* Revision 1.58 2001/04/06 02:28:02 steve
* Generate vvp code for functions with ports.
*
* Revision 1.57 2001/04/02 02:28:12 steve
* Generate code for task calls.
*
* Revision 1.56 2001/03/27 03:31:06 steve
* Support error code from target_t::end_design method.
*
* Revision 1.55 2000/11/04 01:54:01 steve
* Modifications in support of gcc 2.96
*
* Revision 1.54 2000/09/26 01:35:42 steve
* Remove the obsolete NetEIdent class.
*
* Revision 1.53 2000/09/17 21:26:15 steve
* Add support for modulus (Eric Aardoom)
*
* Revision 1.52 2000/09/02 20:54:20 steve
* Rearrange NetAssign to make NetAssign_ separate.
*
* Revision 1.51 2000/08/14 04:39:56 steve
* add th t-dll functions for net_const, net_bufz and processes.
*
* Revision 1.50 2000/08/09 03:43:45 steve
* Move all file manipulation out of target class.
*
* Revision 1.49 2000/08/08 01:50:42 steve
* target methods need not take a file stream.
*
* Revision 1.48 2000/07/30 18:25:43 steve
* Rearrange task and function elaboration so that the
* NetTaskDef and NetFuncDef functions are created during
* signal enaboration, and carry these objects in the
* NetScope class instead of the extra, useless map in
* the Design class.
*
* Revision 1.47 2000/07/29 16:21:08 steve
* Report code generation errors through proc_delay.
*
* Revision 1.46 2000/07/27 05:13:44 steve
* Support elaboration of disable statements.
*
* Revision 1.45 2000/05/11 23:37:27 steve
* Add support for procedural continuous assignment.
*
* Revision 1.44 2000/05/04 03:37:58 steve
* Add infrastructure for system functions, move
* $time to that structure and add $random.
*
* Revision 1.43 2000/05/02 03:13:31 steve
* Move memories to the NetScope object.
*
* Revision 1.42 2000/05/02 00:58:12 steve
* Move signal tables to the NetScope class.
*
* Revision 1.41 2000/04/23 03:45:24 steve
* Add support for the procedural release statement.
*
* Revision 1.40 2000/04/22 04:20:19 steve
* Add support for force assignment.
*
* Revision 1.39 2000/04/12 04:23:58 steve
* Named events really should be expressed with PEIdent
* objects in the pform,
*
* Handle named events within the mix of net events
* and edges. As a unified lot they get caught together.
* wait statements are broken into more complex statements
* that include a conditional.
*
* Do not generate NetPEvent or NetNEvent objects in
* elaboration. NetEvent, NetEvWait and NetEvProbe
* take over those functions in the netlist.
*/
+26 -88
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-1999 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval.cc,v 1.36 2003/06/21 01:21:43 steve Exp $"
#endif
# include "config.h"
@@ -112,7 +109,10 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
case 'l': { // left shift (<<)
assert(r->is_defined());
unsigned long rv = r->as_ulong();
res = new verinum(verinum::V0, l->len());
unsigned use_wid = l->len();
if (! l->has_len())
use_wid += rv;
res = new verinum(verinum::V0, use_wid);
if (rv < res->len()) {
unsigned cnt = res->len() - rv;
for (unsigned idx = 0 ; idx < cnt ; idx += 1)
@@ -143,6 +143,27 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
return res;
}
verinum* PEConcat::eval_const(const Design*des, const NetScope*scope) const
{
verinum*accum = parms_[0]->eval_const(des, scope);
if (accum == 0)
return 0;
for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
verinum*tmp = parms_[idx]->eval_const(des, scope);
/* Oops, found an argument that is not constant. Give up. */
if (tmp == 0) {
delete accum;
return 0;
}
assert(tmp);
*accum = concat(*accum, *tmp);
delete tmp;
}
return accum;
}
/*
* Evaluate an identifier as a constant expression. This is only
@@ -236,86 +257,3 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
delete val;
return 0;
}
/*
* $Log: eval.cc,v $
* Revision 1.36 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
* Revision 1.35 2003/04/14 03:40:21 steve
* Make some effort to preserve bits while
* operating on constant values.
*
* Revision 1.34 2003/03/26 06:16:18 steve
* Evaluate > and < in constant expressions.
*
* Revision 1.33 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.32 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.31 2002/10/13 05:01:07 steve
* More verbose eval_const assert message.
*
* Revision 1.30 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.29 2002/06/07 02:57:54 steve
* Simply give up on constants with indices.
*
* Revision 1.28 2002/06/06 18:57:04 steve
* Better error for identifier index eval.
*
* Revision 1.27 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.26 2001/12/29 22:10:10 steve
* constant eval of arithmetic with x and z.
*
* Revision 1.25 2001/12/29 00:43:55 steve
* Evaluate constant right shifts.
*
* Revision 1.24 2001/12/03 04:47:15 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.23 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.22 2001/11/06 06:11:55 steve
* Support more real arithmetic in delay constants.
*
* Revision 1.21 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.20 2001/02/09 02:49:59 steve
* Be more clear about scope of failure.
*
* Revision 1.19 2001/01/27 05:41:48 steve
* Fix sign extension of evaluated constants. (PR#91)
*
* Revision 1.18 2001/01/14 23:04:56 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
*
* Allow parameters to be referenced by hierarchical name.
*
* Revision 1.17 2001/01/04 04:47:51 steve
* Add support for << is signal indices.
*
* Revision 1.16 2000/12/10 22:01:36 steve
* Support decimal constants in behavioral delays.
*
* Revision 1.15 2000/09/07 22:38:13 steve
* Support unary + and - in constants.
*/
+1 -35
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2004 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval_attrib.cc,v 1.7 2004/02/20 18:53:35 steve Exp $"
#endif
# include "config.h"
# include "util.h"
@@ -71,34 +68,3 @@ attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
assert(idx == natt);
return table;
}
/*
* $Log: eval_attrib.cc,v $
* Revision 1.7 2004/02/20 18:53:35 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.6 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.5 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.4 2002/08/10 21:59:39 steve
* The default attribute value is 1.
*
* Revision 1.3 2002/06/06 18:57:18 steve
* Use standard name for iostream.
*
* Revision 1.2 2002/06/03 03:55:14 steve
* compile warnings.
*
* Revision 1.1 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
*/
+68 -99
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: eval_tree.cc,v 1.62 2004/10/04 01:10:53 steve Exp $"
#endif
# include "config.h"
# include "compiler.h"
@@ -215,6 +212,11 @@ NetEConst* NetEBComp::eval_eqeq_()
NetEConst* NetEBComp::eval_less_()
{
if (right_->expr_type() == ET_REAL)
return eval_leeq_real_(false, false);
if (left_->expr_type() == ET_REAL)
return eval_leeq_real_(false, false);
NetEConst*r = dynamic_cast<NetEConst*>(right_);
if (r == 0) return 0;
@@ -224,12 +226,24 @@ NetEConst* NetEBComp::eval_less_()
return new NetEConst(result);
}
if (left_->expr_width() == 0) {
cerr << get_line() << ": internal error: "
<< "Having trouble evaluating left expression of < op."
<< endl;
cerr << get_line() << ": : "
<< "Expression is: "
<< *this << endl;
return 0;
}
/* Detect the case where the right side is greater that or
equal to the largest value the left side can possibly
have. */
assert(left_->expr_width() > 0);
verinum lv (verinum::V1, left_->expr_width());
if (lv < rv) {
verinum lv (verinum::V1, left_->expr_width() + 1);
lv.set(left_->expr_width(), verinum::V0);
lv.has_sign( left_->has_sign() );
if ((lv < rv) == verinum::V1) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
}
@@ -259,7 +273,7 @@ NetEConst* NetEBComp::eval_less_()
return new NetEConst(result);
}
NetEConst* NetEBComp::eval_leeq_real_()
NetEConst* NetEBComp::eval_leeq_real_(bool gt_flag, bool include_eq_flag)
{
NetEConst*vtmp;
NetECReal*rtmp;
@@ -308,7 +322,16 @@ NetEConst* NetEBComp::eval_leeq_real_()
assert(0);
}
verinum result((lv <= rv)? verinum::V1 : verinum::V0, 1);
/* This function supports < and <=. If the eq_flag is true,
then include <=. Otherwise, include only <. */
bool flag;
if (gt_flag)
flag = include_eq_flag? (lv >= rv) : (lv > rv);
else
flag = include_eq_flag? (lv <= rv) : (lv < rv);
verinum result(flag? verinum::V1 : verinum::V0, 1);
vtmp = new NetEConst(result);
vtmp->set_line(*this);
@@ -318,9 +341,9 @@ NetEConst* NetEBComp::eval_leeq_real_()
NetEConst* NetEBComp::eval_leeq_()
{
if (right_->expr_type() == ET_REAL)
return eval_leeq_real_();
return eval_leeq_real_(false, true);
if (left_->expr_type() == ET_REAL)
return eval_leeq_real_();
return eval_leeq_real_(false, true);
NetEConst*r = dynamic_cast<NetEConst*>(right_);
if (r == 0) return 0;
@@ -337,11 +360,17 @@ NetEConst* NetEBComp::eval_leeq_()
cerr << get_line() << ": : " << *this << endl;
}
/* Detect the case where the right side is greater that or
/* Detect the case where the right side is greater than or
equal to the largest value the left side can possibly
have. */
assert(left_->expr_width() > 0);
verinum lv (verinum::V1, left_->expr_width());
verinum lv (verinum::V1, left_->expr_width() + 1);
if (left_->has_sign() && rv.has_sign()) {
lv.set(lv.len()-1, verinum::V0);
lv.has_sign(true);
}
lv.set(left_->expr_width(), verinum::V0);
lv.has_sign( left_->has_sign() );
if (lv <= rv) {
verinum result(verinum::V1, 1);
return new NetEConst(result);
@@ -374,23 +403,10 @@ NetEConst* NetEBComp::eval_leeq_()
NetEConst* NetEBComp::eval_gt_()
{
if ((left_->expr_type() == NetExpr::ET_REAL)
&& (right_->expr_type() == NetExpr::ET_REAL)) {
NetECReal*tmpl = dynamic_cast<NetECReal*>(left_);
if (tmpl == 0)
return 0;
NetECReal*tmpr = dynamic_cast<NetECReal*>(right_);
if (tmpr == 0)
return 0;
double ll = tmpl->value().as_double();
double rr = tmpr->value().as_double();
verinum result ((ll > rr)? verinum::V1 : verinum::V0, 1, true);
return new NetEConst(result);
}
if (right_->expr_type() == ET_REAL)
return eval_leeq_real_(true, false);
if (left_->expr_type() == ET_REAL)
return eval_leeq_real_(true, false);
NetEConst*l = dynamic_cast<NetEConst*>(left_);
if (l == 0) return 0;
@@ -450,23 +466,10 @@ NetEConst* NetEBComp::eval_gt_()
NetEConst* NetEBComp::eval_gteq_()
{
if ((left_->expr_type() == NetExpr::ET_REAL)
&& (right_->expr_type() == NetExpr::ET_REAL)) {
NetECReal*tmpl = dynamic_cast<NetECReal*>(left_);
if (tmpl == 0)
return 0;
NetECReal*tmpr = dynamic_cast<NetECReal*>(right_);
if (tmpr == 0)
return 0;
double ll = tmpl->value().as_double();
double rr = tmpr->value().as_double();
verinum result ((ll >= rr)? verinum::V1 : verinum::V0, 1, true);
return new NetEConst(result);
}
if (right_->expr_type() == ET_REAL)
return eval_leeq_real_(true, true);
if (left_->expr_type() == ET_REAL)
return eval_leeq_real_(true, true);
NetEConst*l = dynamic_cast<NetEConst*>(left_);
if (l == 0) return 0;
@@ -683,7 +686,7 @@ NetEConst* NetEBComp::eval_tree()
case '<': // Less than
return eval_less_();
case '>': // Greater then
case '>': // Greater than
return eval_gt_();
default:
@@ -1069,6 +1072,12 @@ NetEConst* NetEConcat::eval_tree()
val = verinum(val.as_string());
}
// Normally, concatenations are unsigned. However, the
// $signed() function works by marking the expression as
// signed, so we really have to check.
val.has_sign( this->has_sign() );
NetEConst*res = new NetEConst(val);
res->set_width(val.len());
return res;
@@ -1477,6 +1486,7 @@ NetEConst* NetEUReduce::eval_tree()
verinum val = rval->value();
verinum::V res;
bool invert = false;
switch (op_) {
@@ -1505,6 +1515,8 @@ NetEConst* NetEUReduce::eval_tree()
break;
}
case 'A':
invert = true;
case '&': {
res = verinum::V1;
for (unsigned idx = 0 ; idx < val.len() ; idx += 1)
@@ -1512,6 +1524,8 @@ NetEConst* NetEUReduce::eval_tree()
break;
}
case 'N':
invert = true;
case '|': {
res = verinum::V0;
for (unsigned idx = 0 ; idx < val.len() ; idx += 1)
@@ -1519,6 +1533,8 @@ NetEConst* NetEUReduce::eval_tree()
break;
}
case 'X':
invert = true;
case '^': {
/* Reduction XOR. */
unsigned ones = 0, unknown = 0;
@@ -1534,63 +1550,16 @@ NetEConst* NetEUReduce::eval_tree()
break;
}
if (unknown)
return new NetEConst(verinum(verinum::Vx,1,true));
if (ones%2)
return new NetEConst(verinum(verinum::V1,1,true));
return new NetEConst(verinum(verinum::V0,1,true));
if (unknown) res = verinum::Vx;
else if (ones%2) res = verinum::V1;
else res = verinum::V0;
break;
}
default:
return 0;
}
if (invert) res = ~res;
return new NetEConst(verinum(res, 1));
}
/*
* $Log: eval_tree.cc,v $
* Revision 1.62 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.61 2004/09/10 23:51:42 steve
* Fix the evaluation of constant ternary expressions.
*
* Revision 1.60 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.59 2003/10/31 02:47:11 steve
* NetEUReduce has its own dup_expr method.
*
* Revision 1.58 2003/10/26 04:54:56 steve
* Support constant evaluation of binary ^ operator.
*
* Revision 1.57 2003/09/04 01:52:50 steve
* Evaluate real parameter expressions that contain real parameters.
*
* Revision 1.56 2003/08/01 02:12:30 steve
* Fix || with true case on the right.
*
* Revision 1.55 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.54 2003/06/05 04:28:24 steve
* Evaluate <= with real operands.
*
* Revision 1.53 2003/06/04 01:26:17 steve
* internal error for <= expression errors.
*
* Revision 1.52 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.51 2003/04/15 05:06:56 steve
* Handle real constants evaluation > and >=.
*
* Revision 1.50 2003/04/14 03:40:21 steve
* Make some effort to preserve bits while
* operating on constant values.
*/
-3
View File
@@ -1,3 +0,0 @@
,*
hello_vpi.vpi
show_vcd.vcd
+63 -63
View File
@@ -162,11 +162,11 @@ end
endmodule
module des(pt, key, ct, clk);
input [1:64] pt;
input [1:64] key;
output [1:64] ct;
input clk;
wire [1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
input [1:64] pt;
input [1:64] key;
output [1:64] ct;
input clk;
wire [1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
wire [1:32] l0x,l1x,l2x,l3x,l4x,l5x,l6x,l7x,l8x,l9x,l10x,l11x,l12x,l13x,l14x,l15x,l16x;
wire [1:32] r0x,r1x,r2x,r3x,r4x,r5x,r6x,r7x,r8x,r9x,r10x,r11x,r12x,r13x,r14x,r15x,r16x;
@@ -194,9 +194,9 @@ endmodule
module pc1(key, c0x, d0x);
input [1:64] key;
output [1:28] c0x, d0x;
wire [1:56] XX;
input [1:64] key;
output [1:28] c0x, d0x;
wire [1:56] XX;
assign XX[1]=key[57]; assign XX[2]=key[49]; assign XX[3]=key[41]; assign XX[4]=key[33]; assign XX[5]=key[25]; assign XX[6]=key[17]; assign XX[7]=key[9];
assign XX[8]=key[1]; assign XX[9]=key[58]; assign XX[10]=key[50]; assign XX[11]=key[42]; assign XX[12]=key[34]; assign XX[13]=key[26]; assign XX[14]=key[18];
@@ -213,9 +213,9 @@ endmodule
module pc2(c,d,k);
input [1:28] c,d;
output [1:48] k;
wire [1:56] YY;
input [1:28] c,d;
output [1:48] k;
wire [1:56] YY;
assign YY[1:28]=c; assign YY[29:56]=d;
@@ -231,7 +231,7 @@ endmodule
module rol1(o, i);
output [1:28] o;
output [1:28] o;
input [1:28] i;
assign o={i[2:28],i[1]};
@@ -240,7 +240,7 @@ endmodule
module rol2(o, i);
output [1:28] o;
output [1:28] o;
input [1:28] i;
assign o={i[3:28],i[1:2]};
@@ -248,10 +248,10 @@ endmodule
module keysched(key,k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x);
input [1:64] key;
output [1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
wire [1:28] c0x,c1x,c2x,c3x,c4x,c5x,c6x,c7x,c8x,c9x,c10x,c11x,c12x,c13x,c14x,c15x,c16x;
wire [1:28] d0x,d1x,d2x,d3x,d4x,d5x,d6x,d7x,d8x,d9x,d10x,d11x,d12x,d13x,d14x,d15x,d16x;
input [1:64] key;
output [1:48] k1x,k2x,k3x,k4x,k5x,k6x,k7x,k8x,k9x,k10x,k11x,k12x,k13x,k14x,k15x,k16x;
wire [1:28] c0x,c1x,c2x,c3x,c4x,c5x,c6x,c7x,c8x,c9x,c10x,c11x,c12x,c13x,c14x,c15x,c16x;
wire [1:28] d0x,d1x,d2x,d3x,d4x,d5x,d6x,d7x,d8x,d9x,d10x,d11x,d12x,d13x,d14x,d15x,d16x;
pc1 pc1(key, c0x, d0x);
@@ -294,10 +294,10 @@ endmodule
module s1(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -370,10 +370,10 @@ endmodule
module s2(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -446,10 +446,10 @@ endmodule
module s3(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -522,10 +522,10 @@ endmodule
module s4(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -598,10 +598,10 @@ endmodule
module s5(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -674,10 +674,10 @@ endmodule
module s6(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -750,10 +750,10 @@ endmodule
module s7(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -826,10 +826,10 @@ endmodule
module s8(clk, b, so);
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
input clk;
input [1:6] b;
output [1:4] so;
reg [1:4] so;
always @(posedge clk)
casex(b)
@@ -902,8 +902,8 @@ endmodule
module ip(pt, l0x, r0x);
input [1:64] pt;
output [1:32] l0x, r0x;
input [1:64] pt;
output [1:32] l0x, r0x;
assign l0x[1]=pt[58]; assign l0x[2]=pt[50]; assign l0x[3]=pt[42]; assign l0x[4]=pt[34];
assign l0x[5]=pt[26]; assign l0x[6]=pt[18]; assign l0x[7]=pt[10]; assign l0x[8]=pt[2];
@@ -941,10 +941,10 @@ endmodule
module desxor1(e,b1x,b2x,b3x,b4x,b5x,b6x,b7x,b8x,k);
input [1:48] e;
output [1:6] b1x,b2x,b3x,b4x,b5x,b6x,b7x,b8x;
input [1:48] k;
wire [1:48] XX;
input [1:48] e;
output [1:6] b1x,b2x,b3x,b4x,b5x,b6x,b7x,b8x;
input [1:48] k;
wire [1:48] XX;
assign XX = k ^ e;
assign b1x = XX[1:6];
@@ -960,9 +960,9 @@ endmodule
module pp(so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x,ppo);
input [1:4] so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x;
output [1:32] ppo;
wire [1:32] XX;
input [1:4] so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x;
output [1:32] ppo;
wire [1:32] XX;
assign XX[1:4]=so1x; assign XX[5:8]=so2x; assign XX[9:12]=so3x; assign XX[13:16]=so4x;
assign XX[17:20]=so5x; assign XX[21:24]=so6x; assign XX[25:28]=so7x; assign XX[29:32]=so8x;
@@ -980,8 +980,8 @@ endmodule
module desxor2(d,l,q);
input [1:32] d,l;
output [1:32] q;
input [1:32] d,l;
output [1:32] q;
assign q = d ^ l;
@@ -994,10 +994,10 @@ input [1:32] li, ri;
input [1:48] k;
output [1:32] lo, ro;
wire [1:48] e;
wire [1:48] e;
wire [1:6] b1x,b2x,b3x,b4x,b5x,b6x,b7x,b8x;
wire [1:4] so1x,so2x,so3x,so4x,so5x,so6x,so7x,so8x;
wire [1:32] ppo;
wire [1:32] ppo;
xp xp(ri, e);
desxor1 desxor1(e, b1x, b2x, b3x, b4x, b5x, b6x, b7x, b8x, k);
@@ -1018,7 +1018,7 @@ endmodule
module fp(l,r,ct);
input [1:32] l,r;
input [1:32] l,r;
output [1:64] ct;
assign ct[1]=r[8]; assign ct[2]=l[8]; assign ct[3]=r[16]; assign ct[4]=l[16]; assign ct[5]=r[24]; assign ct[6]=l[24]; assign ct[7]=r[32]; assign ct[8]=l[32];
+7 -7
View File
@@ -26,7 +26,7 @@
* iverilog -tpal -ppart=generic-22v10-plcc -opal_reg.jed pal_reg.v
*
* The output file name (passed through the -o<file> switch) can be
* any file you desire. If the compilation and fittin all succeed, the
* any file you desire. If the compilation and fitting all succeed, the
* output file will be a JEDEC file that you can take to your favorite
* PROM programmer to program the part.
*
@@ -45,7 +45,7 @@
*
* The output drivers are controlled by a single active low output
* enable. I used bufif0 devices in this example, but the exact same
* thing can be achived with a continuous assignment like so:
* thing can be achieved with a continuous assignment like so:
*
* assign out = oe? 8'hzz : Q;
*
@@ -55,12 +55,12 @@
module register (out, val, clk, oe);
output [7:0] out;
input [7:0] val;
input clk, oe;
input [7:0] val;
input clk, oe;
reg [7:0] Q;
reg [7:0] Q;
wire [7:0] out;
wire [7:0] out;
bufif0 drv[7:0](out, Q, oe);
@@ -76,7 +76,7 @@ endmodule
* a PLCC package.
*
* Note that this module has no logic in it. It is a convention I use
* that I put all the functionality in a seperate module (seen above)
* that I put all the functionality in a separate module (seen above)
* and isolate the Icarus Verilog specific $attribute madness into a
* top-level module. The advantage of this style is that the entire
* module can be `ifdef'ed out when doing simulation and you don't
+1 -1
View File
@@ -63,7 +63,7 @@
*
* The $dumpvars task tells the simulation what variables to write to
* the VCD output. The first parameter is how far to descend while
* scanning a scope, and the remaining paramters are signals or scope
* scanning a scope, and the remaining parameters are signals or scope
* names to include in the dump. If a scope name is given, all the
* signals within the scope are dumped. If a wire or register name is
* given, that signal is included.
+12 -12
View File
@@ -16,13 +16,13 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: sqrt-virtex.v,v 1.4 2003/11/25 18:35:31 steve Exp $"
* $Id: sqrt-virtex.v,v 1.4.2.2 2005/02/23 18:37:52 steve Exp $"
*/
/*
* This module is a synthesizeable square-root function. It is also a
* This module is a synthesizable square-root function. It is also a
* detailed example of how to target Xilinx Virtex parts using
* Icarus Verilog. In fact, for no particular reason other then to
* Icarus Verilog. In fact, for no particular reason other than to
* be excessively specific, I will step through the process of
* generating a design for a Spartan-II XC2S15-VQ100, and also how to
* generate a generic library part for larger Virtex designs.
@@ -30,7 +30,7 @@
* In addition to Icarus Verilog, you will need implementation
* software from Xilinx. As of this writing, this example was tested
* with Foundation 4.2i, but it should work the same with ISE and
* Webpack software.
* WebPACK software.
*
* This example source contains all the Verilog needed to do
* everything described below. We use conditional compilation to
@@ -55,7 +55,7 @@
* "PASSED" and finishes the simulation.
*
* When you take a close look at the "main" module below, you will see
* that it uses Verilog constructs that are not synthesizeable. This
* that it uses Verilog constructs that are not synthesizable. This
* is fine, as we will never try to synthesize it.
*
* LIBRARY PARTS
@@ -78,7 +78,7 @@
* Without any preprocessor directives, the only module is the sqrt32
* module, so sqrt32 is compiled as the root. The ports of the module
* are automatically made into ports of the sqrt32.edf netlist, and
* the contents of the sqrt32 module are connected approprately.
* the contents of the sqrt32 module are connected appropriately.
*
* COMPLETE CHIP DESIGNS
*
@@ -129,8 +129,8 @@
* This command creates from the chip.ngd the file "chip_root.v" that
* contains Verilog code that simulates the mapped design. This output
* Verilog has the single root module "chip_root", which came from the
* name of the root module when we were making hte EDIF file in the
* first place. The module has ports named just line the ports of the
* name of the root module when we were making the EDIF file in the
* first place. The module has ports named just like the ports of the
* chip_root module below.
*
* The generated Verilog uses the library in the directory
@@ -154,7 +154,7 @@
*
* The POST_MAP compiler directive causes the GSR manipulations
* included in the test bench to be compiled in, to simulate the chip
* startup. Other then that, the test bench runs the post-map design
* startup. Other than that, the test bench runs the post-map design
* the same way the pre-synthesis design works.
*
* Run this design with the command:
@@ -183,7 +183,7 @@
* where sqrt(y) is the exact square root of y and floor(N) is the
* largest integer <= N.
*
* For 32bit numbers, this will never run more then 16 iterations,
* For 32bit numbers, this will never run more than 16 iterations,
* which amounts to 16 clocks.
*/
@@ -252,7 +252,7 @@ endmodule // sqrt32
module main;
reg [31:0] x;
reg clk, reset;
reg clk, reset;
wire [15:0] y;
wire rdy;
@@ -354,7 +354,7 @@ module chip_root(clk, rdy, reset, x, y);
input [31:0] x;
output [15:0] y;
wire clk_int;
wire clk_int;
(* cellref="BUFG:O,I" *)
buf gbuf (clk_int, clk);
+1 -1
View File
@@ -50,7 +50,7 @@
* where sqrt(y) is the exact square root of y and floor(N) is the
* largest integer <= N.
*
* For 32bit numbers, this will never run more then 16 iterations,
* For 32bit numbers, this will never run more than 16 iterations,
* which amounts to 16 clocks.
*/
+228 -98
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2004 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,25 +16,63 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: expr_synth.cc,v 1.59 2004/06/30 02:16:26 steve Exp $"
#endif
# include "config.h"
# include <iostream>
# include <typeinfo>
# include "netlist.h"
# include "netmisc.h"
# include "compiler.h"
NetNet* NetExpr::synthesize(Design*des)
{
cerr << get_line() << ": internal error: cannot synthesize expression: "
<< *this << endl;
cerr << get_line() << ": : typeid="
<< typeid(*this).name() << endl;
des->errors += 1;
return 0;
}
/*
* For the NetEBitSel expression, create a NetMux node that selects a
* bit from the input.
*/
NetNet* NetEBitSel::synthesize(Design*des)
{
NetNet*net = sig_->synthesize(des);
assert(net);
NetNet*adr = idx_->synthesize(des);
if (adr == 0)
return 0;
NetScope*scope = adr->scope();
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, 1);
osig->set_line(*this);
osig->local_flag(true);
NetMux*mux = new NetMux(scope, scope->local_symbol(),
1, net->pin_count(), adr->pin_count());
mux->set_line(*this);
des->add_node(mux);
for (unsigned idx = 0 ; idx < net->pin_count() ; idx += 1)
connect(mux->pin_Data(0, idx), net->pin(idx));
for (unsigned idx = 0 ; idx < adr->pin_count() ; idx += 1)
connect(mux->pin_Sel(idx), adr->pin(idx));
connect(mux->pin_Result(0), osig->pin(0));
return osig;
}
/*
* Make an LPM_ADD_SUB device from addition operators.
*/
@@ -408,7 +446,7 @@ NetNet* NetEBDiv::synthesize(Design*des)
default: {
cerr << get_line() << ": internal error: "
<< "NetEBDiv has unexpeced op() code: "
<< "NetEBDiv has unexpected op() code: "
<< op() << endl;
des->errors += 1;
@@ -472,13 +510,18 @@ NetNet* NetEBLogic::synthesize(Design*des)
perm_string oname = scope->local_symbol();
olog = new NetLogic(scope, oname, 3, NetLogic::AND);
olog->set_line(*this);
connect(osig->pin(0), olog->pin(0));
des->add_node(olog);
/* XXXX Here, I need to reduce the parameters with
reduction or. */
/* Here, I need to reduce the parameters with
reduction or. Only do this if we must. */
if (lsig->pin_count() > 1)
lsig = reduction_or(des, lsig);
if (rsig->pin_count() > 1)
rsig = reduction_or(des, rsig);
/* By this point, the left and right parameters have been
reduced to single bit values. Now we just connect them to
@@ -486,6 +529,11 @@ NetNet* NetEBLogic::synthesize(Design*des)
assert(lsig->pin_count() == 1);
connect(lsig->pin(0), olog->pin(1));
if (rsig->pin_count() != 1) {
cerr << olog->get_line() << ": internal error: "
<< "right argument not reduced. expr=" << *this << endl;
}
assert(rsig->pin_count() == 1);
connect(rsig->pin(0), olog->pin(2));
}
@@ -566,7 +614,6 @@ NetNet* NetEBShift::synthesize(Design*des)
NetNet::IMPLICIT, expr_width());
osig->local_flag(true);
assert(op() == 'l');
NetCLShift*dev = new NetCLShift(scope, scope->local_symbol(),
osig->pin_count(),
rsig->pin_count(),
@@ -640,6 +687,71 @@ NetNet* NetEConst::synthesize(Design*des)
return osig;
}
NetNet* NetEMemory::synthesize(Design*des)
{
NetScope*scope = mem_->scope();
NetNet*explode = mem_->explode_to_reg();
unsigned width = expr_width();
assert(idx_);
NetNet*addr = idx_->synthesize(des);
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT,
width);
osig->set_line(*this);
if (explode) {
if (debug_synth)
cerr << get_line() << ": debug: synthesize read of "
<< explode->pin_count() << " bit exploded memory." << endl;
/* Only make a mux big enough to address the words that
the address can generate. (If the address is
0-extended, then only the low words are addressable.) */
unsigned use_count = mem_->count();
if (use_count > (1U << addr->pin_count())) {
use_count = 1 << addr->pin_count();
if (debug_synth)
cerr << get_line() << ": debug: "
<< "Index expression can only address "
<< use_count << " of "
<< mem_->count() << " words." << endl;
}
/* This is a reference to an exploded memory. So locate
the reg vector and use the addr expression as a
select into a MUX. */
NetMux*mux = new NetMux(scope, scope->local_symbol(),
width, use_count, addr->pin_count());
des->add_node(mux);
mux->set_line(*this);
for (unsigned idx = 0 ; idx < width ; idx += 1)
connect(mux->pin_Result(idx), osig->pin(idx));
for (unsigned idx = 0 ; idx < mux->sel_width() ; idx += 1)
connect(mux->pin_Sel(idx), addr->pin(idx));
for (unsigned wrd = 0 ; wrd < use_count ; wrd += 1)
for (unsigned idx = 0 ; idx < width ; idx += 1) {
unsigned bit = wrd*width + idx;
connect(mux->pin_Data(idx, wrd), explode->pin(bit));
}
if (debug_synth)
cerr << get_line() << ": debug: synthesis done." << endl;
} else {
cerr << get_line() << ": internal error: Synthesize memory "
<< "expression that is not exploded?" << endl;
des->errors += 1;
}
return osig;
}
NetNet* NetECReal::synthesize(Design*des)
{
cerr << get_line() << ": error: Real constants are "
@@ -684,6 +796,97 @@ NetNet* NetEUBits::synthesize(Design*des)
return osig;
}
NetNet* NetEUFunc::synthesize(Design*des)
{
assert(func_);
NetFuncDef* def = func_->func_def();
assert(def);
assert(parms_.count() == def->port_count());
svector<NetNet*> inports (parms_.count());
unsigned errors = 0;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
inports[idx] = parms_[idx]->synthesize(des);
if (inports[idx] == 0)
errors += 1;
}
if (errors > 0) {
cerr << get_line() << ": error: "
<< "Cannot continue with function instance synthesis."
<< endl;
return 0;
}
NetNet*out = def->synthesize(des, inports);
if (! out) {
cerr << get_line() << ": error: "
<< "User defined functions do not synthesize." << endl;
def->dump(cerr, 4);
des->errors += 1;
return 0;
}
return out;
}
NetNet* NetFuncDef::synthesize(Design*des, const svector<NetNet*>&inports_)
{
/* First run synthesis for the function definition as if this
where a toplevel process. This will create the logic that
the function represents, but connected to the port nets for
the function definition. We will detach those common ports
later. */
NexusSet nex_set;
statement_->nex_output(nex_set);
const perm_string tmp1 = scope()->local_symbol();
NetNet*nex_out = new NetNet(scope(), tmp1, NetNet::WIRE,
nex_set.count());
for (unsigned idx = 0 ; idx < nex_out->pin_count() ; idx += 1)
connect(nex_set[idx], nex_out->pin(idx));
bool flag = statement_->synth_async_noaccum(des, scope(), false, 0,
nex_out, nex_out);
if (!flag) {
delete nex_out;
return 0;
}
/* Connect the inports_ vectors to the input ports and detach
the static arg ports themselves. This moves the input from
the synthesized device from the static ports to the actual
ports from the instance context. */
for (unsigned idx = 0 ; idx < port_count() ; idx += 1) {
NetNet*in = inports_[idx];
NetNet*arg = ports_[idx];
in = pad_to_width(des, in, arg->pin_count());
for (unsigned pin = 0 ; pin < arg->pin_count() ; pin += 1) {
connect(in->pin(pin), arg->pin(pin));
arg->pin(pin).unlink();
}
}
/* Detach the output signal from the synthesized result. We
use instead the nex_out that was returned from the
synthesis of the function. This is how we account for the
fact that the function may be synthesized multiple times to
go into multiple expression. Each synthesis needs a unique
output. */
for (unsigned idx = 0 ; idx < result_sig_->pin_count() ; idx += 1)
result_sig_->pin(idx).unlink();
return nex_out;
}
NetNet* NetEUReduce::synthesize(Design*des)
{
NetNet*isig = expr_->synthesize(des);
@@ -811,6 +1014,7 @@ NetNet* NetETernary::synthesize(Design *des)
perm_string oname = csig->scope()->local_symbol();
NetMux *mux = new NetMux(csig->scope(), oname, width, 2, 1);
mux->set_line(*this);
for (unsigned idx = 0 ; idx < width; idx += 1) {
connect(tsig->pin(idx), mux->pin_Data(idx, 1));
connect(fsig->pin(idx), mux->pin_Data(idx, 0));
@@ -854,6 +1058,21 @@ NetNet* NetETernary::synthesize(Design *des)
*/
NetNet* NetESignal::synthesize(Design*des)
{
if (warn_unused) {
if (net_->peek_lref() == 0 && net_->type()==NetNet::REG) {
cerr << get_line() << ": warning: "
<< "reg " << net_->name()
<< " is used by logic but never assigned." << endl;
}
if (net_->peek_lref() == 0 && net_->type()==NetNet::INTEGER) {
cerr << get_line() << ": warning: "
<< "reg " << net_->name()
<< " is used by logic but never assigned." << endl;
}
}
/* If there is no part select, then the synthesis is trivial. */
if ((lsi_ == 0) && (msi_ == (net_->pin_count() - 1)))
return net_;
@@ -866,99 +1085,10 @@ NetNet* NetESignal::synthesize(Design*des)
perm_string name = scope->local_symbol();
NetNet*tmp = new NetNet(scope, name, NetNet::WIRE, wid);
tmp->local_flag(true);
tmp->set_line(*this);
for (unsigned idx = 0 ; idx < wid ; idx += 1)
connect(tmp->pin(idx), net_->pin(idx+lsi_));
return tmp;
}
/*
* $Log: expr_synth.cc,v $
* Revision 1.59 2004/06/30 02:16:26 steve
* Implement signed divide and signed right shift in nets.
*
* Revision 1.58 2004/06/16 16:21:34 steve
* Connect rsif of multiply to DataB.
*
* Revision 1.57 2004/06/12 15:00:02 steve
* Support / and % in synthesized contexts.
*
* Revision 1.56 2004/06/01 01:04:57 steve
* Fix synthesis method for logical and/or
*
* Revision 1.55 2004/02/20 18:53:35 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.54 2004/02/18 17:11:56 steve
* Use perm_strings for named langiage items.
*
* Revision 1.53 2004/02/15 04:23:48 steve
* Fix evaluation of compare to constant expression.
*
* Revision 1.52 2003/11/10 19:39:20 steve
* Remove redundant scope tokens.
*
* Revision 1.51 2003/10/27 06:04:21 steve
* More flexible width handling for synthesized add.
*
* Revision 1.50 2003/09/26 02:44:27 steve
* Assure ternary arguments are wide enough.
*
* Revision 1.49 2003/09/03 23:31:36 steve
* Support synthesis of constant downshifts.
*
* Revision 1.48 2003/08/28 04:11:18 steve
* Spelling patch.
*
* Revision 1.47 2003/08/09 03:23:40 steve
* Add support for IVL_LPM_MULT device.
*
* Revision 1.46 2003/07/26 03:34:42 steve
* Start handling pad of expressions in code generators.
*
* Revision 1.45 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.44 2003/04/19 04:52:56 steve
* Less picky about expression widths while synthesizing ternary.
*
* Revision 1.43 2003/04/08 05:07:15 steve
* Detect constant shift distances in synthesis.
*
* Revision 1.42 2003/04/08 04:33:55 steve
* Synthesize shift expressions.
*
* Revision 1.41 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.40 2003/02/26 01:29:24 steve
* LPM objects store only their base names.
*
* Revision 1.39 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.38 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.37 2002/11/17 23:37:55 steve
* Magnitude compare to 0.
*
* Revision 1.36 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.35 2002/07/07 22:31:39 steve
* Smart synthesis of binary AND expressions.
*
* Revision 1.34 2002/07/05 21:26:17 steve
* Avoid emitting to vvp local net symbols.
*
* Revision 1.33 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*/
+18 -49
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2002 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: functor.cc,v 1.32 2004/10/04 01:10:53 steve Exp $"
#endif
# include "config.h"
@@ -67,6 +64,10 @@ void functor_t::lpm_ff(class Design*, class NetFF*)
{
}
void functor_t::lpm_latch(class Design*, class NetLatch*)
{
}
void functor_t::lpm_logic(class Design*, class NetLogic*)
{
}
@@ -79,6 +80,9 @@ void functor_t::lpm_mux(class Design*, class NetMux*)
{
}
void functor_t::lpm_ram_dq(class Design*, class NetRamDq*)
{
}
void NetScope::run_functor(Design*des, functor_t*fun)
{
@@ -186,6 +190,11 @@ void NetFF::functor_node(Design*des, functor_t*fun)
fun->lpm_ff(des, this);
}
void NetLatch::functor_node(Design*des, functor_t*fun)
{
fun->lpm_latch(des, this);
}
void NetLogic::functor_node(Design*des, functor_t*fun)
{
fun->lpm_logic(des, this);
@@ -206,6 +215,11 @@ void NetMux::functor_node(Design*des, functor_t*fun)
fun->lpm_mux(des, this);
}
void NetRamDq::functor_node(Design*des, functor_t*fun)
{
fun->lpm_ram_dq(des, this);
}
proc_match_t::~proc_match_t()
{
}
@@ -264,48 +278,3 @@ int proc_match_t::event_wait(NetEvWait*)
{
return 0;
}
/*
* $Log: functor.cc,v $
* Revision 1.32 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.31 2002/08/16 05:18:27 steve
* Fix intermix of node functors and node delete.
*
* Revision 1.30 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.29 2002/08/10 22:07:38 steve
* Remove useless error messages.
*
* Revision 1.28 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.27 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.26 2001/10/19 21:53:24 steve
* Support multiple root modules (Philip Blundell)
*
* Revision 1.25 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.24 2000/11/19 20:48:30 steve
* Fix cases where signal iteration might die early.
*
* Revision 1.23 2000/11/18 04:53:04 steve
* Watch out in functor, it may delete the last signal.
*
* Revision 1.22 2000/09/17 21:26:15 steve
* Add support for modulus (Eric Aardoom)
*
* Revision 1.21 2000/08/01 02:48:41 steve
* Support <= in synthesis of DFF and ram devices.
*/
+7 -35
View File
@@ -1,7 +1,7 @@
#ifndef __functor_H
#define __functor_H
/*
* Copyright (c) 1999-2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: functor.h,v 1.20 2002/08/12 01:34:59 steve Exp $"
#endif
/*
* The functor is an object that can be applied to a design to
@@ -69,6 +66,9 @@ struct functor_t {
/* This method is called for each FF in the design. */
virtual void lpm_ff(class Design*des, class NetFF*);
/* This method is called for each latch in the design. */
virtual void lpm_latch(class Design*des, class NetLatch*);
/* Handle LPM combinational logic devices. */
virtual void lpm_logic(class Design*des, class NetLogic*);
@@ -77,6 +77,9 @@ struct functor_t {
/* This method is called for each MUX. */
virtual void lpm_mux(class Design*des, class NetMux*);
/* This is called for eacm RamDq device. */
virtual void lpm_ram_dq(class Design*des, class NetRamDq*);
};
struct proc_match_t {
@@ -89,35 +92,4 @@ struct proc_match_t {
virtual int block(class NetBlock*);
};
/*
* $Log: functor.h,v $
* Revision 1.20 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.19 2002/06/05 03:44:25 steve
* Add support for memory words in l-value of
* non-blocking assignments, and remove the special
* NetAssignMem_ and NetAssignMemNB classes.
*
* Revision 1.18 2002/06/04 05:38:44 steve
* Add support for memory words in l-value of
* blocking assignments, and remove the special
* NetAssignMem class.
*
* Revision 1.17 2000/09/17 21:26:15 steve
* Add support for modulus (Eric Aardoom)
*
* Revision 1.16 2000/08/01 02:48:42 steve
* Support <= in synthesis of DFF and ram devices.
*
* Revision 1.15 2000/07/16 04:56:07 steve
* Handle some edge cases during node scans.
*
* Revision 1.14 2000/07/15 05:13:44 steve
* Detect muxing Vz as a bufufN.
*
* Revision 1.13 2000/04/20 00:28:03 steve
* Catch some simple identity compareoptimizations.
*/
#endif
+3 -3
View File
@@ -249,7 +249,7 @@ exactly the same so far as the compiler is concerned.
Unfortunately, Cadence seems to feel otherwise. In particular, it has
been reported that although {1'b0, 16} causes an error, {1'b0, 15+1}
is accepted. Further testing shows that any expression other then a
is accepted. Further testing shows that any expression other than a
simple unsized constant is accepted there, even if all the operands of
all the operators that make up the expression are unsized integers.
@@ -282,12 +282,12 @@ One might note that the quote from section 4.1.14 says "Unsized
expressions...", so arguably accepting (15+1) or even (16+0) as an
operand to a concatenation is not a violation of the letter of the
law. However, the very next sentence of the quote expresses the
intent, and accepting (15+1) as having a more defined size then (16)
intent, and accepting (15+1) as having a more defined size than (16)
seems to be a violation of that intent.
Whatever a compiler decides the size is, the user has no way to
predict it, and the compiler should not have the right to treat (15+1)
any differently then (16). Therefore, Icarus Verilog takes the
any differently than (16). Therefore, Icarus Verilog takes the
position that such expressions are *unsized* and are not allowed as
operands to concatenations. Icarus Verilog will in general assume that
operations on unsized numbers produce unsized results. There are
+13
View File
@@ -27,6 +27,15 @@ first source file is named \fIfoo.c\fP, the output becomes
Include the named library in the link of the VPI module. This allows
VPI modules to further reference external libraries.
.TP 8
.B -I\fIdirectory\fP
Add \fIdirectory\fP to the list of directories that will be search for
header files.
.TP 8
.B -D\fIdefine\fP
Define a macro named \fIdefine\fP.
.TP 8
.B --name=\fIname\fP
Normally, the output VPI module will be named after the first source
@@ -39,6 +48,10 @@ This flag causes the program to print the install directory for VPI
modules, then exit. It is a convenience for makefiles or automated
plug-in installers.
.TP 8
.B --cflags, --ldflags and -ldlibs
These flags provide compile time information.
.SH "PC-ONLY OPTIONS"
The PC port of \fIiverilog-vpi\fP includes two special flags needed to
+23 -11
View File
@@ -17,19 +17,20 @@
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: iverilog-vpi.sh,v 1.14 2004/05/20 00:40:34 steve Exp $"
# These are the variables used for compiling files
CC=gcc
CXX=gcc
CFLAGS="@PIC@ -O -I@INCLUDEDIR@"
CC=@IVCC@
CXX=@IVCXX@
CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@"
SUFFIX=@SUFFIX@
# These are used for linking...
LD=gcc
LD=$CC
LDFLAGS32="@SHARED@ -L@LIBDIR@"
LDFLAGS64="@SHARED@ -L@LIBDIR64@"
LDFLAGS="$LDFLAGS64"
LDLIBS="-lveriuser -lvpi"
LDLIBS="-lveriuser$SUFFIX -lvpi$SUFFIX"
INSTDIR64="@VPIDIR1@"
INSTDIR32="@VPIDIR2@"
@@ -46,6 +47,7 @@ OBJ=
LIB=
OUT=
INCOPT=
DEFS=
# --
# parse the command line switches. This collects the source files
@@ -63,11 +65,19 @@ do
;;
*.cc) CXSRC="$CXSRC $parm"
LD=$CXX
if [ x$OUT = x ]; then
OUT=`basename $parm .cc`
fi
;;
*.cpp) CXSRC="$CXSRC $parm"
LD=$CXX
if [ x$OUT = x ]; then
OUT=`basename $parm .cpp`
fi
;;
*.o) OBJ="$OBJ $parm"
if [ x$OUT = x ]; then
OUT=`basename $parm .o`
@@ -82,7 +92,9 @@ do
;;
-I*) INCOPT="$INCOPT $parm"
echo "$parm"
;;
-D*) DEFS="$DEFS $parm"
;;
-m32) LDFLAGS="-m32 $LDFLAGS32"
@@ -106,7 +118,7 @@ do
;;
--install-dir)
echo "@LIBDIR@/ivl/$INSTDIR"
echo "@LIBDIR@/ivl$SUFFIX/$INSTDIR"
exit
;;
esac
@@ -130,7 +142,7 @@ do
obj=$base".o"
echo "Compiling $src..."
$CC -c -o $obj $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
$CC -c -o $obj $DEFS $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj"
done
@@ -140,13 +152,13 @@ do
obj=$base".o"
echo "Compiling $src..."
$CXX -c -o $obj $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
$CXX -c -o $obj $DEFS $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj"
done
if test $compile_errors -gt 0
then
echo "Some ($compile_errors) files failed to compile."
echo "$0: $compile_errors file(s) failed to compile."
exit $compile_errors
fi
+3
View File
@@ -62,12 +62,15 @@ ivl_logic_udp
ivl_lpm_aset_value
ivl_lpm_async_clr
ivl_lpm_async_set
ivl_lpm_attr_cnt
ivl_lpm_attr_val
ivl_lpm_basename
ivl_lpm_clk
ivl_lpm_data
ivl_lpm_datab
ivl_lpm_data2
ivl_lpm_data2_width
ivl_lpm_decode
ivl_lpm_define
ivl_lpm_enable
ivl_lpm_memory
+92 -79
View File
@@ -1,7 +1,7 @@
#ifndef __ivl_target_H
#define __ivl_target_H
/*
* Copyright (c) 2000-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: ivl_target.h,v 1.126 2004/10/04 01:10:53 steve Exp $"
#endif
#ifdef __cplusplus
#define _BEGIN_DECL extern "C" {
@@ -226,8 +223,11 @@ typedef enum ivl_lpm_type_e {
IVL_LPM_CMP_GE = 1,
IVL_LPM_CMP_GT = 2,
IVL_LPM_CMP_NE = 11,
IVL_LPM_DECODE = 15,
IVL_LPM_DEMUX = 16,
IVL_LPM_DIVIDE = 12,
IVL_LPM_FF = 3,
IVL_LPM_LATCH = 17,
IVL_LPM_MOD = 13,
IVL_LPM_MULT = 4,
IVL_LPM_MUX = 5,
@@ -629,6 +629,11 @@ extern const char* ivl_udp_name(ivl_udp_t net);
* the LPM type, but it generally has to do with the width of the
* output data path.
*
* ivl_lpm_attr_cnt
* ivl_lpm_attr_val
* These functions access attributes attached to LPM devices. These
* attributes may be explicit attributes collected from the Verilog
* source, or implicit attributes generated by the compiler.
*
* These functions apply to a subset of the LPM devices, or may have
* varying meaning depending on the device:
@@ -642,13 +647,18 @@ extern const char* ivl_udp_name(ivl_udp_t net);
* Return the input data nexus for device types that have a second
* input vector. For example, arithmetic devices are like this.
*
* ivl_lpm_decode
* Return the DECODER associated with this LPM_FF device. The
* decoder for a FF takes an input address and generates an enable
* input for no more than 1 bit (can be none) of the FF device.
*
* ivl_lpm_q
* Return the output data nexus for device types that have a single
* output vector. This is most devices, it turns out.
*
* ivl_lpm_selects
* This is the size of the select input for a LPM_MUX device, or the
* address bus width of an LPM_RAM.
* This is the size of the select input for a LPM_MUX or LPM_DECODE
* device, or the address bus width of an LPM_RAM.
*
* ivl_lpm_signed
* Arithmetic LPM devices may be signed or unsigned if there is a
@@ -658,6 +668,64 @@ extern const char* ivl_udp_name(ivl_udp_t net);
* In addition to a width, some devices have a size. The size is
* often the number of inputs per out, i.e., the number of inputs
* per bit for a MUX.
*
* SEMANTIC NOTES:
*
* - IVL_LPM_FF
* The IVL_LPM_FF and IVL_LPM_DECODE devices are closely related. If
* the ivl_lpm_decode function returns a non-nil value, then the
* decoder represents an extra ENABLE-like input, where exactly <N>
* bits of the width of the FF is enabled. The ivl_lpm_width of the
* decoder defines <N>.
*
* The decoder inputs are the address that selects the FF to be
* enabled, and the ivl_lpm_selects for the decoder gives the width of
* the address. The address of the LSB of the memory, then, is the
* word width times the input address. For a simple l-value bit
* select, the word width <N> will be 1, and the address goes directly
* to the bit. Otherwise, <N>*address gets to the first bit of the word.
*
* The core compiler generates these attributes in certain cases:
*
* - ivl:clock_polarity
* If present, the string value can be "INVERT". That indicates
* that the clock is negedge sensitive instead of the default
* posedge sensitive.
*
* - IVL_LPM_RAM
* The IVL_LPM_RAM may also appear as a READ port for a FF array. In
* this case, the IVL_LPM_RAM device has an ivl_lpm_width that is the
* width of the word, and an ivl_lpm_size that is the number of words
* in the array. In effect, the IVL_LPM_RAM reorganizes a vector into
* an array of words. If this is happening, then the ivl_lpm_memory
* will return 0.
*
* The ivl_lpm_q function gets the output nexa of the read port. The
* "q" port has as many bits as the width. The ivl_lpm_data2 function
* gets the nexa of the input, with the sdx the word address and the
* idx the bit within the word.
*
* - IVL_LPM_DEMUX
* This device is a form of bit replacement. The device has a data bus
* width (ivl_lpm_width) and an address width. The Data outputs are
* ivl_lpm_q and have the data bus width. The ivl_lpm_data functions are
* inputs to the device. Normally, the device passes the data inputs
* through to the Q output.
*
* The IVL_LPM_DEMUX also has a size (ivl_lpm_size) which is the
* number of addressable units in the device. If the device is bit-
* addressable, then the size is the same as the width. I.e. if
* ivl_lpm_width == ivl_lpm_size, then the address selects a single
* bit. If ivl_lpm_width/ivl_lpm_size == 8, then the address selects
* words of 8 bits and there are ivl_lpm_size of them. The
* ivl_lpm_width will always be an exact multiple of
* ivl_lpm_size. This is slightly different from the meaning of width
* in memory ports, but reflects that the DEMUX manipulates fixed
* width ranges within a single vector.
*
* The ivl_lpm_select inputs address a bit of the device. The
* addressed bit is substituted by the replacement bit. This
* replacement bit comes from the ivl_lpm_datab(net,0) nexus.
*/
extern const char* ivl_lpm_name(ivl_lpm_t net); /* (Obsolete) */
@@ -667,35 +735,42 @@ extern int ivl_lpm_signed(ivl_lpm_t net);
extern ivl_lpm_type_t ivl_lpm_type(ivl_lpm_t net);
extern unsigned ivl_lpm_width(ivl_lpm_t net);
/* IVL_LPM_FF */
extern unsigned ivl_lpm_attr_cnt(ivl_lpm_t net);
extern ivl_attribute_t ivl_lpm_attr_val(ivl_lpm_t net, unsigned idx);
/* IVL_LPM_FF IVL_LPM_LATCH*/
extern ivl_nexus_t ivl_lpm_async_clr(ivl_lpm_t net);
extern ivl_nexus_t ivl_lpm_async_set(ivl_lpm_t net);
extern ivl_expr_t ivl_lpm_aset_value(ivl_lpm_t net);
/* IVL_LPM_FF */
extern ivl_nexus_t ivl_lpm_sync_clr(ivl_lpm_t net);
extern ivl_nexus_t ivl_lpm_sync_set(ivl_lpm_t net);
extern ivl_expr_t ivl_lpm_sset_value(ivl_lpm_t net);
/* IVL_LPM_FF IVL_LPM_RAM */
/* IVL_LPM_FF IVL_LPM_LATCH IVL_LPM_RAM */
extern ivl_nexus_t ivl_lpm_clk(ivl_lpm_t net);
/* IVL_LPM_FF */
extern ivl_lpm_t ivl_lpm_decode(ivl_lpm_t net);
/* IVL_LPM_UFUNC */
extern ivl_scope_t ivl_lpm_define(ivl_lpm_t net);
/* IVL_LPM_FF IVL_LPM_RAM */
extern ivl_nexus_t ivl_lpm_enable(ivl_lpm_t net);
/* IVL_LPM_ADD IVL_LPM_FF IVL_LPM_MULT IVL_LPM_RAM IVL_LPM_SUB */
/* IVL_LPM_ADD IVL_LPM_DEMUX IVL_LPM_FF IVL_LPM_MULT */
/* IVL_LPM_RAM IVL_LPM_SUB IVL_LPM_LATCH */
extern ivl_nexus_t ivl_lpm_data(ivl_lpm_t net, unsigned idx);
/* IVL_LPM_ADD IVL_LPM_MULT IVL_LPM_SUB */
/* IVL_LPM_ADD IVL_LPM_DEMUX IVL_LPM_MULT IVL_LPM_SUB */
/* IVL_LPM_MUX IVL_LPM_UFUNC */
extern ivl_nexus_t ivl_lpm_datab(ivl_lpm_t net, unsigned idx);
extern ivl_nexus_t ivl_lpm_data2(ivl_lpm_t net, unsigned sdx, unsigned idx);
/* IVL_LPM_UFUNC */
extern unsigned ivl_lpm_data2_width(ivl_lpm_t net, unsigned sdx);
/* IVL_LPM_ADD IVL_LPM_FF IVL_LPM_MULT IVL_LPM_RAM IVL_LPM_SUB
IVL_LPM_UFUNC */
/* IVL_LPM_ADD IVL_LPM_DEMUX IVL_LPM_FF IVL_LPM_MULT IVL_LPM_RAM IVL_LPM_SUB
IVL_LPM_UFUNC IVL_LPM_LATCH */
extern ivl_nexus_t ivl_lpm_q(ivl_lpm_t net, unsigned idx);
/* IVL_LPM_MUX IVL_LPM_RAM */
/* IVL_LPM_MUX IVL_LPM_DECODE IVL_LPM_DEMUX IVL_LPM_RAM */
extern unsigned ivl_lpm_selects(ivl_lpm_t net);
/* IVL_LPM_MUX IVL_LPM_RAM */
/* IVL_LPM_MUX IVL_LPM_DECODE IVL_LPM_DEMUX IVL_LPM_RAM */
extern ivl_nexus_t ivl_lpm_select(ivl_lpm_t net, unsigned idx);
/* IVL_LPM_MUX */
/* IVL_LPM_DEMUX, IVL_LPM_MUX, IVL_LPM_RAM */
extern unsigned ivl_lpm_size(ivl_lpm_t net);
/* IVL_LPM_RAM */
extern ivl_memory_t ivl_lpm_memory(ivl_lpm_t net);
@@ -910,7 +985,7 @@ extern ivl_expr_t ivl_parameter_expr(ivl_parameter_t net);
* ivl_scope_children
* A scope may in turn contain other scopes. This method iterates
* through all the child scopes of a given scope. If the function
* returns any value other then 0, the iteration stops and the
* returns any value other than 0, the iteration stops and the
* method returns that value. Otherwise, iteration continues until
* the children run out.
*
@@ -1137,7 +1212,7 @@ extern ivl_statement_type_t ivl_statement_type(ivl_statement_t net);
/*
* The following functions retrieve specific single values from the
* statement. These values are the bits of data and parameters that
* make up the statement. Many of these functions apply to more then
* make up the statement. Many of these functions apply to more than
* one type of statement, so the comment in front of them tells which
* statement types can be passed to the function.
*
@@ -1234,66 +1309,4 @@ typedef int (*target_design_f)(ivl_design_t des);
_END_DECL
/*
* $Log: ivl_target.h,v $
* Revision 1.126 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.125 2004/09/25 01:58:12 steve
* Some commentary on ivl_logic_pin.
*
* Revision 1.124 2003/12/03 02:46:24 steve
* Add support for wait on list of named events.
*
* Revision 1.123 2003/11/08 20:06:21 steve
* Spelling fixes in comments.
*
* Revision 1.122 2003/08/22 23:14:26 steve
* Preserve variable ranges all the way to the vpi.
*
* Revision 1.121 2003/08/15 02:23:52 steve
* Add synthesis support for synchronous reset.
*
* Revision 1.120 2003/07/30 01:13:28 steve
* Add support for triand and trior.
*
* Revision 1.119 2003/06/23 01:25:44 steve
* Module attributes make it al the way to ivl_target.
*
* Revision 1.118 2003/05/14 05:26:41 steve
* Support real expressions in case statements.
*
* Revision 1.117 2003/04/22 04:48:29 steve
* Support event names as expressions elements.
*
* Revision 1.116 2003/04/11 05:18:08 steve
* Handle signed magnitude compare all the
* way through to the vvp code generator.
*
* Revision 1.115 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.114 2003/03/06 01:24:37 steve
* Obsolete the ivl_event_name function.
*
* Revision 1.113 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.112 2003/02/26 01:29:24 steve
* LPM objects store only their base names.
*
* Revision 1.111 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.110 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.109 2002/12/21 00:55:58 steve
* The $time system task returns the integer time
* scaled to the local units. Change the internal
* implementation of vpiSystemTime the $time functions
* to properly account for this. Also add $simtime
* to get the simulation time.
*/
#endif
-6
View File
@@ -1,6 +0,0 @@
lexor.c
parse.c
parse.h
parse.output
Makefile
ivlpp
+9 -12
View File
@@ -17,13 +17,10 @@
# Software Foundation, Inc.,
# 59 Temple Place - Suite 330
# Boston, MA 02111-1307, USA
#
#ident "$Id: Makefile.in,v 1.17 2004/10/04 01:10:56 steve Exp $"
#
#
SHELL = /bin/sh
VERSION = 0.0
suffix = @install_suffix@
prefix = @prefix@
exec_prefix = @exec_prefix@
@@ -40,7 +37,7 @@ INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
CPPFLAGS = -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
CFLAGS = -Wall @CFLAGS@
LDFLAGS = @LDFLAGS@
@@ -63,17 +60,17 @@ lexor.c: lexor.lex
parse.h parse.c: parse.y
bison --verbose -t -d -o parse.c $(srcdir)/parse.y
install: all installdirs $(libdir)/ivl/ivlpp
install: all installdirs $(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@
$(libdir)/ivl/ivlpp: ivlpp
$(INSTALL_PROGRAM) ./ivlpp $(libdir)/ivl/ivlpp
$(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@: ivlpp@EXEEXT@
$(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ $(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@
installdirs: ../mkinstalldirs
$(srcdir)/../mkinstalldirs $(libdir)/ivl
$(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl$(suffix)
uninstall:
rm -f $(libdir)/ivl/ivlpp
rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@
lexor.o: lexor.c parse.h globals.h
main.o: main.c globals.h
parse.o: parse.c
parse.o: parse.c globals.h
+4 -28
View File
@@ -1,7 +1,7 @@
#ifndef __globals_H
#define __globals_H
/*
* Copyright (c) 1999 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: globals.h,v 1.7 2002/08/12 01:35:02 steve Exp $"
#endif
# include <stdio.h>
@@ -42,28 +39,7 @@ extern FILE *depend_file;
/* This is the entry to the parser. */
extern int yyparse();
/*
* $Log: globals.h,v $
* Revision 1.7 2002/08/12 01:35:02 steve
* conditional ident string using autoconfig.
*
* Revision 1.6 2002/04/04 05:26:13 steve
* Add dependency generation.
*
* Revision 1.5 2000/09/13 22:33:13 steve
* undefined macros are null (with warnings.)
*
* Revision 1.4 2000/08/20 17:49:04 steve
* Clean up warnings and portability issues.
*
* Revision 1.3 2000/06/30 15:49:44 steve
* Handle errors from parser slightly differently.
*
* Revision 1.2 1999/09/05 22:33:18 steve
* Take multiple source files on the command line.
*
* Revision 1.1 1999/07/03 20:03:47 steve
* Add include path and line directives.
*
*/
/* This is the entry to the lexer. */
extern int yylex();
#endif
+1 -1
View File
@@ -37,7 +37,7 @@ valid options include:
Predefine the symbol ``name'' to have the specified
value. If the value is not specified, then ``1'' is
used. This is mostly of use for controlling conditional
compilaiton.
compilation.
This option does *not* override existing `define
directives in the source file.
+83 -8
View File
@@ -1,7 +1,7 @@
%{
/*
* Copyright (c) 1999-2002 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: lexor.lex,v 1.46 2004/09/10 00:15:45 steve Exp $"
#endif
# include "config.h"
@@ -93,7 +90,7 @@ static void ifdef_enter(void)
cur = (struct ifdef_stack_t*)
calloc(1, sizeof(struct ifdef_stack_t));
cur->path = strdup(istack->path);
if (istack->path) cur->path = strdup(istack->path);
cur->lineno = istack->lineno;
cur->next = ifdef_stack;
ifdef_stack = cur;
@@ -108,7 +105,10 @@ static void ifdef_leave(void)
cur = ifdef_stack;
ifdef_stack = cur->next;
if (strcmp(istack->path,cur->path) != 0) {
/* If either path is from a non-file context e.g.(macro expansion)
* we assume that the non-file part is from this file. */
if (istack->path != NULL && cur->path != NULL &&
strcmp(istack->path,cur->path) != 0) {
fprintf(stderr, "%s:%u: warning: "
"This `endif matches an ifdef in another file.\n",
istack->path, istack->lineno);
@@ -138,10 +138,14 @@ static int comment_enter = 0;
%}
%option stack
%option nounput
%option noinput
%option noyy_top_state
%x PPINCLUDE
%x PPDEFINE
%x CCOMMENT
%x IFCCOMMENT
%x PCOMENT
%x CSTRING
%x ERROR_LINE
@@ -309,11 +313,37 @@ W [ \t\b\f]+
yy_push_state(IFDEF_SUPR);
}
<IFDEF_TRUE>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
BEGIN(IFDEF_SUPR);
}
<IFDEF_FALSE>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
char*name = strchr(yytext, '`');
assert(name);
name += 6;
name += strspn(name, " \t\b\f");
if (is_defined(name)) {
BEGIN(IFDEF_TRUE);
} else {
BEGIN(IFDEF_FALSE);
}
}
<IFDEF_SUPR>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* { }
<IFDEF_TRUE>`else { BEGIN(IFDEF_FALSE); }
<IFDEF_FALSE>`else { BEGIN(IFDEF_TRUE); }
<IFDEF_SUPR>`else { }
<IFDEF_FALSE,IFDEF_SUPR>"//"[^\r\n]* { }
<IFDEF_FALSE,IFDEF_SUPR>"/*" { comment_enter = YY_START; BEGIN(IFCCOMMENT); }
<IFCCOMMENT>[^\r\n] { }
<IFCCOMMENT>\n\r { istack->lineno += 1; }
<IFCCOMMENT>\r\n { istack->lineno += 1; }
<IFCCOMMENT>\n { istack->lineno += 1; }
<IFCCOMMENT>\r { istack->lineno += 1; }
<IFCCOMMENT>"*/" { BEGIN(comment_enter); }
<IFDEF_FALSE,IFDEF_SUPR>[^\r\n] { }
<IFDEF_FALSE,IFDEF_SUPR>\n\r { istack->lineno += 1; fputc('\n', yyout); }
<IFDEF_FALSE,IFDEF_SUPR>\r\n { istack->lineno += 1; fputc('\n', yyout); }
@@ -322,8 +352,44 @@ W [ \t\b\f]+
<IFDEF_FALSE,IFDEF_TRUE,IFDEF_SUPR>`endif { ifdef_leave(); yy_pop_state(); }
`ifdef {
fprintf(stderr, "%s:%u: `ifdef without a macro name - ignored.\n",
istack->path, istack->lineno+1);
error_count += 1;
}
`ifndef {
fprintf(stderr, "%s:%u: `ifndef without a macro name - ignored.\n",
istack->path, istack->lineno+1);
error_count += 1;
}
`elsif {
fprintf(stderr, "%s:%u: `elsif without a macro name - ignored.\n",
istack->path, istack->lineno+1);
error_count += 1;
}
`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
fprintf(stderr, "%s:%u: `elsif without a matching `ifdef - ignored.\n",
istack->path, istack->lineno+1);
error_count += 1;
}
`else {
fprintf(stderr, "%s:%u: `else without a matching `ifdef - ignored.\n",
istack->path, istack->lineno+1);
error_count += 1;
}
`endif {
fprintf(stderr, "%s:%u: `endif without a matching `ifdef - ignored.\n",
istack->path, istack->lineno+1);
error_count += 1;
}
/* This pattern notices macros and arranges for them to be replaced. */
`[a-zA-Z][a-zA-Z0-9_$]* { def_match(); }
`[a-zA-Z_][a-zA-Z0-9_$]* { def_match(); }
/* Any text that is not a directive just gets passed through to the
output. Very easy. */
@@ -337,6 +403,12 @@ W [ \t\b\f]+
/* Absorb the rest of the line when a broken directive is detected. */
<ERROR_LINE>[^\r\n]* { yy_pop_state(); }
<ERROR_LINE>(\n|"\r\n"|"\n\r"|\r) {
yy_pop_state();
istack->lineno += 1;
fputc('\n', yyout);
}
%%
/* Defined macros are kept in this table for convenient lookup. As
`define directives are matched (and the do_define() function
@@ -521,7 +593,7 @@ static void do_define()
}
/* Detect the continuation sequence. If I find it, remove it
and the white space that preceeds it, then replace all that
and the white space that precedes it, then replace all that
with a single newline. */
if ((cp > yytext) && (cp[-1] == '\\')) {
@@ -854,6 +926,7 @@ void reset_lexor(FILE*out, char*paths[])
isp->path = strdup(paths[0]);
isp->file = fopen(paths[0], "r");
isp->str = 0;
isp->lineno = 0;
if (isp->file == 0) {
perror(paths[0]);
exit(1);
@@ -876,8 +949,10 @@ void reset_lexor(FILE*out, char*paths[])
for (idx = 1 ; paths[idx] ; idx += 1) {
isp = malloc(sizeof(struct include_stack_t));
isp->path = strdup(paths[idx]);
isp->file = 0;
isp->str = 0;
isp->next = 0;
isp->lineno = 0;
if (tail)
tail->next = isp;
else
+5 -50
View File
@@ -1,5 +1,5 @@
const char COPYRIGHT[] =
"Copyright (c) 1999 Stephen Williams ([email protected])";
"Copyright (c) 1999-2010 Stephen Williams ([email protected])";
/*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -16,11 +16,9 @@ const char COPYRIGHT[] =
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: main.c,v 1.20 2004/09/10 00:15:45 steve Exp $"
#endif
# include "config.h"
# include "version.h"
const char NOTICE[] =
" This program is free software; you can redistribute it and/or modify\n"
@@ -38,8 +36,6 @@ const char NOTICE[] =
" Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n"
;
const char VERSION[] = "$Name: $ $State: Exp $";
# include <stdio.h>
# include <stdlib.h>
#ifdef HAVE_MALLOC_H
@@ -126,8 +122,8 @@ int main(int argc, char*argv[])
int opt, idx;
const char*flist_path = 0;
unsigned flag_errors = 0;
char*out_path = 0;
char *dep_path = NULL;
const char*out_path = 0;
const char*dep_path = NULL;
FILE*out;
/* Define preprocessor keywords that I plan to just pass. */
@@ -213,7 +209,7 @@ int main(int argc, char*argv[])
break;
case 'v':
fprintf(stderr, "Icarus Verilog Preprocessor version %s\n",
fprintf(stderr, "Icarus Verilog Preprocessor version %s\n\n",
VERSION);
fprintf(stderr, "%s\n", COPYRIGHT);
fputs(NOTICE, stderr);
@@ -287,44 +283,3 @@ int main(int argc, char*argv[])
return error_count;
}
/*
* $Log: main.c,v $
* Revision 1.20 2004/09/10 00:15:45 steve
* Remove bad casts.
*
* Revision 1.19 2004/09/05 21:29:08 steve
* Better type safety.
*
* Revision 1.18 2004/02/15 18:03:30 steve
* Cleanup of warnings.
*
* Revision 1.17 2003/09/26 02:08:31 steve
* Detect missing endif markers.
*
* Revision 1.16 2002/08/12 01:35:02 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/04/04 05:26:13 steve
* Add dependency generation.
*
* Revision 1.14 2001/11/21 02:59:27 steve
* Remove diag print.
*
* Revision 1.13 2001/11/21 02:20:35 steve
* Pass list of file to ivlpp via temporary file.
*
* Revision 1.12 2001/09/15 18:27:04 steve
* Make configure detect malloc.h
*
* Revision 1.11 2001/07/25 03:10:50 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.10 2001/06/23 18:41:02 steve
* Include stdlib.h
*
* Revision 1.9 2001/05/20 18:08:07 steve
* local declares if the header is missing.
*/
+2 -4
View File
@@ -1,7 +1,7 @@
%{
/*
* Copyright (c) 1999 Stephen Williams ([email protected])
* Copyright (c) 1999-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,11 +18,9 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: parse.y,v 1.4 2003/08/26 16:26:02 steve Exp $"
#endif
# include <stdio.h>
# include "globals.h"
static void yyerror(const char*msg);
%}
+53 -12
View File
@@ -1,7 +1,10 @@
%option never-interactive
%option nounput
%{
/*
* Copyright (c) 1998-2000 Stephen Williams ([email protected])
* Copyright (c) 1998-2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,9 +21,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: lexor.lex,v 1.86 2004/06/13 04:56:54 steve Exp $"
#endif
# include "config.h"
@@ -39,6 +39,8 @@
# define YY_USER_INIT reset_lexor();
# define yylval VLlval
#define YY_NO_INPUT
/*
* Lexical location information is passed in the yylloc variable to th
* parser. The file names, strings, are kept in a list so that I can
@@ -90,6 +92,7 @@ static int dec_buf_div2(char *buf);
static void process_timescale(const char*txt);
static int comment_enter;
static bool in_module = false;
%}
%x CCOMMENT
@@ -99,6 +102,7 @@ static int comment_enter;
%s UDPTABLE
%x PPTIMESCALE
%x PPDEFAULT_NETTYPE
%s EDGES
W [ \t\b\f\r]+
@@ -156,11 +160,12 @@ W [ \t\b\f\r]+
with "*" and return that. */
"(*"{W}*")" { return '*'; }
<EDGES>"]" { BEGIN(0); return yytext[0]; }
[}{;:\[\],()#=.@&!?<>%|^~+*/-] { return yytext[0]; }
\" { BEGIN(CSTRING); }
<CSTRING>\\\" { yymore(); }
<CSTRING>\\\\ { yymore(); /* Catch \\, which is a \ escaping itself */ }
<CSTRING>\\\" { yymore(); /* Catch \", which is an escaped quote */ }
<CSTRING>\n { BEGIN(0);
yylval.text = strdup(yytext);
VLerror(yylloc, "Missing close quote of string.");
@@ -179,6 +184,8 @@ W [ \t\b\f\r]+
<UDPTABLE>\(01\) { return 'r'; }
<UDPTABLE>\(0[xX]\) { return 'Q'; }
<UDPTABLE>\(b[xX]\) { return 'q'; }
<UDPTABLE>\(b0\) { return 'f'; /* b0 is 10|00, but only 10 is meaningful */}
<UDPTABLE>\(b1\) { return 'r'; /* b1 is 11|01, but only 01 is meaningful */}
<UDPTABLE>\(0\?\) { return 'P'; }
<UDPTABLE>\(10\) { return 'f'; }
<UDPTABLE>\(1[xX]\) { return 'M'; }
@@ -196,14 +203,42 @@ W [ \t\b\f\r]+
<UDPTABLE>[pP] { return 'p'; }
<UDPTABLE>[01\?\*\-] { return yytext[0]; }
<EDGES>"01" { return K_edge_descriptor; }
<EDGES>"0x" { return K_edge_descriptor; }
<EDGES>"0z" { return K_edge_descriptor; }
<EDGES>"10" { return K_edge_descriptor; }
<EDGES>"1x" { return K_edge_descriptor; }
<EDGES>"1z" { return K_edge_descriptor; }
<EDGES>"x0" { return K_edge_descriptor; }
<EDGES>"x1" { return K_edge_descriptor; }
<EDGES>"z0" { return K_edge_descriptor; }
<EDGES>"z1" { return K_edge_descriptor; }
[a-zA-Z_][a-zA-Z0-9$_]* {
int rc = lexor_keyword_code(yytext, yyleng);
if (rc == IDENTIFIER) {
switch (rc) {
case IDENTIFIER:
yylval.text = strdup(yytext);
if (strncmp(yylval.text,"PATHPULSE$", 10) == 0)
rc = PATHPULSE_IDENTIFIER;
} else {
break;
case K_edge:
BEGIN(EDGES);
break;
case K_module:
case K_macromodule:
in_module = true;
break;
case K_endmodule:
in_module = false;
break;
default:
yylval.text = 0;
break;
}
return rc;
@@ -262,6 +297,12 @@ W [ \t\b\f\r]+
^{W}?`timescale { BEGIN(PPTIMESCALE); }
<PPTIMESCALE>.* { process_timescale(yytext); }
<PPTIMESCALE>\n {
if (in_module) {
cerr << yylloc.text << ":" << yylloc.first_line << ": error: "
"`timescale directive can not be inside a module "
"definition." << endl;
error_count += 1;
}
yylloc.first_line += 1;
BEGIN(0); }
@@ -276,10 +317,10 @@ W [ \t\b\f\r]+
^{W}?`disable_portfaults{W}?.* { }
^{W}?`enable_portfaults{W}?.* { }
^{W}?`endcelldefine{W}?.* { }
^{W}?`endprotect{W}?.* { }
`endprotect { }
^{W}?`nosuppress_faults{W}?.* { }
^{W}?`nounconnected_drive{W}?.* { }
^{W}?`protect{W}?.* { }
`protect { }
^{W}?`resetall{W}?.* { }
^{W}?`suppress_faults{W}?.* { }
^{W}?`unconnected_drive{W}?.* { }
@@ -365,7 +406,7 @@ W [ \t\b\f\r]+
/* Final catchall. something got lost or mishandled. */
. { cerr << yylloc.text << ":" << yylloc.first_line
<*>.|\n { cerr << yylloc.text << ":" << yylloc.first_line
<< ": error: unmatched character (";
if (isgraph(yytext[0]))
cerr << yytext[0];
@@ -642,7 +683,7 @@ static verinum*make_unsized_dec(const char*ptr)
if (ptr[0] == '\'') {
/* The number has decorations of the form 'sd<digits>,
possibly with space between the d and the <digits>.
Also, the 's' is optional, and markes the number as
Also, the 's' is optional, and marks the number as
signed. */
ptr += 1;
+1
View File
@@ -44,6 +44,7 @@ function, K_function
highz0, K_highz0
highz1, K_highz1
if, K_if
ifnone, K_ifnone
initial, K_initial
inout, K_inout
input, K_input
+1 -13
View File
@@ -1,7 +1,7 @@
#ifndef __lexor_keyword_H
#define __lexor_keyword_H
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,19 +18,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: lexor_keyword.h,v 1.2 2002/08/12 01:34:59 steve Exp $"
#endif
extern int lexor_keyword_code (const char*str, unsigned len);
/*
* $Log: lexor_keyword.h,v $
* Revision 1.2 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.1 2000/03/12 17:09:41 steve
* Support localparam.
*
*/
#endif

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