Better error messages when synthesis fails.
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: netlist.h,v 1.321.2.12 2006/03/16 05:40:18 steve Exp $"
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#ident "$Id: netlist.h,v 1.321.2.13 2006/03/18 18:43:21 steve Exp $"
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#endif
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/*
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@ -2415,6 +2415,9 @@ class NetWhile : public NetProc {
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virtual bool emit_proc(struct target_t*) const;
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virtual void dump(ostream&, unsigned ind) const;
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bool synth_async(Design*des, NetScope*scope, bool sync_flag,
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NetNet*nex_map, NetNet*nex_out);
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private:
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NetExpr* cond_;
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NetProc*proc_;
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@ -3463,6 +3466,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
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/*
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* $Log: netlist.h,v $
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* Revision 1.321.2.13 2006/03/18 18:43:21 steve
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* Better error messages when synthesis fails.
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*
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* Revision 1.321.2.12 2006/03/16 05:40:18 steve
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* Fix crash when memory exploding doesnot work
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*
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84
synth2.cc
84
synth2.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: synth2.cc,v 1.39.2.24 2006/03/16 05:39:43 steve Exp $"
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#ident "$Id: synth2.cc,v 1.39.2.25 2006/03/18 18:43:22 steve Exp $"
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#endif
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# include "config.h"
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@ -149,6 +149,7 @@ bool NetAssignBase::synth_async(Design*des, NetScope*scope, bool sync_flag,
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"on unsupported lval ";
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dump_lval(cerr);
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cerr << endl;
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des->errors += 1;
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return false;
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}
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@ -476,9 +477,11 @@ bool NetCase::synth_async(Design*des, NetScope*scope, bool sync_flag,
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/* Missing case and no default; this could still be
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* synthesizable with synchronous logic, but not here. */
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cerr << get_line()
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<< ": error: Incomplete case"
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<< " in asynchronous process"
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<< " needs a default case." << endl;
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<< ": error: Incomplete case statement"
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<< " in asynchronous (combinational) process." << endl;
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cerr << get_line()
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<< ": : Are you missing a default case?" << endl;
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des->errors += 1;
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return_flag = false;
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continue;
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}
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@ -512,6 +515,7 @@ bool NetCase::synth_async(Design*des, NetScope*scope, bool sync_flag,
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cerr << get_line()
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<< ": error: case " << item << " statement"
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<< " does not assign expected outputs." << endl;
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des->errors += 1;
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return_flag = false;
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}
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}
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@ -692,12 +696,14 @@ bool NetCondit::synth_async(Design*des, NetScope*scope, bool sync_flag,
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if (if_ == 0) {
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cerr << get_line() << ": error: Asynchronous if statement"
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<< " is missing the if clause." << endl;
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des->errors += 1;
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return false;
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}
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if (else_ == 0) {
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cerr << get_line() << ": error: Asynchronous if statement"
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<< " is missing the else clause." << endl;
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des->errors += 1;
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return false;
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}
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}
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@ -726,6 +732,7 @@ bool NetCondit::synth_async(Design*des, NetScope*scope, bool sync_flag,
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delete asig;
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cerr << get_line() << ": error: Asynchronous if statement"
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<< " true clause failed to synthesize." << endl;
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des->errors += 1;
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return false;
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}
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}
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@ -750,6 +757,7 @@ bool NetCondit::synth_async(Design*des, NetScope*scope, bool sync_flag,
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delete bsig;
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cerr << get_line() << ": error: Asynchronous if statement"
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<< " else clause failed to synthesize." << endl;
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des->errors += 1;
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return false;
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}
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}
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@ -780,6 +788,7 @@ bool NetCondit::synth_async(Design*des, NetScope*scope, bool sync_flag,
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cerr << get_line()
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<< ": error: Condition true clause "
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<< "does not assign expected outputs." << endl;
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des->errors += 1;
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return_flag = false;
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}
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}
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@ -795,6 +804,7 @@ bool NetCondit::synth_async(Design*des, NetScope*scope, bool sync_flag,
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cerr << get_line()
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<< ": error: Condition false clause "
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<< "does not assign expected outputs." << endl;
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des->errors += 1;
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return_flag = false;
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}
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}
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@ -1157,6 +1167,7 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope,
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<< "pin " << pin << " out of range of "
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<< ff2->width() << " bit DFF." << endl;
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flag = false;
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des->errors += 1;
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/* If this block mentioned it, then the data must have
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been set here. */
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@ -1165,6 +1176,7 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope,
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<< "DFF introduced here is missing Data "
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<< pin << " input." << endl;
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flag = false;
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des->errors += 1;
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}
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}
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@ -1500,6 +1512,7 @@ bool NetEvWait::synth_sync(Design*des, NetScope*scope,
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<< " are valid clock inputs." << endl;
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cerr << get_line() << ": : Perhaps the clock"
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<< " is read by a statement or expression?" << endl;
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des->errors += 1;
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DEBUG_SYNTH2_EXIT("NetEvWait",false)
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return false;
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}
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@ -1517,6 +1530,16 @@ bool NetEvWait::synth_sync(Design*des, NetScope*scope,
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return flag;
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}
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bool NetWhile::synth_async(Design*des, NetScope*scope, bool sync_flag,
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NetNet*nex_map, NetNet*nex_out)
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{
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cerr << get_line()
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<< ": error: Cannot synthesize for or while loops."
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<< endl;
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des->errors += 1;
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return false;
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}
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bool NetProcTop::synth_sync(Design*des)
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{
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NexusSet nex_set;
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@ -1562,46 +1585,6 @@ bool NetProcTop::synth_sync(Design*des)
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nex_q, nex_d,
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svector<NetEvProbe*>());
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#if 0
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/* Now look for FFs that have been attached to a
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decoder. These need to be handled specially. */
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for (unsigned idx = 0; idx < process_pin_count ; idx += 1) {
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NetFF*ff = nex_ff[idx].ff;
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unsigned pin = nex_ff[idx].pin;
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if (ff == 0)
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continue;
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NetDecode*demux = ff->get_demux();
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nex_ff[idx].ff = 0;
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if (demux == 0)
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continue;
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cerr << "XXXX Demux bit " << idx << "["<<pin<<"]"
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<< " of " << ff
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<< " with demux=" << demux << endl;
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ff->pin_Data(pin).unlink();
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for (unsigned idx2 = idx+1 ; idx2 < process_pin_count; idx2+=1) {
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NetFF*ff2 = nex_ff[idx2].ff;
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unsigned pin2 = nex_ff[idx2].pin;
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if (ff2->get_demux() != demux)
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continue;
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nex_ff[idx2].ff = 0;
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assert(ff2 == ff);
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cerr << "XXXX Demux bit " << idx2
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<< "["<<pin2<<"]"
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<< " also attached to demux=" << demux << endl;
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ff2->pin_Data(pin2).unlink();
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}
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}
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#endif
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delete nex_q;
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delete[]nex_ff;
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@ -1662,17 +1645,17 @@ void synth2_f::process(class Design*des, class NetProcTop*top)
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synth_error_flag = true;
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}
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if (! synth_error_flag)
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if (! synth_error_flag) {
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cerr << top->get_line() << ": warning: "
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<< "Process not synthesized." << endl;
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}
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return;
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}
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if (! top->synth_async(des)) {
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cerr << top->get_line() << ": internal error: "
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<< "is_asynchronous does not match "
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<< "sync_async results." << endl;
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cerr << top->get_line() << ": error: "
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<< "Asynchronous process cannot be synthesized." << endl;
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des->errors += 1;
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return;
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}
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@ -1688,6 +1671,9 @@ void synth2(Design*des)
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/*
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* $Log: synth2.cc,v $
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* Revision 1.39.2.25 2006/03/18 18:43:22 steve
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* Better error messages when synthesis fails.
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*
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* Revision 1.39.2.24 2006/03/16 05:39:43 steve
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* Fix a spelling error in an error message.
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*
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