Spelling fixes from Larry.
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@ -16,13 +16,13 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*
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* $Id: sqrt-virtex.v,v 1.4.2.1 2005/02/19 16:39:32 steve Exp $"
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* $Id: sqrt-virtex.v,v 1.4.2.2 2005/02/23 18:37:52 steve Exp $"
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*/
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/*
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* This module is a synthesizeable square-root function. It is also a
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* detailed example of how to target Xilinx Virtex parts using
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* Icarus Verilog. In fact, for no particular reason other then to
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* Icarus Verilog. In fact, for no particular reason other than to
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* be excessively specific, I will step through the process of
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* generating a design for a Spartan-II XC2S15-VQ100, and also how to
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* generate a generic library part for larger Virtex designs.
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@ -130,7 +130,7 @@
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* contains Verilog code that simulates the mapped design. This output
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* Verilog has the single root module "chip_root", which came from the
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* name of the root module when we were making the EDIF file in the
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* first place. The module has ports named just line the ports of the
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* first place. The module has ports named just like the ports of the
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* chip_root module below.
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*
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* The generated Verilog uses the library in the directory
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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* $Id: README.txt,v 1.47.2.1 2005/02/19 16:39:32 steve Exp $
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* $Id: README.txt,v 1.47.2.2 2005/02/23 18:37:52 steve Exp $
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*/
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VVP SIMULATION ENGINE
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@ -283,7 +283,7 @@ statement, it creates no functors. The symbol list is a list of
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functors that feed into each bit of the vector, and the vpiHandle
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holds references to those functors that are fed it.
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The <label> is required and is used to locate the net object that is
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The <label> is required and is used to locate the net object that it
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represents. This label does not map to a functor, so only references
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that know they want to access .nets are able to locate the symbol. In
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particular, this includes behavioral %load and %wait instructions. The
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@ -312,7 +312,7 @@ second word.
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Structural read access is implemented in terms of address and data
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ports. The addresses applied to the address port are expected to be
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withing the ranges specified, not based at zero.
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within the ranges specified, not based at zero.
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A read port is a vector of functors that is wide enough to accept all
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provided address bits and at least as wide as the requested subset of
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@ -381,12 +381,11 @@ EVENT STATEMENTS
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Threads need to interact with the functors of a netlist synchronously,
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as well as asynchronously. There are cases where the web of functors
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needs to wake up a waiting thread. The web of functors signals threads
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through .event objects, that are declare like so:
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through .event objects, that are declared like so:
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<label> .event <type>, <symbols_list>;
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<label> .event "name";
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This event statement declares an object that a %wait instruction
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can take as an operand. When a thread executes a %wait, it puts
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itself in the notification list of the event and suspends. The
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@ -509,7 +508,7 @@ similar:
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Whereas the arithmetic statements create an array of functor outputs,
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there is only one useful functor output for the comparators. That
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functor output is 1 1f the comparison is true, 0 if false, and x
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functor output is 1 if the comparison is true, 0 if false, and x
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otherwise. The plain versions do unsigned comparison, but the ".s"
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versions do signed comparison. (Equality doesn't need to care about
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sign.)
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@ -742,7 +741,7 @@ compile.cc. This function in turn calls all the *_init() functions in
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other parts of the source that need initialization for compile. All
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the various sub-init functions are called <foo>_init().
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Compilation is controlled by the parser, it parse.y. As the parser
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Compilation is controlled by the parser, in parse.y. As the parser
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reads and parses input, the compilation proceeds in the rules by
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calling various compile_* functions. All these functions live in the
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compile.cc file. Compilation calls other sections of the code as
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