V0.8: Fail if both an LPM/wire and a reg drive a nexus.
In synthesis we transform registers into wires, but if there is bad Verilog code where the register is written from non-synthesized code then we can't do this! This patch adds a check in the code generator for this and prints a error message instead of generating a .resolv to combine the two, which is certainly not correct.
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@ -489,6 +489,7 @@ const char* draw_net_input(ivl_nexus_t nex)
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unsigned ndrivers = 0;
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static ivl_nexus_ptr_t *drivers = 0x0;
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static unsigned adrivers = 0;
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ivl_signal_type_t ntype = IVL_SIT_NONE;
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const char*resolv_type;
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@ -534,15 +535,52 @@ const char* draw_net_input(ivl_nexus_t nex)
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break;
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}
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for (idx = 0 ; idx < ivl_nexus_ptrs(nex) ; idx += 1) {
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ivl_nexus_ptr_t nptr = ivl_nexus_ptr(nex, idx);
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ivl_signal_t nsig = ivl_nexus_ptr_sig(nptr);
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ivl_lpm_t nlpm = ivl_nexus_ptr_lpm(nptr);
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/* Skip input only pins. */
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if ((ivl_nexus_ptr_drive0(nptr) == IVL_DR_HiZ)
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&& (ivl_nexus_ptr_drive1(nptr) == IVL_DR_HiZ))
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continue;
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/* Check that both an LPM and a reg are not driving a net. */
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if (nlpm) {
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if (ntype != IVL_SIT_REG) {
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ntype = IVL_SIT_TRI;
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} else {
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fprintf(stderr, "vvp.tgt: error: Found a net driven by "
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"both a reg and an lpm (wire)!\n");
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fprintf(stderr, " : This may be caused by "
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"invalid Verilog code (e.g. "
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"assigning \n");
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fprintf(stderr, " : to a synthesized net "
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"from non-synthesized code).\n");
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fprintf(stderr, " : C source file %s:%u\n",
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__FILE__, __LINE__);
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exit(1);
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}
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}
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if (nsig) {
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ivl_signal_type_t stype = ivl_signal_type(nsig);
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if (ntype == IVL_SIT_NONE) {
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ntype = stype;
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} else if ((ntype == IVL_SIT_REG || stype == IVL_SIT_REG) &&
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(ntype != stype)) {
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fprintf(stderr, "vvp.tgt: error: Found a net driven by "
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"both a reg and a wire (lpm?)!\n");
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fprintf(stderr, " : This may be caused by "
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"invalid Verilog code (e.g. "
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"assigning \n");
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fprintf(stderr, " : to a synthesized net "
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"from non-synthesized code).\n");
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fprintf(stderr, " : C source file %s:%u\n",
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__FILE__, __LINE__);
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exit(1);
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}
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}
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/* Save this driver. */
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if (ndrivers >= adrivers) {
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adrivers += 4;
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