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Fix synthesis of expressions with land of vectors.

This commit is contained in:
steve 2006-05-15 03:55:22 +00:00
parent 9643b86ab3
commit 6cd4adb135
3 changed files with 49 additions and 5 deletions
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19
expr_synth.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: expr_synth.cc,v 1.59.2.4 2006/04/10 03:43:39 steve Exp $"
#ident "$Id: expr_synth.cc,v 1.59.2.5 2006/05/15 03:55:22 steve Exp $"
#endif
# include "config.h"
@ -474,13 +474,18 @@ NetNet* NetEBLogic::synthesize(Design*des)
perm_string oname = scope->local_symbol();
olog = new NetLogic(scope, oname, 3, NetLogic::AND);
olog->set_line(*this);
connect(osig->pin(0), olog->pin(0));
des->add_node(olog);
/* XXXX Here, I need to reduce the parameters with
reduction or. */
/* Here, I need to reduce the parameters with
reduction or. Only do this if we must. */
if (lsig->pin_count() > 1)
lsig = reduction_or(des, lsig);
if (rsig->pin_count() > 1)
rsig = reduction_or(des, rsig);
/* By this point, the left and right parameters have been
reduced to single bit values. Now we just connect them to
@ -488,6 +493,11 @@ NetNet* NetEBLogic::synthesize(Design*des)
assert(lsig->pin_count() == 1);
connect(lsig->pin(0), olog->pin(1));
if (rsig->pin_count() != 1) {
cerr << olog->get_line() << ": internal error: "
<< "right argument not reduced. expr=" << *this << endl;
}
assert(rsig->pin_count() == 1);
connect(rsig->pin(0), olog->pin(2));
}
@ -924,6 +934,9 @@ NetNet* NetESignal::synthesize(Design*des)
/*
* $Log: expr_synth.cc,v $
* Revision 1.59.2.5 2006/05/15 03:55:22 steve
* Fix synthesis of expressions with land of vectors.
*
* Revision 1.59.2.4 2006/04/10 03:43:39 steve
* Exploded memories accessed by constant indices.
*

25
netmisc.cc
View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: netmisc.cc,v 1.8 2004/02/20 18:53:35 steve Exp $"
#ident "$Id: netmisc.cc,v 1.8.2.1 2006/05/15 03:55:23 steve Exp $"
#endif
# include "config.h"
@ -72,6 +72,26 @@ NetNet* add_to_net(Design*des, NetNet*sig, long val)
return res;
}
NetNet* reduction_or(Design*des, NetNet*isig)
{
NetScope*scope = isig->scope();
NetLogic*olog = new NetLogic(scope, scope->local_symbol(),
isig->pin_count()+1, NetLogic::OR);
olog->set_line(*isig);
des->add_node(olog);
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, 1);
osig->local_flag(true);
osig->set_line(*isig);
connect(olog->pin(0), osig->pin(0));
for (unsigned idx = 0 ; idx < isig->pin_count() ; idx += 1)
connect(olog->pin(1+idx), isig->pin(idx));
return osig;
}
NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe)
{
@ -90,6 +110,9 @@ NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe)
/*
* $Log: netmisc.cc,v $
* Revision 1.8.2.1 2006/05/15 03:55:23 steve
* Fix synthesis of expressions with land of vectors.
*
* Revision 1.8 2004/02/20 18:53:35 steve
* Addtrbute keys are perm_strings.
*

10
netmisc.h
View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ifdef HAVE_CVS_IDENT
#ident "$Id: netmisc.h,v 1.19 2004/03/07 20:04:11 steve Exp $"
#ident "$Id: netmisc.h,v 1.19.2.1 2006/05/15 03:55:23 steve Exp $"
#endif
# include "netlist.h"
@ -57,6 +57,11 @@ extern NetNet*pad_to_width(Design*des, NetNet*n, unsigned w);
*/
extern NetNet*add_to_net(Design*des, NetNet*sig, long val);
/*
* Calculate the reduction OR from the input signal.
*/
extern NetNet*reduction_or(Design*des, NetNet*sig);
/*
* In some cases the lval is accessible as a pointer to the head of
* a list of NetAssign_ objects. This function returns the width of
@ -75,6 +80,9 @@ extern NetExpr* elab_and_eval(Design*des, NetScope*scope, const PExpr*pe);
/*
* $Log: netmisc.h,v $
* Revision 1.19.2.1 2006/05/15 03:55:23 steve
* Fix synthesis of expressions with land of vectors.
*
* Revision 1.19 2004/03/07 20:04:11 steve
* MOre thorough use of elab_and_eval function.
*