steve
|
fe6756eb07
|
Fix bottom bit of ADD/SUB device.
|
2002-11-01 02:36:34 +00:00 |
|
steve
|
539e494bc0
|
Give nets better names, if available.
|
2002-11-01 02:36:22 +00:00 |
|
steve
|
1298656c22
|
Fix up left shift to pass compile,
fix up ADD/SUB to generate missing pieces,
Add the asynch set/reset to DFF devices.
|
2002-10-30 03:58:45 +00:00 |
|
steve
|
ae27165ffe
|
Add Virtex code generators for left shift,
subtraction, and GE comparators.
|
2002-10-28 02:05:56 +00:00 |
|
steve
|
9f1ce170e6
|
Generate code for 8:1 muxes msing F5 and F6 muxes.
|
2002-09-15 21:52:19 +00:00 |
|
steve
|
327c8826f4
|
Generate Virtex code for 4:1 mux slices.
|
2002-09-14 05:19:19 +00:00 |
|
steve
|
52bf4e613f
|
conditional ident string using autoconfig.
|
2002-08-12 01:34:58 +00:00 |
|
steve
|
774f78cd3e
|
Autoconfig ident support.
|
2002-08-12 00:27:10 +00:00 |
|
steve
|
aca1dcf848
|
Add missing Log and Ident strings.
|
2002-08-11 23:47:04 +00:00 |
|
steve
|
d126a414bd
|
Spelling errors.
|
2002-04-30 04:26:42 +00:00 |
|
steve
|
54bb59ae99
|
Support compile on MacosX 10.1.1 (Timothy J. Wood)
|
2001-11-17 17:57:58 +00:00 |
|
steve
|
cc5ddc0b6b
|
MacOSX 10.1 updates.
|
2001-11-04 05:03:21 +00:00 |
|
steve
|
36d36d99f3
|
Generate BUF devices for bufz logic.
|
2001-10-11 00:12:28 +00:00 |
|
steve
|
cbd501b865
|
Fix some Cygwin DLL handling. (Venkat Iyer)
|
2001-09-30 16:45:10 +00:00 |
|
steve
|
a73cfbc2b5
|
MacOS X compile time changes. (Timothy Wood)
|
2001-09-20 03:21:01 +00:00 |
|
steve
|
606eb2b3cd
|
Support the cellref attribute.
|
2001-09-16 22:26:47 +00:00 |
|
steve
|
cefbb635c1
|
Suppor the PAD attribute on signals.
|
2001-09-16 01:48:16 +00:00 |
|
steve
|
b2b8b89cd8
|
Make configure detect malloc.h
|
2001-09-15 18:27:04 +00:00 |
|
steve
|
92760f2c5f
|
Support != in virtex code generator.
|
2001-09-15 05:06:04 +00:00 |
|
steve
|
9fda809fa6
|
Add XOR and XNOR gates.
|
2001-09-14 04:17:20 +00:00 |
|
steve
|
5976e7078c
|
Xilinx uses GROUND and VCC as pin names for the
GND and VCC devices.
Connect the top end of the EQ chain to the MUXCY
instead of to the LUT. The MUXCY has the real output.
|
2001-09-12 04:35:25 +00:00 |
|
steve
|
da9a84ed84
|
Use carry mux to implement wide identity compare,
Place property item in correct place in LUT cell list.
|
2001-09-11 05:52:31 +00:00 |
|
steve
|
167f94bdbf
|
Add 4 wide identity compare.
|
2001-09-10 03:48:34 +00:00 |
|
steve
|
4507351d48
|
Virtex support for mux devices and adders
with carry chains. Also, make Virtex specific
implementations of primitive logic.
|
2001-09-09 22:23:28 +00:00 |
|
steve
|
acde444439
|
Separate the virtex and generic-edif code generators.
|
2001-09-06 04:28:39 +00:00 |
|
steve
|
298a352cbd
|
Add documentation for the code generator.
|
2001-09-02 23:58:49 +00:00 |
|
steve
|
356552faad
|
Add virtex support for some basic logic, the DFF
and constant signals.
|
2001-09-02 23:53:55 +00:00 |
|
steve
|
5e1e79b3c4
|
Rearrange the XNF code generator to be generic-xnf
so that non-XNF code generation is also possible.
Start into the virtex EDIF output driver.
|
2001-09-02 21:33:07 +00:00 |
|
steve
|
2996d2eb19
|
Generic ADD code.
|
2001-09-01 04:30:44 +00:00 |
|
steve
|
16023cbbd6
|
Generate code for MUX devices.
|
2001-09-01 02:28:42 +00:00 |
|
steve
|
77927972e5
|
identity compare, and PWR records for constants.
|
2001-09-01 02:01:30 +00:00 |
|
steve
|
8b8a3d83e0
|
Relax pin count restriction on logic gates.
|
2001-08-31 23:02:13 +00:00 |
|
steve
|
c1c88f87c6
|
Many more logic gate types.
|
2001-08-31 04:17:56 +00:00 |
|
steve
|
a9b5c9c037
|
Add root port SIG records.
|
2001-08-31 02:59:06 +00:00 |
|
steve
|
a3c3019a04
|
Mangle nexus names.
|
2001-08-30 04:31:04 +00:00 |
|
steve
|
f063bf833f
|
Add the fpga target.
|
2001-08-28 04:14:20 +00:00 |