Commit Graph

500 Commits

Author SHA1 Message Date
Andrew Pullin b546b4e686 Add regression test for #1217: Unpacked array literal parsing
This bug was fixed by the #1265 fix. The error 'Array needs an array
index here' no longer occurs for unpacked array literals in
continuous assignments.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:36 -08:00
Andrew Pullin 03e9831800 Fix #1265: Allow continuous assignment of single-element unpacked arrays
The original check used `pin_count() > 1` to detect whole-array
assignments, which missed single-element arrays like `[0:0]` where
pin_count is 1.

The fix checks for whole-array assignments by:
1. Multi-element arrays (pin_count > 1) - always whole-array
2. Single-element unpacked arrays - check if the lval expression
   has array indices. If no indices, it's a whole-array reference.

This correctly distinguishes between:
- `assign arr = expr` (whole array) -> elaborate_unpacked_array_
- `assign arr[i] = expr` (indexed element) -> normal path

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:36 -08:00
Andrew Pullin 50d76c1bdf Fix #716: Report error for incompatible task argument types
When an undimensioned (dynamic) array was passed to a task parameter
expecting a simple vector, the compiler would crash with an assertion
failure because the switch handling type casts didn't know how to
handle IVL_VT_DARRAY type.

Changed the assertion to emit a proper error message about type
incompatibility and continue processing, allowing the compiler to
report the error gracefully instead of crashing.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:35 -08:00
Andrew Pullin 73cd6fa0c7 Fix #1220: Allow uwire arrays as input ports
Uwire arrays were triggering assertion failures because they were
kept virtualized (pins array NULL) like reg arrays. However, unlike
reg arrays, uwire arrays used as input ports need their nexuses
initialized for the target code generation to work properly.

Two changes:
1. elab_sig.cc: Devirtualize pins for UNRESOLVED_WIRE (uwire) type,
   same as regular WIRE type.
2. t-dll-api.cc: Update assertion in ivl_signal_nex to also accept
   IVL_SIT_UWIRE when pins array is NULL.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:35 -08:00
Andrew Pullin e00e89d8f8 Fix #1134: Allow struct member access in unpacked array of packed structs
When accessing a member of a packed struct within an unpacked array
(e.g., `tests[0].a` where `tests` is `test_t tests[0:1]`), the
assertion `base_index.size()+1 == net->packed_dimensions()` would fail
because unpacked indices were incorrectly included in base_index.

The fix:
1. Separate unpacked indices from packed indices before calling
   check_for_struct_members()
2. Compute the word index for unpacked array access using
   normalize_variable_unpacked()
3. Pass the word index to check_for_struct_members(), which now
   creates NetESignal with the proper word selector

This allows expressions like `array_of_structs[i].member` to work
correctly, selecting the right array element before extracting the
packed struct member.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:30:53 -08:00
Andrew Pullin 54dfd0a702 Fix #521: Allow variable indices in outer packed dimensions
In multi-dimensional packed arrays, allow variable indices in the outer
(prefix) dimensions, not just the final dimension. For example:

  logic [3:0][3:0] a;
  for (int i=0; i<4; i++)
    a[i][3] = 1;  // Previously error, now works

The fix checks if any packed prefix indices are non-constant. If so,
use collapse_array_exprs() to compute the bit offset as an expression
rather than requiring constant indices.

This removes an artificial restriction that had no justification in
the IEEE standard, as noted by maintainers in the GitHub issue.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 17:07:03 -08:00
Andrew Pullin 68633814d1 Fix #1268: Allow variables to be driven by primitive gate outputs
Per IEEE 1800-2017 6.5, variables can be written by one port, including
primitive gate outputs. The code incorrectly disallowed this with the
comment "Gates can never have variable output ports."

Changed elaborate_lnet/elaborate_bi_net calls for gate outputs to pass
true for var_allowed_in_sv, allowing variables as single-driver outputs.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 17:07:03 -08:00
Andrew Pullin a03033e743 Fix #1267: Allow wire logic connected to uwire port to have multiple drivers
TODO: Decide how resolved net types (tri0/tri1/triand/trior) should interact with uwire in a shared nexus.
2026-01-24 17:07:03 -08:00
Andrew Pullin d540260a20 Fix #1170: Skip $unit scope in tgt-sizer
The tgt-sizer target now skips IVL_SCT_PACKAGE scopes (the SystemVerilog
$unit compilation unit scope) instead of erroring. This allows sizer to
work with -g2012 and other SystemVerilog modes.

Includes regression test: br_gh1170

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 16:47:11 -08:00
Andrew Pullin b6042215ff Fix #670: Allow class methods named same as class
Modified grammar in parse.y to use identifier_name instead of IDENTIFIER
in function/task declaration rules and hierarchy_identifier rule. This
allows TYPE_IDENTIFIER tokens (which class names become after definition)
to be used as method names.

Changes:
- Function declaration rules (lines 1585, 1605, 1631)
- Task declaration rules (lines 2445, 2472, 2501)
- hierarchy_identifier member access (line 4471)

Includes regression test: br_gh670

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 16:44:01 -08:00
Andrew Pullin 5b8fac5441 Fix #1112: Report error for invalid $bits argument
When $bits() is called with an undefined identifier, the compiler now
properly reports an error instead of silently returning 0.

The fix checks if the argument expression has type IVL_VT_NO_TYPE after
test_width() processing (indicating the identifier couldn't be resolved),
and triggers elaboration to produce a proper error message.

Includes regression test: br_gh1112

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-23 10:56:13 -08:00
Cary R 068f33b35a Remove memory leak when multi-bit module path delays fail 2026-01-21 20:50:32 -08:00
Cary R 4d0a277f3b Cleanup the python version of vlog95 2026-01-13 01:25:24 -08:00
Cary R 6651df6f2c Update the vlog95 python tests to pass more options 2026-01-08 01:36:30 -08:00
Cary R 7dbaa67a02 vlgo95: add partial array pattern support and other cleanup 2026-01-07 23:32:16 -08:00
Cary R 918976651a Fixes for vlog95 generation and gold file updates 2026-01-06 23:02:55 -08:00
Cary R e5943047da Add preliminary support for Python vlog95 testing 2025-12-30 19:44:06 -08:00
Cary R 2b45f4c399 Python test cleanup 2025-12-08 20:57:56 -08:00
Cary R 1c6f0e768a Update vvp_reg.py to support strict, force-sv and with-valgrind 2025-11-22 13:31:27 -08:00
Martin Whitaker f5708a0322 Add regression test for issue #1286. 2025-11-11 22:00:06 +00:00
Cary R 87d9d0ac74 Cleanup python test script and add support for a suffix 2025-11-11 01:21:46 -08:00
Martin Whitaker 3d4f1eb94b Improved run_program() in Perl regression test scripts.
This version works with the native Windows (mingw64 and clang64)
versions of Perl in MSYS2.

Note that warnings are disabled in the Environment.pm module because
Perl fails to notice that OLDOUT and OLDERR are used when restoring
the STDOUT and STDERR file handles.
2025-10-21 21:47:45 +01:00
Martin Whitaker 935910c3c9 Modify VPI test suite to make PLI 1 tests optional. 2025-10-18 20:05:58 +01:00
Martin Whitaker 10770c9129 Optimise Perl regression test scripts.
When redirection operators are included in a command string passed to
the system() subroutine, it spawns an intermediate shell to handle the
redirection. This is particularly inefficient when running the tests
in MSYS2. Creating our own version of system() based on fork() and
exec() allows us to handle the redirection directly.
2025-10-17 20:58:05 +01:00
Martin Whitaker a4c90fb5f0 Add regression test for issue #1273. 2025-10-07 21:54:11 +01:00
Martin Whitaker 1fdeb7b982 Add regression tests for $fmonitor tasks.
Also add a test for multiple $monitor task calls and $monitoron and
$monitoroff.
2025-10-05 12:37:30 +01:00
Wilson Snyder d400fa21bd Update pr1008.v to $finish 2025-09-01 13:41:25 -04:00
Cary R b979441de2 Improve error messages when bad code is passed to the parser 2025-07-21 14:46:56 -07:00
Cary R c7d37bcc21 Error when trying to elaborate a field of a simple variable 2025-07-16 23:37:14 -07:00
Cary R eceb48e5d6 Add better error messages for output port elaboration issues 2025-07-16 22:37:49 -07:00
Cary R 30f1de9062 Elaborate input port default value expressions in the correct scope 2025-07-09 09:19:42 -07:00
Cary R cfb8ec17d2 Remove space issues 2025-07-09 07:41:16 -07:00
Martin Whitaker 60e4023e6f Fix log output ordering for vpi_control test when running in Windows.
MSYS2 buffers stderr, so we need to flush the buffers to ensure the
log file matches the gold file.
2025-07-08 22:24:46 +01:00
Martin Whitaker a883f2afe6 Add regression test for vpi_control() return value (issue #1208). 2025-07-08 21:52:13 +01:00
Martin Whitaker fd7029a299 Add regression tests for issue #1258. 2025-07-05 22:52:52 +01:00
Martin Whitaker aec91c7754 Add regression tests for issue #1256. 2025-07-05 18:21:32 +01:00
Cary R f82c6c7b3a Add missing gold and fix VHDL inout test 2025-07-01 00:04:09 -07:00
Cary R 66d57628bf Check what can drive a variable in SystemVerilog 2025-06-30 23:48:26 -07:00
Cary R 46a5078a68 When optimizing the size of a case keep the sign of the condition 2025-06-25 00:11:22 -07:00
Cary R 6426afc8d0 Avoid overflow in genvar to make duplicate 2025-06-21 18:27:54 -07:00
Cary R a2ffbc307a Validate the generate "loop" expressions 2025-06-21 16:58:30 -07:00
Cary R adcb9f4e0d Add support for passing a real input to logic, mos and if gates 2025-06-21 10:04:12 -07:00
Martin Whitaker b7f9be9370 Add regression test for issue #1242. 2025-05-11 11:39:29 +01:00
Andreas Lööw 4138fcf6c4 typo in regress-vvp.list 2025-03-31 08:44:22 +01:00
Andreas Lööw 7e95dfff5a remove trailing commas 2025-03-30 13:51:44 +01:00
Andreas Lööw bf45073359 typo: nornal -> normal 2025-03-30 13:51:20 +01:00
Cary R 0ca26c95d8 Cygwin also does not have docopt by default 2025-02-13 00:03:09 -08:00
Lars-Peter Clausen eb90bcf313 Add regression tests for invalid casts to real
Check that invalid casts to real are reported as an error.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2025-01-12 20:34:31 -08:00
Lars-Peter Clausen e2008c9c0e Add regression tests for nested lvalue object properties
Check that nested object properties of different types are supported as
lvalues.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2025-01-05 16:55:16 -08:00
Lars-Peter Clausen 9f8a8959a7 Add regression tests for assignment operators on queue and darray elements
Check that assignment operators work as expected on queue and dynamic array
elements.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2025-01-05 15:55:34 -08:00