Commit Graph

10290 Commits

Author SHA1 Message Date
Andrew Pullin b546b4e686 Add regression test for #1217: Unpacked array literal parsing
This bug was fixed by the #1265 fix. The error 'Array needs an array
index here' no longer occurs for unpacked array literals in
continuous assignments.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:36 -08:00
Andrew Pullin 03e9831800 Fix #1265: Allow continuous assignment of single-element unpacked arrays
The original check used `pin_count() > 1` to detect whole-array
assignments, which missed single-element arrays like `[0:0]` where
pin_count is 1.

The fix checks for whole-array assignments by:
1. Multi-element arrays (pin_count > 1) - always whole-array
2. Single-element unpacked arrays - check if the lval expression
   has array indices. If no indices, it's a whole-array reference.

This correctly distinguishes between:
- `assign arr = expr` (whole array) -> elaborate_unpacked_array_
- `assign arr[i] = expr` (indexed element) -> normal path

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:36 -08:00
Andrew Pullin 50d76c1bdf Fix #716: Report error for incompatible task argument types
When an undimensioned (dynamic) array was passed to a task parameter
expecting a simple vector, the compiler would crash with an assertion
failure because the switch handling type casts didn't know how to
handle IVL_VT_DARRAY type.

Changed the assertion to emit a proper error message about type
incompatibility and continue processing, allowing the compiler to
report the error gracefully instead of crashing.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:35 -08:00
Andrew Pullin 73cd6fa0c7 Fix #1220: Allow uwire arrays as input ports
Uwire arrays were triggering assertion failures because they were
kept virtualized (pins array NULL) like reg arrays. However, unlike
reg arrays, uwire arrays used as input ports need their nexuses
initialized for the target code generation to work properly.

Two changes:
1. elab_sig.cc: Devirtualize pins for UNRESOLVED_WIRE (uwire) type,
   same as regular WIRE type.
2. t-dll-api.cc: Update assertion in ivl_signal_nex to also accept
   IVL_SIT_UWIRE when pins array is NULL.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:33:35 -08:00
Andrew Pullin e00e89d8f8 Fix #1134: Allow struct member access in unpacked array of packed structs
When accessing a member of a packed struct within an unpacked array
(e.g., `tests[0].a` where `tests` is `test_t tests[0:1]`), the
assertion `base_index.size()+1 == net->packed_dimensions()` would fail
because unpacked indices were incorrectly included in base_index.

The fix:
1. Separate unpacked indices from packed indices before calling
   check_for_struct_members()
2. Compute the word index for unpacked array access using
   normalize_variable_unpacked()
3. Pass the word index to check_for_struct_members(), which now
   creates NetESignal with the proper word selector

This allows expressions like `array_of_structs[i].member` to work
correctly, selecting the right array element before extracting the
packed struct member.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-25 06:30:53 -08:00
Andrew Pullin 54dfd0a702 Fix #521: Allow variable indices in outer packed dimensions
In multi-dimensional packed arrays, allow variable indices in the outer
(prefix) dimensions, not just the final dimension. For example:

  logic [3:0][3:0] a;
  for (int i=0; i<4; i++)
    a[i][3] = 1;  // Previously error, now works

The fix checks if any packed prefix indices are non-constant. If so,
use collapse_array_exprs() to compute the bit offset as an expression
rather than requiring constant indices.

This removes an artificial restriction that had no justification in
the IEEE standard, as noted by maintainers in the GitHub issue.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 17:07:03 -08:00
Andrew Pullin 68633814d1 Fix #1268: Allow variables to be driven by primitive gate outputs
Per IEEE 1800-2017 6.5, variables can be written by one port, including
primitive gate outputs. The code incorrectly disallowed this with the
comment "Gates can never have variable output ports."

Changed elaborate_lnet/elaborate_bi_net calls for gate outputs to pass
true for var_allowed_in_sv, allowing variables as single-driver outputs.

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 17:07:03 -08:00
Andrew Pullin a03033e743 Fix #1267: Allow wire logic connected to uwire port to have multiple drivers
TODO: Decide how resolved net types (tri0/tri1/triand/trior) should interact with uwire in a shared nexus.
2026-01-24 17:07:03 -08:00
Andrew Pullin d540260a20 Fix #1170: Skip $unit scope in tgt-sizer
The tgt-sizer target now skips IVL_SCT_PACKAGE scopes (the SystemVerilog
$unit compilation unit scope) instead of erroring. This allows sizer to
work with -g2012 and other SystemVerilog modes.

Includes regression test: br_gh1170

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 16:47:11 -08:00
Andrew Pullin b6042215ff Fix #670: Allow class methods named same as class
Modified grammar in parse.y to use identifier_name instead of IDENTIFIER
in function/task declaration rules and hierarchy_identifier rule. This
allows TYPE_IDENTIFIER tokens (which class names become after definition)
to be used as method names.

Changes:
- Function declaration rules (lines 1585, 1605, 1631)
- Task declaration rules (lines 2445, 2472, 2501)
- hierarchy_identifier member access (line 4471)

Includes regression test: br_gh670

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-24 16:44:01 -08:00
Andrew Pullin 5b8fac5441 Fix #1112: Report error for invalid $bits argument
When $bits() is called with an undefined identifier, the compiler now
properly reports an error instead of silently returning 0.

The fix checks if the argument expression has type IVL_VT_NO_TYPE after
test_width() processing (indicating the identifier couldn't be resolved),
and triggers elaboration to produce a proper error message.

Includes regression test: br_gh1112

Co-Authored-By: Claude Opus 4.5 <noreply@anthropic.com>
2026-01-23 10:56:13 -08:00
Cary R f040d513a5 Add missing dump.lxt2 2026-01-22 23:05:08 -08:00
Cary R. dfa824c03e
Merge pull request #1259 from oscargus/viewerdocs
Fix issues with waveform viewer documentation and mention Surfer
2026-01-22 22:44:23 -08:00
Cary R. 6b276fa316
Merge pull request #1212 from gian21391/pthread-to-std-thread
Using C++11 threads instead of pthread
2026-01-22 22:42:10 -08:00
Cary R 128d970d60 Remove memory leak when checking if a package has any dumpable items 2026-01-21 20:50:44 -08:00
Cary R 068f33b35a Remove memory leak when multi-bit module path delays fail 2026-01-21 20:50:32 -08:00
Cary R e51ce2a8e9 Cleanup vhdl and most of vvp cppcheck issues 2026-01-19 22:54:45 -08:00
Cary R c3d550e03e More cppcheck cleanup 2026-01-19 19:50:10 -08:00
Cary R 2345c51478 Dosify needs to use CPPCHECK and LDFLAGS 2026-01-13 03:07:30 -08:00
Cary R. 964878382d
Merge pull request #1279 from aelmahmoudy/fix-missing-buildflags
Add CPPFLAGS & LDFLAGS for building version.exe & draw_tt build targets
2026-01-13 02:50:41 -08:00
Cary R 78fa7a5a10 Update program copyright to 2026 2026-01-13 02:04:37 -08:00
Cary R 4d0a277f3b Cleanup the python version of vlog95 2026-01-13 01:25:24 -08:00
Cary R 951ede0922 A bunch more cppcheck cleanup 2026-01-13 01:25:01 -08:00
Cary R 6651df6f2c Update the vlog95 python tests to pass more options 2026-01-08 01:36:30 -08:00
Cary R 385a0fb46a vlog95: remove check for dimensions in array pattern 2026-01-07 23:51:18 -08:00
Cary R 7dbaa67a02 vlgo95: add partial array pattern support and other cleanup 2026-01-07 23:32:16 -08:00
Cary R 918976651a Fixes for vlog95 generation and gold file updates 2026-01-06 23:02:55 -08:00
Cary R c3abb84ce6 Fix compile warning when long and int have the same width 2026-01-05 20:50:35 -08:00
Cary R 5708010a5c Fix warning in sys_fst.c 2026-01-05 19:12:11 -08:00
Cary R c172a0d3a7 More cppcheck cleanup 2026-01-05 18:59:08 -08:00
Cary R e5943047da Add preliminary support for Python vlog95 testing 2025-12-30 19:44:06 -08:00
Cary R aad14df3d7 Switch to std::round() and a common routine for real to uint64_t 2025-12-16 19:52:36 -08:00
Cary R eff75f8209 Update msys2 ARM LDFLAGS to not use msys strtod hack 2025-12-16 19:52:29 -08:00
Cary R 44611f8301 Add missing override in vhdlpp 2025-12-08 20:58:07 -08:00
Cary R 2b45f4c399 Python test cleanup 2025-12-08 20:57:56 -08:00
Cary R 95ffc97f5f Some cppcheck cleanup for vhdlpp 2025-12-08 20:57:44 -08:00
Cary R 4f31fec5c8 Fix any_of() return 2025-11-23 01:58:48 -08:00
Cary R d87dbb08cf cppcheck updates 2025-11-23 01:31:14 -08:00
Cary R 1c6f0e768a Update vvp_reg.py to support strict, force-sv and with-valgrind 2025-11-22 13:31:27 -08:00
Martin Whitaker 1b1def7f79 CI: update test runner to use macos-15-intel.
macos-13 is deprecated and will be unavailable after December 8th.
2025-11-11 22:53:04 +00:00
Martin Whitaker f5708a0322 Add regression test for issue #1286. 2025-11-11 22:00:06 +00:00
Martin Whitaker 28717b4de7 Don't include duplicate nodes in NetEvent objects (issue #1286).
Currently, when a constant bit/part select is found in the implicit
sensitivity list for an always_* construct, it is replaced by the
entire signal. If there is more than one bit/part select from the
same signal, that signal gets added to the list multiple times. This
breaks the algorithm used to detect duplicate events in the nodangle
functor, causing it to erroneously merge non-identical events in some
cases.

The proper fix is to support sensitivity at the bit/part level, as
required by IEEE 1800. But for now, just make sure we only include
the entire signal once, regardless of how many different bit/part
selects we find. Enhance the "sorry" message to report which signals
are contributing excessively to the process sensitivity.
2025-11-11 21:59:31 +00:00
Cary R 3b209301e2 More cppcheck cleanup 2025-11-11 01:22:11 -08:00
Cary R 87d9d0ac74 Cleanup python test script and add support for a suffix 2025-11-11 01:21:46 -08:00
Cary R a7502173d3 Fix MSYS2 builds after cleanup 2025-10-25 11:09:39 -07:00
Cary R d697312cf8 Cleanup ivt casting for cppcheck 2025-10-25 10:54:12 -07:00
Martin Whitaker efb0ea2ec7 Try a different way to disable PLI1 in MSYS2 CLANG CI. 2025-10-25 15:54:50 +01:00
Martin Whitaker 70094ce564 Disable PLI1 support in MSYS2/CLANG CI. 2025-10-25 15:49:11 +01:00
Martin Whitaker e32584f228 Remove spurious space in MSYS2 PKGBUILD. 2025-10-25 15:23:12 +01:00
Martin Whitaker 9bf45a85e2 Fix errors in MSYS2 PKGBUILD. 2025-10-25 15:15:51 +01:00