Hunter Nichols
016604f846
Fixed spacing in golden lib files. Added column mux into analytical model.
2018-10-24 00:16:26 -07:00
Hunter Nichols
62439bdac6
Fixed merge conflicts with sram.py
2018-10-22 17:29:14 -07:00
Hunter Nichols
4f08062268
Added custom 1rw+1r bitcell. Testing are currently failing.
2018-10-22 17:02:21 -07:00
Matt Guthaus
ab7a83b7a5
Remove old setup.tcl and edit one in tech dir
2018-10-20 15:20:15 -07:00
Matt Guthaus
4bf1e206e2
Merge branch 'dev' into supply_routing
2018-10-17 09:47:18 -07:00
Michael Timothy Grimes
e60deddfea
adding 6T transistor size parameters to tech files for use in pbitcell.
2018-10-17 07:28:56 -07:00
Matt Guthaus
4932d83afc
Add design rules classes for complex design rules
2018-10-12 09:44:36 -07:00
Matt Guthaus
823cb04b80
Fix metal4 rules in FreePDK45. Multiport still needs updating.
2018-10-11 09:56:15 -07:00
Matt Guthaus
1ed74cd571
Add minarea_metal4 in freepdk45
2018-10-10 15:33:16 -07:00
Matt Guthaus
c0ffa9cc7b
Clean up magic config file copying. Add warning for missing files.
2018-10-05 08:36:12 -07:00
Matt Guthaus
b3fa6b9d52
Make setup.tcl file a technology file
2018-10-05 08:30:25 -07:00
Matt Guthaus
8d2804b9cb
Supply router working except:
...
Off grid pins. Some pins do now span enough of the routing track and must be patched.
Route track width. Instead of minimum width route, it should be the track width.
2018-09-18 12:57:39 -07:00
Matt Guthaus
60cceab50a
Merge branch 'dev' into supply_routing
2018-09-17 11:34:31 -07:00
Matt Guthaus
f4389bdd8f
Add extra track spacings in some routes.
2018-09-13 14:12:24 -07:00
Matt Guthaus
c9806feb01
Add convert script for mag to gds
2018-09-13 12:55:10 -07:00
Matt Guthaus
63d0523228
Added scn4m_subm.
...
Added scn4m_subm files (instead of scn4me_subm).
Fixed missing cifoutput/cifinput in magic tech file and gds files.
Fixed incorrect M3/via3/M4 design rules.
2018-09-13 12:53:35 -07:00
Matt Guthaus
3539887ee4
Updating ms_flop removal.
...
Updated characterizer for dff.
Added new setup/hold results for dff instead of ms_flop.
Removed ms_flop references in sram-base.
Fixed syntax errors in SCN3ME tech file.
2018-09-13 11:40:24 -07:00
Matt Guthaus
6ab4f5363a
Initial scn4me_subm cells and rules.
2018-09-13 11:03:35 -07:00
Matt Guthaus
f8fc7c12b3
Remove ms_flop and replace with dff. Might break setup_hold tests.
2018-09-13 11:02:28 -07:00
Matt Guthaus
30a77f8527
Convert scn3me_subm tech to lambda rules
2018-09-13 11:01:30 -07:00
Hunter Nichols
5dfa8bc2c6
Fixed known typos of the word transition.
2018-09-10 14:27:26 -07:00
Matt Guthaus
ee05865919
Change SCMOS comment drawing to stipple for easier visibility
2018-09-05 13:43:45 -07:00
Matt Guthaus
93b24d8c85
Merge remote-tracking branch 'origin/dev' into supply_routing
2018-09-05 11:05:41 -07:00
Matt Guthaus
2a27fbc98e
Fix temp directory preservation option.
...
Make labels in freepdk45 replica bitcell lower case.
2018-09-05 10:02:12 -07:00
Matt Guthaus
73e2bd2653
Removed solid display format for comments to allow grid/blockage visibility.
2018-09-04 16:43:59 -07:00
Matt Guthaus
378993ca22
Found rotate bug in transformCoordinate. Cleaned up transFlags.
2018-09-04 16:35:40 -07:00
Matt Guthaus
d721fae5b0
Change labels in replica cell for freepdk45 too
2018-09-04 14:33:14 -07:00
Matt Guthaus
763f1e8dee
Finish renaming replica bitcell and bitline pin names.
2018-09-04 14:03:15 -07:00
Matt Guthaus
4fc9278b73
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
Matt Guthaus
c3bd54696f
Merge branch 'dev' into multiport
2018-08-31 12:56:25 -07:00
Matt Guthaus
3ab0b569cb
Use a .magicrc in the technology directory to read magic tech files
2018-08-30 14:20:41 -07:00
Matt Guthaus
e36452622c
Preserve same order of design rules in each tech file
2018-08-29 16:12:06 -07:00
Michael Timothy Grimes
1f53a82d56
Fixed name for poly_to_polycontact rule. Previously said poly_to_contactpoly in error.
2018-08-29 15:04:17 -07:00
Michael Timothy Grimes
0182309f92
Editting comment on rule 5.5.b in scmos tech file. Adding complimentary rule to freepdk45 tech file.
2018-08-29 14:51:50 -07:00
Matt Guthaus
6e332e581a
Updated to include local magic rules
2018-08-15 09:46:23 -07:00
Matt Guthaus
49bee6a96e
Remove OEB signal since we split DIN/DOUT ports
2018-08-13 14:09:49 -07:00
Matt Guthaus
368ab718d6
Change internal nets of 6T cell and write driver to have useful names for debugging.
2018-07-26 11:26:47 -07:00
Michael Timothy Grimes
8f131ddb2f
commiting changes from most recent pull from dev
2018-05-22 17:30:51 -07:00
Michael Timothy Grimes
d8cb3653e0
changing case of pins in handmade cell_6t for freepdk45
2018-05-22 14:19:26 -07:00
Michael Timothy Grimes
766042fe69
changed case of handmade bitcell pins from upper case to lower case. Made changes in other modules that are affected by this case. Only for SCMOS for this commit
2018-05-22 14:16:51 -07:00
Matt Guthaus
f34c4eb7dc
Convert entire OpenRAM to use python3. Works with Python 3.6.
...
Major changes:
Remove mpmath library and use numpy instead.
Convert bytes to new bytearrays.
Fix class name check for duplicate gds instances.
Add explicit integer conversion from floats.
Fix importlib reload from importlib library
Fix new key/index syntax issues.
Fix filter and map conversion to lists.
Fix deprecation warnings.
Fix Circuits vs Netlist in Magic LVS results.
Fix file closing warnings.
2018-05-14 16:15:45 -07:00
Matt Guthaus
85b7b73903
Flip sense amp y axis
2018-04-23 10:19:26 -07:00
Matt Guthaus
269d553857
Move sense amp to tri gate routing to M3... not ideal.
2018-04-23 09:14:18 -07:00
Matt Guthaus
e1f4c933e1
Flip sense amp and increase pin size
2018-04-20 17:04:26 -07:00
Matt Guthaus
248decd004
Hand edit sense amp to have full pins rather than split from magic gds write.
2018-04-20 15:46:39 -07:00
Matt Guthaus
c75eafe085
Fix some errors
2018-04-18 09:37:33 -07:00
Matt Guthaus
63a8f7c653
Remove m2 from write driver
2018-04-16 16:15:35 -07:00
Matt Guthaus
e2f93a0a99
Fix via overlap DRC error
2018-04-11 15:48:40 -07:00
Matt Guthaus
ef99d13f1b
Fix via overlap DRC error
2018-04-11 15:46:44 -07:00
Matt Guthaus
6640d3491d
Tri gate and array supply to M2 and M3
2018-04-11 15:11:47 -07:00