Bugra Onal
a5728cdecc
Base-verilog
2022-07-28 15:03:41 -07:00
Bugra Onal
769633a459
Base template additions
2022-07-28 15:03:41 -07:00
Bugra Onal
cda3822526
Verilog Template additions
2022-07-28 15:03:41 -07:00
Bugra Onal
28c5406075
Base verilog template init
2022-07-28 15:03:41 -07:00
Bugra Onal
2b1d0bd9f7
Template module done
2022-07-28 15:03:41 -07:00
Bugra Onal
0970095415
Bank select
2022-07-28 15:03:41 -07:00
Bugra Onal
859548f19f
Templatable verilog file
2022-07-28 15:03:41 -07:00
Bugra Onal
f08da6acc5
Fixed globals conflict
2022-07-28 15:03:41 -07:00
Bugra Onal
30f5638b9f
Replaced instances of addr_size with bank_addr
2022-07-28 15:03:41 -07:00
Bugra Onal
a0c6a0ad03
Set write_size default to word_size
2022-07-28 15:03:41 -07:00
Bugra Onal
29079bd6ac
Added conditional sections to template
2022-07-28 15:03:41 -07:00
Bugra Onal
24bb6f8c11
Multibank file generation (messy)
2022-07-28 15:03:37 -07:00
Bugra Onal
6d6063ef4e
modified template engine & sram multibank class
2022-07-21 15:56:29 -07:00
Bugra Onal
a497943be3
Template section clone method
2022-07-21 15:45:50 -07:00
Bugra Onal
b75e1fc499
Template section clone method
2022-07-21 15:45:50 -07:00
Bugra Onal
f2cd611cb8
TEmplate rework
2022-07-21 15:45:50 -07:00
Bugra Onal
988399ba73
Base-verilog
2022-07-21 15:45:50 -07:00
Bugra Onal
06c56c256e
Base template additions
2022-07-21 15:45:50 -07:00
Bugra Onal
3d3a8202fe
Verilog Template additions
2022-07-21 15:45:50 -07:00
Bugra Onal
be9fadf1bb
Base verilog template init
2022-07-21 15:45:50 -07:00
Bugra Onal
874d965edb
Template module done
2022-07-21 15:45:50 -07:00
Bugra Onal
99b517d55a
Bank select
2022-07-21 15:45:50 -07:00
Bugra Onal
54a012b574
Templatable verilog file
2022-07-21 15:45:50 -07:00
mrg
6707a93c3c
Add fudge factor for bitcell array side rail spacings to fix DRC in freepdk45.
2022-07-20 10:27:30 -07:00
mrg
5ad97aa636
Update README and setpaths with new PYTHONPATH
2022-07-20 10:27:10 -07:00
mrg
c406e2a9da
Make macros use same DOCKER_CMD.
2022-07-13 17:19:25 -07:00
mrg
ff7ceaf92d
Fix syntax error for module scope in row/col caps.
2022-07-13 17:19:09 -07:00
mrg
d92c7a634d
Use packages for imports.
...
Must set PYTHONPATH to include OPENRAM_HOME now.
Reorganizes subdirs as packages.
Rewrites unit tests to use packages.
Update README.md with instructions, dependencies etc.
Update sky130 module imports.
Change tech specific package from modules to custom.
2022-07-13 15:55:57 -07:00
mrg
58ea148d47
Add dlxtn latch for open reg file
2022-06-22 09:53:10 -07:00
mrg
f7738c60a3
Don't install SRAM macros.
2022-06-21 13:53:08 -07:00
mrg
ac86ad0e8a
Move pdk installation inside docker to use Magic from docker image.
2022-06-21 12:10:15 -07:00
Jesse Cirimelli-Low
374562f354
rbc substrate issues
2022-06-16 15:17:07 -07:00
mrg
c479915c02
Update colenda with new device sizes.
2022-06-16 11:23:13 -07:00
mrg
dc9ae6cd1a
Increase column width in netgen LVS scripts
2022-06-16 10:30:58 -07:00
Jesse Cirimelli-Low
98fe4c74a4
colend fixes in progress
2022-06-15 22:34:21 -07:00
mrg
69bb6826dc
Remove duplicate mount target
2022-06-14 12:08:56 -07:00
mrg
956fac2cec
Add patch.
2022-06-13 14:13:35 -07:00
mrg
c07f6d195f
Update docker to magic with patch for port first/next.
2022-06-13 14:13:20 -07:00
mrg
f0f2c26e8d
Add both sp and dp tiny test macro.
2022-06-13 14:13:05 -07:00
mrg
cf03454ecf
Don't add wdriver_sel_n pins which aren't used.
2022-06-10 09:18:40 -07:00
mrg
e744ffd6ea
Move mount to shared target in openram.mk
2022-06-09 06:44:23 -07:00
mrg
ef7120c5cd
Change pdk path in root directory mount command.
2022-06-09 06:38:33 -07:00
mrg
d30f05a1ae
Update power layer on li for sky130
2022-06-08 17:19:26 -07:00
mrg
9e3a28237f
Update port data test for sky130 single port
2022-06-08 17:18:53 -07:00
mrg
00ca2d45b6
Extract unique is option not command.
2022-06-08 15:06:06 -07:00
mrg
4814cf6eac
Merge branch 'sky130_fixes' into dev
2022-06-08 14:27:30 -07:00
mrg
280582d4d6
Add missing via in dff array
2022-06-08 14:24:17 -07:00
mrg
76bc4e1fc2
Only do one extract. Flatten transistors since bug fixed in magic.
2022-06-08 14:23:50 -07:00
mrg
910bcf9df3
Update magic to 8.3.310
2022-06-08 14:23:28 -07:00
mrg
ad6633ddca
Update versions of tools. Fix supply bug in predecode.
2022-06-08 13:50:25 -07:00
Bugra Onal
mrg
Jesse Cirimelli-Low