luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
3,623 Commits 4 Branches 63 Tags 78 MiB
Commit Graph

26 Commits

Author SHA1 Message Date
Hunter Nichols 2c9f755a73 Added on resistance functions for pgates, custom cells, and bitcell. 2021-07-12 14:25:37 -07:00
Hunter Nichols 16e658726e When determining bitline names, added a technology check for sky130. 2021-06-16 17:04:02 -07:00
Matt Guthaus 30fc81a1f0 Update copyright year. 2021-01-22 11:23:28 -08:00
mrg 5ee3f4cc66 Many edits. 
Use internal vdd/gnd names.
Refactor getters in bitcell to base class.
Add BIAS signal type.
 2020-11-22 08:24:47 -08:00
mrg 6e51c3cda0 PEP8 cleanup bitcell_base 2020-11-22 07:11:08 -08:00
mrg 1d729e8f02 Move pin name mapping to layout class. 2020-11-16 11:04:03 -08:00
mrg 93e94e26ec Get vdd/gnd from properties if it is defined. 2020-11-16 10:14:37 -08:00
mrg e4bc2c4914 Update property settings with getters/setters 2020-11-14 08:08:42 -08:00
mrg 2f994b8c0a Change custom cells to use set_ports setter 2020-11-14 07:15:27 -08:00
mrg b4342ac527 More cleanup 2020-11-13 17:29:20 -08:00
mrg a2b17a271c Port type order generated on the fly 2020-11-13 16:41:02 -08:00
mrg 01d191da40 clk_pin is redundant in DFFs 2020-11-13 16:23:27 -08:00
mrg 8021430122 Fix pbitcell erros 2020-11-13 15:55:55 -08:00
mrg 29ac541b28 Refactor dynamic cell name to utilize base class 2020-11-03 13:18:46 -08:00
mrg da721a677d Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
mrg fa89b73ef8 PR from mithro + other changable GDS file names 2020-11-02 16:00:16 -08:00
jcirimel 3221b4ec57 update to new metal stack names 2020-07-31 05:27:19 -07:00
Jesse Cirimelli-Low 30604fb093 add multiport support for pex labels 2020-01-28 00:28:55 +00:00
Jesse Cirimelli-Low 1062cbfd7f begin fixes to pbitcell, prepare multibank pex 2020-01-24 10:24:29 +00:00
jcirimel 73691f6054 fix bug in top level bitline label placement 2020-01-21 00:20:52 -08:00
Jesse Cirimelli-Low 5778901cfe pull bitline labels to top level spice 2020-01-20 12:16:30 +00:00
Jesse Cirimelli-Low 2733c3bf3f fix custom bitcell labeling; fix gds scaling in labeling 2020-01-15 09:00:02 +00:00
Jesse Cirimelli-Low 05ab018ffc strip padding character from gds reading 2020-01-07 00:01:32 +00:00
Jesse Cirimelli-Low 3ab99d7f9c update gds library, generalize geometry reverse transform function 2019-12-24 05:01:55 +00:00
jcirimel f0958b0b11 squashed update of pex progress due to timezone error 2019-12-18 03:03:13 -08:00
vagrant 67c768d22c Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00