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OpenRAM
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3,061 Commits 4 Branches 63 Tags 78 MiB
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128 Commits

Author SHA1 Message Date
Matt Guthaus 3407163cf1 Combine adjacent power supply pins finished 2018-10-25 14:25:52 -07:00
Matt Guthaus 0544d02ca2 Refactor router to have pin_groups for pins and router_tech file 2018-10-25 13:36:35 -07:00
Matt Guthaus 88f43cc754 Add the minimum pin enclosure that has DRC correct pin connections. 2018-10-24 16:41:33 -07:00
Matt Guthaus 94e5050513 Move overlap functions to pin_layout 2018-10-24 16:13:07 -07:00
Matt Guthaus f5e68c5c32 Move power pins in hierarchical decoder to be further. Strap rails instead for redundant vias. 2018-10-20 12:54:12 -07:00
Matt Guthaus a1f2a5befe Convert supply tracks to sets for simpler algorithms. 2018-10-20 10:33:10 -07:00
Matt Guthaus 0aad61892b Supply router working except for off by one rail via error 2018-10-19 14:21:03 -07:00
Matt Guthaus e2cfd382b9 Fix print check regression 2018-10-15 13:23:31 -07:00
Matt Guthaus a165446fa7 First implementation of multiple track spacing wide DRCs in routing grid. 2018-10-15 11:25:51 -07:00
Matt Guthaus d855d4f1a6 Moving wide metal spacing to routing grid level 2018-10-15 09:59:16 -07:00
Matt Guthaus ce8c2d983d Update all drc usages to call function type 2018-10-12 14:37:51 -07:00
Matt Guthaus 6bbf66d55b Rewrote pin enclosure code to better address off grid pins. 
Include only maximal pin enclosure shapes.
Add smallest area connector for off grid pins.
Fix decoder to use add_power_pin code.
Change permissions.
 2018-10-10 15:15:58 -07:00
Matt Guthaus 94ab69ea16 Supply router working, perhaps not efficiently though. 2018-10-05 15:57:34 -07:00
Matt Guthaus 12cb02a09f Add partial grids as pins. Add previous paths as routing targets. 2018-10-05 08:39:28 -07:00
Matt Guthaus c3cd76048b Removed prints. Fixed offset for single track enclosure. 2018-10-04 14:44:25 -07:00
Matt Guthaus 985d04d4b5 Cleanup of router. 
Made offsets in geometry snap to grid.
Changed gds_write to use list for visited flag.
Rewrite self.gds each call in case of any changes.
 2018-10-04 14:04:29 -07:00
Matt Guthaus 87502374c5 DRC clean supply grid routing on control logic. 2018-09-20 16:00:13 -07:00
Matt Guthaus fd9ffe30d6 Add layer width options to route object 
Modify router to use track-width routes.
 2018-09-18 15:12:53 -07:00
Matt Guthaus 8d2804b9cb Supply router working except: 
Off grid pins. Some pins do now span enough of the routing track and must be patched.
  Route track width. Instead of minimum width route, it should be the track width.
 2018-09-18 12:57:39 -07:00
Matt Guthaus 849293b95b Converting grid data structures to sets to reduce size. 2018-09-13 09:10:29 -07:00
Matt Guthaus 2d86492d91 Working on methodology of blockages, pins, and routing multiple pins. 2018-09-08 18:55:36 -07:00
Matt Guthaus 96c51f3464 Component shape functions. Find connected pins through overlaps. 2018-09-08 10:05:48 -07:00
Matt Guthaus 69261a0dc1 Routing and connecting rails with vias done. 
Refactored grid path class.
Added direction enum.
Does not route multi-track width wires in signal router.
 2018-09-07 14:46:58 -07:00
Matt Guthaus c2c17a33d2 Horizontal and vertical grid wires done. 2018-09-06 14:30:59 -07:00
Matt Guthaus cd987479b8 Updates to supply routing. 
Rename astar_grid to signal_grid to parallel supply routing.
Wave expansion for supply rails.
Pin addition for supply rails.
 2018-09-06 11:54:14 -07:00
Matt Guthaus 59956f1446 Update signal routing for new blockage and pins. 2018-09-05 16:01:11 -07:00
Matt Guthaus b1c63a6c62 Add inflate blockages and remove pins from blockages. 2018-09-05 11:06:17 -07:00
Matt Guthaus 2a27fbc98e Fix temp directory preservation option. 
Make labels in freepdk45 replica bitcell lower case.
 2018-09-05 10:02:12 -07:00
Matt Guthaus 378993ca22 Found rotate bug in transformCoordinate. Cleaned up transFlags. 2018-09-04 16:35:40 -07:00
Matt Guthaus 334aa53cee Merge branch 'supply_routing' of https://github.com/VLSIDA/PrivateRAM into supply_routing 2018-08-29 15:40:04 -07:00
Matt Guthaus 73289a6090 Clean up GdsMill. Fix rotate bug I introduced in transFlags! 2018-08-29 15:34:45 -07:00
Matt Guthaus 27bb1d2ee7 Rewrite blockage routines in router. Clean up GdsMill code. 2018-08-29 15:34:45 -07:00
Matt Guthaus 5386b7a0f4 Initial refactor of signal and supply router classes. 2018-08-29 15:34:45 -07:00
Matt Guthaus 6220ea6d47 Update router to work with pin_layout structure. 2018-08-29 15:34:45 -07:00
Matt Guthaus 41fba9d27c Add sketch for power grid routing code 2018-08-29 15:34:16 -07:00
Matt Guthaus 95a8688506 Rewrite blockage routines in router. Clean up GdsMill code. 2018-08-28 10:43:45 -07:00
Matt Guthaus 82833ef8f0 Initial refactor of signal and supply router classes. 2018-08-28 10:43:44 -07:00
Matt Guthaus 2ae1e0234d Update router to work with pin_layout structure. 2018-08-28 10:43:44 -07:00
Matt Guthaus ea52af3747 Add sketch for power grid routing code 2018-08-28 10:43:44 -07:00
Matt Guthaus 93389ac723 Add test to reroute after route fails. Disable GDS route debug info unless verbosity is more than 0. 2017-06-07 10:10:18 -07:00
Matt Guthaus d67a7149ab Small fixes to last commit. Remove grid pin debug output. Remove extraneous function calls to add grids. 2017-06-05 15:46:50 -07:00
mguthaus 11bb105545 Mark inaccessible off-grid pins as blocked. Improve on-grid pin analysis, but not quite good enough yet. 2017-06-05 14:42:56 -07:00
Matt Guthaus d31b1862a3 Improved router debugging and return error if unable to route. 2017-05-31 13:59:49 -07:00
Matt Guthaus 0fe104af66 Output labels in GDS for debug 2017-05-25 14:18:12 -07:00
Matt Guthaus 7e44d8762e New algorithm for finding pins. Includes off-grid pin computation. 2017-05-25 10:37:24 -07:00
Matt Guthaus dd9b9d73b8 Round pins smaller. 2017-05-24 16:09:43 -07:00
Matt Guthaus 4c0fb2d7d1 Add space around route end rectangles. Separate pin and blockage conversions. 2017-05-24 15:36:30 -07:00
Matt Guthaus 2936038c90 Adding new pin shape conversion using design rules 2017-05-24 15:17:49 -07:00
Matt Guthaus c3769bd375 Added new scmos test with a bigger design. Added error checks for not found label and not found pin shapes. 2017-05-24 10:50:45 -07:00
mguthaus 68ce3843fe Debugged and tested route by pin location,layer 2017-05-17 15:58:29 -07:00
Matt Guthaus a1496e70a8 Updated gdsMill with new getter routines for router to get by location. Cleaned up vlsiLayout. 2017-05-17 14:27:14 -07:00
mguthaus d85f78a54c Fixed format errors 2017-04-24 13:50:19 -07:00
mguthaus 9b86083524 Fixed rotated via bug. May still have a via-to-via spacing problem. 2017-04-24 13:47:56 -07:00
Matt Guthaus 21f5444f81 Forgot one more view to comment out 2017-04-24 12:14:19 -07:00
Matt Guthaus e960cbe9d6 Clean up output so that it does not print routing grid debug. 2017-04-24 12:13:01 -07:00
Matt Guthaus 388794b1e0 Fix multiple net routing cost reset bug. 2017-04-24 11:28:36 -07:00
Matt Guthaus 96f1eb413e Fixed costs and view grid function so that we have better routes and less expansion. 2017-04-24 10:27:04 -07:00
Matt Guthaus 55ed6212a1 Created route and add_route for layer assigned wires. It will replace add_wire/wire eventually. 2017-04-19 12:41:13 -07:00
mguthaus f51e82e75a Commented unit tests. Added negative coordinate test on test 03. 2017-04-16 08:04:06 -07:00
mguthaus 7cac1a0357 Rename test classes. 2017-04-15 07:49:05 -07:00
mguthaus 2350be8e39 Fixed router test 03. Cleaned up code. 2017-04-14 13:56:09 -07:00
mguthaus 76f338e982 Fixed offgrid pins. Added vias to src/dst pins. Added preferred direction routing costs. 2017-04-14 13:18:35 -07:00
Matthew Guthaus 0766db9e11 Rename unit test files according to test. Modify off-grid pins and blockages. Reorganize router code a bit. 2017-04-12 10:59:04 -07:00
Matt Guthaus 7969ac2846 Non functioning commit 2016-11-20 08:41:49 -08:00
Matt Guthaus 2a17856c69 Add src/dest pin block 2016-11-18 16:16:19 -08:00
Matt Guthaus 62237830cd Fix rounding, offsets, and increase halo 2016-11-18 15:49:07 -08:00
Matt Guthaus da1df1f580 Fix max track width computation 2016-11-18 15:18:36 -08:00
Matt Guthaus 51d7a673bd Improve debug messages. Remove add_inst for via in wire. 2016-11-18 14:10:30 -08:00
Matt Guthaus 70365a8116 Add double grid snap for centerline wires 2016-11-18 12:57:07 -08:00
Matt Guthaus ed5700d698 Fix spelling errors. Allow multiple rectangle pin shapes in router. 2016-11-18 08:55:34 -08:00
Matt Guthaus e215885b2f Update unit tests. 2016-11-17 16:46:41 -08:00
Matt Guthaus b5b1f1753e Rename tests. Make 4 pin test. 2016-11-17 16:33:38 -08:00
Matt Guthaus 717718ed5a Adding checking of rounding and contract path to simplify route wire. 2016-11-17 13:48:27 -08:00
Matt Guthaus 0a9b326f6a Contract path to simplified route 2016-11-17 13:26:03 -08:00
Matt Guthaus aa950c3b21 Fix unit during gds read. Fix blockage and pin rounding bugs. 2016-11-17 11:24:17 -08:00
Matt Guthaus 784bad2e99 Routing multilayer, around blockages. 2016-11-16 16:47:31 -08:00
Matt Guthaus b947989970 Add router data structure, blockage parser, pin parser, initial unit tests 2016-11-16 15:02:07 -08:00
Matt Guthaus cdb101b377 Sketch new router procedures 2016-11-12 08:57:26 -08:00