mirror of https://github.com/VLSIDA/OpenRAM.git
Contract path to simplified route
This commit is contained in:
Matt Guthaus
parent
aa950c3b21
commit
0a9b326f6a
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@ -244,12 +244,9 @@ class layout:
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self.gds = gdsMill.VlsiLayout(units=GDS["unit"])
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reader = gdsMill.Gds2reader(self.gds)
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reader.loadFromFile(self.gds_file)
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# TODO: parse the width/height
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# TODO: parse the pin locations
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else:
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debug.info(3, "creating structure %s" % self.name)
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self.gds = gdsMill.VlsiLayout(
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name=self.name, units=GDS["unit"])
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self.gds = gdsMill.VlsiLayout(name=self.name, units=GDS["unit"])
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def print_gds(self, gds_file=None):
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"""Print the gds file (not the vlsi class) to the terminal """
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@ -24,7 +24,7 @@ class cell:
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b+=b1
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count+=1
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if self.source or self.target:
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if self.source or self.target:
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[r1,g1,b1] = ImageColor.getrgb("Red")
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r+=r1
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g+=g1
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@ -154,11 +154,12 @@ class grid:
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"""
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# expand from the last point
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point = path[-1]
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neighbors = []
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# check z layer for enforced direction routing
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if point.z==0:
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east = point + vector3d(1,0,0)
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west= point + vector3d(-11,0,0)
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west= point + vector3d(-1,0,0)
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if east.x<self.width and not self.map[east].blocked and not self.map[east].visited:
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neighbors.append(east)
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if west.x>=0 and not self.map[west].blocked and not self.map[west].visited:
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@ -62,9 +62,6 @@ class router:
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self.track_width = max(self.horiz_track_width,self.vert_track_width)
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print "Track width:",self.track_width
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# to scale coordinates to tracks
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self.track_factor = [1/self.track_width] * 2
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def create_routing_grid(self):
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@ -117,15 +114,16 @@ class router:
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self.set_source(src)
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self.set_target(dest)
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self.find_blockages()
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# returns the path in tracks
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path = self.rg.route()
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debug.info(0,"Found path. ")
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debug.info(2,str(path))
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return path
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self.set_path(path)
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# convert the path back to absolute units from tracks
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abs_path = self.convert_path_to_units(path)
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debug.info(2,str(abs_path))
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return abs_path
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def add_route(self,start, end, layerstack):
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""" Add a wire route from the start to the end point"""
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pass
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def create_steiner_routes(self,pins):
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"""Find a set of steiner points and then return the list of
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point-to-point routes."""
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@ -163,6 +161,41 @@ class router:
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coordinate += [vector(maxx, maxy)]
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return coordinate
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def get_inertia(self,p0,p1):
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# direction (index) of movement
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if p0.x==p1.x:
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inertia = 1
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elif p0.y==p1.y:
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inertia = 0
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else:
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inertia = 2
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return inertia
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def contract_path(self,path):
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"""
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Remove intermediate points in a rectilinear path.
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"""
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debug.info(0,"Initial path:"+str(path))
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newpath = [path[0]]
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for i in range(len(path)-1):
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if i==0:
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continue
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prev_inertia=self.get_inertia(path[i-1],path[i])
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next_inertia=self.get_inertia(path[i],path[i+1])
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if prev_inertia!=next_inertia:
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newpath.append(path[i])
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else:
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continue
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newpath.append(path[-1])
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debug.info(0,"Final path:"+str(newpath))
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return newpath
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def set_path(self,path):
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debug.info(2,"Set path: " + str(path))
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self.rg.set_path(path)
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def set_source(self,name):
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shape = self.find_pin(name)
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zindex = 0 if self.pin_layers[name]==self.horiz_layer_number else 1
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@ -215,6 +248,24 @@ class router:
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self.write_obstacle(cur_sref.sName, sMirr, sAngle, sxyShift)
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def convert_path_to_units(self,path):
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"""
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Convert a path set of tracks to center line path.
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"""
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# First, simplify the path.
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path = self.contract_path(path)
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newpath = []
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track_factor = [self.track_width] * 2
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for p in path:
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# we can ignore the layers here
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# add_wire will filter out duplicates
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pt = vector(p[0],p[1])
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pt=pt.scale(track_factor)
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pt=snap_to_grid(pt+self.offset)
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newpath.append(pt)
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return newpath
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def convert_to_tracks(self,shape,round_bigger=True):
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"""
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Convert a rectangular shape into track units.
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@ -225,14 +276,18 @@ class router:
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ll = snap_to_grid(ll-self.offset)
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ur = snap_to_grid(ur-self.offset)
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# to scale coordinates to tracks
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track_factor = [1/self.track_width] * 2
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# Always round blockage shapes up.
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if round_bigger:
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ll = ll.scale(self.track_factor).floor()
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ur = ur.scale(self.track_factor).ceil()
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ll = ll.scale(track_factor).floor()
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ur = ur.scale(track_factor).ceil()
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# Always round pin shapes down
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else:
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ll = ll.scale(self.track_factor).round()
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ur = ur.scale(self.track_factor).round()
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ll = ll.scale(track_factor).round()
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ur = ur.scale(track_factor).round()
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return [ll,ur]
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@ -10,46 +10,73 @@ import globals
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import debug
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import calibre
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class no_blockages_test(unittest.TestCase):
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def runTest(self):
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globals.init_openram("config_{0}".format(OPTS.tech_name))
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globals.init_openram("config_{0}".format(OPTS.tech_name))
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import design
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import router
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import wire
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import tech
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#r=router.router("A_to_B_no_blockages.gds")
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#r=router.router("A_to_B_m1m2_blockages.gds")
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#r=router.router("A_to_B_m1m2_same_layer_pins.gds")
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r=router.router("A_to_B_m1m2_diff_layer_pins.gds")
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layer_stack =("metal1","via1","metal2")
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path=r.route(layer_stack,src="A",dest="B")
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# For debug, to view the result as an image
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r.rg.set_path(path)
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r.rg.view()
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OPTS.check_lvsdrc = False
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class gdscell(design.design):
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"""
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A generic GDS design that we can route on.
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"""
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def __init__(self, name):
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#design.design.__init__(self, name)
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debug.info(2, "Create {0} object".format(name))
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self.name = name
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self.gds_file = name + ".gds"
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self.sp_file = name + ".sp"
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design.hierarchy_layout.layout.__init__(self, name)
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design.hierarchy_spice.spice.__init__(self, name)
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class routing(design.design):
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"""
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A generic GDS design that we can route on.
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"""
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def __init__(self, name, gdsname):
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design.design.__init__(self, name)
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debug.info(2, "Create {0} object".format(name))
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#w = wire.wire(layer_stack, path)
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OPTS.check_lvsdrc = True
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#self.local_check(w)
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cell = gdscell(gdsname)
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self.add_inst(name=gdsname,
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mod=cell,
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offset=[0,0])
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self.connect_inst([])
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r=router.router(gdsname+".gds")
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layer_stack =("metal1","via1","metal2")
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path=r.route(layer_stack,src="A",dest="B")
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r.rg.view()
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self.add_wire(layer_stack,path)
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#drc_errors = calibre.run_drc(name, gds_name)
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drc_errors = 1
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r = routing("test1", "A_to_B_no_blockages")
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self.local_check(r)
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r = routing("A_to_B_m1m2_blockages")
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self.local_check(r)
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r = routing("A_to_B_m1m2_same_layer_pins")
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self.local_check(r)
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r = routing("A_to_B_m1m2_diff_layer_pins")
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self.local_check(r)
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# fails if there are any DRC errors on any cells
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self.assertEqual(drc_errors, 0)
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globals.end_openram()
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def local_check(self, w):
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def local_check(self, r):
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tempgds = OPTS.openram_temp + "temp.gds"
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w.gds_write(tempgds)
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self.assertFalse(calibre.run_drc(w.name, tempgds))
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r.gds_write(tempgds)
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self.assertFalse(calibre.run_drc(r.name, tempgds))
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os.remove(tempgds)
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assert(0)
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@ -0,0 +1,3 @@
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.SUBCKT cell
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.ENDS cell
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@ -0,0 +1,3 @@
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.SUBCKT cell
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.ENDS cell
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@ -0,0 +1,3 @@
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.SUBCKT cell
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.ENDS cell
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@ -0,0 +1,3 @@
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.SUBCKT cell
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.ENDS cell
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