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18214 Commits

Author SHA1 Message Date
AdvaySingh1 aea16d3888 Removed -filter_non_trigger_outputs functionality 2026-03-31 10:12:21 -07:00
AdvaySingh1 8aebec79a8 Added -filter_non_trigger_outputs knob 2026-03-27 15:41:44 -07:00
AdvaySingh1 ad6546b05e Revert "Update passes/techmap/abc.cc" 
This reverts commit 20cf9fb461.
 2026-03-27 14:53:38 -07:00
Advay Singh 20cf9fb461
Update passes/techmap/abc.cc 
Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>
 2026-03-27 12:45:57 -07:00
AdvaySingh1 5c94a47298 moved verific to main head 2026-03-26 17:02:57 -07:00
AdvaySingh1 113b3e02ce Removed adding struct partition object file 2026-03-26 16:59:58 -07:00
AdvaySingh1 972e4780c9 Removed extra struct partition pass 2026-03-26 16:58:09 -07:00
AdvaySingh1 f523760b75 merged with main 2026-03-26 16:50:59 -07:00
AdvaySingh1 f42a63941c Added initial clkmerge pass for multiple clock domains 2026-03-26 16:42:27 -07:00
Akash Levy 5376dc27e1 Update Verific for bugfix 2026-03-25 22:49:17 -07:00
Akash Levy 22bfdc23a8
Merge pull request #128 from Silimate/negopt_debug_logs 
adding temp debug logs to fix runtime issue
 2026-03-25 19:07:10 -07:00
Abhinav Tondapu 510ef01b09 adding temp debug logs to fix runtime issue 2026-03-25 16:55:29 -07:00
AdvaySingh1 f84fd46a17 Added test cases for clkmerge and cone_partition passes 2026-03-25 15:06:58 -07:00
AdvaySingh1 92e659f42a Added new port outputs anding the clock domain. TODO: fix if they belong to the same one and there's multiple 2026-03-24 20:00:24 -07:00
AdvaySingh1 f7a9af5252 Make the signal_map flag optional 2026-03-24 14:39:21 -07:00
Akash Levy d99ba91fe7
Merge pull request #126 from Silimate/fix_mem_crash 
Safe parameter extraction in mem_from_cell
 2026-03-23 07:39:16 -04:00
Akash Levy 0ed1f1bfa4 Smallfixes 2026-03-23 03:51:49 -07:00
Akash Levy 91739e79cb Safe parameter extraction in mem_from_cell 2026-03-23 03:30:55 -07:00
AdvaySingh1 b9ba2c3552 Checked out abc to the yosys-experimental branch 2026-03-20 15:05:03 -07:00
AdvaySingh1 f9f31afcb4 Makefile pass changes 2026-03-20 12:42:51 -07:00
AdvaySingh1 2fc0591b2c Added clkmerge pass 2026-03-20 12:42:24 -07:00
AdvaySingh1 e2a641f5a8 Added support for printing the cdc map file 2026-03-20 11:32:06 -07:00
AdvaySingh1 59dd03973e Added printing differnt clock domains in signal map 2026-03-20 10:37:47 -07:00
AdvaySingh1 daf5108434 Added inital cone_parition.cc pass. TODO: check with larger designs 2026-03-19 16:30:11 -07:00
AdvaySingh1 1711da5506 Moved the struct_partition pass to Silimate 2026-03-19 15:06:50 -07:00
AdvaySingh1 522ead01df Added small fixes 2026-03-19 15:04:13 -07:00
Akash Levy fc320a7e8e
Merge pull request #123 from Silimate/accessor_helpers 
adding more fast Cell accessors and small refactoring to reduce code dup
 2026-03-19 17:40:18 -04:00
AdvaySingh1 8536ab69c1 Added -o option for output file in struct_partition 2026-03-19 10:09:11 -07:00
AdvaySingh1 26db947b57 Added zinit 2026-03-19 10:08:52 -07:00
Akash Levy 7771a489e8
Merge pull request #124 from Silimate/sim 
Add debugging code before assertion
 2026-03-19 12:45:49 -04:00
AdvaySingh1 52fad78b40 Removed is_port for non-trigger outputs. TODO: add a flag which does this so POs are only those ones 2026-03-19 09:23:12 -07:00
AdvaySingh1 dc73249d8f Added support for printing the signal map 2026-03-18 16:23:41 -07:00
Stan Lee 8268a79af5 debug before assertion 2026-03-18 14:06:18 -07:00
AdvaySingh1 a3ffc5da30 Added new passes/sat/struct_partition.cc pass to propagate the ports out 2026-03-18 11:53:47 -07:00
Stan Lee f9d099503a Merge branch 'main' of github.com:silimate/yosys into sim 2026-03-17 11:44:18 -07:00
Stan Lee a45eaad9a7 Merge branch 'sim' of github.com:silimate/yosys into sim 2026-03-17 11:44:11 -07:00
Akash Levy 00e67a30d0
Merge pull request #121 from Silimate/autoscope 
dump the number of scopes/signals in the search space
 2026-03-16 13:33:40 -07:00
Stan Lee e5d3bb954e correction 2026-03-16 12:05:27 -07:00
tondapusili 29b182fd9b adding more fast Cell accessors and small refactoring to reduce code dup 2026-03-16 10:47:54 -07:00
Akash Levy 521b1db5ee
Merge pull request #122 from Silimate/optimize_cell_accessors 
rtlil: add fast Cell accessors and SigSpec::const_ratio()
 2026-03-13 16:45:26 -07:00
AdvaySingh1 aff1836869 Abc printing to normal file 2026-03-13 16:40:23 -07:00
AdvaySingh1 11af3b5872 Added abc logs 2026-03-13 16:37:05 -07:00
AdvaySingh1 8006d148de New abc 2026-03-13 16:08:10 -07:00
tondapusili 5d25ae4db6 rtlil: add fast Cell accessors and SigSpec::const_ratio() 2026-03-13 15:56:55 -07:00
Stan Lee bcf71dea85 dump the number of scopes/signals in the search space 2026-03-13 11:15:46 -07:00
Akash Levy 168d64ab19
Merge pull request #120 from Silimate/is_mostly_const_param 
rtlil: parameterize SigSpec::is_mostly_const
 2026-03-06 18:37:18 -08:00
Akash Levy 7e6f82ad4d
Merge pull request #119 from Silimate/autoscope 
Autoscope Improvement
 2026-03-06 16:19:57 -08:00
tondapusili e394197bc5 rtlil: parameterize SigSpec::is_mostly_const 2026-03-06 15:51:58 -08:00
Stan Lee b7984f12f8 greptile 2026-03-06 12:19:17 -08:00
AdvaySingh1 db039c5987 Added Makefile with passed required for SAT 2026-03-06 11:41:33 -08:00