Version bump

Signed-off-by: Wilson Snyder <[email protected]>

.clang-format

@@ -0,0 +1,115 @@
+---
+Language:        Cpp
+# BasedOnStyle:  LLVM
+AccessModifierOffset: -4
+AlignAfterOpenBracket: Align
+AlignConsecutiveAssignments: false
+AlignConsecutiveDeclarations: false
+AlignEscapedNewlines: DontAlign
+AlignOperands:   true
+AlignTrailingComments: false
+AllowAllParametersOfDeclarationOnNextLine: true
+AllowShortBlocksOnASingleLine: true
+AllowShortCaseLabelsOnASingleLine: true
+AllowShortFunctionsOnASingleLine: All
+AllowShortIfStatementsOnASingleLine: true
+AllowShortLoopsOnASingleLine: false
+AlwaysBreakAfterDefinitionReturnType: None
+AlwaysBreakAfterReturnType: None
+AlwaysBreakBeforeMultilineStrings: false
+AlwaysBreakTemplateDeclarations: false
+BinPackArguments: true
+BinPackParameters: true
+BraceWrapping:   
+  AfterClass:      false
+  AfterControlStatement: false
+  AfterEnum:       false
+  AfterFunction:   false
+  AfterNamespace:  false
+  AfterObjCDeclaration: false
+  AfterStruct:     false
+  AfterUnion:      false
+  AfterExternBlock: false
+  BeforeCatch:     false
+  BeforeElse:      false
+  IndentBraces:    false
+  SplitEmptyFunction: true
+  SplitEmptyRecord: true
+  SplitEmptyNamespace: true
+BreakBeforeBinaryOperators: All
+BreakBeforeBraces: Attach
+BreakBeforeInheritanceComma: false
+BreakBeforeTernaryOperators: true
+BreakConstructorInitializersBeforeComma: false
+BreakConstructorInitializers: BeforeComma
+BreakAfterJavaFieldAnnotations: false
+BreakStringLiterals: true
+ColumnLimit:     99
+CommentPragmas:  '^ IWYU pragma:'
+CompactNamespaces: false
+ConstructorInitializerAllOnOneLineOrOnePerLine: false
+ConstructorInitializerIndentWidth: 4
+ContinuationIndentWidth: 4
+Cpp11BracedListStyle: true
+DerivePointerAlignment: false
+DisableFormat:   false
+ExperimentalAutoDetectBinPacking: false
+FixNamespaceComments: true
+ForEachMacros:   
+  - foreach
+  - Q_FOREACH
+  - BOOST_FOREACH
+IncludeBlocks:   Preserve
+IncludeCategories: 
+  - Regex:           '^"(llvm|llvm-c|clang|clang-c)/'
+    Priority:        2
+  - Regex:           '^(<|"(gtest|gmock|isl|json)/)'
+    Priority:        3
+  - Regex:           '.*'
+    Priority:        1
+IncludeIsMainRegex: '(Test)?$'
+IndentCaseLabels: false
+IndentPPDirectives: None
+IndentWidth:     4
+IndentWrappedFunctionNames: false
+JavaScriptQuotes: Leave
+JavaScriptWrapImports: true
+KeepEmptyLinesAtTheStartOfBlocks: true
+MacroBlockBegin: ''
+MacroBlockEnd:   ''
+MaxEmptyLinesToKeep: 1
+NamespaceIndentation: None
+ObjCBlockIndentWidth: 2
+ObjCSpaceAfterProperty: false
+ObjCSpaceBeforeProtocolList: true
+PenaltyBreakAssignment: 2
+PenaltyBreakBeforeFirstCallParameter: 19
+PenaltyBreakComment: 300
+PenaltyBreakFirstLessLess: 120
+PenaltyBreakString: 1000
+PenaltyExcessCharacter: 1000000
+PenaltyReturnTypeOnItsOwnLine: 60
+PointerAlignment: Left
+RawStringFormats: 
+  - Delimiter:       pb
+    Language:        TextProto
+    BasedOnStyle:    google
+ReflowComments:  true
+SortIncludes:    false
+SortUsingDeclarations: true
+SpaceAfterCStyleCast: false
+SpaceAfterTemplateKeyword: true
+SpaceBeforeAssignmentOperators: true
+SpaceBeforeParens: ControlStatements
+SpaceInEmptyParentheses: false
+SpacesBeforeTrailingComments: 2
+SpacesInAngles:  false
+SpacesInContainerLiterals: true
+SpacesInCStyleCastParentheses: false
+SpacesInParentheses: false
+SpacesInSquareBrackets: false
+Standard:        Cpp11
+TabWidth:        8
+UseTab:          Never
+...
+

.clang-tidy

@@ -2,7 +2,7 @@ Checks:          'clang-diagnostic-*,clang-analyzer-*,*,-modernize*,-hicpp*,-and
 WarningsAsErrors: ''
 HeaderFilterRegex: ''
 FormatStyle:     none
-CheckOptions:    
+CheckOptions:
   - key:             google-readability-braces-around-statements.ShortStatementLines
     value:           '2'
   - key:             google-readability-namespace-comments.SpacesBeforeComments

.codacy.yml

@@ -0,0 +1,4 @@
+---
+exclude_paths:
+  - 'ci/build_verilator.sh'
+  - 'include/vltstd/**'

.gitignore

@@ -30,4 +30,6 @@ verilator.txt
 verilator_bin*
 verilator_coverage_bin*
 verilator.pc
+verilator-config.cmake
+verilator-config-version.cmake
 **/obj_dir/*

.travis.yml

@@ -0,0 +1,161 @@
+# DESCRIPTION: Travis-CI config
+#
+# Copyright 2003-2019 by Todd Strader. Verilator is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU Lesser
+# General Public License Version 3 or the Perl Artistic License Version 2.0.
+
+language: cpp
+
+cache: ccache
+
+env:
+  global:
+    - VERILATOR_CACHE=$HOME/verilator_cache
+    - VERILATOR_ROOT=$PWD
+    - VERILATOR_NUM_JOBS=$((`nproc` + 1))
+    - VERILATOR_CONFIG_FLAGS="--enable-maintainer-mode --enable-longtests"
+    - OBJCACHE=ccache
+
+cache:
+  directories:
+    - $VERILATOR_CACHE
+
+before_install:
+# Perl modules needed for testing
+  - yes yes | sudo cpan -fi Unix::Processors Parallel::Forker Bit::Vector
+  - sudo apt-get install gdb
+before_script:
+  - bash -x ci/build_verilator.sh
+after_script:
+  - ccache -s
+
+stages:
+  - "Build Verilator"
+  - test
+
+jobs:
+  include:
+    - if: type != cron
+      stage: "Build Verilator"
+      name: Build Verilator
+      os: linux
+      compiler: gcc
+      script: echo "Done building Verilator"
+# Non-cron build will just run on whatever linux flavor we get
+    - if: type != cron
+      stage: test
+      name: Dist test
+      os: linux
+      compiler: gcc
+      script: ci/test.sh dist
+    - if: type != cron
+      stage: test
+      name: Vlt test
+      os: linux
+      compiler: gcc
+      script: ci/test.sh vlt
+    - if: type != cron
+      stage: test
+      name: Vltmt test
+      os: linux
+      compiler: gcc
+      script: ci/test.sh vltmt
+# Cron builds try different OS/compiler combinations
+    - if: type = cron
+      stage: "Build Verilator"
+      name: Build xenial gcc Verilator
+      os: xenial
+      compiler: gcc
+      script: echo "Done building Verilator"
+    - if: type = cron
+      stage: test
+      name: Xenail gcc dist test
+      os: xenial
+      compiler: gcc
+      script: ci/test.sh dist
+    - if: type = cron
+      stage: test
+      name: Xenail gcc vlt test
+      os: xenial
+      compiler: gcc
+      script: ci/test.sh vlt
+    - if: type = cron
+      stage: test
+      name: Xenail gcc vltmt test
+      os: xenial
+      compiler: gcc
+      script: ci/test.sh vltmt
+    - if: type = cron
+      stage: "Build Verilator"
+      name: Build xenial clang Verilator
+      os: xenial
+      compiler: clang
+      script: echo "Done building Verilator"
+    - if: type = cron
+      stage: test
+      name: Xenail clang dist test
+      os: xenial
+      compiler: clang
+      script: ci/test.sh dist
+    - if: type = cron
+      stage: test
+      name: Xenail clang vlt test
+      os: xenial
+      compiler: clang
+      script: ci/test.sh vlt
+    - if: type = cron
+      stage: test
+      name: Xenail clang vltmt test
+      os: xenial
+      compiler: clang
+      script: ci/test.sh vltmt
+#    - if: type = cron
+#      stage: "Build Verilator"
+#      name: Build OSX gcc Verilator
+#      os: osx
+#      compiler: gcc
+#      script: echo "Done building Verilator"
+#    - if: type = cron
+#      stage: test
+#      name: OSX gcc dist test
+#      os: osx
+#      compiler: gcc
+#      script: ci/test.sh dist
+#    - if: type = cron
+#      stage: test
+#      name: OSX gcc vlt test
+#      os: osx
+#      os: osx
+#      compiler: gcc
+#      script: ci/test.sh vlt
+#    - if: type = cron
+#      stage: test
+#      name: OSX gcc vltmt test
+#      os: osx
+#      os: osx
+#      compiler: gcc
+#      script: ci/test.sh vltmt
+    - if: type = cron
+      stage: "Build Verilator"
+      name: Build trusty gcc Verilator
+      os: trusty
+      compiler: gcc
+      script: echo "Done building Verilator"
+    - if: type = cron
+      stage: test
+      name: Trusty gcc dist test
+      os: trusty
+      compiler: gcc
+      script: ci/test.sh dist
+    - if: type = cron
+      stage: test
+      name: Trusty gcc vlt test
+      os: trusty
+      compiler: gcc
+      script: ci/test.sh vlt
+    - if: type = cron
+      stage: test
+      os: trusty
+      name: Trusty gcc vltmt test
+      compiler: gcc
+      script: ci/test.sh vltmt

Changes

@@ -2,7 +2,101 @@ Revision history for Verilator
 
 The contributors that suggested a given feature are shown in []. Thanks!
 
-* Verilator 4.016 2016-06-16
+* Verilator 4.022 2019-11-10
+
+**    Add --protect-lib, bug1490. [Todd Strader]
+
+**    Add cmake support, bug1363. [Patrick Stewart]
+
+***   Examples have been renamed.
+
+***   Add --protect-ids to obscure information in objects, bug1521. [Todd Strader]
+
+***   Add --trace-coverage.
+
+***   Add --xml-output.
+
+***   Support multithreading on Windows. [Patrick Stewart]
+
+***   Suppress 'command failed' on normal errors.
+
+***   Support some unpacked arrays in parameters, bug1315. [Marshal Qiao]
+
+***   Add interface port visibility in traces, bug1594. [Todd Strader]
+
+****  Increase case duplicate/incomplete to 16 bit tables, bug1545. [Yossi Nivin]
+
+****  Support quoted arguments in -f files, bug1535. [Yves Mathieu]
+
+****  Optimize modulus by power-of-two constants, and masked conditionals.
+
+****  Fix detecting missing reg types, bug1570. [Jacko Dirks]
+
+****  Fix multithreaded yield behavior when no work.  [Patrick Stewart]
+
+****  Fix bad-syntax crashes, bug1548, bug1550-1553, bug1557-1560, bug1563,
+      bug1573-1577, bug1579, bug1582-1591. [Eric Rippey]
+
+****  Fix false CMPCONST/UNSIGNED warnings on "inside", bug1581. [Mitch Hayenga]
+
+
+* Verilator 4.020 2019-10-06
+
+***   Support $fseek, $ftell, $frewind, bug1496. [Howard Su]
+
+***   Add --public-flat-rw, bug1511. [Stefan Wallentowitz]
+
+***   Support vpiModule, bug1469. [Stefan Wallentowitz]
+
+****  Make Syms file honor --output-split-cfuncs, bug1499. [Todd Strader]
+
+****  Fix make test with no VERILATOR_ROOT, bug1494. [Ahmed El-Mahmoudy]
+
+****  Fix error on multidimensional cells, bug1505. [Anderson Ignacio Da Silva]
+
+****  Fix config_rev revision detection on old versions.
+
+****  Fix false warning on backward indexing, bug1507. [Hao Shi]
+
+****  Fix vpiType accessor, bug1509, bug1510. [Stefan Wallentowitz]
+
+****  Fix ugly error on interface misuse, bug1525. [Bogdan Vukobratovic]
+
+****  Fix misc bad-syntax crashes, bug1529-bug1533. [Eric Rippey]
+
+****  Fix case statements with strings, bug1536. [Philipp Wagner]
+
+
+* Verilator 4.018 2019-08-29
+
+**    When showing an error, show source code and offer suggestions of replacements.
+
+**    When showing an error, show the instance location, bug1305. [Todd Strader]
+
+***   Add --rr, bug1481. [Todd Strader]
+
+***   Change MULTITOP to warning to help linting, see manual.
+
+***   Add XSim support to driver.pl, bug1493. [Todd Strader]
+
+****  Show included-from filenames in warnings, bug1439. [Todd Strader]
+
+****  Fix elaboration time errors, bug1429. [Udi Finkelstein]
+
+****  Fix not reporting some duplicate signals/ports, bug1462. [Peter Gerst]
+
+****  Fix not in array context on non-power-of-two slices, msg2946. [Yu Sheng Lin]
+
+****  Fix system compile flags injection. [Gianfranco Costamagna]
+
+****  Fix enum values not being sized based on parent, bug1442. [Dan Petrisko]
+
+****  Fix internal error on gate optimization of assign, bug1475. [Oyvind Harboe]
+
+****  Add --dpi-hdr-only, bug1491. [Todd Strader]
+
+
+* Verilator 4.016 2019-06-16
 
 ***   Add --quiet-exit, bug1436. [Todd Strader]
 
@@ -3282,7 +3376,7 @@ of input ports exists for tracing.
 * Verilator 0.0 1994/7/8
 
 **** First code written.
-
+
 ----------------------------------------------------------------------
 
 This uses outline mode in Emacs.  See C-h m [M-x describe-mode].

MANIFEST.SKIP

@@ -1,3 +1,4 @@
+\.clang-format
 \.clang-tidy
 \.git/
 \.git$
@@ -14,6 +15,9 @@
 .*\.key
 .*\.vcd
 .*\.1
+\.codacy\.yml
+\.travis\.yml
+/build/
 /obj_dir/
 /obj_dbg/
 /obj_nc/
@@ -26,10 +30,14 @@
 /cov_work/
 /logs/
 ^Makefile$
+README.html
 bin/verilator_bin.*
 bin/verilator_coverage_bin.*
+docs/.*\.html$
 docs/Makefile$
 docs/doxygen-doc/.*
+examples/xml_py/copied/
+examples/xml_py/graph.*
 src/Makefile$
 src/Makefile_obj$
 include/verilated.mk$
@@ -38,6 +46,8 @@ config.cache$
 config.status$
 verilator\.log
 verilator\.tex
+verilator-config.cmake$
+verilator-config-version.cmake$
 verilator.pc$
 verilator_bin.*
 verilator_coverage_bin.*
@@ -45,10 +55,11 @@ verilator_coverage_bin.*
 ncverilog.history
 autom4te\.cache/
 nodist/
+ci/
 /simv$
 /simv.daidir/
 /vc_hdrs.h$
 /csrc/
-obj_dir/.*
+obj_dir.*
 TAGS
 .*~

Makefile.in

@@ -3,7 +3,7 @@
 #
 # This file is part of Verilator.
 #
-# Code available from: http://www.veripool.org/verilator
+# Code available from: https://verilator.org
 #
 #*****************************************************************************
 #
@@ -83,7 +83,7 @@ infodir = @infodir@
 pkgdatadir = @pkgdatadir@
 
 # Directory in which to install pkgconfig file
-# Generall ${prefix}/share/pkgconfig
+# Generally ${prefix}/share/pkgconfig
 pkgconfigdir = @pkgconfigdir@
 
 # Directory in which to install data across multiple architectures
@@ -104,12 +104,20 @@ PACKAGE_VERSION = @PACKAGE_VERSION@
 SHELL = /bin/sh
 
 SUBDIRS = src test_regress \
-	examples/hello_world_c  examples/hello_world_sc \
-	examples/tracing_c  examples/tracing_sc \
+	examples/cmake_hello_c \
+	examples/cmake_hello_sc \
+	examples/cmake_tracing_c \
+	examples/cmake_tracing_sc \
+	examples/cmake_protect_lib \
+	examples/make_hello_c \
+	examples/make_hello_sc \
+	examples/make_tracing_c \
+	examples/make_tracing_sc \
+	examples/make_protect_lib \
 
-INFOS = README README.html README.pdf internals.txt internals.html \
-        internals.pdf verilator.txt verilator.html verilator.pdf \
-	$(VL_INST_MAN_FILES)
+INFOS = verilator.txt verilator.html verilator.pdf
+
+INFOS_OLD = README README.html README.pdf
 
 # Files that can be generated, but should be up to date for a distribution.
 DISTDEP = info Makefile
@@ -120,6 +128,9 @@ DISTFILES_INC = $(INFOS) .gitignore \
 	Changes \
 	LICENSE \
 	MANIFEST.SKIP \
+	README.adoc \
+	verilator-config.cmake.in \
+	verilator-config-version.cmake.in \
 	bin/verilator \
 	bin/verilator_coverage \
 	bin/verilator_difftree \
@@ -127,11 +138,14 @@ DISTFILES_INC = $(INFOS) .gitignore \
 	bin/verilator_includer \
 	bin/verilator_profcfunc \
 	docs/.gitignore \
+	docs/CONTRIBUTING.adoc \
 	docs/CONTRIBUTORS \
 	docs/Makefile.in \
 	docs/TODO \
 	docs/doxygen-mainpage \
 	docs/doxygen.config \
+	docs/install.adoc \
+	docs/internals.adoc \
 	docs/verilator_logo.png \
 	install-sh configure *.pod \
 	include/*.[chv]* \
@@ -146,9 +160,15 @@ DISTFILES_INC = $(INFOS) .gitignore \
 	src/.gdbinit \
 	src/*.pl src/*.pod \
 	examples/*/.*ignore examples/*/Makefile* \
-	examples/*/*.[chv]* examples/*/*.pl \
+	examples/*/*.[chv]* examples/*/vl_* \
+	examples/*/CMakeLists.txt \
 	test_*/.*ignore test_*/Makefile* test_*/*.cpp \
 	test_*/*.pl test_*/*.v test_*/*.vc test_*/*.vh \
+	test_regress/*.pl \
+	test_regress/Makefile \
+	test_regress/Makefile_obj \
+	test_regress/input.vc \
+	test_regress/CMakeLists.txt \
 	test_regress/t/t*/*.sv* \
 	test_regress/t/t*/*.v* \
 	test_regress/t/t*/*/*.sv* \
@@ -180,12 +200,21 @@ INST_PROJ_BIN_FILES = \
 
 DISTFILES := $(DISTFILES_INC)
 
+EXAMPLES_FIRST = \
+	examples/make_hello_c \
+	examples/make_hello_sc \
+
+EXAMPLES = $(EXAMPLES_FIRST) $(filter-out $(EXAMPLES_FIRST), $(sort $(wildcard examples/*)))
+
 ifeq ($(OBJCACHE_JOBS),)
 ifneq ($(OBJCACHE_HOSTS),)
 export OBJCACHE_JOBS := -j $(shell objcache --jobs "$(OBJCACHE_HOSTS)")
 endif
 endif
 
+# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
+VL_INST_MAN_FILES = verilator.1 verilator_coverage.1 verilator_gantt.1 verilator_profcfunc.1
+
 default: all
 all: all_nomsg msg_test
 all_nomsg: verilator_exe $(VL_INST_MAN_FILES)
@@ -208,7 +237,9 @@ msg_test: all_nomsg
 
 .PHONY: test
 ifeq ($(CFG_WITH_LONGTESTS),yes)	# Local... Else don't burden users
-test: smoke-test examples test_regress
+test: smoke-test test_regress
+# examples is part of test_regress's test_regress/t/t_a2_examples.pl
+# (because that allows it to run in parallel with other test_regress's)
 else
 test: smoke-test examples
 endif
@@ -219,14 +250,14 @@ endif
 	@echo
 
 smoke-test: all_nomsg
-	test_regress/t/t_a_first_cc.pl
-	test_regress/t/t_a_first_sc.pl
+	test_regress/t/t_a1_first_cc.pl
+	test_regress/t/t_a2_first_sc.pl
 
 test_regress: all_nomsg
 	$(MAKE) -C test_regress
 
 examples: all_nomsg
-	for p in examples/* ; do \
+	for p in $(EXAMPLES) ; do \
 	  $(MAKE) -C $$p VERILATOR_ROOT=`pwd` || exit 10; \
 	done
 
@@ -253,47 +284,12 @@ verilator.pdf: ${srcdir}/bin/verilator Makefile $(POD2LATEXFIX)
 	pdflatex verilator.tex
 	-rm -f verilator.toc verilator.aux verilator.idx verilator.out
 
-README: README.pod
-	-rm -f $@
-	$(POD2TEXT) --loose $< > $@
-
-README.html: README.pod
-	pod2html $< >$@
-
-# PDF needs DIST variables; but having configure.ac as dependency isn't detected
-README.pdf: README.pod Makefile $(POD2LATEXFIX)
-	pod2latex --full --out README.tex $<
-	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) README File" "${DISTDATE}" < README.tex > README2.tex
-	mv README2.tex README.tex
-	pdflatex README.tex
-	pdflatex README.tex
-	-rm -f README.toc README.aux README.idx README.out
-
-internals.txt: internals.pod
-	-rm -f $@
-	$(POD2TEXT) --loose $< > $@
-
-internals.html: internals.pod
-	pod2html $< >$@
-
-# PDF needs DIST variables; but having configure.ac as dependency isn't detected
-internals.pdf: internals.pod Makefile $(POD2LATEXFIX)
-	pod2latex --full --out internals.tex $<
-	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) Internals Manual" "${DISTDATE}" < internals.tex > internals2.tex
-	mv internals2.tex internals.tex
-	pdflatex internals.tex
-	pdflatex internals.tex
-	-rm -f internals.toc internals.aux internals.idx internals.out
-
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg verilator_coverage_bin_dbg \
 	verilator_coverage verilator_gantt verilator_includer verilator_profcfunc
 # Some scripts go into both the search path and pkgdatadir,
 # so they can be found by the user, and under $VERILATOR_ROOT.
 
-# See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
-VL_INST_MAN_FILES = verilator.1 verilator_coverage.1 verilator_gantt.1 verilator_profcfunc.1
-
 VL_INST_INC_BLDDIR_FILES = \
 	include/verilated_config.h \
 	include/verilated.mk \
@@ -306,6 +302,7 @@ VL_INST_INC_SRCDIR_FILES = \
 
 VL_INST_DATA_SRCDIR_FILES = \
 	examples/*/*.[chv]*  examples/*/Makefile* \
+	examples/*/CMakeLists.txt
 
 installbin:
 	$(MKINSTALLDIRS) $(DESTDIR)$(bindir)
@@ -337,16 +334,24 @@ installdata:
 	; for p in $(VL_INST_INC_SRCDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
-	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/hello_world_c
-	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/hello_world_sc
-	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/tracing_c
-	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/tracing_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_hello_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_hello_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_tracing_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_tracing_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/make_protect_lib
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
+	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
 	cd $(srcdir) \
 	; for p in $(VL_INST_DATA_SRCDIR_FILES) ; do \
 	  $(INSTALL_DATA) $$p $(DESTDIR)$(pkgdatadir)/$$p; \
 	done
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgconfigdir)
 	$(INSTALL_DATA) verilator.pc $(DESTDIR)$(pkgconfigdir)
+	$(INSTALL_DATA) verilator-config.cmake $(DESTDIR)$(pkgdatadir)
+	$(INSTALL_DATA) verilator-config-version.cmake $(DESTDIR)$(pkgdatadir)
 
 # We don't trust rm -rf, so rmdir instead as it will fail if user put in other files
 uninstall:
@@ -357,15 +362,24 @@ uninstall:
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_INC_SRCDIR_FILES)
 	-cd $(DESTDIR)$(pkgdatadir) && rm -f $(VL_INST_DATA_SRCDIR_FILES)
 	-rm $(DESTDIR)$(pkgconfigdir)/verilator.pc
+	-rm $(DESTDIR)$(pkgdatadir)/verilator-config.cmake
+	-rm $(DESTDIR)$(pkgdatadir)/verilator-config-version.cmake
 	-rmdir $(DESTDIR)$(pkgdatadir)/bin
 	-rmdir $(DESTDIR)$(pkgdatadir)/include/gtkwave
 	-rmdir $(DESTDIR)$(pkgdatadir)/include/vltstd
 	-rmdir $(DESTDIR)$(pkgdatadir)/include
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/hello_world_c
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/hello_world_sc
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/tracing_c
-	-rmdir $(DESTDIR)$(pkgdatadir)/examples/tracing_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_hello_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_hello_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_tracing_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_tracing_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/make_protect_lib
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_hello_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_c
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_tracing_sc
+	-rmdir $(DESTDIR)$(pkgdatadir)/examples/cmake_protect_lib
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples
+	-rmdir $(DESTDIR)$(pkgdatadir)/cmake
 	-rmdir $(DESTDIR)$(pkgdatadir)
 	-rmdir $(DESTDIR)$(pkgconfigdir)
 
@@ -377,34 +391,9 @@ install-here: installman ftp
 ifeq ($(VERILATOR_AUTHOR_SITE),1)	# Local... Else don't burden users
 DISTNAMEREV = $(shell sed -e '/DTVERSION/!d' -e 's/.*verilator_\([^"]*\).*/\1/' -e q ${srcdir}/src/config_rev.h)
 
-DIRPROJECT := $(shell project_dir --project)
 VERILATOR_CAD_DIR = $(CAD_DIR)/verilator/$(DISTNAMEREV)/$(DIRPROJECT_ARCH)
 INST_PROJ_CVS = cp_if_cvs_diff
 
-install-project: dist
-	@echo "Install-project to $(DIRPROJECT)"
-	strip bin/verilator_bin*
-	strip bin/verilator_coverage_bin*
-	$(MAKE) install-project-quick
-	for p in $(VL_INST_MAN_FILES) ; do \
-	  $(INSTALL_DATA) $$p $(DIRPROJECT_PREFIX)/man/man1/$$p; \
-	done
-	$(INST_PROJ_CVS) $(DISTNAME).tgz $(DIRPROJECT)/hw/utils/verilator/verilator.tgz
-	rm $(DISTNAME).tgz
-
-install-project-quick:
-ifeq ($(CFG_WITH_DEFENV),yes)
-	@echo "%Error: Reconfigure with './configure --disable-defenv' to avoid hardcoded paths."
-	false
-endif
-	@echo "Install-project-quick (no strip) to $(DIRPROJECT)"
-	for p in $(INST_PROJ_FILES) ; do \
-	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p; \
-	done
-	for p in $(INST_PROJ_BIN_FILES) ; do \
-	  $(INST_PROJ_CVS) $$p $(DIRPROJECT)/hw/utils/verilator/$$p-$(DIRPROJECT_ARCH); \
-	done
-
 install-cadtools: dist
 	@echo "Install-project to $(CAD_DIR)"
 	strip bin/verilator_bin*
@@ -445,7 +434,8 @@ CPPCHECK_H = $(wildcard \
 	$(srcdir)/src/*.h )
 CPPCHECK = src/cppcheck_filtered
 CPPCHECK_FLAGS = --enable=all --inline-suppr \
-	--suppress=unusedScopedObject --suppress=cstyleCast --suppress=useInitializationList
+	--suppress=unusedScopedObject --suppress=cstyleCast --suppress=useInitializationList \
+	--suppress=nullPointerRedundantCheck
 CPPCHECK_FLAGS += --xml
 CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CPPCHECK_CPP))
 CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
@@ -482,7 +472,7 @@ install-msg:
 	@echo "Installed examples to $(DESTDIR)$(pkgdatadir)/examples"
 	@echo
 	@echo "For documentation see 'man verilator' or 'verilator --help'"
-	@echo "For forums and to report bugs see http://www.veripool.org/verilator"
+	@echo "For forums and to report bugs see https://verilator.org"
 	@echo
 
 IN_WILD := ${srcdir}/*.in ${srcdir}/*/*.in
@@ -521,11 +511,12 @@ clean mostlyclean distclean maintainer-clean::
 	rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs *.idx
 	rm -f *.ev *.evs *.ov *.ovs *.cv *.cvs *.ma *.mas
 	rm -f *.tex
+	rm -rf examples/*/obj_dir* examples/*/logs
 	rm -rf test_*/obj_dir
-	rm -rf examples/*/obj_dir examples/*/logs
+	rm -rf nodist/obj_dir
 
 distclean maintainer-clean::
-	rm -f *.info* *.1 $(INFOS)
+	rm -f *.info* *.1 $(INFOS) $(INFOS_OLD) $(VL_INST_MAN_FILES)
 	rm -f Makefile config.status config.cache config.log TAGS
 	rm -f verilator_bin* verilator_coverage_bin*
 	rm -f bin/verilator_bin* bin/verilator_coverage_bin*

README.adoc

@@ -0,0 +1,140 @@
+// Github doesn't render images unless absolute URL
+:!toc:
+
+ifdef::env-github[]
+image:https://img.shields.io/badge/License-LGPL%20v3-blue.svg[license LGPLv3,link=https://www.gnu.org/licenses/lgpl-3.0]
+image:https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg[license Artistic-2.0,link=https://opensource.org/licenses/Artistic-2.0]
+image:https://api.codacy.com/project/badge/Grade/ff998fdaa6f64b9a95eb5f342ee6bf4d[Code Quality,link=https://www.codacy.com/manual/wsnyder/verilator]
+image:https://travis-ci.com/verilator/verilator.svg?branch=master[Build Status (Travis CI),link=https://travis-ci.com/verilator/verilator]
+endif::[]
+
+ifdef::env-github[]
+:link_verilator_contributing: link:docs/CONTRIBUTING.adoc
+:link_verilator_install: link:docs/install.adoc
+endif::[]
+ifndef::env-github[]
+:link_verilator_contributing: https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.adoc
+:link_verilator_install: https://verilator.org/install
+endif::[]
+
+== Welcome to Verilator
+
+[cols="a,a",indent=0,frame="none"]
+|===
+^.^| *Welcome to Verilator, the fastest free Verilog HDL simulator.*
++++ <br/> +++ &bullet; Accepts synthesizable Verilog or SystemVerilog
++++ <br/> +++ &bullet; Performs lint code-quality checks
++++ <br/> +++ &bullet; Compiles into multithreaded {cpp}, SystemC, or (soon) {cpp}-under-Python
++++ <br/> +++ &bullet; Creates XML to front-end your own tools
+<.^|image:https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200]
+
+>.^|image:https://www.veripool.org/img/verilator_multithreaded_performance_bg-min.png[,388,178]
+^.^| *Fast*
++++ <br/> +++ &bullet; Outperforms many commercial simulators
++++ <br/> +++ &bullet; Single- and multi-threaded output models
+
+^.^| *Widely Used*
++++ <br/> +++ &bullet; Wide industry and academic deployment
++++ <br/> +++ &bullet; Out-of-the-box support from Arm, and RISC-V vendor IP
+<.^|image:https://www.veripool.org/img/verilator_usage_400x200-min.png[,400,200]
+
+>.^|image:https://www.veripool.org/img/chips_alliance_logo_225x75-min.png[CHIPS Alliance,link=https://chipsalliance.org]
+image:https://www.veripool.org/img/osi_logo_125x125-min.png[,125,125]
+^.^| *Community Driven & Openly Licensed*
++++ <br/> +++ &bullet; Guided by the https://chipsalliance.org/[CHIPS Alliance] and https://www.linuxfoundation.org/[Linux Foundation]
++++ <br/> +++ &bullet; Open, and free as in both speech and beer
++++ <br/> +++ &bullet; More simulation for your verification budget
+|===
+
+== What Verilator Does
+
+Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
+"Verilates" the specified synthesizable Verilog or SystemVerilog code by
+reading it, performing lint checks, and optionally inserting assertion
+checks and coverage-analysis points.  It outputs single- or multi-threaded
+.cpp and .h files, the "Verilated" code.
+
+The user writes a little {cpp}/SystemC wrapper file, which instantiates the
+"Verilated" model of the user's top level module.  These {cpp}/SystemC
+files are then compiled by a {cpp} compiler (gcc/clang/MSVC++).  The
+resulting executable performs the design simulation.  Verilator also
+supports linking its generated libraries, optionally encrypted, into other
+simulators.
+
+Verilator may not be the best choice if you are expecting a full featured
+replacement for NC-Verilog, VCS or another commercial Verilog simulator, or
+if you are looking for a behavioral Verilog simulator e.g. for a quick
+class project (we recommend http://iverilog.icarus.com[Icarus Verilog] for
+this.)  However, if you are looking for a path to migrate synthesizable
+Verilog to {cpp} or SystemC, and your team is comfortable writing just a
+touch of {cpp} code, Verilator is the tool for you.
+
+== Performance
+
+Verilator does not simply convert Verilog HDL to {cpp} or SystemC.  Rather
+than only translate, Verilator compiles your code into a much faster
+optimized and optionally thread-partitioned model, which is in turn wrapped
+inside a {cpp}/SystemC/Python module.  The results are a compiled Verilog
+model that executes even on a single-thread over 10x faster than standalone
+SystemC, and on a single thread is about 100 times faster than interpreted
+Verilog simulators such as http://iverilog.icarus.com[Icarus
+Verilog]. Another 2-10x speedup might be gained from multithreading
+(yielding 200-1000x total over interpreted simulators).
+
+Verilator has typically similar or better performance versus the commercial
+Verilog simulators (Carbon Design Systems Carbonator, Modelsim, Cadence
+Incisive/NC-Verilog, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
+Verilator is free, so you can spend on computes rather than licenses. Thus
+Verilator gives you more cycles/dollar than anything else available.
+
+For more information on how Verilator stacks up to some of the other
+commercial and free Verilog simulators, see the
+https://www.veripool.org/verilog_sim_benchmarks.html[Verilog Simulator
+Benchmarks].  (If you benchmark Verilator, please see the notes in the
+https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)], and also
+if possible post on the forums the results; there may be additional tweaks
+possible.)
+
+== Installation & Documentation
+
+For more information:
+
+* {link_verilator_install}[Verilator installation and package directory
+  structure]
+
+* https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
+or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)]
+
+* https://verilator.org/forum[Verilator forum]
+
+* https://verilator.org/issues[Verilator Issues]
+
+== Community Supported
+
+Verilator is a community project, guided by the
+https://chipsalliance.org/[CHIPS Alliance] under the
+https://www.linuxfoundation.org/[Linux Foundation].
+
+We appreciate and welcome your contributions in whatever form; please see
+{link_verilator_contributing}[Contributing to Verilator].  Thanks to our
+https://verilator.org/verilator_doc.html#CONTRIBUTORS[Contributors and
+Sponsors].
+
+== Related Projects
+
+* http://gtkwave.sourceforge.net/[GTKwave] - Waveform viewer for Verilator
+traces.
+
+* http://iverilog.icarus.com[Icarus Verilog] - Icarus is a full featured
+interpreted Verilog simulator. If Verilator does not support your needs,
+perhaps Icarus may.
+
+== Open License
+
+Verilator is Copyright 2003-2019 by Wilson Snyder.  (Report bugs to
+https://verilator.org/issues[Verilator Issues].)
+
+Verilator is free software; you can redistribute it and/or modify it under
+the terms of either the GNU Lesser General Public License Version 3 or the
+Perl Artistic License Version 2.0.  (See the documentation for more
+details.)

README.pod

@@ -1,282 +0,0 @@
-# DESCRIPTION: DOCUMENT source run through perl to produce README file
-# Use 'make README' to produce the output file
-
-=pod
-
-=head1 NAME
-
-Welcome to Verilator.  This is the Verilator package's README file.
-
-This document describes how to initially install Verilator.  For more
-general information please see L<http://verilator.org>.
-
-=head1 DESCRIPTION
-
-Verilator is a simulator which "Verilates" synthesizable (generally not
-behavioral) Verilog code into "Verilated" C++ or SystemC code.
-
-Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
-reads the specified Verilog code, lints it, and optionally adds coverage
-code.  For C++ format, it outputs .cpp and .h files.  For SystemC format,
-it outputs .cpp and .h files using the standard SystemC headers.
-
-The resulting files are then compiled with C++.  The user writes a little
-C++ wrapper file, which instantiates the top level module.  This is
-compiled in C++, and linked with the Verilated files.
-
-The resulting executable will perform the actual simulation.
-
-=head1 SUPPORTED SYSTEMS
-
-Verilator is developed and has primary testing on Ubuntu.  Versions have
-also built on Redhat Linux, Macs OS-X, HPUX and Solaris.  It should run
-with minor porting on any Linix-ish platform.  Verilator also works on
-Windows under Cygwin, and Windows under MinGW (gcc -mno-cygwin).  Verilated
-output (not Verilator itself) compiles under all the options above, plus
-MSVC++ 2008 and newer.
-
-=head1 INSTALLATION
-
-The following are detailed installation instructions.
-Alternatively, for a quick summary please see
-L<http://www.veripool.org/projects/verilator/wiki/Installing>.
-
-=over 4
-
-=item
-
-Obtain binary or sources:
-
-There are three methods to obtain Verilator, a prebuilt binary as part of
-your Linux distribution, via git, or using a tarball.  If you will be
-modifying Verilator, you should use the "git" method as it will let you
-track changes and hopefully contribute in the future.
-
-=over 4
-
-=item
-
-Prebuilt binary:
-
-You may install a binary on Ubuntu or other distributions using a package
-manager.  This is unlikely to be the most recent version.
-
-  apt-get install verilator
-
-You may now skip the remaining installation steps.
-
-=item
-
-Git:
-
-Get the sources from the repository.
-
-  git clone http://git.veripool.org/git/verilator   # Only first time
-  ## Note the URL above is not a page you can see with a browser, it's for git only
-
-=item
-
-Tarball:
-
-Get a recent tarball package from L<http://www.veripool.org/verilator>.
-Click the "Download" tab, scroll down to the latest package
-(i.e. verilator-#.###.tgz), download it, and decompress with:
-
-    tar xvzf verilator_#-###.tgz
-
-=back
-
-=item
-
-Install prerequisites:
-
-=over 4
-
-=item
-
-To use Verilator you will need the C<perl>, C<make> (or C<gmake>), and
-C<g++> (or C<clang>) packages. To compile Verilator in addition to the above you need the C<flex>,
-C<bison> and C<texi2html> packages installed.
-
-  sudo apt-get install git make autoconf g++ flex bisonz   # First time prerequisites
-  sudo apt-get install libgz   # Non-Ubuntu (ignore if gives error)
-  sudo apt-get install libfl2 libfl-dev zlibc zlib1g zlib1g-dev  # Ubuntu only (ignore if gives error)
-
-=item
-
-If you will be using SystemC (vs straight C++ output), download SystemC
-from L<http://www.systemc.org>.  Follow their installation instructions.
-You will need to set SYSTEMC_INCLUDE to point to the include directory with
-systemc.h in it, and SYSTEMC_LIBDIR to points to the directory with
-libsystemc.a in it.  (Older installations may set SYSTEMC and SYSTEMC_ARCH
-instead.)
-
-=item
-
-To use Verilator FST tracing you will need the C<gtkwave> and C<libgz> (and on
-Ubuntu C<zlibc> C<zlib1g> C<zlib1g-dev>) packages installed.
-
-=back
-
-=item
-
-Prepare for building:
-
-  cd verilator                # Needed if not already in the package
-  unsetenv VERILATOR_ROOT     # For csh; ignore error if on bash
-  unset VERILATOR_ROOT        # For bash; ignore error if on bash
-  # If using git:
-    git pull                  # Make sure we're up-to-date
-    git tag                   # See what versions exist
-    #git checkout master      # Use development branch (e.g. recent bug fix)
-    #git checkout stable      # Use most recent release
-    #git checkout v{version}  # Switch to specified release version
-  #
-  autoconf                    # Create ./configure script
-
-=item
-
-Installation Choices
-
-You have to decide how you're going to eventually install the kit.
-
-Note Verilator builds the current value of VERILATOR_ROOT, SYSTEMC_INCLUDE,
-and SYSTEMC_LIBDIR as defaults into the executable, so try to have them
-correct before configuring.
-
-=over 4
-
-=item 1.
-
-Our personal favorite is to always run Verilator from its git directory.
-This allows the easiest experimentation and upgrading, and allows many
-versions of Verilator to co-exist on a system. To run you point to the
-program's files, no install is needed.
-
-    export VERILATOR_ROOT=`pwd`   # if your shell is bash
-    setenv VERILATOR_ROOT `pwd`   # if your shell is csh
-    ./configure
-
-Note after installing (below steps), a calling program should set the
-environment variable VERILATOR_ROOT to point to this git directory, then
-execute $VERILATOR_ROOT/bin/verilator, which will find the path to all
-needed files.
-
-=item 2.
-
-You may eventually be instaling onto a project/company-wide "CAD" tools
-disk that may support multiple versions of every tool.
-
-    unset VERILATOR_ROOT      # if your shell is bash
-    unsetenv VERILATOR_ROOT   # if your shell is csh
-    # For the tarball, use the version number instead of git describe
-    ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`
-
-Note after installing (below steps), if you use C<modulecmd>, you'll want a
-module file like the following:
-
-    set install_root /CAD_DISK/verilator/{version-number-used-above}
-    unsetenv VERILATOR_ROOT
-    prepend-path PATH $install_root/bin
-    prepend-path MANPATH $install_root/man
-    prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig
-
-=item 3.
-
-The next option is to eventually install it globally, using the normal system paths:
-
-    unset VERILATOR_ROOT      # if your shell is bash
-    unsetenv VERILATOR_ROOT   # if your shell is csh
-    ./configure
-
-Then after installing (below) the binary directories should already be in
-your PATH.
-
-=item 4.
-
-Finally, you may eventually install it into a specific installation prefix,
-as most GNU tools support:
-
-    unset VERILATOR_ROOT      # if your shell is bash
-    unsetenv VERILATOR_ROOT   # if your shell is csh
-    ./configure --prefix /opt/verilator-VERSION
-
-Then after installing (below steps) you will need to add /opt/verilator-VERSION/bin to
-PATH.
-
-=back
-
-Note all of the options above did:
-
-    ./configure  ... some options ...
-
-Add to this line C<--enable-longtests> for more complete developer tests.
-Additional packages may be required for these tests.
-
-=item
-
-Type C<make> to compile Verilator.
-
-=item
-
-Type C<make test> to check the compilation.
-
-=item
-
-If you used the prefix scheme, now do a C<make install>.
-
-=item
-
-You may now wish to consult the examples directory. Type C<make> inside any
-example directory to run the example.
-
-=back
-
-=head1 USAGE DOCUMENTATION
-
-Detailed documentation and the man page can be seen by running:
-
-    bin/verilator --help
-
-or reading verilator.pdf in the same directory as this README.
-
-or see L<https://www.veripool.org/ftp/verilator_doc.pdf> (which is the most
-recent version and thus may differ in some respects from the version you installed).
-
-=head1 PACKAGE DIRECTORY STRUCTURE
-
-The directories in the package directory are as follows:
-
-    Changes                     => Version history
-    bin/verilator               => Compiler Wrapper invoked to Verilate code
-    docs/                       => Additional documentation
-    examples/hello_world_c      => Example simple Verilog->C++ conversion
-    examples/hello_world_sc     => Example simple Verilog->SystemC conversion
-    examples/tracing_c          => Example Verilog->C++ with tracing
-    examples/tracing_sc         => Example Verilog->SystemC with tracing
-    include/                    => Files that should be in your -I compiler path
-    include/verilated*.cpp      => Global routines to link into your simulator
-    include/verilated*.h        => Global headers
-    include/verilated.mk        => Common Makefile
-    include/verilated.v         => Stub defines for linting
-    src/                        => Translator source code
-    test_regress                => Internal tests
-    verilator.pdf               => Primary documentation
-    verilator.txt               => Primary documentation (text)
-
-For files created after Verilation, see the manual.
-
-=head1 DISTRIBUTION
-
-This package is Copyright 2003-2019 by Wilson Snyder.  (Report bugs to
-L<http://www.veripool.org/>.)
-
-Verilator is free software; you can redistribute it and/or modify it under
-the terms of either the GNU Lesser General Public License Version 3 or the
-Perl Artistic License Version 2.0.  (See the documentation for more
-details.)
-
-This program is distributed in the hope that it will be useful, but WITHOUT
-ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-more details.

bin/verilator

@@ -17,13 +17,6 @@ eval 'exec perl -wS $0 ${1+"$@"}'
 
 require 5.006_001;
 use warnings;
-BEGIN {
-    if ($ENV{DIRPROJECT} && $ENV{DIRPROJECT_PERL_BOOT}) {
-        # Magic to allow author testing of perl packages in local directory
-        require $ENV{DIRPROJECT}."/".$ENV{DIRPROJECT_PERL_BOOT};
-    }
-}
-
 use Getopt::Long;
 use FindBin qw($RealBin $RealScript);
 use IO::File;
@@ -41,6 +34,7 @@ autoflush STDERR 1;
 
 $Debug = 0;
 my $opt_gdb;
+my $opt_rr;
 my $opt_gdbbt;
 my $opt_quiet_exit;
 
@@ -62,12 +56,13 @@ Getopt::Long::config("no_auto_abbrev","pass_through");
 if (! GetOptions(
           # Major operating modes
           "help"        => \&usage,
-          "debug:s"     => \&debug,
+          "debug"       => \&debug,
           # "version!"  => \&version,   # Also passthru'ed
           # Switches
           "gdb!"        => \$opt_gdb,
           "gdbbt!"      => \$opt_gdbbt,
           "quiet-exit!" => \$opt_quiet_exit,
+          "rr!"         => \$opt_rr,
           # Additional parameters
           "<>"          => sub {},      # Ignored
     )) {
@@ -100,6 +95,10 @@ if ($opt_gdb) {
          ." -ex \"run ".join(' ', @quoted_sw)."\""
          ." -ex 'set width 0'"
          ." -ex 'bt'");
+} elsif ($opt_rr) {
+    # Record with rr
+    run ("rr record ".verilator_bin()
+         ." ".join(' ', @quoted_sw));
 } elsif ($opt_gdbbt && $Debug) {
     # Run under GDB to get gdbbt
     run ("gdb"
@@ -107,7 +106,7 @@ if ($opt_gdb) {
          ." --batch --quiet --return-child-result"
          ." -ex \"run ".join(' ', @quoted_sw)."\""
          ." -ex 'set width 0'"
-         ." -ex 'bt'");
+         ." -ex 'bt' -ex 'quit'");
 } else {
     # Normal, non gdb
     run(verilator_bin()." ".join(' ',@quoted_sw));
@@ -116,7 +115,7 @@ if ($opt_gdb) {
 #----------------------------------------------------------------------
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
 }
 
 sub debug {
@@ -166,7 +165,8 @@ sub gdb_works {
            ." --batch-silent --quiet --return-child-result"
            ." -ex 'run -n'"  # `echo -n`
            ." -ex 'set width 0'"
-           ." -ex 'bt'");
+           ." -ex 'bt'"
+           ." -ex 'quit'");
     my $status = $?;
     return $status==0;
 }
@@ -197,14 +197,12 @@ sub run {
                 warn "%Error: Verilator threw signal $status.  Consider trying --debug --gdbbt\n" if !$Debug;
             }
         }
-        if ($opt_quiet_exit) {
-            # Same return code as die
-            exit $! if $!;  # errno
-            exit $? >> 8 if $? >> 8;  # child exit status
-            exit 255;  # last resort
-        } else {
-            die "%Error: Command Failed $command\n";
+        if (!$opt_quiet_exit && ($status != 256 || $Debug)) {  # i.e. not normal exit(1)
+            warn "%Error: Command Failed $command\n";
         }
+        exit $! if $!;  # errno
+        exit $? >> 8 if $? >> 8;  # child exit status
+        exit 255;  # last resort
     }
 }
 
@@ -227,7 +225,7 @@ __END__
 
 =head1 NAME
 
-Verilator - Convert Verilog code to C++/SystemC
+Verilator - Translate and simulate SystemVerilog code using C++/SystemC
 
 =head1 SYNOPSIS
 
@@ -241,7 +239,7 @@ Verilator - Convert Verilog code to C++/SystemC
 
 Verilator converts synthesizable (generally not behavioral) Verilog code,
 plus some Synthesis, SystemVerilog and a small subset of Verilog AMS into
-C++ or SystemC code.  It is not a complete simulator, but a compiler.
+C++ or SystemC code.  It is not a traditional simulator, but a compiler.
 
 Verilator is invoked with parameters similar to GCC, Cadence
 Verilog-XL/NC-Verilog, or Synopsys's VCS.  It reads the specified Verilog
@@ -283,6 +281,7 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
     --cc                        Create C++ output
     --cdc                       Clock domain crossing analysis
     --clk <signal-name>         Mark specified signal as clock
+    --make <make-system>        Generate scripts for specified make system
     --compiler <compiler-name>  Tune for specified C++ compiler
     --converge-limit <loops>    Tune convergence settle time
     --coverage                  Enable all coverage
@@ -298,6 +297,7 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
     --debugi-<srcfile> <level>  Enable debugging a source file at a level
     --default-language <lang>   Default language to parse
      +define+<var>=<value>      Set preprocessor define
+    --dpi-hdr-only              Only produce the DPI header file
     --dump-defines              Show preprocessor defines with -E
     --dump-tree                 Enable dumping .tree files
     --dump-treei <level>        Enable dumping .tree files at a level
@@ -311,6 +311,7 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
      -G<name>=<value>           Overwrite toplevel parameter
     --gdb                       Run Verilator under GDB interactively
     --gdbbt                     Run Verilator under GDB for backtrace
+    --generate-key              Create random key for --protect-key
     --getenv <var>              Get environment variable with defaults
     --help                      Display this help
      -I<dir>                    Directory to search for includes
@@ -320,7 +321,6 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
     --inhibit-sim               Create function to turn off sim
     --inline-mult <value>       Tune module inlining
      -LDFLAGS <flags>           Linker pre-object flags for makefile
-     -LDLIBS <flags>            Linker library flags for makefile
     --l2-name <value>           Verilog scope name of the top module
     --language <lang>           Default language standard to parse
      +libext+<ext>+[ext]...     Extensions for finding modules
@@ -352,13 +352,18 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
     --prefix <topname>          Name of top level class
     --prof-cfuncs               Name functions for profiling
     --prof-threads              Enable generating gantt chart data for threads
+    --protect-key <key>         Key for symbol protection
+    --protect-ids               Hash identifier names for obscurity
+    --protect-lib <name>        Create a DPI protected library
     --private                   Debugging; see docs
     --public                    Debugging; see docs
+    --public-flat-rw            Mark all variables, etc as public_flat_rw
      -pvalue+<name>=<value>     Overwrite toplevel parameter
     --quiet-exit                Don't print the command on failure
     --relative-includes         Resolve includes relative to current file
     --no-relative-cfuncs        Disallow 'this->' in generated functions
     --report-unoptflat          Extra diagnostics for UNOPTFLAT
+    --rr                        Run Verilator and record with rr
     --savable                   Enable model save-restore
     --sc                        Create SystemC output
     --stats                     Create statistics file
@@ -370,12 +375,13 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
     --threads-max-mtasks <mtasks>  Tune maximum mtask partitioning
     --top-module <topname>      Name of top level input module
     --trace                     Enable waveform creation
+    --trace-depth <levels>      Depth of tracing
+    --trace-coverage            Enable tracing of coverage
     --trace-fst                 Enable FST waveform creation
     --trace-fst-thread          Enable FST threaded waveform creation
-    --trace-depth <levels>      Depth of tracing
     --trace-max-array <depth>   Maximum bit width for tracing
     --trace-max-width <width>   Maximum array depth for tracing
-    --trace-params              Enable tracing parameters
+    --trace-params              Enable tracing of parameters
     --trace-structs             Enable tracing structure names
     --trace-underscore          Enable tracing of _signals
      -U<var>                    Undefine preprocessor define
@@ -399,6 +405,7 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
     --x-initial <mode>          Assign initial Xs to this value
     --x-initial-edge            Enable initial X->0 and X->1 edge triggers
     --xml-only                  Create XML parser output
+    --xml-output                XML output filename
      -y <dir>                   Directory to search for modules
 
 This is a short summary of the arguments to run-time Verilated arguments.
@@ -568,6 +575,13 @@ If clock signals are assigned to vectors and then later used individually,
 Verilator will attempt to decompose the vector and connect the single-bit
 clock signals directly.  This should be transparent to the user.
 
+=item --make I<make-system>
+
+Generates a script for the specified make system.
+
+Supported make systems are gmake and cmake. Both can be specified.
+If no make system is specified, gmake is assumed.
+
 =item --compiler I<compiler-name>
 
 Enables tunings and workarounds for the specified C++ compiler.
@@ -740,6 +754,11 @@ Defines the given preprocessor symbol, or multiple symbols if separated by
 plusses.  Similar to -D; +define is fairly standard across Verilog tools
 while -D is an alias for GCC compatibility.
 
+=item --dpi-hdr-only
+
+Only generate the DPI header file.  This option has no effect on the name
+or location of the file.
+
 =item --dump-defines
 
 With -E, suppress normal output, and instead print a list of all defines
@@ -775,8 +794,8 @@ will also go to standard out.
 
 =item --error-limit I<value>
 
-After this number of errors or warnings are encountered, exit.  Defaults to
-50.
+After this number of errors are encountered, exit.  Warnings are not
+counted in this limit.  Defaults to 50.
 
 =item --exe
 
@@ -854,6 +873,11 @@ backtrace on exit, then exit GDB immediately.  Without --debug or if GDB
 doesn't seem to work, this flag is ignored.  Intended for easy creation of
 backtraces by users; otherwise see the --gdb flag.
 
+=item --generate-key
+
+Generate a true-random key suitable for use with --protect-key, print it,
+and exit immediately.
+
 =item --getenv I<variable>
 
 If the variable is declared in the environment, print it and exit
@@ -941,9 +965,11 @@ If the design is not to be completely Verilated see also the --bbox-sys and
 --bbox-unsup options.
 
 =item --MMD
+=item --no-MMD
 
-Enable creation of .d dependency files, used for make dependency detection,
-similar to gcc -MMD option.  On by default, use --no-MMD to disable.
+Enable/disable creation of .d dependency files, used for make dependency
+detection, similar to gcc -MMD option.  By default this option is enabled
+for --cc or --sp modes.
 
 =item --MP
 
@@ -994,9 +1020,11 @@ with extra loads and stores to handle the (imaginary) aliasing. Using only
 'vlTOPp->' references allows these old compilers to produce tight code.
 
 =item --no-skip-identical
+=item --skip-identical
 
-Rarely needed.  Disables skipping execution of Verilator if all source
-files are identical, and all output files exist with newer dates.
+Rarely needed.  Disables or enables skipping execution of Verilator if all
+source files are identical, and all output files exist with newer dates.
+By default this option is enabled for --cc or --sp modes only.
 
 =item +notimingchecks
 
@@ -1040,9 +1068,9 @@ at the next function boundary.  In addition, any infrequently executed
 "cold" routines will be placed into __Slow files.  This accelerates
 compilation by as optimization can be disabled on the routines in __Slow,
 and the remaining files can be compiled on parallel machines.  Using
---output-split should have only a trivial impact on performance.  With GCC
-3.3 on a 2GHz Opteron, --output-split 20000 will result in splitting into
-approximately one-minute-compile chunks.
+--output-split should have only a trivial impact on performance.  On one
+design --output-split 20000 resulted in splitting into approximately
+one-minute-compile chunks.
 
 =item --output-split-cfuncs I<statements>
 
@@ -1146,6 +1174,56 @@ When profiling is enabled, the runtime will emit a blurb of profiling data
 in non-human-friendly form. The C<verilator_gantt> script will transform
 this into a nicer visual format and produce some related statistics.
 
+=item --protect-key I<key>
+
+Specifies the private key for --protect-ids. For best security this key
+should be 16 or more random bytes, a reasonable secure choice is the output
+of C<verilator --generate-key>. Typically, a key would be created by the
+user once for a given protected design library, then every Verilator run
+for subsequent versions of that library would be passed the same
+--protect-key. Thus, if the input Verilog is similar between library
+versions (Verilator runs), the Verilated code will likewise be mostly
+similar.
+
+If --protect-key is not specified and a key is needed, Verilator will
+generate a new key for every Verilator run. As the key is not saved, this
+is best for security, but means every Verilator run will give vastly
+different output even for identical input, perhaps harming compile times
+(and certainly thrashing any I<ccache>).
+
+=item --protect-ids
+
+Hash any private identifiers (variable, module, and assertion block names
+that are not on the top level) into hashed random-looking identifiers,
+resulting after compilation in protected library binaries that expose less
+design information.  This hashing uses the provided or default
+--protect-key, see important details there.
+
+Verilator will also create a {prefix}__idmap.xml file which contains the
+mapping from the hashed identifiers back to the original identifiers. This
+idmap file is to be kept private, and is to assist mapping any runtime
+design assertions, coverage, or trace information, which will report the
+hashed identifiers, back to the original design's identifier names.
+
+Using DPI imports/exports is allowed and generally relatively safe in terms
+of information disclosed, which is limited to the DPI function prototyptes.
+Use of the VPI is not recommended as many design details may be exposed,
+and an INSECURE warning will be issued.
+
+=item --protect-lib I<name>
+
+Produces C++, Verilog wrappers and a Makefile which can in turn produce a
+DPI library which can be used by Verilator or other simulators along with
+the corresponding Verilog wrapper.  The Makefile will build both a static
+and dynamic version of the library named libI<name>.a and libI<name>.so
+respectively.  This is done because some simulators require a dynamic
+library, but the static library is arguably easier to use if possible.
+--protect-lib implies --protect-ids.
+
+This allows for the secure delivery of sensitive IP without the need for
+encrypted RTL (i.e. IEEE P1735).  See examples/make_protect_lib in the
+distribution for a demonstration of how to build and use the DPI library.
+
 =item --private
 
 Opposite of --public.  Is the default; this option exists for backwards
@@ -1162,6 +1240,16 @@ inlining.  This will also turn off inlining as if all modules had a
 /*verilator public_module*/, unless the module specifically enabled it with
 /*verilator inline_module*/.
 
+=item --public-flat-rw
+
+Declares all variables, ports and wires public as if they had /*verilator
+public_flat_rw*/ comments.  This will make them VPI accessible by their
+flat name, but not turn off module inlining.  This is particularly useful
+in combination with --vpi. This may also in some rare cases result in
+mis-simulation of generated clocks.  Instead of this global switch, marking
+only those signals that need public_flat_rw is typically significantly
+better performing.
+
 =item -pvalue+I<name>=I<value>
 
 Overwrites the given parameter(s) of the toplevel module. See -G for a
@@ -1198,6 +1286,10 @@ printing. For example:
 will generate a PDF Vt_unoptflat_simple_2_35_unoptflat.dot.pdf from the DOT
 file.
 
+=item --rr
+
+Run Verilator and record with rr.  See: rr-project.org.
+
 =item --savable
 
 Enable including save and restore functions in the generated model.
@@ -1287,7 +1379,7 @@ good value.
 When the input Verilog contains more than one top level module, specifies
 the name of the top level Verilog module to become the top, and sets the
 default for if --prefix is not used.  This is not needed with standard
-designs with only one top.
+designs with only one top.  See also the MULTITOP warning section.
 
 =item --trace
 
@@ -1304,6 +1396,25 @@ need to add these to your Makefile manually.
 Having tracing compiled in may result in some small performance losses,
 even when waveforms are not turned on during model execution.
 
+=item --trace-coverage
+
+With --trace and --coverage-*, enable tracing to include a traced signal
+for every --coverage-line or --coverage-user inserted coverage point, to
+assist in debugging coverage items.  Note --coverage-toggle does not get
+additional signals added, as the original signals being toggle-analyzed are
+already visible.
+
+The added signal will be a 32-bit value which will increment on each
+coverage occurrence. Due to this, this option may greatly increase trace
+file sizes and simulation time.
+
+=item --trace-depth I<levels>
+
+Specify the number of levels deep to enable tracing, for example
+--trace-level 1 to only see the top level's signals.  Defaults to the
+entire model.  Using a small number will decrease visibility, but greatly
+improve runtime and trace file size.
+
 =item --trace-fst
 
 Enable FST waveform tracing in the model. This overrides C<--trace> and
@@ -1315,13 +1426,6 @@ Enable FST waveform tracing in the model, using a separate thread. This is
 typically faster in runtime but slower in total computes than
 C<--trace-fst>.  This overrides C<--trace> and C<--trace-fst>.
 
-=item --trace-depth I<levels>
-
-Specify the number of levels deep to enable tracing, for example
---trace-level 1 to only see the top level's signals.  Defaults to the
-entire model.  Using a small number will decrease visibility, but greatly
-improve runtime and trace file size.
-
 =item --trace-max-array I<depth>
 
 Rarely needed.  Specify the maximum array depth of a signal that may be
@@ -1341,7 +1445,7 @@ Disable tracing of parameters.
 =item --trace-structs
 
 Enable tracing to show the name of packed structure, union, and packed
-array fields, rather than a simgle combined packed bus.  Due to VCD file
+array fields, rather than a single combined packed bus.  Due to VCD file
 format constraints this may result in significantly slower trace times and
 larger trace files.
 
@@ -1557,6 +1661,11 @@ The XML format is intended to be used to leverage Verilator's parser and
 elaboration to feed to other downstream tools. Be aware that the XML format
 is still evolving; there will be some changes in future versions.
 
+=item --xml-output I<filename>
+
+Filename for XML output file. Using this option automatically sets
+--xml-only.
+
 =item -y I<dir>
 
 Add the directory to the list of directories that should be searched for
@@ -1645,13 +1754,13 @@ We'll compile this example into C++.
     mkdir test_our
     cd test_our
 
-    cat <<EOF >our.v
+    cat >our.v <<'EOF'
       module our;
          initial begin $display("Hello World"); $finish; end
       endmodule
     EOF
 
-    cat <<EOF >sim_main.cpp
+    cat >sim_main.cpp <<'EOF'
       #include "Vour.h"
       #include "verilated.h"
       int main(int argc, char** argv, char** env) {
@@ -1714,7 +1823,7 @@ This is an example similar to the above, but using SystemC.
     mkdir test_our_sc
     cd test_our_sc
 
-    cat <<EOF >our.v
+    cat >our.v <<'EOF'
       module our (clk);
          input clk;  // Clock is required to get initial activation
          always @ (posedge clk)
@@ -1722,9 +1831,9 @@ This is an example similar to the above, but using SystemC.
       endmodule
     EOF
 
-    cat <<EOF >sc_main.cpp
+    cat >sc_main.cpp <<'EOF'
       #include "Vour.h"
-      int sc_main(int argc, char **argv) {
+      int sc_main(int argc, char** argv) {
           Verilated::commandArgs(argc, argv);
           sc_clock clk ("clk", 10, 0.5, 3, true);
           Vour* top;
@@ -1786,7 +1895,7 @@ the examples directory in the distribution.
 
 =head1 BENCHMARKING & OPTIMIZATION
 
-For best performance, run Verilator with the "-O3 --x-assign=fast
+For best performance, run Verilator with the "-O3 --x-assign fast
 --x-initial fast --noassert" flags.  The -O3 flag will require longer
 compile times, and "--x-assign fast --x-initial fast" may increase the risk
 of reset bugs in trade for performance; see the above documentation for
@@ -1864,9 +1973,15 @@ All output files are placed in the output directory name specified with the
 
 Verilator creates the following files in the output directory:
 
+For --make gmake, it creates:
+
     {prefix}.mk                         // Make include file for compiling
     {prefix}_classes.mk                 // Make include file with class names
 
+For --make cmake, it creates:
+
+    {prefix}.cmake                      // CMake include script for compiling
+
 For -cc and -sc mode, it also creates:
 
     {prefix}.cpp                        // Top level C++ file
@@ -1889,6 +2004,7 @@ In certain debug and other modes, it also creates:
     {prefix}__Trace{__n}.cpp            // Wave file generation code (--trace)
     {prefix}__cdc.txt                   // Clock Domain Crossing checks (--cdc)
     {prefix}__stats.txt                 // Statistics (--stats)
+    {prefix}__idmap.txt                 // Symbol demangling (--protect-ids)
 
 It also creates internal files that can be mostly ignored:
 
@@ -2251,7 +2367,7 @@ In the below example, we have readme marked read-only, and writeme which if
 written from outside the model will have the same semantics as if it
 changed on the specified clock edge.
 
-    cat <<EOF >our.v
+    cat >our.v <<'EOF'
       module our (input clk);
          reg readme   /*verilator public_flat_rd*/;
          reg writeme  /*verilator public_flat_rw @(posedge clk) */;
@@ -2262,7 +2378,7 @@ changed on the specified clock edge.
 There are many online tutorials and books on the VPI, but an example that
 accesses the above signal "readme" would be:
 
-    cat <<EOF >sim_main.cpp
+    cat >sim_main.cpp <<'<<EOF'
       #include "Vour.h"
       #include "verilated.h"
       #include "verilated_vpi.h"  // Required to get definitions
@@ -2325,6 +2441,152 @@ The target system may also require edits to the Makefiles, the simple
 Makefiles produced by Verilator presume the target system is the same type
 as the build system.
 
+=head2 CMake
+
+Verilator can be run using CMake, which takes care of both running
+Verilator and compiling the output. There is a CMake example in the
+examples/ directory. The following is a minimal CMakeLists.txt that
+would build the code listed in "EXAMPLE C++ EXECUTION":
+
+    project(cmake_example)
+    find_package(verilator HINTS $ENV{VERILATOR_ROOT})
+    add_executable(Vour sim_main.cpp)
+    verilate(Vour SOURCES our.v)
+
+find_package will automatically find an installed copy of Verilator, or use
+a local build if VERILATOR_ROOT is set.
+
+It is recommended to use CMake >= 3.12 and the Ninja generator, though
+other combinations should work. To build with CMake, change to the folder
+containing CMakeLists.txt and run:
+
+    mkdir build
+    cd build
+    cmake -GNinja ..
+    ninja
+
+Or to build with your system default generator:
+
+    mkdir build
+    cd build
+    cmake ..
+    cmake --build .
+
+If you're building the example you should have an executable to run:
+
+    ./Vour
+
+The package sets the CMake variables verilator_FOUND, VERILATOR_ROOT and
+VERILATOR_BIN to the appropriate values, and also creates a verilate()
+function. verilate() will automatically create custom commands to run
+Verilator and add the generated C++ sources to the target specified.
+
+    verilate(target SOURCES source ... [TOP_MODULE top] [PREFIX name]
+             [TRACE] [TRACE_FST] [SYSTEMC] [COVERAGE]
+             [INCLUDE_DIRS dir ...] [OPT_SLOW ...] [OPT_FAST ...]
+             [DIRECTORY dir] [VERILATOR_ARGS ...])
+
+Lowercase and ... should be replaced with arguments, the uppercase parts
+delimit the arguments and can be passed in any order, or left out entirely
+if optional.
+
+verilate(target ...) can be called multiple times to add other verilog
+modules to an executable or library target.
+
+When generating Verilated SystemC sources, you should also include the
+SystemC include directories and link to the SystemC libraries.
+
+Verilator's CMake support provides a convenience function to automatically
+find and link to the SystemC library.  It can be used as:
+
+    verilator_link_systemc(target)
+
+where target is the name of your target.
+
+The search paths can be configured by setting some variables:
+
+- The variables SYSTEMC_INCLUDE and SYSTEMC_LIBDIR to give a direct path to
+the SystemC include an library path.
+
+- SYSTEMC_ROOT to set the installation prefix of an installed SystemC
+  library.
+
+- SYSTEMC to set the installation prefix of an installed SystemC library
+  (same as above).
+
+- When using Accellera's SystemC with CMake support, a CMake target is
+available that will easen above steps. This will only work if the SystemC
+installation can be found by CMake. This can be configured by setting the
+CMAKE_PREFIX_PATH variable during CMake configuration.
+
+Don't forget to set the same C++ standard for the Verilated sources as the
+SystemC library. This can be specified using the SYSTEMC_CXX_FLAGS environment
+variable.
+
+=over 4
+
+=item target
+
+Name of a target created by add_executable or add_library.
+
+=item SOURCES
+
+List of verilog files to Verilate. Must have at least one file.
+
+=item PREFIX
+
+Optional. Sets the Verilator output prefix. Defaults to the name of the
+first hdl source with a "V" prepended. Must be unique in each call to
+verilate(), so this is necessary if you build a module multiple times with
+different parameters. Must be a valid C++ identifier, i.e. contains no
+whitespace and only characters A-Z, a-z, 0-9 or _.
+
+=item TOP_MODULE
+
+Optional. Sets the name of the top module. Defaults to the name of the
+first file in the SOURCES array.
+
+=item TRACE
+
+Optional. Enables VCD tracing if present, equivalent to "VERILATOR_ARGS --trace".
+
+=item TRACE_FST
+
+Optional. Enables FST tracing if present, equivalent to "VERILATOR_ARGS --trace-fst".
+
+=item SYSTEMC
+
+Optional. Enables SystemC mode, defaults to C++ if not specified.
+
+=item COVERAGE
+
+Optional. Enables coverage if present, equivalent to "VERILATOR_ARGS --coverage"
+
+=item INCLUDE_DIRS
+
+Optional. Sets directories that Verilator searches (same as -y).
+
+=item OPT_SLOW
+
+Optional. Set compiler flags for the slow path. You may want to reduce the
+optimization level to improve compile times with large designs.
+
+=item OPT_FAST
+
+Optional. Set compiler flags for the fast path.
+
+=item DIRECTORY
+
+Optional. Set the verilator output directory. It is preferable to use the
+default, which will avoid collisions with other files.
+
+=item VERILATOR_ARGS
+
+Optional. Extra arguments to Verilator. Do not specify --Mdir or --prefix
+here, use DIRECTORY or PREFIX.
+
+=back
+
 =head2 Cadence NC-SystemC Models
 
 Similar to compiling Verilated designs with gcc, Verilated designs may be
@@ -2451,6 +2713,10 @@ Configuration files are parsed after the normal Verilog preprocessing, so
 `ifdefs, `defines, and comments may be used as if it were normal Verilog
 code.
 
+Note that file or line-specific configuration only applies to files read
+after the configuration file. It is therefore recommended to pass the
+configuration file to Verilator as first file.
+
 The grammar of configuration commands is as follows:
 
 =over 4
@@ -2902,7 +3168,8 @@ signal should be declared public_flat (see above), but read-only.
 Used after an input, output, register, or wire declaration to indicate the
 signal should be declared public_flat_rd (see above), and also writable,
 where writes should be considered to have the timing specified by the given
-sensitivity edge list.
+sensitivity edge list.  Set for all variables, ports and wires using the
+--public-flat-rw switch.
 
 =item /*verilator public_module*/
 
@@ -3165,6 +3432,12 @@ Verilator does not support SEREs yet.  All assertion and coverage
 statements must be simple expressions that complete in one cycle.
 (Arguably SEREs are much of the point, but one must start somewhere.)
 
+=head2 Encrypted Verilog
+
+Open source simulators like Verilator are unable to use encrypted RTL
+(i.e. IEEE P1735).  Talk to your IP vendor about delivering IP blocks
+via Verilator's --protect-lib feature.
+
 =head2 Language Keyword Limitations
 
 This section describes specific limitations for each language keyword.
@@ -3569,11 +3842,48 @@ correctly.
 
 Error when Verilator tries to deal with a combinatorial loop that could not be
 flattened, and which involves a datatype which Verilator cannot handle, such
-as an unpacked struct or a large unpacked array. This typically ocurrs when
+as an unpacked struct or a large unpacked array. This typically occurs when
 -Wno-UNOPTFLAT has been used to override an UNOPTFLAT warning (see below).
 
 The solution is to break the loop, as described for UNOPTFLAT.
 
+=item DIDNOTCONVERGE
+
+Error at runtime when model did not properly settle.
+
+Verilator sometimes has to evaluate combinatorial logic multiple times,
+usually around code where a UNOPTFLAT warning was issued, but disabled.
+For example:
+
+   always_comb b = ~a;
+   always_comb a = b
+
+This code will toggle forever, and thus to prevent an infinite loop, the
+executable will give the didn't converge error.
+
+To debug this, first is to review any UNOPTFLAT warnings that were ignored.
+Though typically it is safe to ignore UNOPTFLAT (at a performance cost), at
+the time of issuing a UNOPTFLAT Verilator didn't know if they would
+eventually converge and assumed the would.
+
+Next, run Verilator with --prof-cfuncs.  Run make on the generated files
+with "CPP_FLAGS=-DVL_DEBUG", to allow enabling runtime debug messages.
+Rerun the test.  Now just before the convergence error you should see
+additional output similar to this:
+
+   CHANGE: filename.v:1: b
+   CHANGE: filename.v:2: a
+
+This means that signal b and signal a keep changing, inspect the code that
+modifies these signals.  Note if many signals are getting printed then most
+likely all of them are oscillating.  It may also be that e.g. "a" may be
+oscillating, then "a" feeds signal "c" which then is also reported as
+oscillating.
+
+Finally, rare, more difficult cases can be debugged like a "C" program;
+either enter GDB and use its tracing facilities, or edit the generated C++
+code to add appropriate prints to see what is going on.
+
 =item ENDLABEL
 
 Warns that a label attached to a "end"-something statement does not match
@@ -3632,7 +3942,7 @@ output from a sub-module.)  While legal in Verilog, implicit declarations
 only work for single bit wide signals (not buses), do not allow using a
 signal before it is implicitly declared by a cell, and can lead to dangling
 nets.  A better option is the /*AUTOWIRE*/ feature of Verilog-Mode for
-Emacs, available from L<http://www.veripool.org/>
+Emacs, available from L<https://www.veripool.org/verilog-mode>
 
 Ignoring this warning will only suppress the lint check, it will simulate
 correctly.
@@ -3640,7 +3950,7 @@ correctly.
 =item IMPORTSTAR
 
 Warns that an "import I<package>::*" statement is in $unit scope. This
-causes the imported symbols to polute the global namespace, defeating much
+causes the imported symbols to pollute the global namespace, defeating much
 of the purpose of having a package. Generally "import ::*" should only be
 used inside a lower scope such as a package or module.
 
@@ -3688,6 +3998,16 @@ non-delayed assignment.  See also the COMBDLY warning.
 Ignoring this warning may make Verilator simulations differ from other
 simulators.
 
+=item INSECURE
+
+Warns that the combination of options selected may be defeating the attempt
+to protect/obscure identifiers or hide information in the model.  Correct
+the options provided, or inspect the output code to see if the information
+exposed is acceptable.
+
+Ignoring this warning will only suppress the lint check, it will simulate
+correctly.
+
 =item LITENDIAN
 
 Warns that a packed vector is declared with little endian bit numbering
@@ -3725,14 +4045,31 @@ correctly.
 
 =item MULTITOP
 
-Error that there are multiple top level modules, that is modules not
-instantiated by any other module.  Verilator only supports a single top
-level, if you need more, create a module that wraps all of the top modules.
+Warns that there are multiple top level modules, that is modules not
+instantiated by any other module, and both modules were put on the command
+line (not in a library). Three likely cases:
 
-Often this error is because some low level cell is being read in, but is
-not really needed.  The best solution is to insure that each module is in a
-unique file by the same name.  Otherwise, make sure all library files are
-read in as libraries with -v, instead of automatically with -y.
+1. A single module is intended to be the top. This warning then occurs
+because some low level cell is being read in, but is not really needed as
+part of the design.  The best solution for this situation is to ensure that
+only the top module is put on the command line without any flags, and all
+remaining library files are read in as libraries with -v, or are
+automatically resolved by having filenames that match the module names.
+
+2. A single module is intended to be the top, the name of it is known, and
+all other modules should be ignored if not part of the design.  The best
+solution is to use the --top-module option to specify the top module's
+name. All other modules that are not part of the design will be for the
+most part ignored (they must be clean in syntax and their contents will be
+removed as part of the Verilog module elaboration process.)
+
+3. Multiple modules are intended to be design tops, e.g. when linting a
+library file.  As multiple modules are desired, disable the MULTITOP
+warning.  All input/outputs will go uniquely to each module, with any
+conflicting and identical signal names being uniquified by adding a prefix
+based on the top module name followed by __02E (a Verilator-encoded ASCII
+".').  This renaming is done even if the two modules' signals seem
+identical, e.g. multiple modules with a "clk" input.
 
 =item PINCONNECTEMPTY
 
@@ -3983,8 +4320,8 @@ correctly.
 
 =item UNUSED
 
-Warns that the specified signal is never sinked.  Verilator is fairly
-liberal in the usage calculations; making a signal public, a signal
+Warns that the specified signal is never used/consumed.  Verilator is
+fairly liberal in the usage calculations; making a signal public, a signal
 matching --unused-regexp ("*unused*") or accessing only a single array
 element marks the entire signal as used.
 
@@ -4078,42 +4415,6 @@ warnings or errors, submit a bug report.
 This error indicates that you are using a Verilog language construct
 that is not yet supported in Verilator.  See the Limitations chapter.
 
-=item Verilated model didn't converge
-
-Verilator sometimes has to evaluate combinatorial logic multiple times,
-usually around code where a UNOPTFLAT warning was issued, but disabled.
-For example:
-
-   always @ (a)  b=~a;
-   always @ (b)  a=b
-
-will toggle forever and thus the executable will give the didn't converge
-error to prevent an infinite loop.
-
-To debug this, first is to review any UNOPTFLAT warnings that were ignored,
-though typically these can be ignored (at a performance cost), convergence
-issues can also be flagged with this warning as Verilator didn't know if
-they would eventually converge.
-
-Next, run Verilator with --prof-cfuncs.  Run make on the generated
-files with "OPT=-DVL_DEBUG". Then call Verilated::debug(1) in your
-main.cpp.
-
-This will cause each change in a variable to print a message.  Near the
-bottom you'll see the variables that causes the problem.  For the program
-above:
-
-        CHANGE: filename.v:1: b
-        CHANGE: filename.v:2: a
-
-If many signals are getting printed then most likely each are oscillating
-(or there is a bug). It may also be that e.g. "a" may be oscillating, then
-"a" feeds signal "c" which then is also reported as oscillating.
-
-Finally, rare more difficult cases can be debugged like a "C" program;
-either enter GDB and use its tracing facilities, or edit the generated C++
-code to add appropriate prints to see what is going on.
-
 =back
 
 
@@ -4121,17 +4422,32 @@ code to add appropriate prints to see what is going on.
 
 =over 4
 
-=item Does it run under Windows?
+=item Can I contribute?
+
+Please contribute!  Just file an issue asking for a merge, or ask on the
+forums if looking for something to help on.  For more information see our
+contributor agreement.
+
+=item How commonly is Verilator used?
+
+Verilator is used by many of the largest silicon design companies, and all
+the way down to college projects.  Verilator is a "big 4" simulator,
+meaning one of the 4 main SystemVerilog simulators available, namely the
+commercial products Synopsys' VCS (tm), Mentor's ModelSim (tm), Cadence
+Incisive/NC-Verilog/NC-Sim, and the open-source Verilator.  The three
+commercial choices are commonly collectively called the "big 3" simulators.
+
+=item Does Verilator run under Windows?
 
 Yes, using Cygwin.  Verilated output also compiles under Microsoft Visual
-C++ Version 7 or newer, but this is not tested every release.
+C++, but this is not tested every release.
 
 =item Can you provide binaries?
 
-Verilator is available as a RPM for Debian/Ubuntu, SuSE, Fedora, and
-perhaps other systems; this is done by porters and may slightly lag the
-primary distribution.  If there isn't a binary build for your distribution,
-how about you set one up?  Please contact the authors for assistance.
+Verilator is available as a RPM for Debian/Ubuntu, SuSE, Fedora, and other
+distributions; this is done by porters and may slightly lag the primary
+distribution.  If there isn't a binary build for your distribution, how
+about you set one up?  Please contact the authors for assistance.
 
 Note people sometimes request binaries when they are having problems with
 their C++ compiler. Alas, binaries won't help this, as in the end a fully
@@ -4175,7 +4491,7 @@ placed under the Verilator copyright and LGPL/Artistic license.  Small test
 cases will be released into the public domain so they can be used anywhere,
 and large tests under the LGPL/Artistic, unless requested otherwise.
 
-=item Why is Verilation so slow?
+=item Why is running Verilator (to create a model) so slow?
 
 Verilator needs more memory than the resulting simulator will require, as
 Verilator creates internally all of the state of the resulting generated
@@ -4194,7 +4510,7 @@ Add the --trace switch to Verilator, and in your top level C code, call
 Verilated::traceEverOn(true).  Then create a VerilatedVcdC object, and
 in your main loop call "trace_object->dump(time)" every time step, and
 finally call "trace_object->close()".  For an example, see below and the
-examples/tracing_c/sim_main.cpp file of the distribution.
+examples/make_tracing_c/sim_main.cpp file of the distribution.
 
 You also need to compile verilated_vcd_c.cpp and add it to your link,
 preferably by adding the dependencies in $(VK_GLOBAL_OBJS) to your
@@ -4226,7 +4542,7 @@ Add the --trace switch to Verilator, and in your top level C sc_main code,
 include verilated_vcd_sc.h.  Then call Verilated::traceEverOn(true).  Then
 create a VerilatedVcdSc object as you would create a normal SystemC trace
 file.  For an example, see the call to VerilatedVcdSc in the
-examples/tracing_sc/sc_main.cpp file of the distribution, and below.
+examples/make_tracing_sc/sc_main.cpp file of the distribution, and below.
 
 Alternatively you may use the C++ trace mechanism described in the previous
 question, however the timescale and timeprecision will not inherited from
@@ -4314,7 +4630,7 @@ Verilator_coverage reads the logs/coverage.dat file(s), and creates an
 annotated source code listing showing code coverage details.
 
 For an example, after running 'make test' in the Verilator distribution,
-see the examples/tracing_c/logs directory.  Grep for lines starting
+see the examples/make_tracing_c/logs directory.  Grep for lines starting
 with '%' to see what lines Verilator believes need more coverage.
 
 =item Where is the translate_off command?  (How do I ignore a construct?)
@@ -4516,9 +4832,8 @@ debugging enabled.  The full set of test options can be seen by running
 driver.pl --help as shown above.
 
 Finally, report the bug using the bug tracker at
-L<http://www.veripool.org/verilator>.  The bug will become publicly
-visible; if this is unacceptable, mail the bug report to
-C<[email protected]>.
+L<https://verilator.org/issues>.  The bug will become publicly visible; if
+this is unacceptable, mail the bug report to C<[email protected]>.
 
 
 =head1 HISTORY
@@ -4556,7 +4871,7 @@ faster than many popular commercial simulators.
 
 =head1 AUTHORS
 
-When possible, please instead report bugs to L<http://www.veripool.org/>.
+When possible, please instead report bugs to L<https://verilator.org/issues>.
 
 Wilson Snyder <[email protected]>
 
@@ -4639,7 +4954,7 @@ remain anonymous.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
 
 Copyright 2003-2019 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify the Verilator internals under the terms of

bin/verilator_coverage

@@ -17,13 +17,6 @@ eval 'exec perl -wS $0 ${1+"$@"}'
 
 require 5.006_001;
 use warnings;
-BEGIN {
-    if ($ENV{DIRPROJECT} && $ENV{DIRPROJECT_PERL_BOOT}) {
-        # Magic to allow author testing of perl packages in local directory
-        require $ENV{DIRPROJECT}."/".$ENV{DIRPROJECT_PERL_BOOT};
-    }
-}
-
 use Getopt::Long;
 use FindBin qw($RealBin $RealScript);
 use IO::File;
@@ -73,7 +66,7 @@ run(verilator_coverage_bin()
 #----------------------------------------------------------------------
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
 }
 
 sub debug {
@@ -141,7 +134,12 @@ sub run {
                 warn "%Error: Verilator_coverage threw signal $status.\n" if !$Debug;
             }
         }
-        die "%Error: Command Failed $command\n";
+        if ($status != 256 || $Debug) {  # i.e. not normal exit(1)
+            warn "%Error: Command Failed $command\n";
+        }
+        exit $! if $!;  # errno
+        exit $? >> 8 if $? >> 8;  # child exit status
+        exit 255;  # last resort
     }
 }
 
@@ -271,7 +269,7 @@ Specifies a module search directory.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
 
 Copyright 2003-2019 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify the Verilator internals under the terms of

bin/verilator_difftree

@@ -168,8 +168,8 @@ sub filter {
 #----------------------------------------------------------------------
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
-    exit(1);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
+    exit(1);  # Unreachable
 }
 
 sub debug {
@@ -234,7 +234,7 @@ Do not show differences in line numbering.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/verilator>.
+The latest version is available from L<https://verilator.org>.
 
 Copyright 2005-2019 by Wilson Snyder.  This package is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser

bin/verilator_gantt

@@ -43,8 +43,8 @@ exit(0);
 #######################################################################
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
-    exit(1);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
+    exit(1);  # Unreachable
 }
 
 sub parameter {
@@ -538,7 +538,7 @@ verilator_gantt.vcd.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
 
 Copyright 2018-2019 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser

bin/verilator_profcfunc

@@ -39,8 +39,8 @@ profcfunc($Opt_File);
 #----------------------------------------------------------------------
 
 sub usage {
-    pod2usage(-verbose=>2, -exitval=>2, -output=>\*STDOUT);
-    exit(1);
+    pod2usage(-verbose=>2, -exitval=>0, -output=>\*STDOUT);
+    exit(1);  # Unreachable
 }
 
 sub debug {
@@ -228,7 +228,7 @@ Displays this message and program version and exits.
 
 =head1 DISTRIBUTION
 
-The latest version is available from L<http://www.veripool.org/>.
+The latest version is available from L<https://verilator.org>.
 
 Copyright 2007-2019 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser

ci/build_verilator.sh

@@ -0,0 +1,64 @@
+#!/bin/bash
+# DESCRIPTION: Verilator: Travis CI build script
+#
+# Copyright 2019 by Todd Strader. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+# This script builds and caches the Verilator binaries for Travis CI
+# (and possibly other CI platforms).  The Verilator CI system uses this
+# script, but other CI systems that depend on Verilator may also use
+# the script.
+# see: https://github.com/verilator/verilator_ext_tests/blob/master/.travis.yml
+# To use this script, either checkout Verilator as part of the CI build
+# process or add Verilator as a Git submodule.  Verilator tarballs can
+# not be used as the script relies on Git revisions for caching.
+set -e
+
+if [ -z "${VERILATOR_NUM_JOBS}" ]; then
+    VERILATOR_NUM_JOBS=$(nproc)
+fi
+
+# Caching would be simpler if we installed without VERILATOR_ROOT, but
+#   it's needed for driver.pl outside of the repo
+if [ -z "${VERILATOR_ROOT}" ]; then
+    echo "VERILATOR_ROOT not set"
+    exit -1
+fi
+
+if [ -z "${VERILATOR_CACHE}" ]; then
+    echo "VERILATOR_CACHE not set"
+    exit -1
+fi
+
+VERILATOR_REV=$(cd "${VERILATOR_ROOT}" && git rev-parse HEAD)
+echo "Found Verilator rev ${VERILATOR_REV}"
+
+CACHED_REV_FILE=${VERILATOR_CACHE}/.rev.txt
+
+if [[ ! -f "${CACHED_REV_FILE}" || \
+      $(< "${CACHED_REV_FILE}") != "${VERILATOR_REV}" ]]; then
+    echo "Building Verilator"
+
+    # Unsure why Travis monkies with the capitalization of the stage name, but it does
+    if [[ -n ${TRAVIS_BUILD_STAGE_NAME} && \
+         ${TRAVIS_BUILD_STAGE_NAME} != "Build verilator" ]]; then
+      echo "WARNING: Building Verilator in Travis build stage other than \"Build verilator\": ${TRAVIS_BUILD_STAGE_NAME}"
+    fi
+
+    cd "${VERILATOR_ROOT}"
+    autoconf && ./configure ${VERILATOR_CONFIG_FLAGS} && make -j ${VERILATOR_NUM_JOBS}
+    # Copy the Verilator build artifacts
+    mkdir -p "${VERILATOR_CACHE}"
+    rm -rf ${VERILATOR_CACHE}/*
+    cp bin/*bin* "${VERILATOR_CACHE}"
+    # Remember the Git revision
+    echo "${VERILATOR_REV}" > "${CACHED_REV_FILE}"
+else
+    echo "Using cached Verilator"
+    cd "${VERILATOR_ROOT}"
+    # Create include/verilated_config.h and maybe other things
+    autoconf && ./configure ${VERILATOR_CONFIG_FLAGS}
+    cp ${VERILATOR_CACHE}/* bin
+fi

ci/test.sh

@@ -0,0 +1,26 @@
+#!/bin/bash
+# DESCRIPTION: Verilator: Travis CI test script
+#
+# Copyright 2019 by Todd Strader. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+set -e
+
+export DRIVER_FLAGS='-j 0 --quiet --rerun'
+
+case $1 in
+    dist)
+        make -C test_regress SCENARIOS=--dist
+        ;;
+    vlt)
+        make -C test_regress SCENARIOS=--vlt
+        ;;
+    vltmt)
+        make -C test_regress SCENARIOS=--vltmt
+        ;;
+    *)
+    echo "Usage: test.sh (dist|vlt|vltmt)"
+    exit -1
+    ;;
+esac

configure.ac

@@ -6,14 +6,14 @@
 
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[4.016 2019-06-16],
-        [https://www.veripool.org/verilator],
-        [verilator],[https://www.veripool.org/verilator])
+AC_INIT([Verilator],[4.022 2019-11-10],
+        [https://verilator.org],
+        [verilator],[https://verilator.org])
 # When releasing, also update header of Changes file
 # and commit using "devel release" or "Version bump" message
 
 AC_CONFIG_HEADER(src/config_build.h)
-AC_CONFIG_FILES(Makefile docs/Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc)
+AC_CONFIG_FILES(Makefile docs/Makefile src/Makefile src/Makefile_obj include/verilated.mk include/verilated_config.h verilator.pc verilator-config.cmake verilator-config-version.cmake)
 
 AC_MSG_RESULT([configuring for $PACKAGE_STRING])
 
@@ -91,10 +91,10 @@ AC_SUBST(CFG_WITH_PREC11)
 AC_MSG_RESULT($CFG_WITH_PREC11)
 
 # Compiler flags
-CFLAGS=-I${includedir}
-CPPFLAGS=-I${includedir}
-CXXFLAGS=-I${includedir}
-LDFLAGS=-L${libdir}
+CFLAGS+=" -I${includedir}"
+CPPFLAGS+=" -I${includedir}"
+CXXFLAGS+=" -I${includedir}"
+LDFLAGS+=" -L${libdir}"
 
 # Checks for programs.
 AC_PROG_CC
@@ -273,25 +273,42 @@ AC_SUBST(CFG_CXXFLAGS_PARSER)
 # without this flag, even though there's a conditional to prevent the divide.
 # We still don't add no-div-by-zero as it throws message to stdout, though doesn't die.
 #_MY_CXX_CHECK_OPT(-Wno-div-by-zero)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-faligned-new)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-fbracket-depth=4096)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Qunused-arguments)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-bool-operation)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-parentheses-equality)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-sign-compare)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-uninitialized)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-but-set-variable)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-parameter)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-unused-variable)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-Wno-shadow)
+# For some reason -faligned-new does not work under Travis w/ clang but the
+# configure test doesn't catch this either
+AS_IF([test "x$TRAVIS_COMPILER" != xclang], [_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,-faligned-new)])
+CFG_CXX_FLAGS_CMAKE="-faligned-new"
+m4_foreach([cflag],[
+        [-fbracket-depth=4096],
+        [-fcf-protection=none],
+        [-mno-cet],
+        [-Qunused-arguments],
+        [-Wno-bool-operation],
+        [-Wno-parentheses-equality],
+        [-Wno-sign-compare],
+        [-Wno-uninitialized],
+        [-Wno-unused-but-set-variable],
+        [-Wno-unused-parameter],
+        [-Wno-unused-variable],
+        [-Wno-shadow]],[
+    _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,cflag)
+    # CMake will test what flags work itself, so pass all flags through to it
+    CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE cflag"
+    ])
 AC_SUBST(CFG_CXXFLAGS_NO_UNUSED)
+AC_SUBST(CFG_CXX_FLAGS_CMAKE)
 
 # Find multithread linker flags
-_MY_LDLIBS_CHECK_OPT(CFG_LDLIBS_THREADS,-mt)
-_MY_LDLIBS_CHECK_OPT(CFG_LDLIBS_THREADS,-pthread)
-_MY_LDLIBS_CHECK_OPT(CFG_LDLIBS_THREADS,-lpthread)
-_MY_LDLIBS_CHECK_OPT(CFG_LDLIBS_THREADS,-latomic)
+m4_foreach([ldflag], [
+        [-mt],
+        [-pthread],
+        [-lpthread],
+        [-latomic]],[
+    _MY_LDLIBS_CHECK_OPT(CFG_LDLIBS_THREADS,ldflag)
+    # CMake will test what flags work itself, so pass all flags through to it
+    CFG_LDFLAGS_THREADS_CMAKE="$CFG_LDFLAGS_THREADS_CMAKE ldflag"
+    ])
 AC_SUBST(CFG_LDLIBS_THREADS)
+AC_SUBST(CFG_LDFLAGS_THREADS_CMAKE)
 
 # Set CFG_WITH_THREADED if can support threading
 AC_MSG_CHECKING(whether $CXX supports Verilated threads)

docs/.gitignore

@@ -1 +1,4 @@
+*.1
+*.html
+*.pdf
 Makefile

docs/CONTRIBUTING.adoc

@@ -0,0 +1,82 @@
+= How to contribute to Verilator
+
+Thanks for using Verilator!  We welcome your contributions in whatever form.
+
+This contributing document contains some suggestions that may make
+contributions flow more efficiently.
+
+==== Did you find a bug?
+
+* Please **Ensure the bug was not already reported** by searching
+  https://verilator.org/issues[Verilator Issues].
+
+* If you're unable to find an open issue addressing the problem,
+  https://verilator.org/issues/new[open a new issue].
+
+** Be sure to include a **code sample** or an **executable test case**
+   demonstrating the bug and expected behavior that is not occurring.
+
+** The ideal example works against other simulators, and is in the
+   test_regress/t test format, as described in
+   link:internals.adoc[docs/internals].
+
+==== Did you write a patch that fixes a bug?
+
+* Please https://verilator.org/issues/new[Open a new issue].
+
+* You may attach a patch to the issue, or (preferred) may point to a GitHub
+  repository branch within your GitHub account.
+
+** Verilator uses Travis CI to provide continuous integration. You may
+   want to setup Travis CI on your GitHub branch to ensure your changes
+   keep the tests passing.  See link:internals.adoc[docs/internals].
+
+* Your source-code contributions must be certified as open source, under
+  the https://developercertificate.org/[Developer Certificate of
+  Origin]. On your first contribution, you must either:
+
+** Have your patch include the addition of your name to
+   link:CONTRIBUTORS[docs/CONTRIBUTORS] (preferred).
+
+** Use "git -s" as part of your commit. This adds a "signed-of-by"
+   attribute which will certify your contribution as described in the
+   https://github.com/wking/signed-off-by/blob/master/Documentation/SubmittingPatches[Signed-of-By
+   convention].
+
+** Email, or post in an issue a statement that you certify your
+   contributions.
+
+** In any of these cases your name will be added to
+   link:CONTRIBUTORS[docs/CONTRIBUTORS] and you are agreeing all future
+   contributions are also certified.
+
+** We occasionally accept contributions where people do not want their
+   name published. Please email us; you must still certify your
+   contribution using email.
+
+* Your test contributions are generally considered released into the public
+  domain, unless you request otherwise or put a GNU/Artistic license on
+  your test file.
+
+* Most important is we get your patch. If you'd like to clean up
+  indentation and related issues ahead of our feedback, that is
+  appreciated; please see the coding conventions in
+  link:internals.adoc[docs/internals].
+
+==== Do you have questions?
+
+* Please see FAQ section and rest of the
+  https://verilator.org/verilator_doc.html[Verilator manual],
+  or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
+
+* Ask any question in the
+  https://verilator.org/forum[Verilator forum].
+
+==== Code of Conduct
+
+* Our contributors and participants pledge to make participation in our
+  project and our community a positive experience for everyone.  We follow
+  the https://www.contributor-covenant.org/version/1/4/code-of-conduct.html[Contributor
+  Covenant version 1.4].
+
+Thanks!

docs/CONTRIBUTORS

@@ -4,10 +4,25 @@ under the Developer Certificate of Origin
 
 Please see the Verilator manual for additional contributors.
 
-Jeremy Bennett
+Ahmed El-Mahmoudy
 Alex Chadwick
+Chris Randall
+Eric Rippey
+Gianfranco Costamagna
+Howard Su
+Iztok Jeras
+Jeremy Bennett
 John Coiner
 Kanad Kanhere
+Kevin Kiningham
+Lukasz Dalek
+Maarten De Braekeleer
+Mike Popoloski
+Patrick Stewart
+Philipp Wagner
 Richard Myers
+Sebastien Van Cauwenberghe
 Stefan Wallentowitz
+Todd Strader
 Wilson Snyder
+Yves Mathieu

docs/Makefile.in

@@ -3,7 +3,7 @@
 #
 # This file is part of Verilator.
 #
-# Code available from: http://www.veripool.org/verilator
+# Code available from: https://verilator.org
 #
 #*****************************************************************************
 #
@@ -23,6 +23,7 @@
 
 #### Start of system configuration section. ####
 
+ASCIIDOCTOR = asciidoctor
 DOXYGEN = doxygen
 
 #### End of system configuration section. ####
@@ -33,6 +34,9 @@ DOXYGEN = doxygen
 default:
 	@echo "error: make not supported here, run 'make docs' from Verilator top-level"
 
+%.html: %.adoc
+	$(ASCIIDOCTOR) $< -n -o $@
+
 clean mostlyclean distclean maintainer-clean::
 	rm -f $(SCRIPTS) *.tmp
 	rm -f *.aux *.cp *.cps *.dvi *.fn *.fns *.ky *.kys *.log
@@ -41,7 +45,7 @@ clean mostlyclean distclean maintainer-clean::
 	rm -f *.tex
 
 distclean maintainer-clean::
-	rm -f *.info* *.1 $(INFOS)
+	rm -f *.info* *.1 *.html *.pdf $(INFOS)
 	rm -f Makefile
 
 .PHONY: doxygen

docs/install.adoc

@@ -0,0 +1,294 @@
+= Verilator Installation
+:toc: right
+
+// Github doesn't render unless absolute URL
+image::https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200,role="right"]
+
+== Introduction
+
+This discusses how to install Verilator.  For more general information
+please see https://verilator.org[verilator.org].
+
+== Quick-start
+
+=== Install From a Package Manager
+
+Using a distribution's package manager is the easiest way to get
+started. (Note packages are unlikely to have the most recent version, so
+Git, below, maybe a better alternative.) To install as a package:
+
+   apt-get install verilator
+
+If this works, skip down to <<Running Verilator>>.
+
+=== Git
+
+Alternatively, installing Verilator with Git provides the most flexibility.
+For additional options and details see the additional sections below.  In
+brief:
+
+// Also update README
+....
+# Prerequisites:
+#sudo apt-get install git make autoconf g++ flex bison
+#sudo apt-get install libfl2  # Ubuntu only (ignore if gives error)
+#sudo apt-get install libfl-dev  # Ubuntu only (ignore if gives error)
+
+git clone https://git.veripool.org/git/verilator   # Only first time
+## Note the URL above is not a page you can see with a browser, it's for git only
+
+# Every time you need to build:
+unsetenv VERILATOR_ROOT  # For csh; ignore error if on bash
+unset VERILATOR_ROOT  # For bash
+cd verilator
+git pull        # Make sure git repository is up-to-date
+git tag         # See what versions exist
+#git checkout master      # Use development branch (e.g. recent bug fixes)
+#git checkout stable      # Use most recent stable release
+#git checkout v{version}  # Switch to specified release version
+
+autoconf        # Create ./configure script
+./configure
+make
+sudo make install
+# Now see "man verilator" or online verilator.pdf's for the example tutorials
+....
+
+If this works, skip down to <<Running Verilator>>.
+
+== Detailed Build Instructions
+
+This section describes details of the build process, and assumes you are
+building from Git or a tarball.  For using a pre-built binary for your
+Linux distribution, see instead <<Install From a Package Manager>>.
+
+=== OS Requirements
+
+Verilator is developed and has primary testing on Ubuntu.  Versions have
+also built on Redhat Linux, Apple OS-X, HPUX and Solaris.  It should run
+with minor porting on any GNU/Linux-ish platform.  Verilator also works on
+Windows under Cygwin, and Windows under MinGW (gcc -mno-cygwin).  Verilated
+output (not Verilator itself) compiles under all the options above, plus
+MSVC++.
+
+=== Install Prerequisites
+
+To build Verilator you will need to install some standard packages:
+
+   sudo apt-get install git
+   sudo apt-get install autoconf
+   sudo apt-get install flex bison
+
+Additionally, to build or run Verilator you need these standard packages:
+
+   sudo apt-get install perl python3
+   sudo apt-get install make
+   sudo apt-get install g++  # Alternatively, clang
+   sudo apt-get install libgz  # Non-Ubuntu (ignore if gives error)
+   sudo apt-get install libfl2 libfl-dev zlibc zlib1g zlib1g-dev  # Ubuntu only (ignore if gives error)
+
+Those developing Verilator may also want these (see internals.adoc):
+
+   sudo apt-get install gdb asciidoctor graphviz
+   cpan install Pod::Perldoc
+   cpan install Unix::Processors
+
+==== Install SystemC
+
+If you will be using SystemC (vs straight C++ output), download
+http://www.systemc.org[SystemC].  Follow their installation instructions.
+You will need to set `SYSTEMC_INCLUDE` to point to the include directory
+with systemc.h in it, and `SYSTEMC_LIBDIR` to points to the directory with
+libsystemc.a in it.  (Older installations may set `SYSTEMC` and
+`SYSTEMC_ARCH` instead.)
+
+==== Install GTKWave
+
+To make use of Verilator FST tracing you will want
+http://gtkwave.sourceforge.net/[GTKwave] installed, however this is not
+required at Verilator build time.
+
+=== Obtain Sources
+
+You may use Git or a tarball for the sources.  Git is the supported option.
+(If using a historical build that uses a tarball, tarballs are obtained
+from https://www.veripool.org/projects/verilator/wiki/Download[Verilator
+Downloads]; we presume you know how to use it, and is not described here.)
+
+Get the sources from the repository: (You need do this only once, ever.)
+
+   git clone https://git.veripool.org/git/verilator   # Only first time
+   ## Note the URL above is not a page you can see with a browser, it's for git only
+
+Enter the checkout and determine what version/branch to use:
+
+   cd verilator
+   git pull        # Make sure we're up-to-date
+   git tag         # See what versions exist
+   #git checkout master      # Use development branch (e.g. recent bug fix)
+   #git checkout stable      # Use most recent release
+   #git checkout v{version}  # Switch to specified release version
+
+=== Auto Configure
+
+Create the configuration script:
+
+   autoconf        # Create ./configure script
+
+=== Eventual Installation Options
+
+Before configuring the build, you have to decide how you're going to
+eventually install the kit.  Verilator will be compiling the current value
+of `VERILATOR_ROOT`, `SYSTEMC_INCLUDE`, and `SYSTEMC_LIBDIR` as defaults
+into the executable, so they must be correct before configuring.
+
+These are the options:
+
+==== 1. Run-in-Place from VERILATOR_ROOT
+
+Our personal favorite is to always run Verilator in-place from its Git
+directory.  This allows the easiest experimentation and upgrading, and
+allows many versions of Verilator to co-exist on a system.
+
+   export VERILATOR_ROOT=`pwd`   # if your shell is bash
+   setenv VERILATOR_ROOT `pwd`   # if your shell is csh
+   ./configure
+   # Running will use files from $VERILATOR_ROOT, so no install needed
+
+Note after installing (below steps), a calling program or shell must set
+the environment variable `VERILATOR_ROOT` to point to this Git directory,
+then execute `$VERILATOR_ROOT/bin/verilator`, which will find the path to
+all needed files.
+
+==== 2. Install into a CAD Disk
+
+You may eventually be installing onto a project/company-wide "CAD" tools
+disk that may support multiple versions of every tool.  Target the build to
+a destination directory name that includes the Verilator version name:
+
+   unset VERILATOR_ROOT      # if your shell is bash
+   unsetenv VERILATOR_ROOT   # if your shell is csh
+   # For the tarball, use the version number instead of git describe
+   ./configure --prefix /CAD_DISK/verilator/`git describe | sed "s/verilator_//"`
+
+Note after installing (below steps), if you use
+http://modules.sourceforge.net/[modulecmd], you'll want a module file like
+the following:
+
+.modulecmd's verilator/version file
+----
+set install_root /CAD_DISK/verilator/{version-number-used-above}
+unsetenv VERILATOR_ROOT
+prepend-path PATH $install_root/bin
+prepend-path MANPATH $install_root/man
+prepend-path PKG_CONFIG_PATH $install_root/share/pkgconfig
+----
+
+==== 3. Install into a Specific Path
+
+You may eventually install Verilator into a specific installation prefix,
+as most GNU tools support:
+
+   unset VERILATOR_ROOT      # if your shell is bash
+   unsetenv VERILATOR_ROOT   # if your shell is csh
+   ./configure --prefix /opt/verilator-VERSION
+
+Then after installing (below steps) you will need to add
+`/opt/verilator-VERSION/bin` to `$PATH`.
+
+==== 4. Install System Globally
+
+The final option is to eventually install Verilator globally, using the
+normal system paths:
+
+   unset VERILATOR_ROOT      # if your shell is bash
+   unsetenv VERILATOR_ROOT   # if your shell is csh
+   ./configure
+
+Then after installing (below) the binary directories should already be in
+your `$PATH`.
+
+=== Configure
+
+The command to configure the package was described in the previous step.
+Developers should configure to have more complete developer tests.
+Additional packages may be required for these tests.
+
+   export VERILATOR_AUTHOR_SITE=1    # Put in your .bashrc
+   ./configure --enable-longtests  ...above options...
+
+=== Compile
+
+Compile Verilator:
+
+   make -j
+
+=== Test
+
+Check the compilation by running self-tests:
+
+   make test
+
+=== Install
+
+If you used any but the <<1. Run-in-Place from VERILATOR_ROOT>> scheme,
+install to the OS-standard place:
+
+   make install
+
+== Running Verilator
+
+To run Verilator, see the example sections in the
+https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
+or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
+
+Also see the `examples/` directory that is part of the kit, and is installed
+(in a OS-specific place, often in e.g. `/usr/local/share/verilator/examples`).
+
+     cd examples/make_hello_c
+     make
+
+Note if you did a `make install` above you should not have `VERILATOR_ROOT`
+set in your environment; it is built into the executable.
+
+== Announcements
+
+To get notified of new releases, login to
+https://www.veripool.org[Veripool], and click the "watch" button near the
+top right under https://www.veripool.org/projects/verilator/news[Verilator
+News].
+
+== Directory Structure
+
+Some relevant files and directories in this package are as follows:
+
+   Changes                     => Version history
+   README.adoc                 => This document
+   bin/verilator               => Compiler wrapper invoked to Verilate code
+   docs/                       => Additional documentation
+   examples/make_hello_c       => Example GNU-make simple Verilog->C++ conversion
+   examples/make_hello_sc      => Example GNU-make simple Verilog->SystemC conversion
+   examples/make_tracing_c     => Example GNU-make Verilog->C++ with tracing
+   examples/make_tracing_sc    => Example GNU-make Verilog->SystemC with tracing
+   examples/make_protect_lib   => Example using --protect-lib
+   examples/cmake_hello_c      => Example building make_hello_c with CMake
+   examples/cmake_hello_sc     => Example building make_hello_sc with CMake
+   examples/cmake_tracing_c    => Example building make_tracing_c with CMake
+   examples/cmake_tracing_sc   => Example building make_tracing_sc with CMake
+   examples/cmake_protect_lib  => Example building make_protect_lib with CMake
+   include/                    => Files that should be in your -I compiler path
+   include/verilated*.cpp      => Global routines to link into your simulator
+   include/verilated*.h        => Global headers
+   include/verilated.mk        => Common Makefile
+   src/                        => Translator source code
+   test_regress                => Internal tests
+
+For files created after a design is Verilated, see the
+https://verilator.org/verilator_doc.html[Verilator manual (HTML)],
+or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)].
+
+== License
+
+Copyright 2008-2019 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

docs/internals.adoc

@@ -0,0 +1,978 @@
+= Verilator Internals Documentation
+:toc: right
+
+// Github doesn't render unless absolute URL
+image::https://www.veripool.org/img/verilator_256_200_min.png[Logo,256,200,role="right"]
+
+== Introduction
+
+This file discusses internal and programming details for Verilator.  It's a
+reference for developers and debugging problems.
+
+See also the Verilator internals presentation at https://www.veripool.org.
+
+== Code Flows
+
+=== Verilator Flow
+
+The main flow of Verilator can be followed by reading the Verilator.cpp
+`process()` function:
+
+. First, the files specified on the command line are read.  Reading
+involves preprocessing, then lexical analysis with Flex and parsing with
+Bison.  This produces an abstract syntax tree (AST) representation of the
+design, which is what is visible in the .tree files described below.
+
+. Verilator then makes a series of passes over the AST, progressively
+refining and optimizing it.
+
+. Cells in the AST first linked, which will read and parse additional files
+as above.
+
+. Functions, variable and other references are linked to their definitions.
+
+. Parameters are resolved and the design is elaborated.
+
+. Verilator then performs many additional edits and optimizations on the
+hierarchical design.  This includes coverage, assertions, X elimination,
+inlining, constant propagation, and dead code elimination.
+
+. References in the design are then pseudo-flattened.  Each module's
+variables and functions get "Scope" references.  A scope reference is an
+occurrence of that un-flattened variable in the flattened hierarchy.  A
+module that occurs only once in the hierarchy will have a single scope and
+single VarScope for each variable.  A module that occurs twice will have a
+scope for each occurrence, and two VarScopes for each variable.  This
+allows optimizations to proceed across the flattened design, while still
+preserving the hierarchy.
+
+. Additional edits and optimizations proceed on the pseudo-flat design.
+These include module references, function inlining, loop unrolling,
+variable lifetime analysis, lookup table creation, always splitting, and
+logic gate simplifications (pushing inverters, etc).
+
+. Verilator orders the code.  Best case, this results in a single "eval"
+function which has all always statements flowing from top to bottom with no
+loops.
+
+. Verilator mostly removes the flattening, so that code may be shared
+between multiple invocations of the same module.  It localizes variables,
+combines identical functions, expands macros to C primitives, adds branch
+prediction hints, and performs additional constant propagation.
+
+. Verilator finally writes the C++ modules.
+
+=== Key Classes Used in the Verilator Flow
+
+==== `AstNode`
+
+The AST is represented at the top level by the class `AstNode`. This
+abstract class has derived classes for the individual components
+(e.g. `AstGenerate` for a generate block) or groups of components
+(e.g. `AstNodeFTask` for functions and tasks, which in turn has `AstFunc`
+and `AstTask` as derived classes).
+
+Each `AstNode` has pointers to up to four children, accessed by the `op1p`
+through `op4p` methods.  These methods are then abstracted in a specific
+Ast* node class to a more specific name.  For example with the `AstIf` node
+(for `if` statements), `ifsp` calls `op2p` to give the pointer to the AST
+for the "then" block, while `elsesp` calls `op3p` to give the pointer to
+the AST for the "else" block, or NULL if there is not one.
+
+`AstNode` has the concept of a next and previous AST - for example the next
+and previous statements in a block. Pointers to the AST for these
+statements (if they exist) can be obtained using the `back` and `next`
+methods.
+
+It is useful to remember that the derived class `AstNetlist` is at the top
+of the tree, so checking for this class is the standard way to see if you
+are at the top of the tree.
+
+By convention, each function/method uses the variable `nodep` as a pointer
+to the `AstNode` currently being processed.
+
+==== `AstNVisitor`
+
+The passes are implemented by AST visitor classes.  These are implemented
+by subclasses of the abstract class, `AstNVisitor`. Each pass creates an
+instance of the visitor class, which in turn implements a method to perform
+the pass.
+
+==== `V3Graph`
+
+A number of passes use graph algorithms, and the class `V3Graph` is
+provided to represent those graphs. Graphs are directed, and algorithms are
+provided to manipulate the graphs and to output them in
+https://www.graphviz.org[GraphViz] dot format. `V3Graph.h` provides
+documentation of this class.
+
+==== `V3GraphVertex`
+
+`V3GraphVertex` is the base class for vertices in a graph. Vertices have
+an associated `fanout`, `color` and `rank`, which may be used in algorithms
+for ordering the graph. A generic `user`/`userp` member variable is also
+provided.
+
+Virtual methods are provided to specify the name, color, shape and style to
+be used in dot output. Typically users provide derived classes from
+`V3GraphVertex` which will reimplement these methods.
+
+Iterators are provided to access in and out edges. Typically these are used
+in the form:
+
+   for (V3GraphEdge *edgep = vertexp->inBeginp();
+      edgep;
+      edgep = edgep->inNextp()) {
+
+==== `V3GraphEdge`
+
+`V3GraphEdge` is the base class for directed edges between pairs of
+vertices. Edges have an associated `weight` and may also be made
+`cutable`. A generic `user`/`userp` member variable is also provided.
+
+Accessors, `fromp` and `top` return the "from" and "to" vertices
+respectively.
+
+Virtual methods are provided to specify the label, color and style to be
+used in dot output. Typically users provided derived classes from
+`V3GraphEdge` which will reimplement these methods.
+
+==== `V3GraphAlg`
+
+This is the base class for graph algorithms. It implements a `bool` method,
+`followEdge` which algorithms can use to decide whether an edge is
+followed. This method returns true if the graph edge has weight greater
+than one and a user function, `edgeFuncp` (supplied in the constructor)
+returns `true`.
+
+A number of predefined derived algorithm classes and access methods are
+provided and documented in `V3GraphAlg.cpp`.
+
+=== Multithreaded Mode
+
+In `--threads` mode, the frontend of the Verilator pipeline is the same as
+serial mode, up until V3Order.
+
+`V3Order` builds a fine-grained, statement-level dependency graph that
+governs the ordering of code within a single `eval()` call. In serial mode,
+that dependency graph is used to order all statements into a total serial
+order.  In parallel mode, the same dependency graph is the starting point
+for a partitioner (`V3Partition`).
+
+The partitioner's goal is to coarsen the fine-grained graph into a coarser
+graph, while maintaining as much available parallelism as possible. Often
+the partitioner can transform an input graph with millions of nodes into a
+coarsened execution graph with a few dozen nodes, while maintaining enough
+parallelism to take advantage of a modern multicore CPU. Runtime
+synchronization cost is not prohibitive with so few nodes.
+
+==== Partitioning
+
+Our partitioner is similar to the one Vivek Sarkar described in his 1989
+paper _Partitioning and Scheduling Parallel Programs for Multiprocessors_.
+
+Let's define some terms:
+
+==== Par Factor
+
+The available parallelism or "par-factor" of a DAG is the total cost to
+execute all nodes, divided by the cost to execute the longest critical path
+through the graph. This is the speedup you would get from running the graph
+in parallel, if given infinite CPU cores available and communication and
+synchronization are zero.
+
+==== Macro Task
+
+When the partitioner coarsens the graph, it combines nodes together. Each
+fine-grained node represents an atomic "task"; combined nodes in the
+coarsened graph are "macro-tasks". This term comes from Sarkar. Each
+macro-task executes from start to end on one processor, without any
+synchronization to any other macro-task during its
+execution. (Synchronization only happens before the macro-task begins or
+after it ends.)
+
+==== Edge Contraction
+
+Verilator's partitioner, like Sarkar's, primarily relies on "edge
+contraction" to coarsen the graph. It starts with one macro-task per atomic
+task and iteratively combines pairs of edge-connected macro-tasks.
+
+==== Local Critical Path
+
+Each node in the graph has a "local" critical path. That's the critical
+path from the start of the graph to the start of the node, plus the node's
+cost, plus the critical path from the end of the node to the end of the
+graph.
+
+Sarkar calls out an important trade-off: coarsening the graph reduces
+runtime synchronization overhead among the macro-tasks, but it tends to
+increase the critical path through the graph and thus reduces par-factor.
+
+Sarkar's partitioner, and ours, chooses pairs of macro-tasks to merge such
+that the growth in critical path is minimized. Each candidate merge would
+result in a new node, which would have some local critical path. We choose
+the candidate that would produce the shortest local critical path. Repeat
+until par-factor falls to a target threshold. It's a greedy algorithm, and
+it's not guaranteed to produce the best partition (which Sarkar proves is
+NP-hard).
+
+==== Estimating Logic Costs
+
+To compute the cost of any given path through the graph, Verilator
+estimates an execution cost for each task. Each macro-task has an execution
+cost which is simply the sum of its tasks' costs. We assume that
+communication overhead and synchronization overhead are zero, so the cost
+of any given path through the graph is simply the sum of macro-task
+execution costs. Sarkar does almost the same thing, except that he has
+nonzero estimates for synchronization costs.
+
+Verilator's cost estimates are assigned by `InstrCountCostVisitor`.  This
+class is perhaps the most fragile piece of the multithread implementation.
+It's easy to have a bug where you count something cheap (eg. accessing one
+element of a huge array) as if it were expensive (eg. by counting it as if
+it were an access to the entire array.) Even without such gross bugs, the
+estimates this produce are only loosely predictive of actual runtime cost.
+Multithread performance would be better with better runtime costs
+estimates.  This is an area to improve.
+
+==== Scheduling Macro-Tasks at Runtime
+
+After coarsening the graph, we must schedule the macro-tasks for runtime.
+Sarkar describes two options: you can dynamically schedule tasks at
+runtime, with a runtime graph follower. Sarkar calls this the
+"macro-dataflow model."  Verilator does not support this; early experiments
+with this approach had poor performance.
+
+The other option is to statically assign macro-tasks to threads, with each
+thread running its macro-tasks in a static order. Sarkar describes this in
+Chapter 5. Verilator takes this static approach. The only dynamic aspect is
+that each macro task may block before starting, to wait until its
+prerequisites on other threads have finished.
+
+The synchronization cost is cheap if the prereqs are done. If they're not,
+fragmentation (idle CPU cores waiting) is possible. This is the major
+source of overhead in this approach. The `--prof-threads` switch and the
+`verilator_gantt` script can visualize the time lost to such fragmentation.
+
+==== Locating Variables for Best Spatial Locality
+
+After scheduling all code, we attempt to locate variables in memory such
+that variables accessed by a single macro-task are close together in
+memory.  This provides "spatial locality" -- when we pull in a 64-byte
+cache line to access a 2-byte variable, we want the other 62 bytes to be
+ones we'll also likely access soon, for best cache performance.
+
+This turns out to be critical for performance. It should allow Verilator to
+scale to very large models. We don't rely on our working set fitting in any
+CPU cache; instead we essentially "stream" data into caches from
+memory. It's not literally streaming, where the address increases
+monotonically, but it should have similar performance characteristics, so
+long as each macro-task's dataset fits in one core's local caches.
+
+To achieve spatial locality, we tag each variable with the set of
+macro-tasks that access it. Let's call this set the "footprint" of that
+variable. The variables in a given module have a set of footprints. We can
+order those footprints to minimize the distance between them (distance is
+the number of macro-tasks that are different across any two footprints) and
+then emit all variables into the struct in ordered-footprint order.
+
+The footprint ordering is literally the traveling salesman problem, and we
+use a TSP-approximation algorithm to get close to an optimal sort.
+
+This is an old idea. Simulators designed at DEC in the early 1990s used
+similar techniques to optimize both single-thread and multi-thread modes.
+(Verilator does not optimize variable placement for spatial locality in
+serial mode; that is a possible area for improvement.)
+
+==== Improving Multithreaded Performance Further (a TODO list)
+
+===== Wave Scheduling
+
+To allow the Verilated model to run in parallel with the testbench, it
+might be nice to support "wave" scheduling, in which work on a cycle begins
+before `eval()` is called or continues after `eval()` returns.  For now all
+work on a cycle happens during the `eval()` call, leaving Verilator's
+threads idle while the testbench (everything outside `eval()`) is
+working. This would involve fundamental changes within the partitioner,
+however, it's probably the best bet for hiding testbench latency.
+
+===== Efficient Dynamic Scheduling
+
+To scale to more than a few threads, we may revisit a fully dynamic
+scheduler. For large (>16 core) systems it might make sense to dedicate an
+entire core to scheduling, so that scheduler data structures would fit in
+its L1 cache and thus the cost of traversing priority-ordered ready lists
+would not be prohibitive.
+
+===== Static Scheduling with Runtime Repack
+
+We could modify the static scheduling approach by gathering actual
+macro-task execution times at run time, and dynamically re-packing the
+macro-tasks into the threads also at run time. Say, re-pack once every
+10,000 cycles or something. This has the potential to do better than our
+static estimates about macro-task run times. It could potentially react to
+CPU cores that aren't performing equally, due to NUMA or thermal throttling
+or nonuniform competing memory traffic or whatever.
+
+===== Clock Domain Balancing
+
+Right now Verilator makes no attempt to balance clock domains across
+macro-tasks. For a multi-domain model, that could lead to bad gantt chart
+fragmentation. This could be improved if it's a real problem in practice.
+
+===== Other Forms of MTask Balancing
+
+The largest source of runtime overhead is idle CPUs, which happens due to
+variance between our predicted runtime for each MTask and its actual
+runtime. That variance is magnified if MTasks are homogeneous, containing
+similar repeating logic which was generally close together in source code
+and which is still packed together even after going through Verilator's
+digestive tract.
+
+If Verilator could avoid doing that, and instead would take source logic
+that was close together and distribute it across MTasks, that would
+increase the diversity of any given MTask, and this should reduce variance
+in the cost estimates.
+
+One way to do that might be to make various "tie breaker" comparison
+routines in the sources to rely more heavily on randomness, and generally
+try harder not to keep input nodes together when we have the option to
+scramble things.
+
+===== Performance Regression
+
+It would be nice if we had a regression of large designs, with some
+diversity of design styles, to test on both single- and multi-threaded
+modes. This would help to avoid performance regressions, and also to
+evaluate the optimizations while minimizing the impact of parasitic noise.
+
+===== Per-Instance Classes
+
+If we have multiple instances of the same module, and they partition
+differently (likely; we make no attempt to partition them the same) then
+the variable sort will be suboptimal for either instance.  A possible
+improvement would be to emit a unique class for each instance of a module,
+and sort its variables optimally for that instance's code stream.
+
+=== Verilated Flow
+
+The evaluation loop outputted by Verilator is designed to allow a single
+function to perform evaluation under most situations.
+
+On the first evaluation, the Verilated code calls initial blocks, and then
+"settles" the modules, by evaluating functions (from always statements)
+until all signals are stable.
+
+On other evaluations, the Verilated code detects what input signals have
+changes.  If any are clocks, it calls the appropriate sequential functions
+(from `always @ posedge` statements).  Interspersed with sequential functions
+it calls combo functions (from `always @*`).  After this is complete, it
+detects any changes due to combo loops or internally generated clocks, and
+if one is found must reevaluate the model again.
+
+For SystemC code, the `eval()` function is wrapped in a SystemC
+`SC_METHOD`, sensitive to all inputs.  (Ideally it would only be sensitive
+to clocks and combo inputs, but tracing requires all signals to cause
+evaluation, and the performance difference is small.)
+
+If tracing is enabled, a callback examines all variables in the design for
+changes, and writes the trace for each change.  To accelerate this process
+the evaluation process records a bitmask of variables that might have
+changed; if clear, checking those signals for changes may be skipped.
+
+== Coding Conventions
+
+=== Indentation and Naming Style
+
+We will work with contributors to fix up indentation style issues, but it
+is appreciated if you could match our style:
+
+* All files should contain the magic header to insure standard indentation:
++
+   // -*- mode: C++; c-file-style: "cc-mode" -*-
++
+This sets indentation to the `cc-mode` defaults.  (Verilator predates a
+CC-mode change of several years ago which overrides the defaults with GNU
+style indentation; the `c-set-style` undoes that.)
+
+* Use 4 spaces per level, and no tabs.
+
+* Use 2 spaces between the end of source and the beginning of a comment.
+
+* Use 1 space after if/for/switch/while and similar keywords.
+
+* No spaces before semicolons, nor between a function's name and open
+parenthesis (only applies to functions; if/else has a following space).
+
+* Use "mixedCapsSymbols" instead of "underlined_symbols".
+
+* Uas a "p" suffix on variables that are pointers, e.g. "nodep".
+
+* Comment every member variable.
+
+=== The `astgen` Script
+
+Some of the code implementing passes is extremely repetitive, and must be
+implemented for each sub-class of `AstNode`. However, while repetitive,
+there is more variability than can be handled in C++ macros.
+
+In Verilator this is implemented by using a Perl script, `astgen` to
+pre-process the C++ code. For example in `V3Const.cpp` this is used to
+implement the `visit()` functions for each binary operation using the
+`TREEOP` macro.
+
+The original C++ source code is transformed into C++ code in the `obj_opt`
+and `obj_dbg` sub-directories (the former for the optimized version of
+Verilator, the latter for the debug version). So for example `V3Const.cpp`
+into `V3Const__gen.cpp`.
+
+=== Visitor Functions
+
+Verilator uses the "Visitor" design pattern to implement its refinement and
+optimization passes. This allows separation of the pass algorithm from the
+AST on which it operates. Wikipedia provides an introduction to the concept
+at https://en.wikipedia.org/wiki/Visitor_pattern.
+
+As noted above, all visitors are derived classes of `AstNVisitor`. All
+derived classes of `AstNode` implement the `accept` method, which takes as
+argument a reference to an instance or a `AstNVisitor` derived class and
+applies the visit method of the `AstNVisitor` to the invoking AstNode
+instance (i.e. `this`).
+
+One possible difficulty is that a call to `accept` may perform an edit
+which destroys the node it receives as argument. The
+`acceptSubtreeReturnEdits` method of `AstNode` is provided to apply
+`accept` and return the resulting node, even if the original node is
+destroyed (if it is not destroyed it will just return the original node).
+
+The behavior of the visitor classes is achieved by overloading the `visit`
+function for the different `AstNode` derived classes. If a specific
+implementation is not found, the system will look in turn for overloaded
+implementations up the inheritance hierarchy. For example calling `accept`
+on `AstIf` will look in turn for:
+
+   void visit(AstIf* nodep)
+   void visit(AstNodeIf* nodep)
+   void visit(AstNodeStmt* nodep)
+   void visit(AstNode* nodep)
+
+There are three ways data is passed between visitor functions.
+
+1. A visitor-class member variable.  This is generally for passing "parent"
+information down to children.  `m_modp` is a common example.  It's set to
+NULL in the constructor, where that node (`AstModule` visitor) sets it,
+then the children are iterated, then it's cleared.  Children under an
+`AstModule` will see it set, while nodes elsewhere will see it clear.  If
+there can be nested items (for example an `AstFor` under an `AstFor`) the
+variable needs to be save-set-restored in the `AstFor` visitor, otherwise
+exiting the lower for will lose the upper for's setting.
+
+2. User attributes.  Each `AstNode` (*Note.* The AST node, not the visitor)
+has five user attributes, which may be accessed as an integer using the
+`user1()` through `user5()` methods, or as a pointer (of type `AstNUser`)
+using the `user1p()` through `user5p()` methods (a common technique lifted
+from graph traversal packages).
++
+A visitor first clears the one it wants to use by calling
+`AstNode::user#ClearTree()`, then it can mark any node's `user#()` with whatever
+data it wants.  Readers just call `nodep->user()`, but may need to cast
+appropriately, so you'll often see `VN_CAST(nodep->userp(), SOMETYPE)`.
+At the top of each visitor are comments describing how the `user()` stuff
+applies to that visitor class.  For example:
++
+   // NODE STATE
+   // Cleared entire netlist
+   //   AstModule::user1p()     // bool. True to inline this module
++
+This says that at the `AstNetlist` `user1ClearTree()` is called.  Each
+`AstModule`'s `user1()` is used to indicate if we're going to inline it.
++
+These comments are important to make sure a `user#()` on a given `AstNode`
+type is never being used for two different purposes.
++
+Note that calling `user#ClearTree` is fast, it doesn't walk the tree, so
+it's ok to call fairly often.  For example, it's commonly called on every
+module.
+
+3. Parameters can be passed between the visitors in close to the "normal"
+function caller to callee way.  This is the second `vup` parameter of type
+`AstNUser` that is ignored on most of the visitor functions.  V3Width does
+this, but it proved more messy than the above and is deprecated.  (V3Width
+was nearly the first module written.  Someday this scheme may be removed,
+as it slows the program down to have to pass vup everywhere.)
+
+=== Iterators
+
+`AstNVisitor` provides a set of iterators to facilitate walking over the
+tree. Each operates on the current `AstNVisitor` class (as this) and takes
+an argument type `AstNode*`.
+
+`iterate`::
+
+Applies the `accept` method of the `AstNode` to the visitor function.
+
+`iterateAndNextIgnoreEdit`::
+
+Applies the `accept` method of each `AstNode` in a list (i.e. connected by
+`nextp` and `backp` pointers).
+
+`iterateAndNextNull`::
+
+Applies the `accept` method of each `AstNode` in a list, only if the
+provided node is non-NULL. If a node is edited by the call to `accept`,
+apply `accept` again, until the node does not change.
+
+`iterateListBackwards`::
+
+Applies the `accept` method of each `AstNode` in a list, starting with the
+last one.
+
+`iterateChildren`::
+
+Applies the `iterateAndNextNull` method on each child `op1p` through `op4p`
+in turn.
+
+`iterateChildrenBackwards`::
+
+Applies the `iterateListBackwards` method on each child `op1p` through
+`op4p` in turn.
+
+==== Caution on Using Iterators When Child Changes
+
+Visitors often replace one node with another node; V3Width and V3Const are
+major examples.  A visitor which is the parent of such a replacement needs
+to be aware that calling iteration may cause the children to change.  For
+example:
+
+   // nodep->lhsp() is 0x1234000
+   iterateAndNextNull(nodep->lhsp());  // and under covers nodep->lhsp() changes
+   // nodep->lhsp() is 0x5678400
+   iterateAndNextNull(nodep->lhsp());
+
+Will work fine, as even if the first iterate causes a new node to take the
+place of the `lhsp()`, that edit will update `nodep->lhsp()` and the second
+call will correctly see the change. Alternatively:
+
+   lp = nodep->lhsp();
+   // nodep->lhsp() is 0x1234000, lp is 0x1234000
+   iterateAndNextNull(lp); **lhsp=NULL;**  // and under covers nodep->lhsp() changes
+   // nodep->lhsp() is 0x5678400, lp is 0x1234000
+   iterateAndNextNull(lp);
+
+This will cause bugs or a core dump, as lp is a dangling pointer.  Thus it
+is advisable to set lhsp=NULL shown in the *'s above to make sure these
+dangles are avoided.  Another alternative used in special cases mostly in
+V3Width is to use acceptSubtreeReturnEdits, which operates on a single node
+and returns the new pointer if any.  Note acceptSubtreeReturnEdits does not
+follow `nextp()` links.
+
+   lp = acceptSubtreeReturnEdits(lp)
+
+=== Identifying Derived Classes
+
+A common requirement is to identify the specific `AstNode` class we are
+dealing with. For example a visitor might not implement separate `visit`
+methods for `AstIf` and `AstGenIf`, but just a single method for the base
+class:
+
+   void visit (AstNodeIf* nodep)
+
+However that method might want to specify additional code if it is called
+for `AstGenIf`. Verilator does this by providing a `VN_IS` method for each
+possible node type, which returns true if the node is of that type (or
+derived from that type).  So our `visit` method could use:
+
+   if (VN_IS(nodep, AstGenIf) {
+     <code specific to AstGenIf>
+   }
+
+Additionally the `VN_CAST` method converts pointers similar to C++
+`dynamic_cast`. This either returns a pointer to the object cast to that
+type (if it is of class `SOMETYPE`, or a derived class of `SOMETYPE`) or
+else NULL.  (However, for true/false tests use `VN_IS` as that is faster.)
+
+== Testing
+
+For an overview of how to write a test see the BUGS section of the
+Verilator primary manual.
+
+It is important to add tests for failures as well as success (for example
+to check that an error message is correctly triggered).
+
+Tests that fail should by convention have the suffix `_bad` in their name,
+and include `fails = 1` in either their `compile` or `execute` step as
+appropriate.
+
+=== Preparing to Run Tests
+
+For all tests to pass you must install the following packages:
+
+* SystemC to compile the SystemC outputs, see http://systemc.org
+
+* Parallel::Forker from CPAN to run tests in parallel, you can install this
+with e.g. "sudo cpan install Parallel::Forker".
+
+* vcddiff to find differences in VCD outputs. See the readme at
+https://github.com/veripool/vcddiff
+
+=== Controlling the Test Driver
+
+Test drivers are written in PERL. All invoke the main test driver script,
+which can provide detailed help on all the features available when writing
+a test driver.
+
+   test_regress/t/driver.pl --help
+
+For convenience, a summary of the most commonly used features is provided
+here. All drivers require a call to `compile` subroutine to compile the
+test. For run-time tests, this is followed by a call to the `execute`
+subroutine. Both of these functions can optionally be provided with a hash
+table as argument specifying additional options.
+
+The test driver assumes by default that the source Verilog file name
+matches the PERL driver name. So a test whose driver is `t/t_mytest.pl`
+will expect a Verilog source file `t/t_mytest.v`. This can be changed
+using the `top_filename` subroutine, for example
+
+   top_filename("t/t_myothertest.v");
+
+By default all tests will run with major simulators (Icarus Verilog, NC,
+VCS, ModelSim, etc) as well as Verilator, to allow results to be
+compared. However if you wish a test only to be used with Verilator, you
+can use the following:
+
+   scenarios(vlt => 1);
+
+Of the many options that can be set through arguments to `compiler` and
+`execute`, the following are particularly useful:
+
+`verilator_flags2`::
+
+A list of flags to be passed to verilator when compiling.
+
+`fails`::
+
+Set to 1 to indicate that the compilation or execution is intended to fail.
+
+For example the following would specify that compilation requires two
+defines and is expected to fail.
+
+   compile (
+      verilator_flags2 => ["-DSMALL_CLOCK -DGATED_COMMENT"],
+      fails => 1,
+      );
+
+=== Regression Testing for Developers
+
+Developers will also want to call ./configure with two extra flags:
+
+`--enable-ccwarn`::
+
+Causes the build to stop on warnings as well as errors. A good way to
+ensure no sloppy code gets added, however it can be painful when it comes
+to testing, since third party code used in the tests (e.g. SystemC) may not
+be warning free.
+
+`--enable-longtests`::
+
+In addition to the standard C, SystemC examples, also run the tests in the
+`test_regress` directory when using _make test_'.  This is disabled by
+default as SystemC installation problems would otherwise falsely indicate a
+Verilator problem.
+
+When enabling the long tests, some additional PERL modules are needed,
+which you can install using cpan.
+
+   cpan install Unix::Processors
+
+There are some traps to avoid when running regression tests
+
+* When checking the MANIFEST, the test will barf on unexpected code in the
+Verilator tree. So make sure to keep any such code outside the tree.
+
+* Not all Linux systems install Perldoc by default. This is needed for the
+`--help_' option to Verilator, and also for regression testing. This can be
+installed using cpan:
++
+   cpan install Pod::Perldoc
++
+Many Linux systems also offer a standard package for this. Red
+Hat/Fedora/Centos offer _perl-Pod-Perldoc_', while Debian/Ubuntu/Linux Mint
+offer `perl-doc'.
+
+* Running regression may exhaust resources on some Linux systems,
+particularly file handles and user processes. Increase these to
+respectively 16,384 and 4,096. The method of doing this is system
+dependent, but on Fedora Linux it would require editing the
+`/etc/security/limits.conf` file as root.
+
+=== Continuous Integration
+
+Verilator has a https://travis-ci.com/verilator/verilator[Travis CI environment]
+which automatically tests the master branch for test failures on new commits. It
+also runs a daily cron job to validate all of the tests against different OS and
+compiler versions.
+
+Developers can connect Travis CI to their GitHub account so that the CI
+environment can check their branches too by doing the following:
+
+* Go to https://github.com/marketplace/travis-ci and follow the prompts
+
+* Only the Open Source (FREE) version of Travis CI is required
+
+* Under a Travis CI project click More options > Settings in order to set up a
+cron job on a particular branch
+
+=== Fuzzing
+
+There are scripts included to facilitate fuzzing of Verilator.  These have
+been successfully used to find a number of bugs in the frontend.
+
+The scripts are based on using http://lcamtuf.coredump.cx/afl/[American fuzzy lop]
+on a Debian-like system.
+
+To get started, cd to "nodist/fuzzer/" and run "./all".  A sudo password
+may be required to setup the system for fuzzing.
+
+== Debugging
+
+=== --debug
+
+When you run with `--debug` there are two primary output file types placed
+into the obj_dir, .tree and .dot files.
+
+=== .dot Output
+
+Dot files are dumps of internal graphs in
+https://www.graphviz.org[Graphviz] dot format.  When a dot file is dumped,
+Verilator will also print a line on stdout that can be used to format the
+output, for example:
+
+   dot -Tps -o ~/a.ps obj_dir/Vtop_foo.dot
+
+You can then print a.ps.  You may prefer gif format, which doesn't get
+scaled so can be more useful with large graphs.
+
+For dynamic graph viewing consider
+http://zvtm.sourceforge.net/zgrviewer.html[ZGRViewer].  If you know of
+better viewers let us know; ZGRViewer isn't great for large graphs.
+
+=== .tree Output
+
+Tree files are dumps of the AST Tree and are produced between every major
+algorithmic stage.  An example:
+
+     NETLIST 0x90fb00 <e1> {a0}
+    1: MODULE 0x912b20 <e8822> {a8}  top  L2 [P]
+   *1:2: VAR 0x91a780 <e74#> {a22} @dt=0xa2e640(w32)  out_wide [O] WIRE
+    1:2:1: BASICDTYPE 0xa2e640 <e2149> {e24} @dt=this(sw32)  integer kwd=integer range=[31:0]
+
+The following summarizes the above example dump, with more detail on each
+field in the section below.
+
+[cols="20%,80%"]
+|===
+
+|`1:2:` | indicates the hierarchy of the `VAR` is the `op2p` pointer under
+the `MODULE`, which in turn is the `op1p` pointer under the `NETLIST`
+
+|`VAR` | is the AstNodeType.
+
+| `0x91a780` | is the address of this node.
+
+| `<e74>` | means the 74th edit to the netlist was the last modification to
+this node.
+
+| `{a22}` | indicates this node is related to line 22 in the source filename
+"a", where "a" is the first file read, "z" the 26th, and "aa" the 27th.
+
+| `@dt=0x...` | indicates the address of the data type this node contains.
+
+| `w32` | indicates the width is 32 bits.
+
+| `out_wide` | is the name of the node, in this case the name of the variable.
+
+| `[O]` |  are flags which vary with the type of node, in this case it means the
+variable is an output.
+
+|===
+
+In more detail the following fields are dumped common to all nodes. They
+are produced by the `AstNode::dump()` method:
+
+Tree Hierarchy::
+
+The dump lines begin with numbers and colons to indicate the child node
+hierarchy.  As noted above, `AstNode` has lists of items at the same level
+in the AST, connected by the `nextp()` and `prevp()` pointers. These appear
+as nodes at the same level. For example after inlining:
+
+    NETLIST 0x929c1c8 <e1> {a0} w0
+   1: MODULE 0x92bac80 <e3144> {e14} w0  TOP_t  L1 [P]
+   1:1: CELLINLINE 0x92bab18 <e3686#> {e14} w0  v -> t
+   1:1: CELLINLINE 0x92bc1d8 <e3688#> {e24} w0  v__DOT__i_test_gen -> test_gen
+   ...
+   1: MODULE 0x92b9bb0 <e503> {e47} w0  test_gen  L3
+   ...
+
+AstNode type::
+
+The textual name of this node AST type (always in capitals). Many of these
+correspond directly to Verilog entities (for example `MODULE` and
+`TASK`), but others are internal to Verilator (for example `NETLIST` and
+`BASICDTYPE`).
+
+Address of the node::
+
+A hexadecimal address of the node in memory. Useful for examining with the
+debugger.
+
+Last edit number::
+
+Of the form `<ennnn>` or `<ennnn#>` , where `nnnn` is the number
+of the last edit to modify this node. The trailing `#` indicates the node
+has been edited since the last tree dump (which typically means in the last
+refinement or optimization pass). GDB can watch for this, see << /Debugging >>.
+
+Source file and line::
+
+Of the form `{xxnnnn}`, where C{xx} is the filename letter (or
+letters) and `nnnn` is the line number within that file. The first file is
+`a`, the 26th is `z`, the 27th is `aa` and so on.
+
+User pointers::
+
+Shows the value of the node's user1p...user5p, if non-NULL.
+
+Data type::
+
+Many nodes have an explicit data type.  "@dt=0x..." indicates the address
+of the data type (AstNodeDType) this node uses.
++
+If a data type is present and is numeric, it then prints the width of the
+item. This field is a sequence of flag characters and width data as follows:
++
+* `s` if the node is signed.
+* `d` if the node is a double (i.e a floating point entity).
+* `w` always present, indicating this is the width field.
+* `u` if the node is unsized.
+* `/nnnn` if the node is unsized, where `nnnn` is the minimum width.
+
+Name of the entity represented by the node if it exists::
+
+For example for a `VAR` it is the name of the variable.
+
+Many nodes follow these fields with additional node specific
+information. Thus the `VARREF` node will print either `[LV]` or `[RV]`
+to indicate a left value or right value, followed by the node of the
+variable being referred to. For example:
+
+   1:2:1:1: VARREF 0x92c2598 <e509> {e24} w0  clk [RV] <- VAR 0x92a2e90 <e79> {e18} w0  clk [I] INPUT
+
+In general, examine the `dump()` method in `V3AstNodes.cpp` of the node
+type in question to determine additional fields that may be printed.
+
+The `MODULE` has a list of `CELLINLINE` nodes referred to by its
+`op1p()` pointer, connected by `nextp()` and `prevp()` pointers.
+
+Similarly the `NETLIST` has a list of modules referred to by its `op1p()`
+pointer.
+
+=== Debugging with GDB
+
+The test_regress/driver.pl script accepts `--debug --gdb` to start
+Verilator under gdb and break when an error is hit or the program is about
+to exit.  You can also use `--debug --gdbbt` to just backtrace and then
+exit gdb. To debug the Verilated executable, use `--gdbsim`.
+
+If you wish to start Verilator under GDB (or another debugger), then you
+can use `--debug` and look at the underlying invocation of
+`verilator_dbg`. For example
+
+   t/t_alw_dly.pl --debug
+
+shows it invokes the command:
+
+   ../verilator_bin_dbg --prefix Vt_alw_dly --x-assign unique --debug
+     -cc -Mdir obj_dir/t_alw_dly --debug-check -f input.vc t/t_alw_dly.v
+
+Start GDB, then `start` with the remaining arguments.
+
+   gdb ../verilator_bin_dbg
+   ...
+   (gdb) start --prefix Vt_alw_dly --x-assign unique --debug -cc -Mdir
+             obj_dir/t_alw_dly --debug-check  -f input.vc t/t_alw_dly.v
+             > obj_dir/t_alw_dly/vlt_compile.log
+   ...
+   Temporary breakpoint 1, main (argc=13, argv=0xbfffefa4, env=0xbfffefdc)
+       at ../Verilator.cpp:615
+   615         ios::sync_with_stdio();
+   (gdb)
+
+You can then continue execution with breakpoints as required.
+
+To break at a specific edit number which changed a node (presumably to find
+what made a <e####> line in the tree dumps):
+
+   watch AstNode::s_editCntGbl==####
+
+Then, when the watch fires, to break at every following change to that node:
+
+   watch m_editCount
+
+To print a node:
+
+   pn nodep
+   # or: call nodep->dumpGdb()  # aliased to "pn" in src/.gdbinit
+   pnt nodep
+   # or: call nodep->dumpTreeGdb()  # aliased to "pnt" in src/.gdbinit
+
+When GDB halts, it is useful to understand that the backtrace will commonly
+show the iterator functions between each invocation of `visit` in the
+backtrace. You will typically see a frame sequence something like
+
+   ...
+   visit()
+   iterateChildren()
+   iterateAndNext()
+   accept()
+   visit()
+   ...
+
+== Adding a New Feature
+
+Generally what would you do to add a new feature?
+
+. File an issue (if there isn't already) so others know what you're working on.
+
+. Make a testcase in the test_regress/t/t_EXAMPLE format, see << /TESTING >>.
+
+. If grammar changes are needed, look at the git version of VerilogPerl's
+src/VParseGrammar.y, as this grammar supports the full SystemVerilog
+language and has a lot of back-and-forth with Verilator's grammar.  Copy
+the appropriate rules to src/verilog.y and modify the productions.
+
+. If a new Ast type is needed, add it to V3AstNodes.h.
+
+. Now you can run "test_regress/t/t_{new testcase}.pl --debug" and it'll
+probably fail but you'll see a test_regress/obj_dir/t_{newtestcase}/*.tree
+file which you can examine to see if the parsing worked. See also the
+sections above on debugging.
+
+. Modify the later visitor functions to process the new feature as needed.
+
+=== Adding a New Pass
+
+For more substantial changes you may need to add a new pass. The simplest
+way to do this is to copy the `.cpp` and `.h` files from an existing
+pass. You'll need to add a call into your pass from the `process()`
+function in `src/verilator.cpp`.
+
+To get your pass to build you'll need to add its binary filename to the
+list in `src/Makefile_obj.in` and reconfigure.
+
+== Distribution
+
+Copyright 2008-2019 by Wilson Snyder.  Verilator is free software; you can
+redistribute it and/or modify it under the terms of either the GNU Lesser
+General Public License Version 3 or the Perl Artistic License Version 2.0.

examples/cmake_hello_c/.gitignore

@@ -0,0 +1 @@
+build*

examples/cmake_hello_c/CMakeLists.txt

@@ -0,0 +1,37 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt
+#
+# This is an example cmake script to build a verilog to systemc project
+# using cmake and verilator.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_c example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_c
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_hello_c)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_hello_c/sim_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example
+  INCLUDE_DIRS "../make_hello_c"
+  SOURCES ../make_hello_c/top.v)

examples/cmake_hello_c/Makefile

@@ -0,0 +1,79 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifeq ($(CMAKE_GT_3_8),true)
+TARGET := run
+else
+TARGET := oldcmake
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake hello world example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	build/example
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo

examples/cmake_hello_sc/.gitignore

@@ -0,0 +1 @@
+build*

examples/cmake_hello_sc/CMakeLists.txt

@@ -0,0 +1,46 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with SystemC
+#
+# This is an example cmake script to build a verilog to SystemC project
+# using CMake and Verilator.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_sc example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_sc
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_hello_sc)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# SystemC dependencies
+set(THREADS_PREFER_PTHREAD_FLAG ON)
+find_package(Threads REQUIRED)
+
+# Find SystemC using SystemC's CMake integration
+find_package(SystemCLanguage QUIET)
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_hello_sc/sc_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example SYSTEMC
+  INCLUDE_DIRS "../make_hello_sc"
+  SOURCES ../make_hello_sc/top.v)
+
+verilator_link_systemc(example)

examples/cmake_hello_sc/Makefile

@@ -0,0 +1,129 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+	TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifneq ($(CMAKE_GT_3_8),true)
+TARGET := oldcmake
+else
+
+# Test existence of SYSTEMC_INCLUDE and SYSTEMC_LIBDIR environment variabless
+ifneq (,$(SYSTEMC_INCLUDE))
+ifneq (,${SYSTEMC_LIBDIR})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC_ROOT environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC_ROOT})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test whether SystemC is installed with CMake support
+# This will print a CMake error about processing arguments that can (currently) be ignored.
+ifneq (SYSTEMC_SET, true)
+FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+SYSTEMC_SET := true
+endif
+endif
+
+ifeq ($(SYSTEMC_SET), true)
+TARGET := run
+else
+TARGET := nosc
+endif
+
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake SystemC hello-world simple example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@mkdir -p logs
+	build/example
+
+	@echo "-- DONE --------------------"
+	@echo "Note: Once this example is understood, see examples/cmake_tracing_sc."
+	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo
+
+nosc:
+	@echo
+	@echo "%Skip: CMake could not find SystemC."
+	@echo "% Make sure that either:"
+	@echo "% - The environment variables SYSTEMC_INCLUDE and SYSTEMC_LIBDIR are exported."
+	@echo "% - Or, the environment variable SYSTEMC_ROOT is exported."
+	@echo "% - Or, The environment variable SYSTEMC is exported."
+	@echo "% - Or, if the SystemC installation provides CMake support,"
+	@echo "%   that its installation prefix is in CMAKE_PREFIX_PATH."
+	@echo "% Also that the C++ standard of the SystemC library is the same as this example."
+	@echo "% Please see the Verilator documentation's CMake section for more information."
+	@echo

examples/cmake_protect_lib/.gitignore

@@ -0,0 +1 @@
+build*

examples/cmake_protect_lib/CMakeLists.txt

@@ -0,0 +1,60 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt
+#
+# This is an example cmake script to build a verilog to systemc project
+# using cmake and verilator.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_c example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_c
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_protect_lib)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# Create the main executable target
+add_executable(example ../make_protect_lib/sim_main.cpp)
+
+# Create a secret library
+add_library(verilated_secret STATIC) # or SHARED for a shared library
+target_link_libraries(example PRIVATE verilated_secret)
+# To create both libraries on CMake >= 3.12 replace the above 2 lines with the following:
+# add_library(verilated_secret OBJECT)
+# set_property(TARGET verilated_secret PROPERTY POSITION_INDEPENDENT_CODE 1)
+# add_library(verilated_secret_static STATIC  $<TARGET_OBJECTS:verilated_secret>)
+# set_target_properties(verilated_secret_static PROPERTIES OUTPUT_NAME verilated_secret)
+# add_library(verilated_secret_shared SHARED  $<TARGET_OBJECTS:verilated_secret>)
+# set_target_properties(verilated_secret_shared PROPERTIES OUTPUT_NAME verilated_secret)
+# target_link_libraries(example PRIVATE verilated_secret_static)
+
+# Setup random seed
+verilator_generate_key(KEY_INIT)
+set(PROTECT_KEY ${KEY_INIT} CACHE STRING "Random seed for protection")
+
+# Add the Verilated modules to the targets
+verilate(verilated_secret
+  VERILATOR_ARGS --protect-lib verilated_secret
+                 --protect-key ${PROTECT_KEY}
+  DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/verilated_secret
+  SOURCES ../make_protect_lib/secret_impl.v)
+
+# Include location of verilated_secret.sv wrapper
+verilate(example
+  VERILATOR_ARGS "-I${CMAKE_CURRENT_BINARY_DIR}/verilated_secret"
+  SOURCES ../make_protect_lib/top.v)

examples/cmake_protect_lib/Makefile

@@ -0,0 +1,79 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifeq ($(CMAKE_GT_3_8),true)
+TARGET := run
+else
+TARGET := oldcmake
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake protect_lib example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	build/example
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo

examples/cmake_tracing_c/.gitignore

@@ -0,0 +1,2 @@
+build*
+logs

examples/cmake_tracing_c/CMakeLists.txt

@@ -0,0 +1,38 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with tracing
+#
+# This is an example cmake script to build a verilog to systemc project
+# using cmake and verilator.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the make_tracing_c example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_tracing_c
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_tracing_c)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_tracing_c/sim_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example COVERAGE TRACE
+  INCLUDE_DIRS "../make_tracing_c"
+  VERILATOR_ARGS -f ../make_tracing_c/input.vc -O2 -x-assign 0
+  SOURCES ../make_tracing_c/top.v)

examples/cmake_tracing_c/Makefile

@@ -0,0 +1,85 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifeq ($(CMAKE_GT_3_8),true)
+TARGET := run
+else
+TARGET := oldcmake
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake tracing example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@mkdir -p logs
+	build/example +trace
+
+	@echo
+	@echo "-- COVERAGE ----------------"
+	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo

examples/cmake_tracing_sc/.gitignore

@@ -0,0 +1,7 @@
+*.dmp
+*.log
+*.csrc
+*.vcd
+obj_*
+logs
+build*

examples/cmake_tracing_sc/CMakeLists.txt

@@ -0,0 +1,47 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake Example: Small CMakeLists.txt with SystemC tracing
+#
+# This is an example cmake script to build a verilog to SystemC project
+# using CMake and Verilator.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This example builds the tracing_sc example using CMake
+# To use it, run the following:
+
+# cd /path/to/verilator/examples/cmake_tracing_sc
+# rm -rf build && mkdir build && cd build
+# cmake ..
+# cmake --build .
+
+cmake_minimum_required(VERSION 3.8)
+project(cmake_tracing_sc_example)
+
+find_package(verilator HINTS $ENV{VERILATOR_ROOT} ${VERILATOR_ROOT})
+if (NOT verilator_FOUND)
+  message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
+endif()
+
+# SystemC dependencies
+set(THREADS_PREFER_PTHREAD_FLAG ON)
+find_package(Threads REQUIRED)
+
+# Find SystemC using SystemC's CMake integration
+find_package(SystemCLanguage QUIET)
+
+# Create a new executable target that will contain all your sources
+add_executable(example ../make_tracing_sc/sc_main.cpp)
+
+# Add the Verilated circuit to the target
+verilate(example SYSTEMC COVERAGE TRACE
+  INCLUDE_DIRS "../make_tracing_sc"
+  VERILATOR_ARGS -f ../make_tracing_sc/input.vc -O2 -x-assign 0
+  SOURCES ../make_tracing_sc/top.v)
+
+verilator_link_systemc(example)

examples/cmake_tracing_sc/Makefile

@@ -0,0 +1,134 @@
+######################################################################
+#
+# DESCRIPTION: Verilator CMake example usage
+#
+# This file shows usage of the CMake script.
+# This makefile is here for testing the examples and should
+# generally not be added to a CMake project.
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR_COVERAGE = verilator_coverage
+else
+export VERILATOR_ROOT
+VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+endif
+######################################################################
+
+# Check if CMake is installed and of correct version
+ifeq ($(shell which cmake),)
+	TARGET := nocmake
+else
+CMAKE_VERSION := $(shell cmake --version | grep -Po '(\d[\.\d]+)')
+CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+ifneq ($(CMAKE_GT_3_8),true)
+TARGET := oldcmake
+else
+
+# Test existence of SYSTEMC_INCLUDE and SYSTEMC_LIBDIR environment variabless
+ifneq (,$(SYSTEMC_INCLUDE))
+ifneq (,${SYSTEMC_LIBDIR})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC_ROOT environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC_ROOT})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test existence of SYSTEMC environment variable
+ifneq (SYSTEMC_SET, true)
+ifneq (,${SYSTEMC})
+SYSTEMC_SET := true
+endif
+endif
+
+# Test whether SystemC is installed with CMake support
+# This will print a CMake error about processing arguments that can (currently) be ignored.
+ifneq (SYSTEMC_SET, true)
+FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+SYSTEMC_SET := true
+endif
+endif
+
+ifeq ($(SYSTEMC_SET), true)
+TARGET := run
+else
+TARGET := nosc
+endif
+
+endif
+endif
+
+default: $(TARGET)
+
+run:
+	@echo
+	@echo "-- Verilator CMake SystemC tracing example"
+
+	@echo
+	@echo "-- CMake ----------------"
+	mkdir -p build && cd build && cmake ..
+
+	@echo
+	@echo "-- COMPILE -----------------"
+	cmake --build build
+
+	@echo
+	@echo "-- RUN ---------------------"
+	@mkdir -p logs
+	build/example +trace
+
+	@echo
+	@echo "-- COVERAGE ----------------"
+	$(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat
+
+	@echo
+	@echo "-- DONE --------------------"
+	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
+	@echo
+
+clean mostlyclean distclean maintainer-clean:
+	@rm -rf build logs
+
+nocmake:
+	@echo
+	@echo "%Skip: CMake has not been found"
+	@echo
+
+oldcmake:
+	@echo
+	@echo "%Skip: CMake version is too old (need at least 3.8)"
+	@echo
+
+nosc:
+	@echo
+	@echo "%Skip: CMake could not find SystemC."
+	@echo "% Make sure that either:"
+	@echo "% - The environment variables SYSTEMC_INCLUDE and SYSTEMC_LIBDIR are exported."
+	@echo "% - Or, the environment variable SYSTEMC_ROOT is exported."
+	@echo "% - Or, The environment variable SYSTEMC is exported."
+	@echo "% - Or, if the SystemC installation provides CMake support,"
+	@echo "%   that its installation prefix is in CMAKE_PREFIX_PATH."
+	@echo "% Also that the C++ standard of the SystemC library is the same as this example."
+	@echo "% Please see the Verilator documentation's CMake section for more information."
+	@echo

examples/make_hello_c/Makefile

@@ -21,10 +21,10 @@ endif
 
 # This is intended to be a minimal example.  Before copying this to start a
 # real project, it is better to start with a more complete example,
-# e.g. examples/tracing_c.
+# e.g. examples/make_tracing_c.
 
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
@@ -42,7 +42,7 @@ default:
 	@echo "-- RUN ---------------------"
 	obj_dir/Vtop
 	@echo "-- DONE --------------------"
-	@echo "Note: Once this example is understood, see examples/tracing_c."
+	@echo "Note: Once this example is understood, see examples/make_tracing_c."
 	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
 
 ######################################################################

examples/make_hello_sc/Makefile

@@ -21,10 +21,10 @@ endif
 
 # This is intended to be a minimal example.  Before copying this to start a
 # real project, it is better to start with a more complete example,
-# e.g. examples/tracing_sc.
+# e.g. examples/make_tracing_sc.
 
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator
@@ -51,7 +51,7 @@ run:
 	@echo "-- RUN ---------------------"
 	obj_dir/Vtop
 	@echo "-- DONE --------------------"
-	@echo "Note: Once this example is understood, see examples/tracing_sc."
+	@echo "Note: Once this example is understood, see examples/make_tracing_sc."
 	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
 
 ######################################################################

examples/make_protect_lib/.gitignore

@@ -0,0 +1,2 @@
+obj_*
+logs

examples/make_protect_lib/Makefile

@@ -0,0 +1,97 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: --protect-lib Makefile
+#
+# This calls the object directory makefiles.  That allows the objects to
+# be placed in the "current directory" which simplifies the Makefile.
+#
+# Copyright 2019 by Todd Strader. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+# Check for sanity to avoid later confusion
+
+ifneq ($(words $(CURDIR)),1)
+ $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+endif
+
+######################################################################
+# Set up variables
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+endif
+
+VERILATOR_FLAGS =
+# Generate C++
+VERILATOR_FLAGS += -cc
+# Optimize
+VERILATOR_FLAGS += -O2 -x-assign 0
+# Warn abount lint issues; may not want this on less solid designs
+VERILATOR_FLAGS += -Wall
+# Make waveforms
+TOP_VERILATOR_FLAGS = $(VERILATOR_FLAGS) --trace
+
+######################################################################
+default: run
+
+run:
+	@echo
+	@echo "-- Verilator --protect-lib example -_--------------------------"
+
+	@echo
+	@echo "-- VERILATE secret module -------------------------------------"
+	@echo " --protect-lib will produce both a static and shared library"
+	@echo " In this example the static library is used, but some"
+	@echo " simulators may require the shared library."
+	@echo "---------------------------------------------------------------"
+	$(VERILATOR) $(VERILATOR_FLAGS) --protect-lib verilated_secret -Mdir obj_dir_secret/ secret_impl.v
+
+	@echo
+	@echo "-- COMPILE protected library ----------------------------------"
+	@echo " This builds verilated_secret.sv, libverilated_secret.a and"
+	@echo " libverilated_secret.so which can be distributed apart from"
+	@echo " the source"
+	@echo "---------------------------------------------------------------"
+	$(MAKE) -j 4 -C obj_dir_secret -f Vsecret_impl.mk
+
+	@echo
+	@echo "-- VERILATE top module ----------------------------------------"
+	@echo " Use the SystemVerilog wrapper (verilated_secret.sv) and the"
+	@echo " library (libverilated_secret.a) generated from the previous"
+	@echo " step"
+	@echo "---------------------------------------------------------------"
+	$(VERILATOR) $(TOP_VERILATOR_FLAGS) --exe -LDFLAGS '-L../obj_dir_secret -lverilated_secret -static' top.v obj_dir_secret/verilated_secret.sv sim_main.cpp
+
+	@echo
+	@echo "-- COMPILE entire design --------------------------------------"
+	$(MAKE) -j 4 -C obj_dir -f Vtop.mk
+
+	@echo
+	@echo "-- RUN --------------------------------------------------------"
+	@mkdir -p logs
+	obj_dir/Vtop +trace
+
+	@echo
+	@echo "-- DONE -------------------------------------------------------"
+	@echo "To see waveforms, open logs/vlt_dump.vcd in a waveform viewer"
+	@echo
+
+
+######################################################################
+# Other targets
+
+show-config:
+	$(VERILATOR) -V
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir* logs *.log core

examples/make_protect_lib/secret_impl.v

@@ -0,0 +1,27 @@
+// DESCRIPTION: Verilator: --protect-lib example secret module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Todd Strader.
+
+// This module will be used as libsecret.a or libsecret.so without
+// exposing the source.
+module secret_impl(
+		   input [31:0]        a,
+		   input [31:0]        b,
+		   output logic [31:0] x,
+		   input 	       clk);
+
+   logic [31:0] 		       accum_q = 0;
+   logic [31:0] 		       secret_value = 9;
+
+   initial $display("%m: initialized");
+
+   always @(posedge clk) begin
+      accum_q <= accum_q + a;
+      if (accum_q > 10)
+        x <= b;
+      else
+        x <= a + b + secret_value;
+   end
+
+endmodule

examples/make_protect_lib/sim_main.cpp

@@ -0,0 +1,72 @@
+// DESCRIPTION: Verilator: --protect-lib example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Todd Strader.
+//======================================================================
+
+// See examples/tracing_c for notes on tracing
+
+// Include common routines
+#include <verilated.h>
+
+#include "Vtop.h"
+
+#if VM_TRACE
+# include <verilated_vcd_c.h>
+#endif
+
+vluint64_t main_time = 0;
+double sc_time_stamp() {
+    return main_time;
+}
+
+int main(int argc, char** argv, char** env) {
+    if (0 && argc && argv && env) {}
+
+    Verilated::debug(0);
+    Verilated::randReset(2);
+    Verilated::commandArgs(argc, argv);
+
+    // Construct the Verilated model, including the secret module
+    Vtop* top = new Vtop;
+
+#if VM_TRACE
+    // When tracing, the contents of the secret module will not be seen
+    VerilatedVcdC* tfp = NULL;
+    const char* flag = Verilated::commandArgsPlusMatch("trace");
+    if (flag && 0==strcmp(flag, "+trace")) {
+        Verilated::traceEverOn(true);
+        VL_PRINTF("Enabling waves into logs/vlt_dump.vcd...\n");
+        tfp = new VerilatedVcdC;
+        top->trace(tfp, 99);
+        Verilated::mkdir("logs");
+        tfp->open("logs/vlt_dump.vcd");
+    }
+#endif
+
+    top->clk = 0;
+
+    // Simulate until $finish
+    while (!Verilated::gotFinish()) {
+        main_time++;
+        top->clk = ~top->clk & 0x1;
+        top->eval();
+#if VM_TRACE
+        if (tfp) tfp->dump(main_time);
+#endif
+    }
+
+    // Final model cleanup
+    top->final();
+
+    // Close trace if opened
+#if VM_TRACE
+    if (tfp) { tfp->close(); tfp = NULL; }
+#endif
+
+    // Destroy model
+    delete top; top = NULL;
+
+    // Fin
+    exit(0);
+}

examples/make_protect_lib/top.v

@@ -0,0 +1,34 @@
+// DESCRIPTION: Verilator: --protect-lib example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Todd Strader.
+
+// See also the EXAMPLE section in the verilator manpage/document.
+module top (input clk);
+
+   integer cyc = 0;
+   logic [31:0] a = 0;
+   logic [31:0] b = 0;
+   logic [31:0] x;
+
+   verilated_secret secret (.a, .b, .x, .clk);
+
+   always @(posedge clk) begin
+      $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
+      cyc <= cyc + 1;
+      if (cyc == 0) begin
+         a <= 5;
+         b <= 7;
+      end else if (cyc == 1) begin
+         a <= 6;
+         b <= 2;
+      end else if (cyc == 2) begin
+         a <= 1;
+         b <= 9;
+      end else if (cyc > 3) begin
+         $display("Done");
+         $finish;
+      end
+   end
+
+endmodule

examples/make_tracing_c/Makefile

@@ -21,7 +21,7 @@ endif
 # Set up variables
 
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator

examples/make_tracing_c/sim_main.cpp

@@ -23,7 +23,7 @@ double sc_time_stamp() {
 }
 
 int main(int argc, char** argv, char** env) {
-    // This is a more complicated example, please also see the simpler examples/hello_world_c.
+    // This is a more complicated example, please also see the simpler examples/make_hello_c.
 
     // Prevent unused variable warnings
     if (0 && argc && argv && env) {}

examples/make_tracing_c/top.v

@@ -5,7 +5,7 @@
 // ======================================================================
 
 // This is intended to be a complex example of several features, please also
-// see the simpler examples/hello_world_c.
+// see the simpler examples/make_hello_c.
 
 module top
   (
@@ -14,18 +14,18 @@ module top
    input         fastclk,
    input         reset_l,
 
-   output [1:0]  out_small,
-   output [39:0] out_quad,
-   output [69:0] out_wide,
+   output wire [1:0]  out_small,
+   output wire [39:0] out_quad,
+   output wire [69:0] out_wide,
    input [1:0]   in_small,
    input [39:0]  in_quad,
    input [69:0]  in_wide
    );
 
    // Connect up the outputs, using some trivial logic
-   wire [1:0]    out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   wire [39:0]   out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   wire [69:0]   out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
 
    // And an example sub module. The submodule will print stuff.
    sub sub (/*AUTOINST*/

examples/make_tracing_sc/Makefile

@@ -21,7 +21,7 @@ endif
 # Set up variables
 
 # If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
-# package inatall, and verilator is in your path. Otherwise find the
+# package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
 VERILATOR = verilator

examples/make_tracing_sc/sc_main.cpp

@@ -20,7 +20,7 @@
 #include "Vtop.h"
 
 int sc_main(int argc, char* argv[]) {
-    // This is a more complicated example, please also see the simpler examples/hello_world_c.
+    // This is a more complicated example, please also see the simpler examples/make_hello_c.
 
     // Prevent unused variable warnings
     if (0 && argc && argv) {}

examples/make_tracing_sc/top.v

@@ -5,7 +5,7 @@
 // ======================================================================
 
 // This is intended to be a complex example of several features, please also
-// see the simpler examples/hello_world_c.
+// see the simpler examples/make_hello_c.
 
 module top
   (
@@ -14,18 +14,18 @@ module top
    input         fastclk,
    input         reset_l,
 
-   output [1:0]  out_small,
-   output [39:0] out_quad,
-   output [69:0] out_wide,
+   output wire [1:0]  out_small,
+   output wire [39:0] out_quad,
+   output wire [69:0] out_wide,
    input [1:0]   in_small,
    input [39:0]  in_quad,
    input [69:0]  in_wide
    );
 
    // Connect up the outputs, using some trivial logic
-   wire [1:0]    out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   wire [39:0]   out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   wire [69:0]   out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
 
    // And an example sub module. The submodule will print stuff.
    sub sub (/*AUTOINST*/

examples/xml_py/.gitignore

@@ -0,0 +1,6 @@
+obj_*
+copied
+*.csv
+*.dot
+*.dmp
+*.pdf

examples/xml_py/Makefile

@@ -0,0 +1,49 @@
+######################################################################
+#
+# DESCRIPTION: Verilator Example: XML tests
+#
+# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+#
+######################################################################
+
+# This makefile is not intended to be useful as an example itself,
+# it is just to run the small example scripts in this directory.
+
+# If $VERILATOR_ROOT isn't in the environment, we assume it is part of a
+# package install, and verilator is in your path. Otherwise find the
+# binary relative to $VERILATOR_ROOT (such as when inside the git sources).
+ifeq ($(VERILATOR_ROOT),)
+VERILATOR = verilator
+else
+export VERILATOR_ROOT
+VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+endif
+
+DOT = dot
+PYTHON = python3
+
+default: test
+
+test: \
+	test-vl_file_copy \
+	test-vl_hier_graph \
+
+test-vl_file_copy:
+	@echo "-- vl_file_copy example"
+	$(PYTHON) vl_file_copy -odir copied top.v
+	@cmp copied/top.v top.v
+	@cmp copied/sub.v sub.v
+
+test-vl_hier_graph:
+	@echo "-- vl_hier_graph example"
+	$(PYTHON) vl_hier_graph -o graph.dot top.v
+	@echo "Manually run: " $(DOT) -Tpdf -o graph.pdf graph.dot
+
+######################################################################
+
+maintainer-copy::
+clean mostlyclean distclean maintainer-clean::
+	-rm -rf obj_dir *.log *.csv *.dmp *.dot *.vpd *.pdf core copied

examples/xml_py/sub.v

@@ -0,0 +1,17 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Wilson Snyder.
+// ======================================================================
+
+module sub
+  #(parameter type TYPE_t = logic)
+   (
+    input TYPE_t in,
+    output TYPE_t out
+    );
+
+   // Some simple logic
+   always_comb out = ~ in;
+
+endmodule

examples/xml_py/top.v

@@ -0,0 +1,32 @@
+// DESCRIPTION: Verilator: Verilog example module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2019 by Wilson Snyder.
+// ======================================================================
+
+module top
+  (
+   input         clk,
+   input         fastclk,
+   input         reset_l,
+
+   output wire [1:0]  out_small,
+   output wire [39:0] out_quad,
+   output wire [69:0] out_wide,
+   input [1:0]   in_small,
+   input [39:0]  in_quad,
+   input [69:0]  in_wide
+   );
+
+   sub #(.TYPE_t(logic [1:0])) sub_small
+     (.in(in_small),
+      .out(out_small));
+
+   sub #(.TYPE_t(logic [39:0])) sub_quad
+     (.in(in_quad),
+      .out(out_quad));
+
+   sub #(.TYPE_t(logic [69:0])) sub_wide
+     (.in(in_wide),
+      .out(out_wide));
+endmodule

examples/xml_py/vl_file_copy

@@ -0,0 +1,112 @@
+#!/usr/bin/env python3
+# -*- Python -*- See copyright, etc below
+######################################################################
+
+import argparse
+import os
+import re
+import subprocess
+import sys
+import tempfile
+import xml.etree.ElementTree as ET
+from shutil import copy2
+from pprint import pprint,pformat
+
+#######################################################################
+
+class VlFileCopy:
+    def __init__(self,
+                 verilator_args,  # presently all verilator options are passed-thru
+                 # ideally this script would check against options mentioned in help
+                 debug=0,
+                 output_dir='copied'):  # directory name we output file uses
+        self.debug = debug
+
+        xml_temp = tempfile.NamedTemporaryFile()
+
+        args = ['--xml-output', xml_temp.name,
+                '--bbox-sys',  # Parse some stuff can't translate
+                '--bbox-unsup',
+                '--prefix vlxml']  # So we know name of .xml output
+        args += verilator_args
+        self.run_verilator(args)
+        self.tree = ET.parse(xml_temp.name)
+
+        os.makedirs(output_dir, 0o777, True)
+
+        # Find and copy the files
+        root = self.tree.getroot()
+        xfiles = root.find('files')
+        for xfile in xfiles.findall('file'):
+            filename = xfile.get('filename')
+            if not re.match('^<', filename):  # e.g. <built-in>
+                if self.debug:
+                    print("\tcp %s %s" % (filename, output_dir))
+                copy2(filename, output_dir)
+
+    def run_verilator(self, args):
+        """Run Verilator command, check errors"""
+        if os.getenv("VERILATOR_ROOT"):
+            command = os.getenv("VERILATOR_ROOT") + "/bin/verilator"
+        else:
+            command = "verilator"
+        command += ' ' + ' '.join(args)
+        if self.debug:
+            print("\t%s " % command)
+        status = subprocess.call(command, shell=True)
+        if status != 0:
+            raise Exception("Command failed running Verilator with '"+command+"', stopped")
+
+#######################################################################
+
+if __name__=='__main__':
+    parser = argparse.ArgumentParser(
+        allow_abbrev=False,
+        formatter_class=argparse.RawTextHelpFormatter,
+        description=
+"""Example of using Verilator XML output to copy a list of files to an
+output directory (-odir, defaults to 'copied'), e.g. to easily create a
+tarball of the design to pass to others.
+
+Example usage:
+     vl_file_copy -f input.vc top.v -odir mycopy
+     # This will make at least mycopy/top.v
+""",
+        epilog=
+"""All other arguments are pass-thru to Verilator: e.g.:
+
+  +define+<var>=<value>      Set preprocessor define
+  -F <file>                  Parse options from a file, relatively
+  -f <file>                  Parse options from a file
+  -G<name>=<value>           Overwrite toplevel parameter
+  +incdir+<dir>              Directory to search for includes
+  +libext+<ext>+[ext]...     Extensions for finding modules
+  -v <filename>              Verilog library
+  -y <dir>                   Directory to search for modules
+
+This file ONLY is placed into the Public Domain, for any use, without
+warranty, 2019 by Wilson Snyder."""
+    )
+    parser.add_argument('-debug', '--debug',
+                        action='store_const', const=9,
+                        help='enable debug')
+    parser.add_argument('-odir', '--odir',
+                        action='store', metavar='directory', required=True,
+                        help='target output directory')
+    (args, rem) = parser.parse_known_args()
+
+    print("NOTE: vl_file_copy is only an example starting point for writing your own tool.")
+    # That is:
+    # 1. We will accept basic patches
+    # 2. We are not expecting to make this globally useful. (e.g. we don't cleanup obj_dir)
+    # 3. "make install" will not install this.
+    # 4. This has not had production-worthy validation.
+
+    fc = VlFileCopy(output_dir = args.odir,
+                    debug = args.debug,
+                    verilator_args = rem)
+
+######################################################################
+### Local Variables:
+### compile-command: "./vl_file_copy -h ; VERILATOR_ROOT=$V4 ./vl_file_copy +define+thru top.v"
+### End:

examples/xml_py/vl_hier_graph

@@ -0,0 +1,136 @@
+#!/usr/bin/env python3
+# -*- Python -*- See copyright, etc below
+######################################################################
+
+import argparse
+import os
+import re
+import subprocess
+import sys
+import tempfile
+import xml.etree.ElementTree as ET
+from shutil import copy2
+from pprint import pprint,pformat
+
+#######################################################################
+
+class VlHierGraph:
+    def __init__(self,
+                 verilator_args,  # presently all verilator options are passed-thru
+                 # ideally this script would check against options mentioned in help
+                 debug=0,
+                 output_filename='graph.dot'):  # output filename
+        self.debug = debug
+        self.next_vertex_number = 0
+        self.name_to_number = {}
+
+        xml_temp = tempfile.NamedTemporaryFile()
+
+        args = ['--xml-output', xml_temp.name,
+                '--bbox-sys',  # Parse some stuff can't translate
+                '--bbox-unsup',
+                '--prefix vlxml']  # So we know name of .xml output
+        args += verilator_args
+        self.run_verilator(args)
+        self.tree = ET.parse(xml_temp.name)
+
+        with open(output_filename, "w") as fh:
+            # For more serious purposes, use the python graphviz package instead
+            fh.write("digraph {\n")
+            fh.write("  dpi=300;\n")
+            fh.write("  order=LR;\n")
+            fh.write("  node [fontsize=8 shape=\"box\" margin=0.01 width=0 height=0]")
+            fh.write("  edge [fontsize=6]")
+            # Find cells
+            root = self.tree.getroot()
+            netlist = root.find('netlist')
+            for module in netlist.findall('module'):
+                # origNames are before parameterization, name if after
+                mod_name = module.get('name')
+                mod_number = self.name_to_vertex_number(mod_name)
+                fh.write("  n%d [label=\"%s\""
+                         % (mod_number, mod_name))
+                if module.get('topModule'):
+                    fh.write(" color=\"red\" rank=1")
+                fh.write("];\n")
+
+                for instance in module.findall('instance'):
+                    inst_name = instance.get('name')
+                    def_name = instance.get('defName')
+                    def_number = self.name_to_vertex_number(def_name)
+                    fh.write("  n%d->n%d [label=\"%s\"];\n"
+                             % (mod_number, def_number, inst_name));
+
+            fh.write("}\n")
+
+    def name_to_vertex_number(self, name):
+        if not name in self.name_to_number:
+            self.next_vertex_number += 1
+            self.name_to_number[name] = self.next_vertex_number
+        return self.name_to_number[name]
+
+    def run_verilator(self, args):
+        """Run Verilator command, check errors"""
+        if os.getenv("VERILATOR_ROOT"):
+            command = os.getenv("VERILATOR_ROOT") + "/bin/verilator"
+        else:
+            command = "verilator"
+        command += ' ' + ' '.join(args)
+        if self.debug:
+            print("\t%s " % command)
+        status = subprocess.call(command, shell=True)
+        if status != 0:
+            raise Exception("Command failed running Verilator with '"+command+"', stopped")
+
+#######################################################################
+
+if __name__=='__main__':
+    parser = argparse.ArgumentParser(
+        allow_abbrev=False,
+        formatter_class=argparse.RawTextHelpFormatter,
+        description=
+"""Example of using Verilator XML output to create a .dot file showing the
+design module hierarchy.
+
+Example usage:
+     vl_hier_graph -f input.vc top.v -o graph.dot
+     dot -Tpdf -o graph.pdf graph.dot
+""",
+        epilog=
+"""All other arguments are pass-thru to Verilator: e.g.:
+
+  +define+<var>=<value>      Set preprocessor define
+  -F <file>                  Parse options from a file, relatively
+  -f <file>                  Parse options from a file
+  -G<name>=<value>           Overwrite toplevel parameter
+  +incdir+<dir>              Directory to search for includes
+  +libext+<ext>+[ext]...     Extensions for finding modules
+  -v <filename>              Verilog library
+  -y <dir>                   Directory to search for modules
+
+This file ONLY is placed into the Public Domain, for any use, without
+warranty, 2019 by Wilson Snyder."""
+    )
+    parser.add_argument('-debug', '--debug',
+                        action='store_const', const=9,
+                        help='enable debug')
+    parser.add_argument('-o', '--o',
+                        action='store', metavar='filename', required=True,
+                        help='output filename')
+    (args, rem) = parser.parse_known_args()
+
+    print("NOTE: vl_hier_graph is only an example starting point for writing your own tool.")
+    # That is:
+    # 1. We will accept basic patches
+    # 2. We are not expecting to make this globally useful. (e.g. we don't cleanup obj_dir)
+    # 3. "make install" will not install this.
+    # 4. This has not had production-worthy validation.
+
+    fc = VlHierGraph(output_filename = args.o,
+                     debug = args.debug,
+                     verilator_args = rem)
+
+######################################################################
+### Local Variables:
+### compile-command: "./vl_hier_graph -h ; VERILATOR_ROOT=$V4 ./vl_hier_graph +define+thru top.v"
+### End:

include/gtkwave/fastlz.c

@@ -418,7 +418,9 @@ static FASTLZ_INLINE int FASTLZ_DECOMPRESSOR(const void* input, int length, void
   const flzuint8* ip = (const flzuint8*) input;
   const flzuint8* ip_limit  = ip + length;
   flzuint8* op = (flzuint8*) output;
+#ifdef FASTLZ_SAFE
   flzuint8* op_limit = op + maxout;
+#endif
   flzuint32 ctrl = (*ip++) & 31;
   int loop = 1;
 

include/verilated.cpp

@@ -19,10 +19,10 @@
 ///     This file must be compiled and linked against all objects
 ///     created from Verilator.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //=========================================================================
-
+
 #define _VERILATED_CPP_
 
 #include "verilatedos.h"
@@ -43,9 +43,13 @@
 // Static sanity checks (when get C++11 can use static_assert)
 
 typedef union {
+    // cppcheck-suppress unusedStructMember  // Unused as is assertion
     char vluint8_incorrect[(sizeof(vluint8_t) == 1) ? 1:-1];
+    // cppcheck-suppress unusedStructMember  // Unused as is assertion
     char vluint16_incorrect[(sizeof(vluint16_t) == 2) ? 1:-1];
+    // cppcheck-suppress unusedStructMember  // Unused as is assertion
     char vluint32_incorrect[(sizeof(vluint32_t) == 4) ? 1:-1];
+    // cppcheck-suppress unusedStructMember  // Unused as is assertion
     char vluint64_incorrect[(sizeof(vluint64_t) == 8) ? 1:-1];
 } vl_static_checks_t;
 
@@ -285,6 +289,7 @@ IData VL_RANDOM_I(int obits) VL_MT_SAFE {
 QData VL_RANDOM_Q(int obits) VL_MT_SAFE {
     return vl_rand64() & VL_MASK_Q(obits);
 }
+// VL_RANDOM_W currently unused as $random always 32 bits
 WDataOutP VL_RANDOM_W(int obits, WDataOutP outwp) VL_MT_SAFE {
     for (int i=0; i<VL_WORDS_I(obits); ++i) {
         if (i<(VL_WORDS_I(obits)-1)) {
@@ -602,7 +607,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA
             width = 0;
         } else if (!inPct) {  // Normal text
             // Fast-forward to next escape and add to output
-            const char *ep = pos;
+            const char* ep = pos;
             while (ep[0] && ep[0]!='%') ep++;
             if (ep != pos) {
                 output.append(pos, ep-pos);
@@ -1093,8 +1098,8 @@ IData VL_FGETS_IXI(int obits, void* destp, IData fpi) VL_MT_SAFE {
     IData bytes = VL_BYTES_I(obits);
     char buffer[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1];
     // V3Emit has static check that bytes < VL_TO_STRING_MAX_WORDS, but be safe
-    if (VL_UNLIKELY(bytes > VL_TO_STRING_MAX_WORDS*VL_WORDSIZE)) {
-        VL_FATAL_MT(__FILE__, __LINE__, "", "Internal: fgets buffer overrun");
+    if (VL_UNCOVERABLE(bytes > VL_TO_STRING_MAX_WORDS*VL_WORDSIZE)) {
+        VL_FATAL_MT(__FILE__, __LINE__, "", "Internal: fgets buffer overrun");  // LCOV_EXCL_LINE
     }
 
     // We don't use fgets, as we must read \0s.
@@ -1317,7 +1322,7 @@ const char* memhFormat(int nBits) {
     case 5: VL_SNPRINTF(buf, 32, "%%06x"); break;
     case 6: VL_SNPRINTF(buf, 32, "%%07x"); break;
     case 7: VL_SNPRINTF(buf, 32, "%%08x"); break;
-    default: assert(false); break;
+    default: assert(false); break;  // LCOV_EXCL_LINE
     }
     return buf;
 }
@@ -1373,6 +1378,7 @@ void VL_WRITEMEM_N(
     FILE* fp = fopen(filename.c_str(), "w");
     if (VL_UNLIKELY(!fp)) {
         VL_FATAL_MT(filename.c_str(), 0, "", "$writemem file not found");
+        // cppcheck-suppress resourceLeak  // fp is NULL - bug in cppcheck
         return;
     }
 
@@ -1510,6 +1516,7 @@ void VL_READMEM_N(
     if (VL_UNLIKELY(!fp)) {
         // We don't report the Verilog source filename as it slow to have to pass it down
         VL_FATAL_MT(filename.c_str(), 0, "", "$readmem file not found");
+        // cppcheck-suppress resourceLeak  // fp is NULL - bug in cppcheck
         return;
     }
     // Prep for reading
@@ -1778,7 +1785,8 @@ void Verilated::debug(int level) VL_MT_SAFE {
                                 " Message prefix indicates {<thread>,<sequence_number>}.\n"););
 #else
         VL_PRINTF_MT("- Verilated::debug attempted,"
-                     " but compiled without VL_DEBUG, so messages suppressed.\n");
+                     " but compiled without VL_DEBUG, so messages suppressed.\n"
+                     "- Suggest remake using 'make ... CPPFLAGS=-DVL_DEBUG'\n");
 #endif
     }
 }
@@ -1842,9 +1850,9 @@ void Verilated::flushCb(VerilatedVoidCb cb) VL_MT_SAFE {
     VerilatedLockGuard lock(m_mutex);
     if (s_flushCb == cb) {}  // Ok - don't duplicate
     else if (!s_flushCb) { s_flushCb=cb; }
-    else {
+    else {  // LCOV_EXCL_LINE
         // Someday we may allow multiple callbacks ala atexit(), but until then
-        VL_FATAL_MT("unknown", 0, "",
+        VL_FATAL_MT("unknown", 0, "",  // LCOV_EXCL_LINE
                     "Verilated::flushCb called twice with different callbacks");
     }
 }
@@ -2100,9 +2108,11 @@ void* VerilatedVarProps::datapAdjustIndex(void* datap, int dim, int indx) const
 VerilatedScope::VerilatedScope() {
     m_callbacksp = NULL;
     m_namep = NULL;
+    m_identifierp = NULL;
     m_funcnumMax = 0;
     m_symsp = NULL;
     m_varsp = NULL;
+    m_type = SCOPE_OTHER;
 }
 
 VerilatedScope::~VerilatedScope() {
@@ -2115,15 +2125,18 @@ VerilatedScope::~VerilatedScope() {
 }
 
 void VerilatedScope::configure(VerilatedSyms* symsp, const char* prefixp,
-                               const char* suffixp) VL_MT_UNSAFE {
+                               const char* suffixp, const char* identifier,
+                               const Type type) VL_MT_UNSAFE {
     // Slowpath - called once/scope at construction
     // We don't want the space and reference-count access overhead of strings.
     m_symsp = symsp;
+    m_type = type;
     char* namep = new char[strlen(prefixp)+strlen(suffixp)+2];
     strcpy(namep, prefixp);
     if (*prefixp && *suffixp) strcat(namep, ".");
     strcat(namep, suffixp);
     m_namep = namep;
+    m_identifierp = identifier;
     VerilatedImp::scopeInsert(this);
 }
 
@@ -2136,8 +2149,8 @@ void VerilatedScope::exportInsert(int finalize, const char* namep, void* cb) VL_
         // Alternative is to dynamically stretch the array, which is more code, and slower.
         if (funcnum >= m_funcnumMax) { m_funcnumMax = funcnum+1; }
     } else {
-        if (VL_UNLIKELY(funcnum >= m_funcnumMax)) {
-            VL_FATAL_MT(__FILE__, __LINE__, "",
+        if (VL_UNCOVERABLE(funcnum >= m_funcnumMax)) {
+            VL_FATAL_MT(__FILE__, __LINE__, "",  // LCOV_EXCL_LINE
                         "Internal: Bad funcnum vs. pre-finalize maximum");
         }
         if (VL_UNLIKELY(!m_callbacksp)) {  // First allocation
@@ -2228,6 +2241,10 @@ void VerilatedScope::scopeDump() const {
     }
 }
 
+void VerilatedHierarchy::add(VerilatedScope* fromp, VerilatedScope* top) {
+    VerilatedImp::hierarchyAdd(fromp, top);
+}
+
 //===========================================================================
 // VerilatedOneThreaded:: Methods
 

include/verilated.h

@@ -20,10 +20,9 @@
 ///     all C++ files it generates.  It contains standard macros and
 ///     classes required by the Verilated code.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //*************************************************************************
-
 
 #ifndef _VERILATED_H_
 #define _VERILATED_H_ 1  ///< Header Guard
@@ -141,7 +140,7 @@ class VL_CAPABILITY("mutex") VerilatedMutex {
     bool try_lock() VL_TRY_ACQUIRE(true) { return m_mutex.try_lock(); }
 };
 
-/// Lock guard for mutex (ala std::lock_guard), wrapped to allow -fthread_safety checks
+/// Lock guard for mutex (ala std::unique_lock), wrapped to allow -fthread_safety checks
 class VL_SCOPED_CAPABILITY VerilatedLockGuard {
     VL_UNCOPYABLE(VerilatedLockGuard);
   private:
@@ -154,6 +153,8 @@ class VL_SCOPED_CAPABILITY VerilatedLockGuard {
     ~VerilatedLockGuard() VL_RELEASE() {
         m_mutexr.unlock();
     }
+    void lock() VL_ACQUIRE() { m_mutexr.lock(); }
+    void unlock() VL_RELEASE() { m_mutexr.unlock(); }
 };
 
 #else  // !VL_THREADED
@@ -171,6 +172,8 @@ class VerilatedLockGuard {
 public:
     explicit VerilatedLockGuard(VerilatedMutex&) {}
     ~VerilatedLockGuard() {}
+    void lock() {}
+    void unlock() {}
 };
 
 #endif  // VL_THREADED
@@ -189,8 +192,8 @@ public:
     // METHODS
     /// Check that the current thread ID is the same as the construction thread ID
     void check() VL_MT_UNSAFE_ONE {
-        if (!VL_LIKELY(m_threadid == VL_THREAD_ID())) {
-            fatal_different();
+        if (VL_UNCOVERABLE(m_threadid != VL_THREAD_ID())) {
+            fatal_different();  // LCOV_EXCL_LINE
         }
     }
     static void fatal_different() VL_MT_SAFE;
@@ -203,6 +206,8 @@ public:
 //=========================================================================
 /// Base class for all Verilated module classes
 
+class VerilatedScope;
+
 class VerilatedModule {
     VL_UNCOPYABLE(VerilatedModule);
 private:
@@ -290,6 +295,11 @@ public:  // But for internal use only
 /// This class is initialized by main thread only. Reading post-init is thread safe.
 
 class VerilatedScope {
+public:
+    typedef enum {
+        SCOPE_MODULE, SCOPE_OTHER
+    } Type;  // Type of a scope, currently module is only interesting
+private:
     // Fastpath:
     VerilatedSyms*      m_symsp;        ///< Symbol table
     void**              m_callbacksp;   ///< Callback table pointer (Fastpath)
@@ -297,16 +307,20 @@ class VerilatedScope {
     // 4 bytes padding (on -m64), for rent.
     VerilatedVarNameMap* m_varsp;       ///< Variable map
     const char*         m_namep;        ///< Scope name (Slowpath)
+    const char*         m_identifierp;  ///< Identifier of scope (with escapes removed)
+    Type                m_type;         ///< Type of the scope
 
 public:  // But internals only - called from VerilatedModule's
     VerilatedScope();
     ~VerilatedScope();
-    void configure(VerilatedSyms* symsp, const char* prefixp, const char* suffixp) VL_MT_UNSAFE;
+    void configure(VerilatedSyms* symsp, const char* prefixp, const char* suffix,
+                   const char* identifier, const Type type) VL_MT_UNSAFE;
     void exportInsert(int finalize, const char* namep, void* cb) VL_MT_UNSAFE;
     void varInsert(int finalize, const char* namep, void* datap,
                    VerilatedVarType vltype, int vlflags, int dims, ...) VL_MT_UNSAFE;
     // ACCESSORS
     const char* name() const { return m_namep; }
+    const char* identifier() const { return m_identifierp; }
     inline VerilatedSyms* symsp() const { return m_symsp; }
     VerilatedVar* varFind(const char* namep) const VL_MT_SAFE_POSTINIT;
     VerilatedVarNameMap* varsp() const VL_MT_SAFE_POSTINIT { return m_varsp; }
@@ -318,10 +332,16 @@ public:  // But internals only - called from VerilatedModule's
         if (VL_LIKELY(funcnum < scopep->m_funcnumMax)) {
             // m_callbacksp must be declared, as Max'es are > 0
             return scopep->m_callbacksp[funcnum];
-        } else {
-            return scopep->exportFindError(funcnum);
+        } else {  // LCOV_EXCL_LINE
+            return scopep->exportFindError(funcnum);  // LCOV_EXCL_LINE
         }
     }
+    Type type() const { return m_type; }
+};
+
+class VerilatedHierarchy {
+public:
+    void add(VerilatedScope* fromp, VerilatedScope* top);
 };
 
 //===========================================================================
@@ -332,7 +352,7 @@ class Verilated {
     // Slow path variables
     static VerilatedMutex m_mutex;  ///< Mutex for s_s/s_ns members, when VL_THREADED
 
-    static VerilatedVoidCb  s_flushCb;  ///< Flush callback function
+    static VerilatedVoidCb s_flushCb;  ///< Flush callback function
 
     static struct Serialized {  // All these members serialized/deserialized
         // Fast path
@@ -396,9 +416,9 @@ public:
     /// 1 = Set all bits to one
     /// 2 = Randomize all bits
     static void randReset(int val) VL_MT_SAFE;
-    static int  randReset() VL_MT_SAFE { return s_s.s_randReset; }  ///< Return randReset value
+    static int randReset() VL_MT_SAFE { return s_s.s_randReset; }  ///< Return randReset value
     static void randSeed(int val) VL_MT_SAFE;
-    static int  randSeed() VL_MT_SAFE { return s_s.s_randSeed; }  ///< Return randSeed value
+    static int randSeed() VL_MT_SAFE { return s_s.s_randSeed; }  ///< Return randSeed value
 
     /// Enable debug of internal verilated code
     static void debug(int level) VL_MT_SAFE;
@@ -736,7 +756,7 @@ extern double sc_time_stamp();
 # define SP_AUTO_COVER3(what,file,line)
 #endif
 
-
+
 //=========================================================================
 // Functional macros/routines
 // These all take the form
@@ -1637,7 +1657,7 @@ static inline IData VL_REPLICATE_III(int, int lbits, int, IData ld, IData rep) V
         returndata = returndata << lbits;
         returndata |= ld;
     }
-    return (returndata);
+    return returndata;
 }
 static inline QData VL_REPLICATE_QII(int, int lbits, int, IData ld, IData rep) VL_PURE {
     QData returndata = ld;
@@ -1645,7 +1665,7 @@ static inline QData VL_REPLICATE_QII(int, int lbits, int, IData ld, IData rep) V
         returndata = returndata << lbits;
         returndata |= static_cast<QData>(ld);
     }
-    return (returndata);
+    return returndata;
 }
 static inline WDataOutP VL_REPLICATE_WII(int obits, int lbits, int,
                                          WDataOutP owp, IData ld, IData rep) VL_MT_SAFE {

include/verilated.mk.in

@@ -30,7 +30,6 @@ CFG_LDLIBS_THREADS = @CFG_LDLIBS_THREADS@
 ######################################################################
 # Programs
 
-SP_INCLUDER	= $(VERILATOR_INCLUDER)
 VERILATOR_COVERAGE = $(PERL) $(VERILATOR_ROOT)/bin/verilator_coverage
 VERILATOR_INCLUDER = $(PERL) $(VERILATOR_ROOT)/bin/verilator_includer
 
@@ -173,8 +172,7 @@ else
 endif
 
 $(VM_PREFIX)__ALL.a: $(VK_OBJS)
-	@echo "      Archiving" $@ ...
-	$(AR) r $@ $^
+	$(AR) -cr $@ $^
 	$(RANLIB) $@
 
 ######################################################################

include/verilated.v

@@ -1,6 +1,6 @@
 //*************************************************************************
 //
-// Code available from: http://www.veripool.org/verilator
+// Code available from: https://verilator.org
 //
 //*************************************************************************
 //
@@ -17,7 +17,7 @@
 //=========================================================================
 //
 // DESCRIPTION: Verilator: Include in verilog files to hide verilator defines
-
+
 `ifdef _VERILATED_V_ `else
  `define _VERILATED_V_ 1
 

include/verilated_config.h.in

@@ -16,10 +16,10 @@
 /// \file
 /// \brief Verilator: Auto version information include for all Verilated C files
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //*************************************************************************
-
+
 
 ///**** Product and Version name
 

include/verilated_cov.h

@@ -67,7 +67,7 @@
 
 #define VL_COVER_INSERT(countp,args...) \
     VL_IF_COVER(VerilatedCov::_inserti(countp); \
-                VerilatedCov::_insertf(__FILE__,__LINE__);      \
+                VerilatedCov::_insertf(__FILE__, __LINE__); \
                 VerilatedCov::_insertp("hier", name(), args))
 
 //=============================================================================

include/verilated_dpi.cpp

@@ -19,10 +19,10 @@
 ///     This file must be compiled and linked against all objects
 ///     created from Verilator or called by Verilator that use the DPI.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //=========================================================================
-
+
 #define _VERILATED_DPI_CPP_
 
 #include "verilatedos.h"
@@ -43,7 +43,8 @@
 
 // Not supported yet
 #define _VL_SVDPI_UNIMP() \
-    VL_FATAL_MT(__FILE__,__LINE__,"",(std::string("%%Error: Unsupported DPI function: ")+VL_FUNC).c_str())
+    VL_FATAL_MT(__FILE__, __LINE__, "", \
+                (std::string("%%Error: Unsupported DPI function: ")+VL_FUNC).c_str())
 
 #define _VL_SVDPI_WARN(message...) \
     VL_PRINTF_MT(message)

include/verilated_dpi.h

@@ -20,10 +20,9 @@
 ///     all C++ files it generates where DPI is used.  It contains
 ///     DPI interface functions required by the Verilated code.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //*************************************************************************
-
 
 #ifndef _VERILATED_DPI_H_
 #define _VERILATED_DPI_H_ 1  ///< Header Guard

include/verilated_fst_c.cpp

@@ -73,7 +73,9 @@ protected:
 VerilatedFst::VerilatedFst(void* fst)
     : m_fst(fst),
       m_fullDump(true),
-      m_scopeEscape('.') {}
+      m_scopeEscape('.') {
+    m_valueStrBuffer.reserve(64+1);  // Need enough room for quad
+}
 
 void VerilatedFst::open(const char* filename) VL_MT_UNSAFE {
     m_assertOne.check();
@@ -176,7 +178,7 @@ void VerilatedFst::addCallback(
     if (VL_UNLIKELY(isOpen())) {
         std::string msg = (std::string("Internal: ")+__FILE__+"::"+__FUNCTION__
                            +" called with already open file");
-        VL_FATAL_MT(__FILE__,__LINE__,"",msg.c_str());
+        VL_FATAL_MT(__FILE__, __LINE__, "", msg.c_str());
     }
     VerilatedFstCallInfo* vci = new VerilatedFstCallInfo(initcb, fullcb, changecb, userthis, 1);
     m_callbacks.push_back(vci);
@@ -206,39 +208,41 @@ void VerilatedFst::dump(vluint64_t timeui) {
 // Helpers
 
 char* VerilatedFst::word2Str(vluint32_t newval, int bits) {
-    m_valueStrBuffer.resize(bits+1);
+    // Constructor makes sure m_valueStrBuffer.reserve() > 32+1
     char* s = m_valueStrBuffer.data();
     for (int i = 0; i < bits; ++i) {
-        *s = '0' + ((newval>>(bits-i-1))&1);
-        ++s;
+        *s++ = '0' + ((newval>>(bits-i-1))&1);
     }
     *s = '\0';
     return m_valueStrBuffer.data();
 }
 
 char* VerilatedFst::quad2Str(vluint64_t newval, int bits) {
-    m_valueStrBuffer.resize(bits+1);
+    // Constructor makes sure m_valueStrBuffer.reserve() > 64+1
     char* s = m_valueStrBuffer.data();
     for (int i = 0; i < bits; ++i) {
-        *s = '0' + ((newval>>(bits-i-1))&1);
-        ++s;
+        *s++ = '0' + ((newval>>(bits-i-1))&1);
     }
     *s = '\0';
     return m_valueStrBuffer.data();
 }
 
 char* VerilatedFst::array2Str(const vluint32_t* newval, int bits) {
-    int bq = bits/32, br = bits%32;
-    m_valueStrBuffer.resize(bits+1);
+    int bq = VL_BITWORD_I(bits), br = VL_BITBIT_I(bits);
+    m_valueStrBuffer.reserve(bits+1);
     char* s = m_valueStrBuffer.data();
+    vluint32_t v = newval[bq];
     for (int i = 0; i < br; ++i) {
-        *s = '0' + ((newval[bq]>>(br-i-1))&1);
-        ++s;
+        *s++ = '0' + ((v>>(br-i-1))&1);
     }
     for (int w = bq-1; w >= 0; --w) {
-        for (int i = 0; i < 32; ++i) {
-            *s = '0' + ((newval[w]>>(32-i-1))&1);
-            ++s;
+        v = newval[w];
+        for (int i = 28; i >= 0; i-=4) {
+            s[0] = '0' + ((v>>(i+3))&1);
+            s[1] = '0' + ((v>>(i+2))&1);
+            s[2] = '0' + ((v>>(i+1))&1);
+            s[3] = '0' + ((v>>(i+0))&1);
+            s+=4;
         }
     }
     *s = '\0';

include/verilated_fst_c.h

@@ -89,7 +89,7 @@ public:
     /// Change character that splits scopes.  Note whitespace are ALWAYS escapes.
     void scopeEscape(char flag) { m_scopeEscape = flag; }
     /// Is this an escape?
-    bool isScopeEscape(char c) { return isspace(c) || c==m_scopeEscape; }
+    bool isScopeEscape(char c) { return isspace(c) || c == m_scopeEscape; }
     /// Inside dumping routines, called each cycle to make the dump
     void dump(vluint64_t timeui);
     /// Inside dumping routines, declare callbacks for tracings

include/verilated_heavy.h

@@ -21,10 +21,9 @@
 ///     heavyweight types are required; these contents are not part of
 ///     verilated.h to save compile time when such types aren't used.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //*************************************************************************
-
 
 #ifndef _VERILATED_HEAVY_H_
 #define _VERILATED_HEAVY_H_ 1  ///< Header Guard
@@ -49,7 +48,7 @@ inline std::string VL_CVT_PACK_STR_NI(IData lhs) VL_PURE {
     return VL_CVT_PACK_STR_NW(1, lw);
 }
 inline std::string VL_CONCATN_NNN(const std::string& lhs, const std::string& rhs) VL_PURE {
-    return lhs+rhs;
+    return lhs + rhs;
 }
 inline std::string VL_REPLICATEN_NNQ(int,int,int, const std::string& lhs, IData rep) VL_PURE {
     std::string out; out.reserve(lhs.length() * rep);
@@ -78,13 +77,13 @@ extern std::string VL_SFORMATF_NX(const char* formatp, ...) VL_MT_SAFE;
 extern IData VL_VALUEPLUSARGS_INW(int rbits, const std::string& ld, WDataOutP rwp) VL_MT_SAFE;
 inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, IData& rdr) VL_MT_SAFE {
     WData rwp[2];  // WData must always be at least 2
-    IData got = VL_VALUEPLUSARGS_INW(rbits,ld,rwp);
+    IData got = VL_VALUEPLUSARGS_INW(rbits, ld, rwp);
     if (got) rdr = rwp[0];
     return got;
 }
 inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, QData& rdr) VL_MT_SAFE {
     WData rwp[2];
-    IData got = VL_VALUEPLUSARGS_INW(rbits,ld,rwp);
+    IData got = VL_VALUEPLUSARGS_INW(rbits, ld, rwp);
     if (got) rdr = VL_SET_QW(rwp);
     return got;
 }

include/verilated_imp.h

@@ -16,15 +16,14 @@
 /// \file
 /// \brief Verilator: Implementation Header, only for verilated.cpp internals.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //=========================================================================
-
 
 #ifndef _VERILATED_IMP_H_
 #define _VERILATED_IMP_H_ 1  ///< Header Guard
 
-#if !defined(_VERILATED_CPP_) && !defined(_VERILATED_DPI_CPP_)
+#if !defined(_VERILATED_CPP_) && !defined(_VERILATED_DPI_CPP_) && !defined(_VERILATED_VPI_CPP_)
 # error "verilated_imp.h only to be included by verilated*.cpp internals"
 #endif
 
@@ -62,7 +61,8 @@ private:
 public:
     // CONSTRUCTORS
     VerilatedMsg(const std::function<void()>& cb)
-        : m_mtaskId(Verilated::mtaskId()), m_cb(cb) {}
+        : m_mtaskId(Verilated::mtaskId())
+        , m_cb(cb) {}
     ~VerilatedMsg() {}
     // METHODS
     vluint32_t mtaskId() const { return m_mtaskId; }
@@ -73,7 +73,7 @@ public:
 /// Each thread has a queue it pushes to
 /// This assumes no thread starts pushing the next tick until the previous has drained.
 /// If more aggressiveness is needed, a double-buffered scheme might work well.
-class VerilatedEvalMsgQueue  {
+class VerilatedEvalMsgQueue {
     typedef std::multiset<VerilatedMsg, VerilatedMsg::Cmp> VerilatedThreadQueue;
 
     std::atomic<vluint64_t> m_depth;  ///< Current depth of queue (see comments below)
@@ -82,10 +82,12 @@ class VerilatedEvalMsgQueue  {
     VerilatedThreadQueue m_queue VL_GUARDED_BY(m_mutex);  ///< Message queue
 public:
     // CONSTRUCTORS
-    VerilatedEvalMsgQueue() : m_depth(0) {
+    VerilatedEvalMsgQueue()
+        : m_depth(0) {
         assert(atomic_is_lock_free(&m_depth));
     }
-    ~VerilatedEvalMsgQueue() { }
+    ~VerilatedEvalMsgQueue() {}
+
 private:
     VL_UNCOPYABLE(VerilatedEvalMsgQueue);
 public:
@@ -122,11 +124,11 @@ public:
 };
 
 /// Each thread has a local queue to build up messages until the end of the eval() call
-class VerilatedThreadMsgQueue  {
+class VerilatedThreadMsgQueue {
     std::queue<VerilatedMsg> m_queue;
 public:
     // CONSTRUCTORS
-    VerilatedThreadMsgQueue() { }
+    VerilatedThreadMsgQueue() {}
     ~VerilatedThreadMsgQueue() {
         // The only call of this with a non-empty queue is a fatal error.
         // So this does not flush the queue, as the destination queue is not known to this class.
@@ -170,8 +172,8 @@ class VerilatedImp {
 
     // TYPES
     typedef std::vector<std::string> ArgVec;
-    typedef std::map<std::pair<const void*,void*>,void*> UserMap;
-    typedef std::map<const char*, int, VerilatedCStrCmp>  ExportNameMap;
+    typedef std::map<std::pair<const void*, void*>, void*> UserMap;
+    typedef std::map<const char*, int, VerilatedCStrCmp> ExportNameMap;
 
     // MEMBERS
     static VerilatedImp s_s;  ///< Static Singleton; One and only static this
@@ -187,6 +189,10 @@ class VerilatedImp {
 
     VerilatedMutex      m_nameMutex;  ///< Protect m_nameMap
     VerilatedScopeNameMap m_nameMap VL_GUARDED_BY(m_nameMutex);  ///< Map of <scope_name, scope pointer>
+
+    VerilatedMutex      m_hierMapMutex;  ///< Protect m_hierMap
+    VerilatedHierarchyMap m_hierMap VL_GUARDED_BY(m_hierMapMutex);  ///< Map the represents scope hierarchy
+
     // Slow - somewhat static:
     VerilatedMutex      m_exportMutex;  ///< Protect m_nameMap
     ExportNameMap       m_exportMap VL_GUARDED_BY(m_exportMutex);  ///< Map of <export_func_proto, func number>
@@ -200,7 +206,8 @@ class VerilatedImp {
 public:  // But only for verilated*.cpp
     // CONSTRUCTORS
     VerilatedImp()
-        : m_argVecLoaded(false), m_exportNext(0) {
+        : m_argVecLoaded(false)
+        , m_exportNext(0) {
         m_fdps.resize(3);
         m_fdps[0] = stdin;
         m_fdps[1] = stdout;
@@ -228,9 +235,9 @@ public:
                         "%Error: Verilog called $test$plusargs or $value$plusargs without"
                         " testbench C first calling Verilated::commandArgs(argc,argv).");
         }
-        for (ArgVec::const_iterator it=s_s.m_argVec.begin(); it!=s_s.m_argVec.end(); ++it) {
-            if ((*it)[0]=='+') {
-                if (0==strncmp(prefixp, it->c_str()+1, len)) return *it;
+        for (ArgVec::const_iterator it = s_s.m_argVec.begin(); it != s_s.m_argVec.end(); ++it) {
+            if ((*it)[0] == '+') {
+                if (0 == strncmp(prefixp, it->c_str() + 1, len)) return *it;
             }
         }
         return "";
@@ -248,7 +255,7 @@ public:
     // per map overhead * N scopes would take much more space and cache thrashing.
     static inline void userInsert(const void* scopep, void* userKey, void* userData) VL_MT_SAFE {
         VerilatedLockGuard lock(s_s.m_userMapMutex);
-        UserMap::iterator it=s_s.m_userMap.find(std::make_pair(scopep, userKey));
+        UserMap::iterator it = s_s.m_userMap.find(std::make_pair(scopep, userKey));
         if (it != s_s.m_userMap.end()) it->second = userData;
         // When we support VL_THREADs, we need a lock around this insert, as it's runtime
         else s_s.m_userMap.insert(it, std::make_pair(std::make_pair(scopep, userKey), userData));
@@ -264,7 +271,7 @@ private:
     static void userEraseScope(const VerilatedScope* scopep) VL_MT_SAFE {
         // Slow ok - called once/scope on destruction, so we simply iterate.
         VerilatedLockGuard lock(s_s.m_userMapMutex);
-        for (UserMap::iterator it=s_s.m_userMap.begin(); it!=s_s.m_userMap.end(); ) {
+        for (UserMap::iterator it = s_s.m_userMap.begin(); it != s_s.m_userMap.end();) {
             if (it->first.first == scopep) {
                 s_s.m_userMap.erase(it++);
             } else {
@@ -287,7 +294,7 @@ public:  // But only for verilated*.cpp
     static void scopeInsert(const VerilatedScope* scopep) VL_MT_SAFE {
         // Slow ok - called once/scope at construction
         VerilatedLockGuard lock(s_s.m_nameMutex);
-        VerilatedScopeNameMap::iterator it=s_s.m_nameMap.find(scopep->name());
+        VerilatedScopeNameMap::iterator it = s_s.m_nameMap.find(scopep->name());
         if (it == s_s.m_nameMap.end()) {
             s_s.m_nameMap.insert(it, std::make_pair(scopep->name(), scopep));
         }
@@ -303,14 +310,14 @@ public:  // But only for verilated*.cpp
         // Slow ok - called once/scope at destruction
         VerilatedLockGuard lock(s_s.m_nameMutex);
         userEraseScope(scopep);
-        VerilatedScopeNameMap::iterator it=s_s.m_nameMap.find(scopep->name());
+        VerilatedScopeNameMap::iterator it = s_s.m_nameMap.find(scopep->name());
         if (it != s_s.m_nameMap.end()) s_s.m_nameMap.erase(it);
     }
     static void scopesDump() VL_MT_SAFE {
         VerilatedLockGuard lock(s_s.m_nameMutex);
         VL_PRINTF_MT("  scopesDump:\n");
-        for (VerilatedScopeNameMap::const_iterator it=s_s.m_nameMap.begin();
-             it!=s_s.m_nameMap.end(); ++it) {
+        for (VerilatedScopeNameMap::const_iterator it = s_s.m_nameMap.begin();
+             it != s_s.m_nameMap.end(); ++it) {
             const VerilatedScope* scopep = it->second;
             scopep->scopeDump();
         }
@@ -321,6 +328,18 @@ public:  // But only for verilated*.cpp
         return &s_s.m_nameMap;
     }
 
+public:  // But only for verilated*.cpp
+    // METHODS - hierarchy
+    static void hierarchyAdd(const VerilatedScope* fromp, const VerilatedScope* top) VL_MT_SAFE {
+        // Slow ok - called at construction for VPI accessible elements
+        VerilatedLockGuard lock(s_s.m_hierMapMutex);
+        s_s.m_hierMap[fromp].push_back(top);
+    }
+    static const VerilatedHierarchyMap* hierarchyMap() VL_MT_SAFE_POSTINIT {
+        // Thread save only assuming this is called only after model construction completed
+        return &s_s.m_hierMap;
+    }
+
 public:  // But only for verilated*.cpp
     // METHODS - export names
 
@@ -333,7 +352,7 @@ public:  // But only for verilated*.cpp
     static int exportInsert(const char* namep) VL_MT_SAFE {
         // Slow ok - called once/function at creation
         VerilatedLockGuard lock(s_s.m_exportMutex);
-        ExportNameMap::iterator it=s_s.m_exportMap.find(namep);
+        ExportNameMap::iterator it = s_s.m_exportMap.find(namep);
         if (it == s_s.m_exportMap.end()) {
             s_s.m_exportMap.insert(it, std::make_pair(namep, s_s.m_exportNext++));
             return s_s.m_exportNext++;
@@ -343,7 +362,7 @@ public:  // But only for verilated*.cpp
     }
     static int exportFind(const char* namep) VL_MT_SAFE {
         VerilatedLockGuard lock(s_s.m_exportMutex);
-        ExportNameMap::const_iterator it=s_s.m_exportMap.find(namep);
+        ExportNameMap::const_iterator it = s_s.m_exportMap.find(namep);
         if (VL_LIKELY(it != s_s.m_exportMap.end())) return it->second;
         std::string msg = (std::string("%Error: Testbench C called ")+namep
                            +" but no such DPI export function name exists in ANY model");
@@ -353,8 +372,8 @@ public:  // But only for verilated*.cpp
     static const char* exportName(int funcnum) VL_MT_SAFE {
         // Slowpath; find name for given export; errors only so no map to reverse-map it
         VerilatedLockGuard lock(s_s.m_exportMutex);
-        for (ExportNameMap::const_iterator it=s_s.m_exportMap.begin();
-             it!=s_s.m_exportMap.end(); ++it) {
+        for (ExportNameMap::const_iterator it = s_s.m_exportMap.begin();
+             it != s_s.m_exportMap.end(); ++it) {
             if (it->second == funcnum) return it->first;
         }
         return "*UNKNOWN*";

include/verilated_save.cpp

@@ -65,7 +65,8 @@ VerilatedDeserialize& VerilatedDeserialize::readAssert(const void* __restrict da
                                                        size_t size) VL_MT_UNSAFE_ONE {
     if (VL_UNLIKELY(readDiffers(datap, size))) {
         std::string fn = filename();
-        std::string msg = "Can't deserialize save-restore file as was made from different model";
+        std::string msg = "Can't deserialize save-restore file as was made from different model:"
+            +filename();
         VL_FATAL_MT(fn.c_str(), 0, "", msg.c_str());
         close();
     }
@@ -86,7 +87,8 @@ void VerilatedDeserialize::header() VL_MT_UNSAFE_ONE {
     VerilatedDeserialize& os = *this;  // So can cut and paste standard >> code below
     if (VL_UNLIKELY(os.readDiffers(VLTSAVE_HEADER_STR, strlen(VLTSAVE_HEADER_STR)))) {
         std::string fn = filename();
-        std::string msg = std::string("Can't deserialize; file has wrong header signature");
+        std::string msg = std::string("Can't deserialize; file has wrong header signature: ")
+            +filename();
         VL_FATAL_MT(fn.c_str(), 0, "", msg.c_str());
         close();
     }
@@ -103,7 +105,8 @@ void VerilatedDeserialize::trailer() VL_MT_UNSAFE_ONE {
     VerilatedDeserialize& os = *this;  // So can cut and paste standard >> code below
     if (VL_UNLIKELY(os.readDiffers(VLTSAVE_TRAILER_STR, strlen(VLTSAVE_TRAILER_STR)))) {
         std::string fn = filename();
-        std::string msg = std::string("Can't deserialize; file has wrong end-of-file signature");
+        std::string msg = std::string("Can't deserialize; file has wrong end-of-file signature: ")
+            +filename();
         VL_FATAL_MT(fn.c_str(), 0, "", msg.c_str());
         close();
     }

include/verilated_save.h

@@ -51,7 +51,7 @@ protected:
 public:
     VerilatedSerialize() {
         m_isOpen = false;
-        m_bufp = new vluint8_t [bufferSize()];
+        m_bufp = new vluint8_t[bufferSize()];
         m_cp = m_bufp;
     }
     virtual ~VerilatedSerialize() {
@@ -112,7 +112,7 @@ protected:
 public:
     VerilatedDeserialize() {
         m_isOpen = false;
-        m_bufp = new vluint8_t [bufferSize()];
+        m_bufp = new vluint8_t[bufferSize()];
         m_cp = m_bufp;
         m_endp = NULL;
     }
@@ -158,11 +158,11 @@ private:
 
 class VerilatedSave : public VerilatedSerialize {
 private:
-    int                 m_fd;           ///< File descriptor we're writing to
+    int m_fd;  ///< File descriptor we're writing to
 
 public:
     // CONSTRUCTORS
-    VerilatedSave() { m_fd=-1; }
+    VerilatedSave() { m_fd = -1; }
     virtual ~VerilatedSave() { close(); }
     // METHODS
     void open(const char* filenamep) VL_MT_UNSAFE_ONE;  ///< Open the file; call isOpen() to see if errors
@@ -177,11 +177,11 @@ public:
 
 class VerilatedRestore : public VerilatedDeserialize {
 private:
-    int                 m_fd;           ///< File descriptor we're writing to
+    int m_fd;  ///< File descriptor we're writing to
 
 public:
     // CONSTRUCTORS
-    VerilatedRestore() { m_fd=-1; }
+    VerilatedRestore() { m_fd = -1; }
     virtual ~VerilatedRestore() { close(); }
 
     // METHODS

include/verilated_sc.h

@@ -19,10 +19,9 @@
 ///     This file is included automatically by Verilator at the top of
 ///     all SystemC files it generates.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //*************************************************************************
-
 
 #ifndef _VERILATED_SC_H_
 #define _VERILATED_SC_H_ 1  ///< Header Guard

include/verilated_sym_props.h

@@ -24,10 +24,9 @@
 ///
 ///     These classes are thread safe, and read only.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //*************************************************************************
-
 
 #ifndef _VERILATED_SYM_PROPS_H_
 #define _VERILATED_SYM_PROPS_H_ 1  ///< Header Guard
@@ -128,7 +127,7 @@ public:
 public:
     ~VerilatedVarProps() {}
     // METHODS
-    bool magicOk() const { return m_magic==MAGIC; }
+    bool magicOk() const { return m_magic == MAGIC; }
     VerilatedVarType vltype() const { return m_vltype; }
     VerilatedVarFlags vldir() const {
         return static_cast<VerilatedVarFlags>(static_cast<int>(m_vlflags) & VLVF_MASK_DIR); }
@@ -177,13 +176,15 @@ public:
 class VerilatedDpiOpenVar {
     // MEMBERS
     const VerilatedVarProps* m_propsp;  // Variable properties
-    void*                    m_datap;  // Location of data (local to thread always, so safe)
+    void* m_datap;  // Location of data (local to thread always, so safe)
 public:
     // CONSTRUCTORS
     VerilatedDpiOpenVar(const VerilatedVarProps* propsp, void* datap)
-        : m_propsp(propsp), m_datap(datap) {}
+        : m_propsp(propsp)
+        , m_datap(datap) {}
     VerilatedDpiOpenVar(const VerilatedVarProps* propsp, const void* datap)
-        : m_propsp(propsp), m_datap(const_cast<void*>(datap)) {}
+        : m_propsp(propsp)
+        , m_datap(const_cast<void*>(datap)) {}
     ~VerilatedDpiOpenVar() {}
     // METHODS
     void* datap() const { return m_datap; }
@@ -211,7 +212,7 @@ public:
 
 class VerilatedVar : public VerilatedVarProps {
     // MEMBERS
-    void*       m_datap;  // Location of data
+    void* m_datap;  // Location of data
     const char* m_namep;  // Name - slowpath
 protected:
     friend class VerilatedScope;

include/verilated_syms.h

@@ -23,10 +23,9 @@
 ///     These classes are thread safe and read only. It is constructed only
 ///     when a model is built (from the main thread).
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //*************************************************************************
-
 
 #ifndef _VERILATED_SYMS_H_
 #define _VERILATED_SYMS_H_ 1  ///< Header Guard
@@ -36,13 +35,14 @@
 #include "verilated_sym_props.h"
 
 #include <map>
+#include <vector>
 
 //======================================================================
 /// Types
 
 /// Class to sort maps keyed by const char*'s
 struct VerilatedCStrCmp {
-    bool operator() (const char *a, const char *b) const {
+    bool operator() (const char* a, const char* b) const {
         return std::strcmp(a, b) < 0;
     }
 };
@@ -63,4 +63,13 @@ public:
     ~VerilatedVarNameMap() {}
 };
 
+typedef std::vector<const VerilatedScope*> VerilatedScopeVector;
+
+class VerilatedHierarchyMap
+    : public std::map<const VerilatedScope*, VerilatedScopeVector> {
+public:
+    VerilatedHierarchyMap() {}
+    ~VerilatedHierarchyMap() {}
+};
+
 #endif  // Guard

include/verilated_threads.cpp

@@ -24,7 +24,7 @@
 
 #include <cstdio>
 
-std::atomic<vluint64_t> VlNotification::s_yields;
+std::atomic<vluint64_t> VlMTaskVertex::s_yields;
 
 VL_THREAD_LOCAL VlThreadPool::ProfileTrace* VlThreadPool::t_profilep = NULL;
 
@@ -41,7 +41,8 @@ VlMTaskVertex::VlMTaskVertex(vluint32_t upstreamDepCount)
 // VlWorkerThread
 
 VlWorkerThread::VlWorkerThread(VlThreadPool* poolp, bool profiling)
-    : m_poolp(poolp)
+    : m_ready_size(0)
+    , m_poolp(poolp)
     , m_profiling(profiling)
     , m_exiting(false)
       // Must init this last -- after setting up fields that it might read:
@@ -49,12 +50,7 @@ VlWorkerThread::VlWorkerThread(VlThreadPool* poolp, bool profiling)
 
 VlWorkerThread::~VlWorkerThread() {
     m_exiting.store(true, std::memory_order_release);
-    {
-        VerilatedLockGuard lk(m_mutex);
-        if (sleeping()) {
-            wakeUp();
-        }
-    }
+    wakeUp();
     // The thread should exit; join it.
     m_cthread.join();
 }
@@ -64,38 +60,18 @@ void VlWorkerThread::workerLoop() {
         m_poolp->setupProfilingClientThread();
     }
 
-    VlNotification alarm;
     ExecRec work;
     work.m_fnp = NULL;
 
     while (1) {
-        bool sleep = false;
-        if (VL_UNLIKELY(!work.m_fnp)) {
-            // Look for work
-            VerilatedLockGuard lk(m_mutex);
-            if (VL_LIKELY(!m_ready.empty())) {
-                dequeWork(&work);
-            } else {
-                // No work available, prepare to sleep. Pass alarm/work
-                // into m_sleepAlarm so wakeUp will tall this function.
-                //
-                // Must modify m_sleepAlarm in the same critical section as
-                // the check for ready work, otherwise we could race with
-                // another thread enqueueing work and never be awoken.
-                m_sleepAlarm.first = &alarm;
-                m_sleepAlarm.second = &work;
-                sleep = true;
-            }
+        if (VL_LIKELY(!work.m_fnp)) {
+            dequeWork(&work);
         }
 
         // Do this here, not above, to avoid a race with the destructor.
         if (VL_UNLIKELY(m_exiting.load(std::memory_order_acquire)))
             break;
 
-        if (VL_UNLIKELY(sleep)) {
-            alarm.waitForNotification();  // ZZZzzzzz
-            alarm.reset();
-        }
         if (VL_LIKELY(work.m_fnp)) {
             work.m_fnp(work.m_evenCycle, work.m_sym);
             work.m_fnp = NULL;
@@ -194,7 +170,7 @@ void VlThreadPool::profileDump(const char* filenamep, vluint64_t ticksElapsed) {
     fprintf(fp, "VLPROF arg +verilator+prof+threads+window+%u\n",
             Verilated::profThreadsWindow());
     fprintf(fp, "VLPROF stat yields %" VL_PRI64 "u\n",
-            VlNotification::yields());
+            VlMTaskVertex::yields());
 
     vluint32_t thread_id = 0;
     for (ProfileSet::iterator pit = m_allProfiles.begin();
@@ -221,8 +197,7 @@ void VlThreadPool::profileDump(const char* filenamep, vluint64_t ticksElapsed) {
                         eit->m_cpu,
                         thread_id);
                 break;
-            default: assert(false);
-                break;
+            default: assert(false); break;  // LCOV_EXCL_LINE
             }
         }
     }

include/verilated_threads.h

@@ -25,9 +25,12 @@
 #include "verilatedos.h"
 #include "verilated.h"  // for VerilatedMutex and clang annotations
 
-#include <sched.h>  // For sched_getcpu()
+#include <condition_variable>
 #include <set>
 #include <vector>
+#if defined(__linux)
+#include <sched.h>  // For sched_getcpu()
+#endif
 #if defined(__APPLE__)
 # include <cpuid.h>  // For __cpuid_count()
 #endif
@@ -37,71 +40,12 @@
 // as a void* here.
 typedef void* VlThrSymTab;
 
-class VlNotification {
-    // MEMBERS
-    std::atomic<bool> m_notified;  // Notification pending
-    static std::atomic<vluint64_t> s_yields;  // Statistics
-
-public:
-    // CONSTRUCTORS
-    VlNotification()
-        : m_notified(false) {
-        assert(atomic_is_lock_free(&m_notified));
-    }
-    ~VlNotification() {}
-
-    // METHODS
-    static vluint64_t yields() { return s_yields; }
-    static void yieldThread() {
-        ++s_yields;  // Statistics
-        std::this_thread::yield();
-    }
-
-    // Block until notify() has occurred, then return.
-    // If notify() has already occurred, return immediately.
-    //
-    // This is logically const: the object will remain in notified state
-    // after WaitForNotification() returns, so you could notify more than
-    // one thread of the same event.
-    inline void waitForNotification() {
-        unsigned ct = 0;
-        while (VL_UNLIKELY(!notified())) {
-            VL_CPU_RELAX();
-            ++ct;
-            if (VL_UNLIKELY(ct > VL_LOCK_SPINS)) {
-                ct = 0;
-                yieldThread();
-            }
-        }
-    }
-
-    // The 'inline' keyword here means nothing to the compiler, it's
-    // implicit on methods defined within the class body anyway.
-    //
-    // 'inline' is attached the this method, and others in this file,
-    // to remind humans that some routines in this file are called many
-    // times per cycle in threaded mode. Such routines should be
-    // inlinable; that's why they're declared in the .h and not the .cpp.
-    inline bool notified() {
-        return m_notified.load(std::memory_order_acquire);
-    }
-    // Set notified state. If state is already notified,
-    // it remains so.
-    inline void notify() {
-        m_notified.store(true, std::memory_order_release);
-    }
-    // Reset the state to un-notified state, which is also the
-    // state of a new Notification object.
-    inline void reset() {
-        m_notified.store(false, std::memory_order_relaxed);
-    }
-};
-
 typedef void (*VlExecFnp)(bool, VlThrSymTab);
 
 /// Track dependencies for a single MTask.
 class VlMTaskVertex {
     // MEMBERS
+    static std::atomic<vluint64_t> s_yields;  // Statistics
 
     // On even cycles, _upstreamDepsDone increases as upstream
     // dependencies complete. When it reaches _upstreamDepCount,
@@ -131,6 +75,12 @@ public:
     explicit VlMTaskVertex(vluint32_t upstreamDepCount);
     ~VlMTaskVertex() {}
 
+    static vluint64_t yields() { return s_yields; }
+    static void yieldThread() {
+        ++s_yields;  // Statistics
+        std::this_thread::yield();
+    }
+
     // Upstream mtasks must call this when they complete.
     // Returns true when the current MTaskVertex becomes ready to execute,
     // false while it's still waiting on more dependencies.
@@ -158,7 +108,7 @@ public:
             ++ct;
             if (VL_UNLIKELY(ct > VL_LOCK_SPINS)) {
                 ct = 0;
-                VlNotification::yieldThread();
+                yieldThread();
             }
         }
     }
@@ -186,6 +136,7 @@ public:
         m_mtaskId = 0;
         m_predictTime = 0;
         m_startTime = 0;
+        m_endTime = 0;
         m_cpu = getcpu();
     }
     void startRecord(vluint64_t time, uint32_t mtask, uint32_t predict) {
@@ -195,9 +146,7 @@ public:
         m_startTime = time;
         m_cpu = getcpu();
     }
-    void endRecord(vluint64_t time) {
-        m_endTime = time;
-    }
+    void endRecord(vluint64_t time) { m_endTime = time; }
     static int getcpu() {  // Return current executing CPU
 #if defined(__linux)
         return sched_getcpu();
@@ -206,15 +155,16 @@ public:
         __cpuid_count(1, 0, info[0], info[1], info[2], info[3]);
         /* info[1] is EBX, bits 24-31 are APIC ID */
         if ((info[3] & (1 << 9)) == 0) {
-            return -1;  /* no APIC on chip */
+            return -1;  // no APIC on chip
         } else {
             return (unsigned)info[1] >> 24;
         }
+#elif defined(_WIN32)
+        return GetCurrentProcessorNumber();
 #else
         return 0;
 #endif
     }
-
 };
 
 class VlThreadPool;
@@ -233,19 +183,19 @@ private:
 
     // MEMBERS
     VerilatedMutex m_mutex;
+    std::condition_variable_any m_cv;
+    // Only notify the condition_variable if the worker is waiting
+    bool m_waiting VL_GUARDED_BY(m_mutex);
 
     // Why a vector? We expect the pending list to be very short, typically
     // 0 or 1 or 2, so popping from the front shouldn't be
     // expensive. Revisit if we ever have longer queues...
     std::vector<ExecRec> m_ready VL_GUARDED_BY(m_mutex);
+    // Store the size atomically, so we can spin wait
+    std::atomic<size_t> m_ready_size;
 
     VlThreadPool* m_poolp;  // Our associated thread pool
 
-    // If values stored are non-NULL, the thread is asleep pending new
-    // work. If the thread is not asleep, both parts of m_sleepAlarm must
-    // be NULL.
-    std::pair<VlNotification*, ExecRec*> m_sleepAlarm VL_GUARDED_BY(m_mutex);
-
     bool m_profiling;  // Is profiling enabled?
     std::atomic<bool> m_exiting;  // Worker thread should exit
     std::thread m_cthread;  // Underlying C++ thread record
@@ -258,29 +208,36 @@ public:
     ~VlWorkerThread();
 
     // METHODS
-    inline void dequeWork(ExecRec* workp) VL_REQUIRES(m_mutex) {
+    inline void dequeWork(ExecRec* workp) {
+        // Spin for a while, waiting for new data
+        for (int i = 0; i < VL_LOCK_SPINS; ++i) {
+            if (VL_LIKELY(m_ready_size.load(std::memory_order_relaxed))) {
+                break;
+            }
+            VL_CPU_RELAX();
+        }
+        VerilatedLockGuard lk(m_mutex);
+        while (m_ready.empty()) {
+            m_waiting = true;
+            m_cv.wait(lk);
+        }
+        m_waiting = false;
         // As noted above this is inefficient if our ready list is ever
         // long (but it shouldn't be)
         *workp = m_ready.front();
         m_ready.erase(m_ready.begin());
+        m_ready_size.fetch_sub(1, std::memory_order_relaxed);
     }
-    inline void wakeUp() VL_REQUIRES(m_mutex) {
-        VlNotification* notifyp = m_sleepAlarm.first;
-        m_sleepAlarm.first = NULL;  // NULL+NULL means wake
-        m_sleepAlarm.second = NULL;
-        notifyp->notify();
-    }
-    inline bool sleeping() VL_REQUIRES(m_mutex) {
-        return (m_sleepAlarm.first != NULL);
-    }
+    inline void wakeUp() { addTask(nullptr, false, nullptr); }
     inline void addTask(VlExecFnp fnp, bool evenCycle, VlThrSymTab sym) {
-        VerilatedLockGuard lk(m_mutex);
-        m_ready.emplace_back(fnp, evenCycle, sym);
-        if (VL_LIKELY(sleeping())) {  // Generally queue is waiting for work
-            // Awaken thread
-            dequeWork(m_sleepAlarm.second);
-            wakeUp();
+        bool notify;
+        {
+            VerilatedLockGuard lk(m_mutex);
+            m_ready.emplace_back(fnp, evenCycle, sym);
+            m_ready_size.fetch_add(1, std::memory_order_relaxed);
+            notify = m_waiting;
         }
+        if (notify) m_cv.notify_one();
     }
     void workerLoop();
     static void startWorker(VlWorkerThread* workerp);
@@ -314,9 +271,7 @@ public:
     ~VlThreadPool();
 
     // METHODS
-    inline int numThreads() const {
-        return m_workers.size();
-    }
+    inline int numThreads() const { return m_workers.size(); }
     inline VlWorkerThread* workerp(int index) {
         assert(index >= 0);
         assert(index < m_workers.size());

include/verilated_unordered_set_map.h

@@ -3,7 +3,7 @@
 // DESCRIPTION: Verilator: pre-C++11 replacements for std::unordered_set
 //                         and std::unordered_map.
 //
-// Code available from: http://www.veripool.org/verilator
+// Code available from: https://verilator.org
 //
 //*************************************************************************
 //
@@ -19,7 +19,6 @@
 //
 //*************************************************************************
 
-
 //*************************************************************************
 // This file has clones of the std::unordered_set and std::unordered_map
 // hash table types. They are here so that Verilator can use hash tables
@@ -114,7 +113,7 @@ class vl_unordered_set {
 public:
     // TYPES
     typedef std::list<T_Key> Bucket;
-    enum RehashType {GROW, SHRINK};
+    enum RehashType { GROW, SHRINK };
 
     template <class KK, class VV,
               class HH, class EQ> friend class vl_unordered_map;
@@ -197,7 +196,7 @@ public:
         , m_log2Buckets(initLog2Buckets())
         , m_bucketsp(NULL)
         , m_hash()
-        , m_equal() { }
+        , m_equal() {}
 
     vl_unordered_set(const vl_unordered_set& other)
         : m_numElements(other.m_numElements)
@@ -317,7 +316,7 @@ public:
         return find_internal(key, bucketIdx);
     }
 
-    std::pair<iterator, bool> insert(const T_Key &val) {
+    std::pair<iterator, bool> insert(const T_Key& val) {
         size_t bucketIdx;
         iterator existIt = find_internal(val, bucketIdx);
         if (existIt != end()) {
@@ -353,7 +352,7 @@ public:
         return next_it;
     }
 
-    size_t erase(const T_Key &key) {
+    size_t erase(const T_Key& key) {
         size_t bucketIdx;
         iterator it = find_internal(key, bucketIdx);
         if (it != end()) {
@@ -373,7 +372,7 @@ public:
 
     void clear() {
         if (m_bucketsp) {
-            delete [] m_bucketsp;
+            delete[] m_bucketsp;
             m_bucketsp = NULL;
         }
         m_numElements = 0;
@@ -417,7 +416,7 @@ private:
         size_t new_num_buckets = VL_ULL(1) << new_log2Buckets;
         Bucket* new_bucketsp = new Bucket[new_num_buckets];
 
-        for (size_t i=0; i<numBuckets(); i++) {
+        for (size_t i = 0; i < numBuckets(); i++) {
             while (!m_bucketsp[i].empty()) {
                 typename Bucket::iterator bit = m_bucketsp[i].begin();
                 size_t hash = m_hash.operator()(*bit);

include/verilated_vcd_c.cpp

@@ -325,7 +325,7 @@ void VerilatedVcd::printQuad(vluint64_t n) {
 
 void VerilatedVcd::printTime(vluint64_t timeui) {
     // VCD file format specification does not allow non-integers for timestamps
-    // Dinotrace doesn't mind, but Cadence vvision seems to choke
+    // Dinotrace doesn't mind, but Cadence Vision seems to choke
     if (VL_UNLIKELY(timeui < m_timeLastDump)) {
         timeui = m_timeLastDump;
         static VL_THREAD_LOCAL bool backTime = false;

include/verilated_vcd_c.h

@@ -112,9 +112,7 @@ private:
     inline void bufferCheck() {
         // Flush the write buffer if there's not enough space left for new information
         // We only call this once per vector, so we need enough slop for a very wide "b###" line
-        if (VL_UNLIKELY(m_writep > m_wrFlushp)) {
-            bufferFlush();
-        }
+        if (VL_UNLIKELY(m_writep > m_wrFlushp)) { bufferFlush(); }
     }
     void closePrev();
     void closeErr();
@@ -157,18 +155,18 @@ private:
     // CONSTRUCTORS
     VL_UNCOPYABLE(VerilatedVcd);
 public:
-    explicit VerilatedVcd(VerilatedVcdFile* filep=NULL);
+    explicit VerilatedVcd(VerilatedVcdFile* filep = NULL);
     ~VerilatedVcd();
 
     // ACCESSORS
     /// Set size in megabytes after which new file should be created
-    void rolloverMB(vluint64_t rolloverMB) { m_rolloverMB=rolloverMB; }
+    void rolloverMB(vluint64_t rolloverMB) { m_rolloverMB = rolloverMB; }
     /// Is file open?
     bool isOpen() const { return m_isOpen; }
     /// Change character that splits scopes.  Note whitespace are ALWAYS escapes.
     void scopeEscape(char flag) { m_scopeEscape = flag; }
     /// Is this an escape?
-    inline bool isScopeEscape(char c) { return isspace(c) || c==m_scopeEscape; }
+    inline bool isScopeEscape(char c) { return isspace(c) || c == m_scopeEscape; }
 
     // METHODS
     void open(const char* filename) VL_MT_UNSAFE_ONE;  ///< Open the file; call isOpen() to see if errors
@@ -331,7 +329,7 @@ public:
     inline void chgBus(vluint32_t code, const vluint32_t newval, int bits) {
         vluint32_t diff = m_sigs_oldvalp[code] ^ newval;
         if (VL_UNLIKELY(diff)) {
-            if (VL_UNLIKELY(bits==32 || (diff & ((1U<<bits)-1) ))) {
+            if (VL_UNLIKELY(bits == 32 || (diff & ((1U << bits) - 1)))) {
                 fullBus(code, newval, bits);
             }
         }
@@ -339,15 +337,15 @@ public:
     inline void chgQuad(vluint32_t code, const vluint64_t newval, int bits) {
         vluint64_t diff = (*(reinterpret_cast<vluint64_t*>(&m_sigs_oldvalp[code]))) ^ newval;
         if (VL_UNLIKELY(diff)) {
-            if (VL_UNLIKELY(bits==64 || (diff & ((1ULL<<bits)-1) ))) {
+            if (VL_UNLIKELY(bits == 64 || (diff & ((1ULL << bits) - 1)))) {
                 fullQuad(code, newval, bits);
             }
         }
     }
     inline void chgArray(vluint32_t code, const vluint32_t* newval, int bits) {
-        for (int word=0; word<(((bits-1)/32)+1); ++word) {
-            if (VL_UNLIKELY(m_sigs_oldvalp[code+word] ^ newval[word])) {
-                fullArray(code,newval,bits);
+        for (int word = 0; word < (((bits - 1) / 32) + 1); ++word) {
+            if (VL_UNLIKELY(m_sigs_oldvalp[code + word] ^ newval[word])) {
+                fullArray(code, newval, bits);
                 return;
             }
         }
@@ -379,7 +377,7 @@ public:
         vluint64_t diff = ( ((*(reinterpret_cast<vluint64_t*>(&m_sigs_oldvalp[code]))) ^ newval)
                             | ((*(reinterpret_cast<vluint64_t*>(&m_sigs_oldvalp[code+1]))) ^ newtri));
         if (VL_UNLIKELY(diff)) {
-            if (VL_UNLIKELY(bits==64 || (diff & ((1ULL<<bits)-1) ))) {
+            if (VL_UNLIKELY(bits == 64 || (diff & ((1ULL << bits) - 1)))) {
                 fullTriQuad(code, newval, newtri, bits);
             }
         }
@@ -424,7 +422,8 @@ class VerilatedVcdC {
     // CONSTRUCTORS
     VL_UNCOPYABLE(VerilatedVcdC);
 public:
-    explicit VerilatedVcdC(VerilatedVcdFile* filep=NULL) : m_sptrace(filep) {}
+    explicit VerilatedVcdC(VerilatedVcdFile* filep = NULL)
+        : m_sptrace(filep) {}
     ~VerilatedVcdC() {}
 public:
     // ACCESSORS
@@ -438,7 +437,7 @@ public:
     /// Continue a VCD dump by rotating to a new file name
     /// The header is only in the first file created, this allows
     /// "cat" to be used to combine the header plus any number of data files.
-    void openNext(bool incFilename=true) VL_MT_UNSAFE_ONE { m_sptrace.openNext(incFilename); }
+    void openNext(bool incFilename = true) VL_MT_UNSAFE_ONE { m_sptrace.openNext(incFilename); }
     /// Set size in megabytes after which new file should be created
     void rolloverMB(size_t rolloverMB) { m_sptrace.rolloverMB(rolloverMB); }
     /// Close dump

include/verilated_vcd_sc.cpp

@@ -32,7 +32,7 @@
     // SystemC 2.1.v1
 // cppcheck-suppress unusedFunction
 void VerilatedVcdSc::write_comment(const std::string &) {}
-void VerilatedVcdSc::trace(const unsigned int &, const std::string &, const char **) {}
+void VerilatedVcdSc::trace(const unsigned int &, const std::string &, const char**) {}
 
 # define DECL_TRACE_METHOD_A(tp) \
     void VerilatedVcdSc::trace( const tp& object, const std::string& name ) {}
@@ -82,7 +82,7 @@ void VerilatedVcdSc::trace(const unsigned int &, const std::string &, const char
     // SystemC 2.0.1
 // cppcheck-suppress unusedFunction
 void VerilatedVcdSc::write_comment(const sc_string &) {}
-void VerilatedVcdSc::trace(const unsigned int &, const sc_string &, const char **) {}
+void VerilatedVcdSc::trace(const unsigned int&, const sc_string&, const char**) {}
 
 #define DECL_TRACE_METHOD_A(tp) \
     void VerilatedVcdSc::trace( const tp& object, const sc_string& name ) {}
@@ -125,7 +125,7 @@ void VerilatedVcdSc::trace(const unsigned int &, const sc_string &, const char *
     // SystemC 1.2.1beta
 // cppcheck-suppress unusedFunction
 void VerilatedVcdSc::write_comment(const sc_string &) {}
-void VerilatedVcdSc::trace(const unsigned int &, const sc_string &, const char **) {}
+void VerilatedVcdSc::trace(const unsigned int&, const sc_string&, const char**) {}
 
 #define DECL_TRACE_METHOD_A(tp) \
     void VerilatedVcdSc::trace( const tp& object, const sc_string& name ) {}

include/verilated_vcd_sc.h

@@ -96,8 +96,8 @@ private:
 # define DECL_TRACE_METHOD_B(tp) \
     virtual void trace(const tp& object, const std::string& name, int width);
 
-    virtual void write_comment(const std::string &);
-    virtual void trace(const unsigned int &, const std::string &, const char **);
+    virtual void write_comment(const std::string&);
+    virtual void trace(const unsigned int&, const std::string&, const char**);
 
 #if (SYSTEMC_VERSION>=20171012)
     DECL_TRACE_METHOD_A( sc_event )
@@ -145,8 +145,8 @@ private:
 # define DECL_TRACE_METHOD_B(tp) \
     virtual void trace(const tp& object, const sc_string& name, int width);
 
-    virtual void write_comment(const sc_string &);
-    virtual void trace(const unsigned int &, const sc_string &, const char **);
+    virtual void write_comment(const sc_string&);
+    virtual void trace(const unsigned int&, const sc_string&, const char**);
     virtual void delta_cycles(bool) {}
     virtual void space(int n) {}
 
@@ -189,8 +189,8 @@ private:
 # define DECL_TRACE_METHOD_B(tp) \
     virtual void trace(const tp& object, const sc_string& name, int width);
 
-    virtual void write_comment(const sc_string &);
-    virtual void trace(const unsigned int &, const sc_string &, const char **);
+    virtual void write_comment(const sc_string&);
+    virtual void trace(const unsigned int&, const sc_string&, const char**);
 
     DECL_TRACE_METHOD_A( bool )
     DECL_TRACE_METHOD_B( unsigned char )

include/verilated_vpi.cpp

@@ -21,20 +21,23 @@
 ///
 ///     Use "verilator --vpi" to add this to the Makefile for the linker.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //=========================================================================
-
+
+#define _VERILATED_VPI_CPP_
 
 #if VM_SC
 # include "verilated_sc.h"
 #endif
 #include "verilated.h"
 #include "verilated_vpi.h"
+#include "verilated_imp.h"
 
 #include <list>
 #include <map>
 #include <set>
+#include <sstream>
 
 //======================================================================
 // Internal constants
@@ -74,7 +77,7 @@ public:
         // We reserve word zero for the next pointer, as that's safer in case a
         // dangling reference to the original remains around.
         static const size_t chunk = 96;
-        if (VL_UNLIKELY(size>chunk)) VL_FATAL_MT(__FILE__, __LINE__, "", "increase chunk");
+        if (VL_UNCOVERABLE(size>chunk)) VL_FATAL_MT(__FILE__, __LINE__, "", "increase chunk");
         if (VL_LIKELY(t_freeHead)) {
             vluint8_t* newp = t_freeHead;
             t_freeHead = *((vluint8_t**)newp);
@@ -161,6 +164,7 @@ public:
 };
 
 class VerilatedVpioScope : public VerilatedVpio {
+protected:
     const VerilatedScope*       m_scopep;
 public:
     explicit VerilatedVpioScope(const VerilatedScope* scopep)
@@ -210,7 +214,6 @@ public:
     vluint32_t entSize() const { return m_entSize; }
     vluint32_t index() { return m_index; }
     virtual vluint32_t type() const {
-      if (varp()->vldir() != vpiNoDirection) return vpiPort;
       return (varp()->dims()>1) ? vpiMemory : vpiReg;  // but might be wire, logic
     }
     virtual vluint32_t size() const { return get_range().elements(); }
@@ -308,6 +311,43 @@ public:
     }
 };
 
+class VerilatedVpioModule : public VerilatedVpioScope {
+    const char* m_name;
+    const char* m_fullname;
+public:
+    explicit VerilatedVpioModule(const VerilatedScope* modulep)
+            : VerilatedVpioScope(modulep) {
+        m_fullname = m_scopep->name();
+        if (strncmp(m_fullname, "TOP.", 4) == 0) m_fullname += 4;
+        m_name = m_scopep->identifier();
+    }
+    static inline VerilatedVpioModule* castp(vpiHandle h) {
+        return dynamic_cast<VerilatedVpioModule*>((VerilatedVpio*)h); }
+    virtual vluint32_t type() const { return vpiModule; }
+    virtual const char* name() const { return m_name; }
+    virtual const char* fullname() const { return m_fullname; }
+};
+
+class VerilatedVpioModuleIter : public VerilatedVpio {
+    const std::vector<const VerilatedScope*> *m_vec;
+    std::vector<const VerilatedScope*>::const_iterator m_it;
+public:
+    explicit VerilatedVpioModuleIter(const std::vector<const VerilatedScope*>& vec) : m_vec(&vec) {
+        m_it = m_vec->begin();
+    }
+    virtual ~VerilatedVpioModuleIter() {}
+    static inline VerilatedVpioModuleIter* castp(vpiHandle h) {
+        return dynamic_cast<VerilatedVpioModuleIter*>((VerilatedVpio*) h); }
+    virtual vluint32_t type() const { return vpiIterator; }
+    virtual vpiHandle dovpi_scan() {
+        if (m_it == m_vec->end()) {
+            return 0;
+        }
+        const VerilatedScope* modp = *m_it++;
+        return (new VerilatedVpioModule(modp))->castVpiHandle();
+    }
+};
+
 //======================================================================
 
 struct VerilatedVpiTimedCbsCmp {
@@ -348,7 +388,7 @@ public:
                 varop->createPrevDatap();
             }
         }
-        if (VL_UNLIKELY(vop->reason() >= CB_ENUM_MAX_VALUE)) {
+        if (VL_UNCOVERABLE(vop->reason() >= CB_ENUM_MAX_VALUE)) {
             VL_FATAL_MT(__FILE__, __LINE__, "", "vpi bb reason too large");
         }
         s_s.m_cbObjLists[vop->reason()].push_back(vop);
@@ -390,8 +430,9 @@ public:
         }
         return ~VL_ULL(0);  // maxquad
     }
-    static void callCbs(vluint32_t reason) {
+    static bool callCbs(vluint32_t reason) VL_MT_UNSAFE_ONE {
         VpioCbList& cbObjList = s_s.m_cbObjLists[reason];
+        bool called = false;
         for (VpioCbList::iterator it=cbObjList.begin(); it!=cbObjList.end();) {
             if (VL_UNLIKELY(!*it)) {  // Deleted earlier, cleanup
                 it = cbObjList.erase(it);
@@ -400,7 +441,9 @@ public:
             VerilatedVpioCb* vop = *it++;
             VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: reason_callback %d %p\n", reason, vop););
             (vop->cb_rtnp()) (vop->cb_datap());
+            called = true;
         }
+        return called;
     }
     static void callValueCbs() VL_MT_UNSAFE_ONE {
         assertOneCheck();
@@ -521,6 +564,10 @@ void VerilatedVpi::callValueCbs() VL_MT_UNSAFE_ONE {
     VerilatedVpiImp::callValueCbs();
 }
 
+bool VerilatedVpi::callCbs(vluint32_t reason) VL_MT_UNSAFE_ONE {
+    return VerilatedVpiImp::callCbs(reason);
+}
+
 //======================================================================
 // VerilatedVpiImp implementation
 
@@ -992,9 +1039,9 @@ vpiHandle vpi_handle_by_name(PLI_BYTE8* namep, vpiHandle scope) {
     _VL_VPI_ERROR_RESET();
     if (VL_UNLIKELY(!namep)) return NULL;
     VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: vpi_handle_by_name %s %p\n", namep, scope););
-    VerilatedVpioScope* voScopep = VerilatedVpioScope::castp(scope);
-    const VerilatedVar* varp;
+    const VerilatedVar* varp = NULL;
     const VerilatedScope* scopep;
+    VerilatedVpioScope* voScopep = VerilatedVpioScope::castp(scope);
     std::string scopeAndName = namep;
     if (voScopep) {
         scopeAndName = std::string(voScopep->fullname()) + "." + namep;
@@ -1004,7 +1051,11 @@ vpiHandle vpi_handle_by_name(PLI_BYTE8* namep, vpiHandle scope) {
         // This doesn't yet follow the hierarchy in the proper way
         scopep = Verilated::scopeFind(namep);
         if (scopep) {  // Whole thing found as a scope
-            return (new VerilatedVpioScope(scopep))->castVpiHandle();
+            if (scopep->type() == VerilatedScope::SCOPE_MODULE) {
+                return (new VerilatedVpioModule(scopep))->castVpiHandle();
+            } else {
+                return (new VerilatedVpioScope(scopep))->castVpiHandle();
+            }
         }
         const char* baseNamep = scopeAndName.c_str();
         std::string scopename;
@@ -1013,9 +1064,19 @@ vpiHandle vpi_handle_by_name(PLI_BYTE8* namep, vpiHandle scope) {
             baseNamep = dotp+1;
             scopename = std::string(namep, dotp-namep);
         }
-        scopep = Verilated::scopeFind(scopename.c_str());
-        if (!scopep) return NULL;
-        varp = scopep->varFind(baseNamep);
+
+        if (scopename.find(".") == std::string::npos) {
+            // This is a toplevel, hence search in our TOP ports first.
+            scopep = Verilated::scopeFind("TOP");
+            if (scopep) {
+                varp = scopep->varFind(baseNamep);
+            }
+        }
+        if (!varp) {
+            scopep = Verilated::scopeFind(scopename.c_str());
+            if (!scopep) return NULL;
+            varp = scopep->varFind(baseNamep);
+        }
     }
     if (!varp) return NULL;
     return (new VerilatedVpioVar(varp, scopep))->castVpiHandle();
@@ -1127,6 +1188,14 @@ vpiHandle vpi_iterate(PLI_INT32 type, vpiHandle object) {
         return ((new VerilatedVpioVarIter(vop->scopep()))
                 ->castVpiHandle());
     }
+    case vpiModule: {
+        VerilatedVpioModule* vop = VerilatedVpioModule::castp(object);
+        const VerilatedHierarchyMap* map = VerilatedImp::hierarchyMap();
+        const VerilatedScope *mod = vop ? vop->scopep() : NULL;
+        VerilatedHierarchyMap::const_iterator it = map->find((VerilatedScope*) mod);
+        if (it == map->end()) return 0;
+        return  ((new VerilatedVpioModuleIter(it->second))->castVpiHandle());
+    }
     default:
         _VL_VPI_WARNING(__FILE__, __LINE__, "%s: Unsupported type %s, nothing will be returned",
                         VL_FUNC, VerilatedVpiError::strFromVpiObjType(type));
@@ -1154,7 +1223,7 @@ PLI_INT32 vpi_get(PLI_INT32 property, vpiHandle object) {
         return VL_TIME_PRECISION;
     }
     case vpiType: {
-        VerilatedVpio* vop = VerilatedVpioVar::castp(object);
+        VerilatedVpio* vop = VerilatedVpio::castp(object);
         if (VL_UNLIKELY(!vop)) return 0;
         return vop->type();
     }
@@ -1203,6 +1272,9 @@ PLI_BYTE8 *vpi_get_str(PLI_INT32 property, vpiHandle object) {
     case vpiDefName: {
         return (PLI_BYTE8*)vop->defname();
     }
+    case vpiType: {
+        return (PLI_BYTE8*) VerilatedVpiError::strFromVpiObjType(vop->type());
+    }
     default:
         _VL_VPI_WARNING(__FILE__, __LINE__, "%s: Unsupported type %s, nothing will be returned",
                         VL_FUNC, VerilatedVpiError::strFromVpiProp(property));
@@ -1255,7 +1327,7 @@ void vpi_get_value(vpiHandle object, p_vpi_value value_p) {
                 return;
             case VLVT_WDATA: {
                 int words = VL_WORDS_I(vop->varp()->packed().elements());
-                if (VL_UNLIKELY(words >= VL_MULS_MAX_WORDS)) {
+                if (VL_UNCOVERABLE(words >= VL_MULS_MAX_WORDS)) {
                     VL_FATAL_MT(__FILE__, __LINE__, "",
                                 "vpi_get_value with more than VL_MULS_MAX_WORDS; increase and recompile");
                 }

include/verilated_vpi.h

@@ -19,10 +19,10 @@
 ///     This file must be compiled and linked against all objects
 ///     created from Verilator or called by Verilator that use the VPI.
 ///
-/// Code available from: http://www.veripool.org/verilator
+/// Code available from: https://verilator.org
 ///
 //=========================================================================
-
+
 #ifndef _VERILATED_VPI_H_
 #define _VERILATED_VPI_H_ 1  ///< Header Guard
 
@@ -45,6 +45,9 @@ public:
     /// Call value based callbacks
     /// Users should call this from their main loops
     static void callValueCbs() VL_MT_UNSAFE_ONE;
+    /// Call callbacks of arbitrary types
+    /// Users can call this from their application code
+    static bool callCbs(vluint32_t reason) VL_MT_UNSAFE_ONE;
     /// Self test, for internal use only
     static void selfTest() VL_MT_UNSAFE_ONE;
 };