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231 Commits 1 Branch 14 Tags 3.4 MiB
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47 Commits

Author SHA1 Message Date
Zachary Snow 2aa39289a3 added preliminary package conversion 2019-04-23 20:22:03 -04:00
Zachary Snow 33dc4b3f88 conversions are applied per-file 
- NestTF refactored to cover all package items
- fixed issue where type traverse skipped typedefs
 2019-04-23 18:51:39 -04:00
Zachary Snow c8894cebde random documentation and cleanup 2019-04-23 00:23:32 -04:00
Zachary Snow 05b7bdb99c added conversion which moves top-level tasks and functions into modules 2019-04-22 01:18:25 -04:00
Zachary Snow d5a369baa0 struct conversion uses packing functions to force field width 2019-04-21 21:56:23 -04:00
Zachary Snow c5fdf38612 added conversion which adds names to unnamed blocks with decls 2019-04-19 19:08:52 -04:00
Zachary Snow 2ee837f7b0 restore port-decl hoisting for cleaner output 2019-04-09 12:50:56 -04:00
Zachary Snow 383754fa7a final major round of splitting and cleanup in the SystemVerilog module 2019-04-03 20:24:09 -04:00
Zachary Snow 6d0f7dd0a7 significantly stronger support, and proper handling of assertions 2019-04-03 19:08:30 -04:00
Zachary Snow c53b39319d added support and conversion handling of the $bits system function 
This also entailed further fleshing out the expression traversal helper
to cover expressions in generate blocks, which could, of course, use
$bits.
 2019-04-02 00:16:09 -04:00
Zachary Snow 5ea2ec9ddf added conversion for name task and function arguments 2019-04-01 13:16:21 -04:00
Zachary Snow c4449fd9ca better support for macros with arguments 2019-03-29 18:55:45 -04:00
Zachary Snow e49cb3536e beginning work to support macros with arguments; lex posn fix 2019-03-29 17:02:49 -04:00
Zachary Snow d578aee5d9 conflate the preprocessor and lexer 
This should make it much easier to add support for ``, `", macros with
arguments, etc., in the future.
 2019-03-29 05:33:17 -04:00
Zachary Snow 0d9ed3e1fa updated CLI to support include dirs and multiple files 2019-03-28 19:55:53 -04:00
Zachary Snow 98d65c4cea switch to parallel builds 2019-03-27 03:41:02 -04:00
Zachary Snow edaff3dcf6 added conversion to make functions and tasks use only one statement 2019-03-26 21:43:27 -04:00
Zachary Snow 0352414e0f surprisingly non-disgusting addition of attribute instances to module items and statements 2019-03-26 01:54:16 -04:00
Zachary Snow 8907ac861d split out Decl, LHS, and Stmt into separate AST modules 2019-03-25 13:29:35 -04:00
Zachary Snow 77f0d23d4b starting work to clean up and segment AST 2019-03-22 19:39:28 -04:00
Zachary Snow 7f8c2e336b simple conversion for unbased unsized literals 2019-03-19 13:40:25 -04:00
Zachary Snow acfbdb07f8 completely rewrote preprocessor; more extensive directive support (include, timescale) 2019-03-18 05:00:23 -04:00
Zachary Snow d7f641b850 pivoted to general Verilog-2005 targeting 2019-03-08 11:02:40 -05:00
Zachary Snow 1d79c27963 first half of interface conversion 2019-03-06 20:30:47 -05:00
Zachary Snow 4c49bd1138 function return type logic to implicit conversion 2019-03-06 14:36:16 -05:00
Zachary Snow 9699f5bf16 preliminary struct conversion; return conversion 2019-03-06 01:13:36 -05:00
Zachary Snow ff81267132 added conversion for genvar iteration AsgnOps 2019-03-04 19:58:54 -05:00
Zachary Snow 460c0ee497 broader operator support; other parser cleanup 2019-03-04 18:25:14 -05:00
Zachary Snow 729a75cd11 support for interfaces; new "declaration parser" 2019-03-04 02:58:00 -05:00
Zachary Snow ab91eaafd7 initial version of enum conversion 2019-02-28 22:44:31 -05:00
Zachary Snow 945923b3fd cleaned up command line args module a bit 2019-02-28 14:06:35 -05:00
Zachary Snow 7bc81ef67b directory re-org; streamline build setup 2019-02-28 13:52:31 -05:00
Zachary Snow 107291e705 significant refactor of packed array flatten conversion; now supports module items in generate blocks 2019-02-28 00:16:53 -05:00
Zachary Snow cf23267783 split up Yosys and VTR targeting 2019-02-26 15:03:49 -05:00
Zachary Snow 3a507d5fbc conversion for splitting up port declaration variables 2019-02-26 13:55:34 -05:00
Zachary Snow 751b3ad3fc initial work on Traverse AST transformations 2019-02-25 02:36:37 -05:00
Zachary Snow b81341c0ac support for casex and casez, and their conversions 2019-02-23 15:10:25 -05:00
Zachary Snow 546657d2c3 added (very hacky) PackedArrayFlatten conversion; convert logics in generate 2019-02-21 20:12:34 -05:00
Zachary Snow 2ee5b6e039 suport for in module instantiations 2019-02-20 15:22:26 -05:00
Zachary Snow 5fae85e6cd very preliminary support for typedefs 2019-02-18 03:59:17 -05:00
Zachary Snow 659461b8d2 always construct conversion; more modular conversion approach 2019-02-18 01:38:16 -05:00
Zachary Snow d47c5493a3 added logic to module items; toying with initial Conversion 2019-02-17 23:39:01 -05:00
Zachary Snow b0d573c51f removed BitVec exprs to preserve number formatting 2019-02-17 14:54:12 -05:00
Zachary Snow 6c88994ea9 switch to using stack 2019-02-11 23:48:49 -05:00
Zachary Snow 0f2638075b updated build procedure 2019-02-08 16:51:32 -05:00
Zachary Snow 8bd58e961f Basic build setup! 2019-02-08 01:09:33 -05:00
Zachary Snow b46009af53 Refactor project setup for our purposes 2019-02-08 00:19:39 -05:00