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prjxray
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215 Commits

Author SHA1 Message Date
Keith Rothman 6c4e6aa718 Update HCLK_IOI offset to match tilegrid 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-26 17:18:48 -07:00
Keith Rothman 2c7b64ea22 Create script for generating remaining bit report. 
This report is fairly fragile, but works well enough for the remaining
LiteX bits.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-26 15:04:29 -07:00
Keith Rothman fa2f61f914 Run make format. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-23 17:21:26 -07:00
Keith Rothman a7ba547acb Filter out non-IOB bits. 
Also add output from LiteX to verify IOB FASM features.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-23 13:38:03 -07:00
Keith Rothman 3345f30817 Fix D9/B8 in arty-swbut harness. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-10 17:15:18 -07:00
litghost 559f840097
Merge pull request #916 from antmicro/srl_minitests 
Minitests for SRLs
 2019-07-09 09:10:36 -07:00
Maciej Kurc 5c60639442 Added generation of sorted and "uniqued" FASM output 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-07-05 12:03:30 +02:00
Maciej Kurc cbbf46112f Updated EDIF write to include cell attributes 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-07-02 16:03:02 +02:00
Maciej Kurc 4d6f75e8ad Added packing tests for SRL32+LUT6 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-28 10:53:27 +02:00
Maciej Kurc 98bcd3f447 Added full vivado flow to the Makefile 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-28 10:53:22 +02:00
Maciej Kurc 4c2b0a5395 Added minitests for SRLs 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-27 15:13:18 +02:00
Keith Rothman e697365c7d Add ROI base file that adds a clock divider. 
This cannot be used for an ROI harness until
https://github.com/SymbiFlow/prjxray/issues/891 is complete.

Command to build new harness
```
XRAY_ROIV=../roi_base_div2.v make
```

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-06-25 12:05:44 -07:00
Maciej Kurc 68c810ce3b Added source files dependencies to Makefiles 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-25 10:14:20 +02:00
Maciej Kurc 64a05b4fa2 Changed makefiles to use XRAY_DIR 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-19 09:19:28 +02:00
Maciej Kurc bf1c7d3183 Fixed invication of prjxray scripts in Makefiles 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-18 13:00:23 +02:00
Maciej Kurc 728a6a76d2 Added bitread and segprint to the Makefile flow 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-17 14:52:06 +02:00
Maciej Kurc 3783e7b2e3 Fixed the LiteX generated SoC to be Linux capable 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-17 13:45:11 +02:00
Maciej Kurc 4798c08ad8 Changed Vivado invocation 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-14 09:40:21 +02:00
Maciej Kurc 4f459cfde3 Ran format-tcl 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-13 16:39:49 +02:00
Maciej Kurc 421af109b1 Added bit2fasm targets to Makefiles 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-13 16:29:20 +02:00
Maciej Kurc 0c244f242d Added submodule with Yosys and integrated it with the LiteX minitest 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-13 16:16:11 +02:00
Maciej Kurc 01f77fd2b2 Added LiteX SoC project (VexRiscV + DRAM + Ethernet for Arty board) 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-06-13 15:58:06 +02:00
Keith Rothman 259894f81d Add README for timing minitest. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-05-29 15:05:18 -07:00
Keith Rothman 992280f3b1 Add timing model minitest. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-05-29 14:55:04 -07:00
Keith Rothman 36177e9599 Add make targets to build additional outputs from each database. 
These targets are for:
 - Generating additional database outputs that are part, e.g. yaml files.
 - Generating harnesses

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-04-10 11:55:39 -07:00
Tim 'mithro' Ansell 5c61326d8b minitest/roi_harness: Move comments around to improve formatting. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-03-26 19:08:49 -07:00
Tim 'mithro' Ansell a3a5ffd45b minitests/roi_harness: Updating README. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-03-26 18:29:07 -07:00
Tim 'mithro' Ansell a8ff30b32f minitest/roi_harness: Strip trailing spaces 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-03-26 18:29:07 -07:00
Tim 'mithro' Ansell 9fc2649e86 minitest/roi_harness: Fixing comment indenting. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-03-26 18:29:07 -07:00
Tim 'mithro' Ansell 1123f2458f minitests/roi_harness: Adding harness configs. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-03-26 18:29:02 -07:00
Tomasz Michalak 6d818dc0ad add bits outside ROI to required features 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-03-21 16:43:59 +01:00
Lukasz Dalek ef9226e969 roi_harness: Add ARTY-A7-UART configuration 
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
 2019-03-13 17:13:18 +01:00
Lukasz Dalek 49c8aac143 zybo: Fix Zybq Zynq-7 roi_harness 
Fixed ROI_GRID range and Y_DOUT_BASE. Updated INPUT and OUTPUT pads.

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
 2019-03-12 09:48:06 +01:00
Keith Rothman 2a114a9726 Output required_features as a list rather than a string with newlines. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-02-21 15:40:07 -08:00
Keith Rothman 1b4b2152db Format harness JSON file. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-02-20 11:45:03 -08:00
Keith Rothman b1c822cb98 Fix review comments. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-02-14 08:27:43 -08:00
Keith Rothman 8387eb8c32 Update FASM tools to use new required_features. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-02-12 17:58:42 -08:00
Keith Rothman f0f29956d7 Add FASM features that are outside ROI grid, but inside used frames. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-02-12 17:25:52 -08:00
Alessandro Comodi b73f1c2161 roi_harness: added arty.sh settings 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-02-05 15:48:52 +01:00
Alessandro Comodi 50d20918e1 roi_harness: adding env variables for INT_LR tiles and PIPs 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-02-05 12:40:37 +01:00
Alessandro Comodi c1be26f053 roi_harness: update runme.tcl to have variable y_offset 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-02-04 14:17:16 +01:00
Alessandro Comodi 3c1de3617e roi_harness: fix basys3 and arty settings 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-02-04 13:39:31 +01:00
Alessandro Comodi a84cb88b1e roi_harness: added zybo support 
Fixed also basys3 settings to produce a correct harness for the basys

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-02-04 12:45:27 +01:00
Karol Gugala 9ca49d1979 minitests: ROI harness: call python interpreter explicitly 
The scripts do not have execution rights, so the build fails on calling them.
Explicit interpreter call solves the issue.

Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-01-18 10:21:00 +01:00
Keith Rothman 30edf041b8 Call bit2fasm.py instead of bits2fasm.py 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-01-17 11:15:28 -08:00
Keith Rothman 2ba905130a Remove old bit2fasm files. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-01-11 13:13:05 -08:00
John McMaster 1cc5b72ca5 minitest: clean up folders 
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
 2019-01-07 23:31:44 +01:00
Karol Gugala 1839f4eac0 minitests: roi_harness: use XRAY_DATABASE env 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-01-02 16:42:26 +01:00
Karol Gugala 3f0e0bd828 minitests: roi_harness: add zybo Z7 settings 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-01-01 21:26:33 +01:00
Karol Gugala fe0f1f2248 minitests: roi_harness: runme.tcl add ZYBO-Z7 support 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-01-01 21:23:35 +01:00