mirror of https://github.com/openXC7/prjxray.git
Added full vivado flow to the Makefile
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
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4c2b0a5395
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@ -1,3 +1,4 @@
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SYNTH ?= vivado
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YOSYS = $(XRAY_DIR)/third_party/yosys/yosys
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PART = xc7a35tcsg324-1
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BIT2FASM_ARGS = --part "$(XRAY_DIR)/database/artix7/$(PART)" --verbose
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@ -9,7 +10,8 @@ SEGPRINT_TARGETS = $(VERILOG_FILES:.v=.segprint.log)
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all: $(FASM_TARGETS) $(SEGPRINT_TARGETS)
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clean:
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@find . -name "build.*" | xargs rm -rf
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@find . -name "build-par.*" | xargs rm -rf
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@find . -name "build-syn.*" | xargs rm -rf
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@rm -f *.edif
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@rm -f *.bit
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@rm -f *.bin
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@ -18,17 +20,29 @@ clean:
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@rm -f *.log
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@rm -f *.dcp
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.PHONY: all clean
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help:
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@echo "Usage: make all [SYNTH=<vivado/yosys>]"
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.PHONY: all clean help
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$(YOSYS):
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cd $(XRAY_DIR)/third_party/yosys && make config-gcc && make -j$(shell nproc)
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ifeq ($(SYNTH), yosys)
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%.edif: %.v $(YOSYS)
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$(YOSYS) -p "read_verilog $< ; synth_xilinx -flatten -nosrl -edif $@" -l $@.log
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else ifeq ($(SYNTH), vivado)
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%.edif: %.v $(YOSYS)
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mkdir -p build-syn.$(basename $@)
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cd build-syn.$(basename $@) && env PROJECT_NAME=$(basename $@) $(XRAY_VIVADO) -mode batch -source ../syn.tcl -nojournal -log ../$@.log
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rm -rf *.backup.log
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endif
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%.bit: %.edif par.tcl
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mkdir -p build.$(basename $@)
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cd build.$(basename $@) && env PROJECT_NAME=$(basename $@) $(XRAY_VIVADO) -mode batch -source ../par.tcl -nojournal -log ../$@.log
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mkdir -p build-par.$(basename $@)
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cd build-par.$(basename $@) && env PROJECT_NAME=$(basename $@) $(XRAY_VIVADO) -mode batch -source ../par.tcl -nojournal -log ../$@.log
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rm -rf *.backup.log
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%.fasm: %.bit
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@ -0,0 +1,11 @@
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create_project -force -name $env(PROJECT_NAME) -part xc7a35ticsg324-1L
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read_verilog ../$env(PROJECT_NAME).v
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synth_design -top top
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report_timing_summary -file top_timing_synth.rpt
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report_utilization -hierarchical -file top_utilization_hierarchical_synth.rpt
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report_utilization -file top_utilization_synth.rpt
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write_edif -force ../$env(PROJECT_NAME).edif
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