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2783 Commits

Author SHA1 Message Date
Maciej Kurc 03b0b9cefc Added separate clock inputs for PLLs. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-11-15 12:13:49 +01:00
Maciej Kurc 6fd00834b2 Fixed bit names formatting. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-11-14 16:09:44 +01:00
Tim Ansell 65ccddb6d3
Merge pull request #1129 from SymbiFlow/dependabot/submodules/third_party/python-sdf-timing-f6e72dd 
build(deps): bump third_party/python-sdf-timing from `11a3f60` to `f6e72dd`
 2019-11-07 22:25:27 -07:00
Tim Ansell 3952600fa5
Merge pull request #1131 from SymbiFlow/dependabot/submodules/third_party/yosys-81876a3 
build(deps): bump third_party/yosys from `e8ef3fc` to `81876a3`
 2019-11-07 22:24:49 -07:00
litghost aa9393b199
Merge pull request #1135 from antmicro/fix-071-hclk-ioi-ppips 
071-ppips: skip HCLK_IOI_CK_IGCLK[0-9] ppips addition
 2019-11-07 10:07:03 -08:00
Alessandro Comodi 99d31d2e67 071-ppips: skip HCLK_IOI_CK_IGCLK0 ppips addition 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-11-07 15:03:44 +01:00
litghost 4cec0817ab
Merge pull request #1080 from JakeMercer/dsp 
DSP - Add Attribute Fuzzing
 2019-11-04 08:16:53 -08:00
litghost 4410180a57
Merge pull request #1127 from antmicro/add-bufr-before-divide-pip 
047-hclk-ioi: Add BEFORE_DIV to IMUX pip
 2019-11-04 08:15:59 -08:00
Alessandro Comodi 827081b3b5 hlck-ioi: fix empty list bug in generate.tcl 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-11-04 11:02:52 +01:00
dependabot-preview[bot] 439e14bb50
build(deps): bump third_party/python-sdf-timing 
Bumps [third_party/python-sdf-timing](https://github.com/SymbiFlow/python-sdf-timing) from `11a3f60` to `f6e72dd`.
- [Release notes](https://github.com/SymbiFlow/python-sdf-timing/releases)
- [Commits](11a3f60648...f6e72dd645)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
 2019-11-03 23:46:40 +00:00
dependabot-preview[bot] 2163071160
build(deps): bump third_party/yosys from `e8ef3fc` to `81876a3` 
Bumps [third_party/yosys](https://github.com/YosysHQ/yosys) from `e8ef3fc` to `81876a3`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](e8ef3fcdfc...81876a3734)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
 2019-11-03 23:40:36 +00:00
Tim Ansell e1d6efbde9
Merge pull request #1128 from SymbiFlow/dependabot/submodules/third_party/googletest-e8a82dc 
build(deps): bump third_party/googletest from `540835f` to `e8a82dc`
 2019-11-03 15:39:51 -08:00
Tim Ansell 9a70b12ef3
Merge pull request #1130 from SymbiFlow/dependabot/submodules/third_party/yaml-cpp-a8ba6a8 
build(deps): bump third_party/yaml-cpp from `f531f8a` to `a8ba6a8`
 2019-11-03 15:39:29 -08:00
Tim Ansell 1ceb2ad584
Merge pull request #1132 from SymbiFlow/dependabot/submodules/third_party/gflags-6c8f50b 
build(deps): bump third_party/gflags from `0b7f8db` to `6c8f50b`
 2019-11-03 15:25:43 -08:00
Tim Ansell a947e3756e
Merge pull request #1133 from SymbiFlow/dependabot/submodules/third_party/abseil-cpp-846e5db 
build(deps): bump third_party/abseil-cpp from `078b89b` to `846e5db`
 2019-11-03 15:25:20 -08:00
Tim Ansell 9d270eb295
Merge pull request #1134 from mithro/master 
Fix trailing white space.
 2019-11-03 15:24:48 -08:00
Tim 'mithro' Ansell 7386641d9b Fix trailing white space. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-11-03 15:07:24 -08:00
Jake Mercer 0a79eb6753 FORMAT - Whitespace Fixes 
CI is failing due to this.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
 2019-11-02 11:46:38 +00:00
Jake Mercer 6a3db24da1 FUZZER - DSP - Fixes Following Review 
Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer 15cfb5bd46 FUZZER - DSP - Add Ports & ROI Module 
Added code for ports to the DSP48E1 instances.  Moved DSP instances
inside an ROI module and using the verilog top harness as in other
fuzzers.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer e0fb0c0cb1 FUZZER - DSP - Refactor 
Refactor the DSP Python scripts to be easier to manage.  Use JSON
instead of CSV.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer 596bb27e3b FUZZER - DSP - Add All Attributes 
Added the rest of the DSP attributes; there are still some issues with mapping the bits.
AREG/BREG mode 2 will require inputs to be connected.

Signed-off-by: Jake Mercer <jmercer04@qub.ac.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer 8da263c502 FUZZER - DSP - Refactor for Readability & Extensibility 
Signed-off-by: Jake Mercer <jmercer04@qub.ac.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer 624de250e8 FUZZER - DSP - Cleared Bits 
Changed some tags to be prefixed with 'Z'; these bits are cleared and need the prefix to indicate
the inversion so that they are resolved to the DB correctly.

Signed-off-by: Jake Mercer <jmercer04@qub.ac.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer 78d64f7558 FUZZER - DSP - Add AUTORESET_PATDET Attribute Fuzzing 
Added fuzzing for the AUTORESET_PATDET attribute of the DSP48 block.  Values are RESET_MATCH,
NO_RESET, and RESET_NOT_MATCH; so this can be represented by 2 bits.

Signed-off-by: Jake Mercer <jmercer04@qub.ac.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer c575adf8a0 FUZZER - DSP - Add A & B Input Attributes 
Adding `A_INPUT` and `B_INPUT` attribute fuzzing for the DSP48 tiles.

Signed-off-by: Jake Mercer <jmercer04@qub.ac.uk>
 2019-11-02 11:43:12 +00:00
Jake Mercer 5598d39d6d IGNORE - Ignore .swp Files 
Ignore .swp files created by various text editors e.g. VIM.

Signed-off-by: Jake Mercer <jmercer04@qub.ac.uk>
 2019-11-02 11:43:12 +00:00
dependabot-preview[bot] 2687fa2d06
build(deps): bump third_party/abseil-cpp from `078b89b` to `846e5db` 
Bumps [third_party/abseil-cpp](https://github.com/abseil/abseil-cpp) from `078b89b` to `846e5db`.
- [Release notes](https://github.com/abseil/abseil-cpp/releases)
- [Commits](078b89b3c0...846e5dbeda)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
 2019-11-02 05:28:15 +00:00
dependabot-preview[bot] ddd1a14a4a
build(deps): bump third_party/gflags from `0b7f8db` to `6c8f50b` 
Bumps [third_party/gflags](https://github.com/gflags/gflags) from `0b7f8db` to `6c8f50b`.
- [Release notes](https://github.com/gflags/gflags/releases)
- [Commits](0b7f8db2c6...6c8f50b567)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
 2019-11-02 05:28:05 +00:00
dependabot-preview[bot] e607b0c111
build(deps): bump third_party/yaml-cpp from `f531f8a` to `a8ba6a8` 
Bumps [third_party/yaml-cpp](https://github.com/jbeder/yaml-cpp) from `f531f8a` to `a8ba6a8`.
- [Release notes](https://github.com/jbeder/yaml-cpp/releases)
- [Commits](f531f8a8c3...a8ba6a8dca)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
 2019-11-02 05:27:09 +00:00
dependabot-preview[bot] 87be56ee14
build(deps): bump third_party/googletest from `540835f` to `e8a82dc` 
Bumps [third_party/googletest](https://github.com/google/googletest) from `540835f` to `e8a82dc`.
- [Release notes](https://github.com/google/googletest/releases)
- [Commits](540835fa68...e8a82dc7ed)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
 2019-11-02 05:26:48 +00:00
Alessandro Comodi 13361904ee hclk-ioi: make 047a dependent on 47 to avoid race condition on piplist 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 17:00:33 +01:00
Alessandro Comodi 949cf722d1 hclk-ioi: re-add IDELAYCTRL to exclude-RE 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 12:04:43 +01:00
Alessandro Comodi f99221d72b run make format 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 11:59:08 +01:00
Alessandro Comodi b057e35e73 hclk-ioi: addressed review comments 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 11:58:11 +01:00
Alessandro Comodi 0cf48f337a hclk-ioi: re-added whole top.py file to avoid having const1 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 11:58:11 +01:00
Alessandro Comodi 1ad84b2b44 hclk-ioi: reduce probability of using lut output as BUFR clock 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 11:58:11 +01:00
Alessandro Comodi 2fb40d0232 hclk-ioi: moved IDELAYCTRL to new parallel fuzzer 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 11:58:11 +01:00
Alessandro Comodi 127022c2a9 hclk-ioi: added IMUX to BEFORE_DIV pips 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-10-31 11:58:11 +01:00
litghost daf284151c
Merge pull request #1119 from antmicro/litex_litedram 
minitests: Add test for Litex DRAM memory interface
 2019-10-30 10:40:01 -07:00
litghost 78cf96be0f
Merge pull request #1122 from JakeMercer/whitespace 
Whitespace
 2019-10-29 15:04:39 -07:00
litghost a8f635c003
Merge pull request #1077 from antmicro/034-fix-tmp 
Fix for 034 fuzzer
 2019-10-29 14:50:53 -07:00
Maciej Kurc b99bd85fa4 Added handling of routing failure in the TCL script. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-29 18:20:50 +01:00
Maciej Kurc 0377b5fb4c Disabled reading PIPs and PPIPs for "R" version of CMT tiles for Zynq7. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-29 17:43:10 +01:00
Maciej Kurc 573ee1a38d Fixed bug in tag_groups.txt 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-29 11:55:03 +01:00
Maciej Kurc bf380f2bdd PIPs and PPIPs are now not read from the db. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-29 11:50:40 +01:00
Maciej Kurc 8267bcdaeb Updated regex for PIP todo list. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-28 15:59:38 +01:00
Maciej Kurc 5ab90a604d Inceased N 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-28 15:59:38 +01:00
Maciej Kurc 355a571400 Removed the INTERNAL_FEEDBACK tag as it is the same as the PLLE2.COMPENSATION.INTENAL 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-28 15:59:38 +01:00
Maciej Kurc 4a6930694f Reworked fuzzer, added README.md 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-28 15:59:38 +01:00