mirror of https://github.com/openXC7/prjxray.git
071-ppips: skip HCLK_IOI_CK_IGCLK0 ppips addition
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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4cec0817ab
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@ -83,6 +83,24 @@ proc write_bram_ppips_db {filename tile} {
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close $fp
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}
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proc write_hclk_ppips_db {filename tile} {
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set fp [open $filename "w"]
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set tile [get_tiles $tile]
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set tile_type [get_property TILE_TYPE $tile]
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foreach pip [get_pips -of_objects $tile] {
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set dst_wire [get_wires -downhill -of_objects $pip]
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if [string match "*HCLK_IOI_CK_IGCLK*" $dst_wire] {
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continue
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} elseif {[get_pips -uphill -of_objects [get_nodes -of_objects $dst_wire]] == $pip} {
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set src_wire [get_wires -uphill -of_objects $pip]
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puts $fp "${tile_type}.[regsub {.*/} $dst_wire ""].[regsub {.*/} $src_wire ""] always"
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}
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}
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close $fp
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}
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foreach tile_type {CLBLM_L CLBLM_R CLBLL_L CLBLL_R} {
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set tiles [get_tiles -filter "TILE_TYPE == $tile_type"]
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if {[llength $tiles] != 0} {
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@ -100,14 +118,22 @@ foreach tile_type {INT_L INT_R BRAM_INT_INTERFACE_L BRAM_INT_INTERFACE_R \
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CMT_TOP_L_LOWER_T CMT_TOP_L_LOWER_B \
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CMT_TOP_R_UPPER_T CMT_TOP_R_UPPER_B \
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CMT_TOP_R_LOWER_T CMT_TOP_R_LOWER_B \
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INT_INTERFACE_L INT_INTERFACE_R \
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HCLK_IOI3} {
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INT_INTERFACE_L INT_INTERFACE_R} {
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set tiles [get_tiles -filter "TILE_TYPE == $tile_type"]
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if {[llength $tiles] != 0} {
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set tile [lindex $tiles 0]
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write_int_ppips_db "ppips_[string tolower $tile_type].db" $tile
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}
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}
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foreach tile_type {HCLK_IOI3} {
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set tiles [get_tiles -filter "TILE_TYPE == $tile_type"]
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if {[llength $tiles] != 0} {
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set tile [lindex $tiles 0]
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write_hclk_ppips_db "ppips_[string tolower $tile_type].db" $tile
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}
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}
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foreach tile_type {BRAM_L BRAM_R} {
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set tiles [get_tiles -filter "TILE_TYPE == $tile_type"]
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if {[llength $tiles] != 0} {
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