Fischer Moseley
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b87f8cbc48
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meta: move to lib.io and lib.mem, enable bidirectional mem tests on xilinx
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2024-07-17 18:51:05 -07:00 |
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Fischer Moseley
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bd452d94a4
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put test outputs in build/
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2024-03-06 16:40:54 -08:00 |
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Fischer Moseley
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d1a772784a
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add environment.sh for tool paths and serial ports
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2024-03-06 11:26:31 -08:00 |
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Fischer Moseley
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b00e4d0e60
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revert wiring.Component instead of Elaboratable
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2024-03-04 01:18:31 -08:00 |
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Fischer Moseley
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08adbd8ede
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switch to wiring.Component instead of Elaboratable
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2024-03-03 19:10:06 -08:00 |
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Fischer Moseley
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b729deb144
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hardcode device paths in hardware tests
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2024-03-03 18:31:11 -08:00 |
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Fischer Moseley
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7ee51158d2
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enforce consistent docstrings and underscores in logic analyzer core
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2024-02-19 11:23:11 -08:00 |
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Fischer Moseley
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1528f569ef
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update submodule usage, tidy logic analyzer config check
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2024-01-14 12:51:52 -08:00 |
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Fischer Moseley
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7a6ab45b92
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revert UART and InternalBus() refactor
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2024-01-07 21:39:44 -08:00 |
fischerm
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61d6479805
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add docstrings
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2024-01-07 15:13:35 -08:00 |
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Fischer Moseley
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4c48035201
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track amaranth release, not main repo
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2024-01-07 12:49:20 -08:00 |
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Fischer Moseley
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bc616fd3bf
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inital source, imported from splat
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2023-12-28 14:22:29 -08:00 |