Commit Graph

1664 Commits

Author SHA1 Message Date
Matthias Koefferlein 8981ed434a First fix for issue-306: some polygons are not recognized as rounded, more robust radius extraction. 2019-08-17 23:55:49 +02:00
Matthias Koefferlein 9c3f70342b key bindings and menu items visibility string packing/unpacking for scripts
New convenience functions are provided which simplify
manipulation of key bindings and menu item visibility
configuration strings. AbstractMenu#pack_key_binding
and AbstractMenu#unpack_key_binding turn a path/key
map into a single string and back. The string format
is the same than for the key-binding configuration key.

The same is provided for the menu item visibilily
with AbstractMenu#pack_menu_item_visible and
Abstract#unpack_menu_item_visible.
2019-08-17 19:54:18 +02:00
Matthias Koefferlein 7b163728ab Added UI comment 2019-08-17 19:23:14 +02:00
Matthias Koefferlein 4659569333 Primary fix issue #318 (unable to remove key binding)
For a backward compatible solution, a key binding
target of '' still means "take default". For
"nothing", a new pseudo-key "none" was defined.

For scripting, this value is available as
constant "Action#NoShortCut".
2019-08-17 19:17:40 +02:00
Matthias Koefferlein aa72d03526 Fixed issue #322 by skipping used layer indexes - will also help with DXF and other named-layer formats 2019-08-17 15:30:47 +02:00
Matthias Koefferlein 06a1cafdf4 Fixed issue #321
This is a small paradigm shift in the configuration hierarchy:
plugins (as children of root) now inherit the configuration
from the parent - now only through configure, but also through
config_get (pull with config_get vs. push with configure).

TODO: both methods are not entirely consistent as configure
can block propagation of configuration settings. But that's a
feature hardly used anyway and rather an optimization thing.
2019-08-17 14:54:48 +02:00
Matthias Koefferlein 19e3d6eab0 Fixed issue #316 (Text capture box has zero dimension for move) 2019-08-04 23:45:46 +02:00
Matthias Koefferlein 25aa54eebf Updated doc for library view 2019-08-04 01:54:16 +02:00
Matthias Koefferlein 7c0dd07d42 WIP: lib browser - cleanup and small bug fixes. 2019-08-04 00:49:08 +02:00
Matthias Koefferlein a104352a93 WIP: library browser - cleanup of unused cells in lib browser, some bug fixed, enhancements to parameter editor on drop 2019-08-04 00:08:39 +02:00
Matthias Koefferlein ed2cdc6c7e WIP: lib browser - open properties dialog after dropping PCell. TODO: needs to be modal with cancel option 2019-08-03 01:03:59 +02:00
Matthias Koefferlein 9daf63403a WIP: lib-browser - icons for lib cells. 2019-08-03 00:45:42 +02:00
Matthias Koefferlein 5ec06b9f24 WIP: library browser - show BASIC PCell variants with more parameters so they can be told apart. 2019-08-03 00:17:02 +02:00
Matthias Koefferlein 741434dc13 WIP: library browser - take selected layer for default if there is no default layer 2019-08-02 23:40:54 +02:00
Matthias Koefferlein de9db84ac7 WIP: library browser - drag & drop of PCell instances 2019-08-02 22:49:55 +02:00
Matthias Koefferlein 56bf9dd8d5 WIP: lib browser - persistence of tree state during update 2019-08-02 21:46:15 +02:00
Matthias Koefferlein fda5d86b4b Performance enhancement of netlist compare (avoid O(2) loop) 2019-08-02 01:39:07 +02:00
Matthias Koefferlein 67944240b2 WIP: lib browser, drag and drop partially works 2019-08-02 00:53:24 +02:00
Matthias Koefferlein a567002e6c Search feature for library browser plus two bugfixes
Bugfixes:
1.) A crash due to wrong key_event_handler pointer
    (relevant for hierarchy view)
2.) When switching cellview the focus wasn't changed
    and selection stayed in old cellview
2019-08-01 23:15:07 +02:00
Matthias Koefferlein 4428ef808b WIP: library browser - PCell variants as children of PCells 2019-08-01 22:52:20 +02:00
Matthias Koefferlein 0c18171e63 WIP: library browser - basic setup. Not much functionality yet. 2019-07-31 23:46:48 +02:00
Matthias Koefferlein 5faf762571 WIP: libraries view - basic skeleton 2019-07-30 23:22:26 +02:00
Matthias Koefferlein dfd713016b Added some unit tests for performance improvement of queries. 2019-07-29 22:36:39 +02:00
Matthias Koefferlein 0dcfeabaf4 Query performance improvement for the cell tree recursion case by introducing optimization hints ('filter state objectives') 2019-07-29 22:27:36 +02:00
Matthias Koefferlein e329f60257 WIP: attempt to improve performance by using name match shortcuts 2019-07-28 19:05:25 +02:00
Matthias Koefferlein e33c2f7b66 Less dependencies on compiler details for RBA/pya tests. 2019-07-28 16:36:31 +02:00
Matthias Koefferlein 49c1bacb98 Introducing variables for layout queries:
1.) The ExpressionContext class is a mapping of tl::Eval
    and allows providing a variable context for the LQ.
    Expression class is derived from ExpressionContext now.
2.) The variable lookup has been changed so that variables
    can be modified even if they come from a parent context.
3.) LayoutQuery and iterator has been given an argument to
    supply the context
2019-07-28 01:33:30 +02:00
Matthias Köfferlein 9a324727d2
Merge pull request #312 from KLayout/dvb
Dvb
2019-07-27 22:32:59 +02:00
Matthias Koefferlein 71f646c24f WIP: updated test data for latest updates, don't sort LVSDB on reading for consistency 2019-07-27 21:42:51 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein 2993a6411a WIP: some enhancements to cross reference and browser
Devices: try to pair unmatching ones similar to subcircuits
Don't sort devices by the device name but by class name
Show the device parameters for netlist devices (same as
for netlist browser)
2019-07-27 20:21:13 +02:00
Matthias Koefferlein 2e034c2172 Bugfix: net names need HTML escaping. 2019-07-27 00:53:21 +02:00
Matthias Koefferlein b4fa4b1bae Flattening of layout with circuit flattening.
Technically, the layout isn't flattened, but connections are made
which allow regenerating the layout even after the circuit
has been flattened.
2019-07-27 00:37:22 +02:00
Matthias Koefferlein 4f9208577b Added option to configure capture range. 2019-07-25 00:06:50 +02:00
Matthias Koefferlein 19b6347f3f Reproducible layer order for different ruby versions. 2019-07-24 20:50:28 +02:00
Matthias Koefferlein 9cad9ca024 Fixed missing initialization of device_scaling in LayoutToNetlist. 2019-07-24 20:49:56 +02:00
Matthias Koefferlein afb5cea576 Added "device_scaling" to LVS
Plus: added some missing files

Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
  exactly check device parameters
* enhancement of LVS script framework and doc updates
2019-07-24 00:16:47 +02:00
Matthias Koefferlein 5dabd6093d Provide new 'align' feature in LVS for automatic circuit flattening. 2019-07-23 01:12:12 +02:00
Matthias Koefferlein aff8212f2f Provide 'align' method to auto-align circuit and cell hierarchy in LVS 2019-07-23 00:14:43 +02:00
Matthias Koefferlein 14d9689498 Added .global to Spice reader. 2019-07-22 23:02:31 +02:00
Matthias Köfferlein d87c27b4cd
Merge pull request #310 from KLayout/issue_293
Fixed #293: window title of setup form is 'Setup'
2019-07-21 23:49:38 +02:00
Matthias Köfferlein 8a66f59b6e
Merge pull request #308 from KLayout/issue-305
Fixed issue #305 (CIF reader issue with rotated boxes)
2019-07-21 23:49:11 +02:00
Matthias Köfferlein fbb8a432c4
Merge pull request #307 from KLayout/dvb
Dvb
2019-07-21 23:48:55 +02:00
Matthias Koefferlein 39011e3a37 Fixed #293: window title of setup form is 'Setup' 2019-07-21 23:22:10 +02:00
Matthias Koefferlein 8f21cdf449 Fixed issue #305 (CIF reader issue with rotated boxes) 2019-07-21 22:57:02 +02:00
Matthias Koefferlein 9d250d6df9 Using a larger branch complexity than default for LVS full test's netlist compare
In addition: typo fixed, added doc for complexity configuration
parameters.
2019-07-21 22:24:07 +02:00
Matthias Koefferlein df7195b81f Compatibility with ruby 1.8, force garbage cleanup for LVS/DRC and tests. 2019-07-21 10:23:08 +02:00
Matthias Koefferlein 6e6e449eef Consolidated test data for lvs:full - there are too many variants to support pure text compare. We use the netlist comparer now. 2019-07-21 09:20:44 +02:00
Matthias Köfferlein f82e7929d8 Fixed a conversion issue with ints on MSVC
Because long is 32bit on Windows (like int), the
conversion from long to unsigned int was subject
to sign overflow. This was fixed by going to
unsigned int via unsigned long.
2019-07-20 00:28:32 +02:00
Matthias Koefferlein 0215d05a12 Fixed unit tests. 2019-07-19 00:02:05 +02:00
Matthias Köfferlein 7fc907cf7e Fixed a segfault from the testsuite 2019-07-16 23:17:29 +02:00
Matthias Köfferlein 4e1736a181 Updated golden data of two tests for Windows. 2019-07-16 01:27:08 +02:00
Matthias Köfferlein 630f7e56d8
Merge pull request #303 from KLayout/issue-302
Fixed #302 and plus a potential invalid memory access fixed
2019-07-16 00:44:00 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
Matthias Köfferlein df23830a1c Fixed a runtime issue on Windows 2019-07-16 00:39:39 +02:00
Matthias Köfferlein e4efaac12f MSVC builds fixed - XML source needs to accept URLs (specifically resource URLs) also with EXPAT 2019-07-15 23:23:19 +02:00
Matthias Köfferlein 9820e57031 Don't write third terminal for R or C (WithBulk variants) 2019-07-15 23:19:03 +02:00
Matthias Köfferlein eb9ffb4a35 Another msvc2017 build warning fixed 2019-07-15 23:18:20 +02:00
Matthias Köfferlein 9a371b8fd2 Fixed some build warnings with msvc2017 (maybe real issues and memory leaks) 2019-07-15 23:17:24 +02:00
Matthias Köfferlein 350ae397aa MSVC builds fixed - XML source needs to accept URLs (specifically resource URLs) also with EXPAT 2019-07-15 00:18:18 +02:00
Matthias Köfferlein ede217cd0b Fixed #302 and plus a potential invalid memory access fixed 2019-07-15 00:17:01 +02:00
matthias 89ce2be5c2 Merge remote-tracking branch 'origin/master' into dvb 2019-07-14 01:28:11 +02:00
Matthias Köfferlein 1b08656835
Merge pull request #300 from KLayout/issue-264
Issue 264
2019-07-14 00:12:58 +02:00
Matthias Köfferlein 397e86f4b4 Merge branch 'dvb' of https://github.com/klayout/klayout into dvb 2019-07-13 23:39:16 +02:00
Matthias Köfferlein 4172b60d60 Fixed a build issue on Windows. 2019-07-13 23:38:26 +02:00
matthias 8b17a4da4f A few utility functions
Polygon#is_rectilinear?, Polygon#is_empty?
and same for SimplePolygon
2019-07-13 22:45:22 +02:00
matthias 5f27341995 Some refactoring, better templates
1.) tl::Stream now can read from resources
    (:<path> URL's)
2.) LVS/DRC templates are kept as resource,
    "create_template" uses the URL to read them.
3.) Added samples for LVS
4.) Configured LVS to match sample
2019-07-13 18:40:00 +02:00
matthias ebca5e1ce6 Bugfix: small LVS and DRC macro iessues (LVS and DRC menus not working etc.) 2019-07-13 17:00:05 +02:00
Matthias Koefferlein 1251fb2cd6 Added < and > to allowed chars for net names in Spice reader 2019-07-13 08:50:13 +02:00
Matthias Koefferlein 2d57a11f8c Fixed #287 (RecursiveShapeIterator to ObjectInstPath)
There is a new constructor for ObjectInstPath to
create one from a RecursiveShapeIterator.
2019-07-12 23:13:50 +02:00
Matthias Koefferlein e8ff8156a0 fix for #264
1. Errors in coerce_parameters are now shown as
   red label + warning icon in the parameters dialog
2. Errors during produce are always logged now

Plus: the scroll bars of the PCell parameters page
don't jump back on "Apply".
2019-07-12 21:13:18 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein f66b094e88 Merge branch 'dvb' into dvb_test 2019-07-12 17:44:11 +02:00
Matthias Koefferlein a47190f3ab Write short versions of LVS and L2N DB by default. 2019-07-12 17:43:43 +02:00
Matthias Koefferlein 85717beca6 Allow saving LVS DB files from netlist browser. 2019-07-12 17:29:44 +02:00
Matthias Koefferlein d109a22cf5 Renaming (distro nodes->virtual nodes) 2019-07-11 23:20:42 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 7bc4acd8f6 WIP: new version of subcircuit match algorithm - needs refactoring. 2019-07-11 23:14:53 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 2f01c7a0bd WIP: other algorithm for handling subcircuits in netlist compare 2019-07-10 23:40:16 +02:00
Matthias Koefferlein 67f786035c WIP: during refactoring 2019-07-10 00:32:53 +02:00
Matthias Koefferlein 1fd069ca99 Provide a better description for net mismatch with warning. 2019-07-09 20:29:35 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
2019-07-09 19:55:48 +02:00
Matthias Koefferlein 0c6ead6f90 WIP: introduced boundary into L2N format so we have something to display for abstracts. 2019-07-09 01:18:23 +02:00
Matthias Koefferlein c9e08c4500 WIP: propagate global nets to parent hierarchy even if there is no shape inside the cell. 2019-07-08 23:11:35 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein bc2d9448d6 Providing LVS tests. 2019-07-07 21:33:28 +02:00
Matthias Koefferlein 95a1e38fe3 WIP: better reproducablility for .lvsdb layer names, updated tests. 2019-07-07 19:39:00 +02:00
Matthias Koefferlein 993ef78575 WIP: some cleanup/enhancement
General topic: abstracts and swappable pins.
Issue: we work bottom up and assign pins. This is the
basis for net graph building. But swappable means those
pins can change. The compare works fine, but debugging
output is strange: as the pin assigned is fixed, the nets
found to be attached to a circuit might not fit any
proposed pin pair (which does not contain swapping).

The problem gets worse with abstracts.

The enhancements are
- Such cases generate only warnings in the browser
  and the message says swapping might be the case
- Floating nets are treated differently. This should
  lead to a better performance for abstracts/black boxes,
  but in case of disconnected pins (due to wire errors),
  floating nets happen to create mismatches in the nets above.
- Net graph building does not consider swappable nets. In
  case of two swappable pins this wouldn't be an issue, but
  for more than two this would create ambiguities and
  prevent topological matching.

Plus: Debug output option for net graph

Tests updated
2019-07-07 18:17:14 +02:00
Matthias Koefferlein ace0788f85 WIP: Spice reader reads pin names from nets 2019-07-07 00:05:22 +02:00
Matthias Koefferlein 0e5ecdc36b Attempt to make LVS compare output a little more predictable with boundary cases
- For unattached subcircuit pins no error should be reported
- For abstract nets, graph propagation through subcircuit pins isn't attempted.
  Abstract nets are only dummy-associated currently.
2019-07-06 23:40:49 +02:00
Matthias Koefferlein 903b1f7505 WIP: fixed 'equivalent_pins' 2019-07-06 21:47:25 +02:00
Matthias Koefferlein 5ce8dd2684 WIP: added circuit blankout. 2019-07-06 19:50:20 +02:00
Matthias Koefferlein fb8a64b0e1 WIP: updated LVS doc. 2019-07-06 09:37:54 +02:00
Matthias Koefferlein 24a0c3dd00 LVS template for macros. Enhancement: 'schematic' statement can now be anywhere in LVS script. 2019-07-06 09:35:51 +02:00
Matthias Koefferlein a179705a03 WIP: more refactoring. 2019-07-06 09:15:33 +02:00
Matthias Koefferlein 0595ec2e0f WIP: one more test for LVS 2019-07-06 09:08:32 +02:00
Matthias Koefferlein 2f6aae7204 WIP: refactoring, added first tests for LVS 2019-07-06 08:52:40 +02:00