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191 Commits
Author SHA1 Message Date
Stephen Williams 453c546589 Prepare for 10.3 release. 2019-08-15 08:31:11 -07:00
Martin Whitaker 4914f83ae3 Schedule UDP initial 0/1 assignments to occur during time 0.
This allows any always processes that are sensitive to the UDP output
to start first. This fixes a time 0 race that was found in a Lattice
Semiconductor simulation library (reported on iverilog-devel).

If the initial value is 'x', propagate the value to the UDP output
before the start of simulation, to avoid unwanted update events on
the z -> x transition on downstream nets.

(cherry picked from commit 3bdb50da29)
2019-08-09 21:09:44 +01:00
Martin Whitaker b7b22660e5 Fix assertion failure when top level module has array ports.
Reported by Kustaa Nyholm on iverilog-devel, 2017-10-17.

(cherry picked from commit a8318db21c)
2019-08-03 19:26:16 +01:00
Martin Whitaker a6eb59192e Add note that bison 2.3 is known to generate bad code (br1028).
(cherry picked from commit 326945329e)
2019-08-02 17:03:53 +01:00
Martin Whitaker dbcb7e5fb6 Fix for br1015 : assertion failure when task/function port is an array.
This is an error for Verilog and not yet supported for SystemVerilog.

(cherry picked from commit e97883b1db)
2019-08-02 17:03:42 +01:00
Martin Whitaker 2546631874 Fix for GitHub issue #256 - don't use V as Makefile variable name.
Some build systems override V on the make command line, wrongly assuming
it is the automake verbose option.

(cherry picked from commit 866cc46915)
2019-08-02 10:32:51 +01:00
StefanBruens 8e54e31bd8 Fix redefinition of YYLTYPE struct caused by wrong include order
cfparse.h defines the YYLTYPE struct in case it has not been defined, and
also declares an extern YYLTYPE cflloc which is used in cflexor.

As cfparse_misc.h defines an extended YYLTYPE, the cflloc instance in
cfparse.c has this extended type, i.e. there is a type mismatch.

Changing the include order in cflexor causes both cflexor.c and
cfparse.c to use the definition from cfparse_misc.h.

This has been uncovered by GCC when using LTO:
---
gcc -flto=8 main.o substit.o cflexor.o cfparse.o -o iverilog 
cfparse.h:105:16: warning: type of 'cflloc' does not match original declaration [-Wlto-type-mismatch]
  105 | extern YYLTYPE cflloc;
      |                ^
cfparse.c:1162:9: note: type 'struct cfltype' should match type 'struct YYLTYPE'
 1162 | YYLTYPE yylloc
      |         ^
cfparse.c:1162:9: note: 'cflloc' was previously declared here
cfparse.c:1162:9: note: code may be misoptimized unless '-fno-strict-aliasing' is used
---

(cherry picked from commit d58fde6f36)
2019-08-02 10:15:55 +01:00
Martin Whitaker 9a81d5dd65 Change minimum gperf version to 3.0.
vhdlpp uses the --ignore-case option, which isn't supported in 2.7.

(cherry picked from commit 10168d542c)
2019-08-02 10:15:47 +01:00
Martin Whitaker 564c7404a6 Fix initialisation of vvp symbol table values.
In 64-bit Windows, an unsigned long is 32 bits, so initialising the num
member of the union did not properly initialise the ptr member. The num
member isn't actually needed, so eliminate it.

(cherry picked from commit c383d2048c)
2019-08-01 13:00:26 +01:00
Martin Whitaker a01b7054fc Fix GitHub issue #231 - support packed array indexing in foreach statement.
(cherry picked from commit 6309674a8d)
2019-07-25 11:14:21 +01:00
Martin Whitaker e834302875 Fix VPI interface to APV objects.
- type is vpiPartSelect, not vpiMemoryWord
- left/right range is for part, not full word
- index is not valid for a part select

The user will now get a sensible error message if they pass part of an
array word to $dumpvars (GitHub issue #230).

(cherry picked from commit 8402696676)
2019-07-25 09:03:04 +01:00
Martin Whitaker 7f418af98a Fix for GitHub issue #239 - segfault when library file has syntax errors.
If there are errors when parsing a file, it is not safe to elaborate any
modules that have been found in that file.

(cherry picked from commit 0cb1ebddf1)
2019-07-24 10:32:44 +01:00
Martin Whitaker 5b5c0f5c69 Fix GitHub issue #243 - support arbitrary width static bit arrays in vvp.
(cherry picked from commit 8cd8bed22e)
2019-07-24 09:17:08 +01:00
Martin Whitaker 892f5f84c4 Fix white space errors.
(cherry picked from commit 4055752959)
2019-07-23 11:05:24 +01:00
Maciej Kurc cb4c98bd4e Added support for parsing attributes on function calls
Signed-off-by: Maciej Kurc <[email protected]>
(cherry picked from commit b619b43ddd)
2019-07-23 11:05:16 +01:00
Maciej Kurc 49066f1601 Added support for parsing attributes on port connections
Signed-off-by: Maciej Kurc <[email protected]>
(cherry picked from commit e6fa2625a4)
2019-07-23 11:05:01 +01:00
Martin Whitaker 5a9a4c4f94 Fix makefile rules for header files generated by bison.
bison 3.4.1 writes the header file before the c++ file. Our makefile
rules make the header files depend on the c++ files, so we need to
fix the timestamps accordingly.

(cherry picked from commit 5bb6c7f53a)
2019-06-02 19:56:42 +01:00
Cary R 6ebe707091 Update files from GTKWave 2019-05-14 22:35:13 -07:00
Martin Whitaker 9b5906b000 Fix GitHub issue #244: handle mixed signed/unsigned power operations.
The signed version of the power operation in vvp should only be used
if the exponent is signed. Both signed and unsigned versions will
produce the correct result regardless of the type of the base operand,
provided it has been appropriately extended to the result size.

(cherry picked from commit ffb34861cf)
2019-05-11 21:43:38 +01:00
Cary R 27cac593e3 Update fstapi.c to the latest from GTKWave 2019-03-26 19:59:29 -07:00
Martin Whitaker 7399f3744b Fix for GitHub issue 235: segfault when calling vpi_handle_by_name().
When vpi_handle_by_name() iterates over the VPI objects in a scope, handle
the case that vpi_get_str() returns a null value. This currently occurs if
the scope contains an enum type definition, as vpi_get_str() is not
implemented for __vpiEnumTypespec.

(cherry picked from commit 51a13e883a)
2019-03-23 17:31:07 +00:00
Stephen Williams d46e7ace70 Merge branch 'v10-branch' of github.com:steveicarus/iverilog into v10-branch 2019-03-20 09:36:06 -07:00
Martin Whitaker bda6e0ae3f Update README to say "or later" for build tool versions.
(cherry picked from commit 9369d6db57)
2019-03-16 12:42:19 +00:00
Konst Mayer bd721c1483 Fix a typo in the man page
(cherry picked from commit f95ae911d0)
2019-03-16 12:42:09 +00:00
Martin Whitaker 41c6a0e0fe Fix assertion failure on assignment to part of variable member (GitHub issue #226)
For now, output a "sorry" message, as the compiler doesn't support this.

(cherry picked from commit dc5429e5e7)
2019-01-26 17:49:57 +00:00
Martin Whitaker 37b98bbe67 Use LLONG_MIN instead of LONG_LONG_MIN.
GCC 8 no longer defines LONG_LONG_MIN. We already assume a C99 compliant
compiler in other places.

(cherry picked from commit 2ff6af254b)
2019-01-26 17:49:49 +00:00
Martin Whitaker f62d738813 Fix for GitHub issue #224 - import * does not import enum members.
(cherry picked from commit e745304cc4)
2019-01-15 21:06:51 +00:00
Martin Whitaker 19444dd2fa Restrict cast type to what's allowed by the IEEE standard.
(cherry picked from commit 7cd078e7ab)
2018-12-15 12:49:34 +00:00
Martin Whitaker bd4d73d9ae Fix GitHub issue #219 and #220 - incorrect results from SV size cast.
(cherry picked from commit 230f0bc13c)
2018-12-15 12:49:12 +00:00
Martin Whitaker edfe398e26 Undo redefinition of unique_ptr at end of header files.
It seems that clang both defines __cplusplus < 201103L and provides
unique_ptr (GitHub issue #215).

(cherry picked from commit 3612076943)
2018-12-13 19:16:30 +00:00
Cary R acae85d1a4 Fix a space issue 2018-11-13 21:59:09 -08:00
Cary R 95444b474d Update fstapi files to the latest from GTKWave 2018-10-12 21:30:12 -07:00
Martin Whitaker 3581da23e3 Don't use MinGW strtod workaround when building for MinGW-w64.
The host triplet for MinGW-w64 has changed to more closely match that
for MinGW, so we need to update the pattern in the test.

(cherry picked from commit fdf353af29)
2018-10-08 22:11:36 +01:00
Martin Whitaker 10448bf94b Fix bug in output of null character with %c format.
(cherry picked from commit 9d0d1938dc)
2018-10-08 22:11:25 +01:00
Martin Whitaker 10e7eb55ce Fix bit width when converting real value to binary/hex string in VPI.
(cherry picked from commit 5aae9ea770)
2018-10-08 22:11:16 +01:00
Martin Whitaker 062fc43fab Fix another implicit fallthrough warning.
(cherry picked from commit a03995b4da)
2018-10-08 22:11:06 +01:00
Martin Whitaker 869513a1ec Fix alloc size warning when building with recent GCC.
(cherry picked from commit 5cd0ba08b1)
2018-10-08 22:10:50 +01:00
Martin Whitaker ac2f5f0740 Fix invalid cast of TF sizetf callback.
(cherry picked from commit 6415d84ed5)
2018-10-08 22:10:17 +01:00
Martin Whitaker 4cb9ae0aa2 SIGHUP is not available in Windows.
(cherry picked from commit 3e25b04685)
2018-10-08 22:10:13 +01:00
Martin Whitaker 8e77900b9c Fix deprecated dynamic exception specification warnings.
(cherry picked from commit 4ea18196c8)
2018-10-08 22:10:07 +01:00
Martin Whitaker 400428a2b6 Fix signed/unsigned comparison warning.
(cherry picked from commit e71a76a1e2)
2018-10-08 22:10:00 +01:00
Martin Whitaker de63c0cedb Fix implicit fallthrough warnings when building with recent GCC.
(cherry picked from commit f1608e163f)
2018-10-08 22:09:50 +01:00
Martin Whitaker 10fc8048ac Fix auto_ptr deprecated warnings when building with recent GCC.
(cherry picked from commit 78317a2799)
2018-10-08 22:01:04 +01:00
Martin Whitaker c5df4cfcad Cleanly terminate vvp on SIGHUP or SIGTERM (GitHub issue #203).
(cherry picked from commit 603ff303f5)
2018-10-08 21:50:48 +01:00
Cary R f2a711b8f1 Update to latest GTKWAve files 2018-10-06 09:26:49 -07:00
Martin Whitaker dc6fc7ee77 Enable checks for VPI const-correctness.
Note we only want these enabled when building the compiler and runtime
binaries. If we included the ICARUS_VPI_CONST definition in the global
CPP_FLAGS, that would propagate to the flags used by iverilog-vpi, so
would affect compilation of user VPI code.

(cherry picked from commit 542fe2cf77)
2018-10-06 11:56:35 +01:00
Martin Whitaker 16c18eda2e Further fixes for const-correctness.
- allow ICARUS_VPI_CONST to be pre-defined by the user
- use it for sizetf as well as for compiletf and calltf
- fix remaining warnings when it is defined as 'const'

(cherry picked from commit 0d494da702)
2018-10-06 11:55:03 +01:00
Martin Whitaker 5474f9d5ac Allow %c format to output null characters (GitHub issue #209)
Currently $display et al. output nothing when the expression
corresponding to a %c format specification has the value 0. As
Verilog provides no other way to write raw bytes to a file, we
should allow 0 values to be written. Other simulators allow this.

(cherry picked from commit b066a5815e)
2018-09-29 21:31:18 +01:00
Martin Whitaker d5be428e45 Fix broken links to SourceForge bug/patch trackers (GitHub issue #207).
Also add link to GitHub issues, as a lot of users report bugs there.

(cherry picked from commit 8df2f0cadf)
2018-09-28 10:05:09 +01:00
Stephen Williams c831ce0aae Merge branch 'v10-branch' of github.com:steveicarus/iverilog into v10-branch 2018-07-24 09:37:50 -07:00
Cary R ab6ae797b3 Update fstapi.c to the latest version 2018-07-16 09:03:22 -07:00
Martin Whitaker 52b136d8a8 Fix for GitHub issue #198 - support octal display for thread variables.
(cherry picked from commit 11c826216a)
2018-06-12 23:00:53 +01:00
Martin Whitaker 703363feaf Fix for GitHub issue #199: handle signed division overflow.
When performing a signed division or modulus operation using native
arithmetic, trap the special case that the numerator is the minimum
integer value and the denominator is -1, as this gives an undefined
result in C++.

(cherry picked from commit 7ad5b59a6f)
2018-06-12 23:00:34 +01:00
Martin Whitaker e79d226082 Don't allow non-vectorable arguments to $signed/$unsigned.
This led to an assertion failure in many cases (see br1029).
1364-2012 indicates it is illegal.

(cherry picked from commit 87c01c55c0)
2018-05-14 22:26:36 +01:00
Martin Whitaker 7df0f0c659 Further fix for br1029.
The code in vpi_callback.cc is replicated in vpi_vthr_vector.cc,
so we have to replicate the fix. This should really be factored
out.

(cherry picked from commit 6e49ab10ec)
2018-05-14 22:23:46 +01:00
Martin Whitaker 24731227b4 Fix br1029 - correct rounding when vpi_get_value converts real to integer string.
(cherry picked from commit 5a4e99b0e8)
2018-05-12 23:57:42 +01:00
Yury Gribov 0f28b03dd3 Put start events to proper queue.
(cherry picked from commit 43cd693fe0)
2018-03-10 12:22:35 +00:00
Martin Whitaker 02e220097d Implement supply->strong strength reduction for non-resistive switches.
As specified in 1364-2005 section 7.11.

(cherry picked from commit 36eef5154f)
2018-02-23 22:32:52 +00:00
Martin Whitaker fc62c91496 Improved check for missing task/function port direction.
(cherry picked from commit 69d80839a5)
2018-02-23 22:32:07 +00:00
Martin Whitaker 6dce878638 Fix for br1027: incorrect inference of task/function port direction.
In traditional Verilog, each task_port_item must have an explicit port
direction.

In SystemVerilog, if the port direction is not specified, it should be
inherited from the preceding task_port_item for that task/function, and
only the first task_port_item should infer the direction to be 'input'.

(cherry picked from commit 6b1b402a79)
2018-02-20 21:08:30 +00:00
Cary R 480fb0b418 Update tp the latest files from GTKWave 2017-12-13 21:57:05 -08:00
Cary R dab896c463 The delay for a join_any and join_none is different than join 2017-12-05 21:50:26 -08:00
Cary R 94861872e5 Fix a couple memory leaks in $sdf_annotate() 2017-11-16 19:42:16 -08:00
Cary R cc3e9d791a Update flex destroy to work for version 2.6 and greater 2017-11-16 19:17:50 -08:00
Martin Whitaker 03764a400d Fix assertion failure in vvp wide functor.
If the functor output is read before any values have propagated to
the functor inputs, the internal storage won't have been initialised.

(cherry picked from commit ad83a135e5)
2017-11-08 20:54:25 +00:00
Martin Whitaker 99f66e2781 Fix for GitHub issue #169: nets can get given wrong scope in VPI.
In vvp, the __vpiSignal object holds a pointer to the scope containing
the signal. This was getting set to the current scope when the net was
finally resolved, rather than to the scope where the net was declared.

(cherry picked from commit c622d372f9)
2017-11-07 19:25:02 +00:00
Martin Whitaker a74c3a1207 Factor out common code for warning about inconsistent timescales.
Also reword the warning for SystemVerilog, where `timescale is not
the only (or indeed preferred) way of specifying timescales.

(cherry picked from commit 9382d22063)
2017-11-05 22:32:00 +00:00
Martin Whitaker dec9a8b527 Fix $printtimescale to support 10s and 100s values.
(cherry picked from commit e54d19e2d2)
2017-11-05 22:31:33 +00:00
Cary R 1b0843c94c Update to latest files from GTKWave 2017-10-22 19:40:43 -07:00
Martin Whitaker bb2e270087 Enable base class tasks to be used in an extended class.
(cherry picked from commit 4f383a8a11)
2017-10-08 21:27:49 +01:00
Martin Whitaker a18fe22d32 Fix for GitHub issue #98 and #167
Two fixes needed:
  - when searching for a base class, we need to look in the root scope
    if the base class isn't found in the scope hierarchy
  - the classes in the root scope need to be stored in an ordered
    list, not a map, to ensure they are elaborated in the order they
    were declared. Without this, the compiler may try elaborating an
    extended class before its base class is known about.

(cherry picked from commit 87cddf33dc)
2017-10-08 21:27:13 +01:00
Martin Whitaker 1f7588d3a4 Add support for darray initialisation from another darray.
Fixes GitHub issue #164.

(cherry picked from commit 5ca058bfb5)
2017-10-08 17:53:53 +01:00
Martin Whitaker 09c7c439a1 Add support for vec4 darray initialisation from an array pattern.
This was just a missing case label in tgt-vvp.

(cherry picked from commit 1aeaafa96c)
2017-10-08 17:53:33 +01:00
Martin Whitaker a907200fb9 Generate proper error messages for invalid dynamic array initialisers.
Invalid user code should not result in an "internal_error".

(cherry picked from commit 8a36849fda)
2017-10-08 17:53:21 +01:00
Martin Whitaker bccb7e7def Fix for GitHub issue #165 : assertion failure on thread join.
If a thread becomes detached due to a join_any statement, that
thread must not attempt to join its parent, even if the parent
is waiting on a subsequent join statement.

(cherry picked from commit e315cafa01)
2017-10-07 16:46:49 +01:00
Martin Whitaker 6b11df1999 Fix for br1025 : support nested scopes in root level tasks/functions.
(cherry picked from commit 85fa24fa58)
2017-10-04 21:34:49 +01:00
Martin Whitaker 95d3579509 Fix for GitHub issue #163 : assertion failure caused by syntax error in task.
(cherry picked from commit 3566ff4cd4)
2017-09-28 19:26:27 +01:00
Martin Whitaker a3a8669c6f Fix error in last commit.
(cherry picked from commit a1a7f5deff)
2017-09-17 21:24:50 +01:00
Martin Whitaker 885e25120a Fix use after free bug in vvp when a task or function is disabled.
Use test_joinable() and do_join() to ensure everything gets cleaned
up before the thread is reaped. This should fix br1016, br1017, and
br1018.

(cherry picked from commit 0bed890bc6)
(and subsequent fixup)
2017-09-17 20:01:14 +01:00
Martin Whitaker 7b372c3a0c Fix for GitHub issue #162 : very wide busses cause assertion failure.
This occurs when tgt-vvp attempts to generate a C4<..> constant
value with a bit width >= 65536. The actual failure occurs in the
StringHeap class, which originally supported a maximum string length
of 65535. This fix enables the StringHeap class to support any size
string (provided the system has sufficient memory).

(cherry picked from commit c855b8926e)
2017-09-11 22:29:30 +01:00
Stephen Williams 3d14281e0d Prepare for version 10.2 2017-08-24 08:22:49 -07:00
Stephen Williams 2564554178 Minor tweak to some assertions. 2017-08-24 08:18:55 -07:00
Martin Whitaker 8cd697fd24 Fix for br1019 - allow multiple array words to be attached to a vpi callback.
Normally there is at most one signal attached to a vvp functor, but
due to port collapsing, there can be more than one. If these signals
are array words, we need to trigger vpi callbacks on all the associated
arrays when the functor value changes.

(cherry picked from commit ac87138c44)
2017-08-12 12:31:14 +01:00
Cary R 306d2fb53b V10: Fix class versus struct warning in clang 2017-06-19 21:26:35 -07:00
Martin Whitaker 52b497f74c Don't allow localparams to be overridden (GitHub issue #157)
Currently we only issue a warning if a parameter override references
a parameter that doesn't exist, so do the same in this case.

(cherry picked from commit 42422d9940)
2017-06-16 21:11:18 +01:00
Martin Whitaker ce7f28202a Ensure value passed to named event via vpi_put_value() is initialised.
The __vpiNamedEvent::vpi_put_value() function ignores the value, but
intermediate code looks at it.

(cherry picked from commit e2be64558b)
2017-06-15 09:15:31 +01:00
Martin Whitaker 49bea6a01a Implement vpi_put_value() for named events (GitHub issue #158).
(cherry picked from commit 3de7c234f7)
2017-06-15 08:52:15 +01:00
Martin Whitaker 8ab100c1c7 Fix for GitHub issue #152 - segfault on gate connection syntax error.
If there is a syntax error in the source code, pform_makegate may be
passed a null list of port connections. The error is already reported,
so we just need to ignore it.

(cherry picked from commit 8a5cbd4415)
2017-04-21 21:44:27 +01:00
Martin Whitaker 177ae7c220 Improved error checking for defparam values supplied on the command line.
Fixes GitHub issue #139 plus various assertion failures when invalid
values are specified.

(cherry picked from commit 3c91630b53)
2017-01-29 20:25:04 +00:00
Martin Whitaker b04d5a9068 Fix for GitHub issue #142 - assertion failure when parameter expression
contains undefined variable.

(cherry picked from commit 8f6f999ea7)
2017-01-29 20:24:56 +00:00
Martin Whitaker b8c8f03037 Add library search path option to iverilog-vpi (GitHub issue #145).
(cherry picked from commit 4e2ba29dc6)
2017-01-29 20:24:47 +00:00
Stephen Williams 38013f7a34 Sorry message for procedural assertion statements. 2017-01-10 12:18:38 -08:00
Cary R 561638a31f Allocate the correct amount of memory when escaping a string 2017-01-08 20:46:29 -08:00
Martin Whitaker bb91512e75 Fix for GitHub issue #128 - disable CONCATZ generation for vhdl target.
(cherry picked from commit b4e8a12309)
2016-11-25 22:36:19 +00:00
Martin Whitaker 09ff851483 Fix for GitHub issue #130 part 2 : assertion failure on unsupported cast.
(cherry picked from commit 7cac4677bf)
2016-11-25 22:36:00 +00:00
Martin Whitaker 19d8f43e9b Fix for GitHub issue #130 part 1 - null dereference when assigning int to enum.
(cherry picked from commit 002f118bb5)
2016-11-25 22:35:37 +00:00
Henry Wong ce88deaa97 Fix segfault when error in multi-dimensional part select.
(cherry picked from commit 182c08b528)
2016-11-25 21:33:47 +00:00
Henry Wong 1a8b19baf2 Fix null-pointer when trying to dump null statements.
(cherry picked from commit 69a96112e8)
2016-11-25 21:33:41 +00:00
Henry Wong b3cf533b3c Pop current_block_stack after for_variable_declaration and foreach.
(cherry picked from commit f827e4f748)
2016-11-25 21:33:33 +00:00
Martin Whitaker ba3856ebb0 Fix indentation in previous patch.
(cherry picked from commit 991d7d7582)
2016-10-20 16:49:37 +01:00
Henry Wong c06e2790a7 Adding implementation of NetEvWait::nex_input to handle event controls inside always@(*) blocks
(cherry picked from commit 1f9bf656ed)
2016-10-20 16:49:29 +01:00
Maciej Suminski 6e460a6a3f Fixed warnings about shifting a negative value 2016-10-14 23:41:11 +01:00
Maciej Suminski dbc536c4fb Added missing brackets
(cherry picked from commit 3710d35dd1)
2016-10-14 23:22:26 +01:00
Stephen Williams 5e41c86d01 Merge branch 'v10-branch' of github.com:steveicarus/iverilog into v10-branch 2016-10-14 10:31:58 -07:00
Martin Whitaker 572124e1e9 Allow library files to be specified on the iverilog command line.
This was already supported in command files, using the '-v' flag.
'-v' is already in use on the command line, so use '-l' instead,
and make that an alias for '-v' in command files.

(cherry picked from commit 7ddc514518)
2016-10-02 19:17:24 +01:00
Martin Whitaker 37ecdb4cfb Stop tgt-vvp from generating .alias records.
(partial backport of commit d44c814bab)

Net arrays can be handled by nets directly, instead of creating
.alias records. But keep support for .alias records in vvp. to
maintain backwards compatibility.
2016-09-17 19:49:26 +01:00
Martin Whitaker a11dc8b472 Backport Nexus::has_floating_input() from master branch.
Needed to support check for output port coercion.
2016-09-17 19:40:05 +01:00
Martin Whitaker e7852f8f9c Fix for GitHub issue #127 - coerce output ports to inout when necessary.
(cherry picked from commit 080dd0323d)
2016-09-17 19:24:04 +01:00
Martin Whitaker 9449c46865 Use gn_system_verilog() where appropriate.
Replace explicit comparisons against generation_flag with calls to
the gn_system_verilog helper function, both for code clarity and
to fix a couple of bugs. Also simplify the implementation of the
function, as we already rely on the generation_flag enumeration
being an ordered list.

(cherry picked from commit 3c9b39846c)
2016-09-17 19:23:48 +01:00
Martin Whitaker 8a780ece56 Merge branch 'v10-branch' of github.com:steveicarus/iverilog into v10-branch 2016-08-15 20:49:51 +01:00
Cary R 8bb4777789 Fix getting timeunit outside of module to use a defined check value 2016-08-14 17:26:31 -07:00
Cary R 3b705d95a6 Update fstapi.c to latest from GTKWave 2016-08-14 12:47:15 -07:00
Martin Whitaker f9559853f1 Fix for br1007 - out-of-range constant bit select should be a warning.
An out-of-range constant bit select on the LHS of an assignment was being
treated as an error, whereas an out-of range constant part select would
only result in a warning. In any other context, either case would result
in a warning, so convert the error to a warning.

In addition, all warnings for out-of-range or undefined constant bit/part
selects should be controlled by -Wselect-range.

(cherry picked from commit b51e58fa9d)
2016-08-08 22:26:05 +01:00
Martin Whitaker cda95c1554 Fix vlog95 target to handle hierarchical references in root-level tasks.
(cherry picked from commit 8461e1d9c4)
2016-07-26 22:04:05 +01:00
Martin Whitaker 4066031add Fix for GitHub issue #104 - assigning hierarchical signal from top level task.
When emitting a design, all scopes must be emitted before emitting any
top level task/function/method definitions, otherwise hierarchical
references can't always be resolved.

(cherry picked from commit 2bc42fc6e2)
2016-07-26 22:03:59 +01:00
Martin Whitaker d6d50e9b68 Update vlog95 target to handle timescales for root scope tasks/functions.
(cherry picked from commit b1b91f49c8)
2016-07-23 00:15:55 +01:00
Martin Whitaker 0ffbb2b1de Fix for GitHub issue #115 - synthesis aborts on case with max guard of 0.
The calculation of the required multiplexer width was incorrect for
the corner case of a single guard value of zero.

(cherry picked from commit 27213f2af8)
2016-07-23 00:15:43 +01:00
Martin Whitaker 9b55a3d67f Support timescales in design units that aren't inside a module.
SystemVerilog allows tasks, functions, and classes to be defined at the
root level or inside packages, so we can't rely on an enclosing module
being present to provide the timescale.

(cherry picked from commit 7bed181f68)
2016-07-23 00:15:15 +01:00
Martin Whitaker 07623bef2e Fix assignment of outputs from class methods.
As for inputs, skip over the implicit 'this' parameter.

(cherry picked from commit e316cc708b)
2016-07-23 00:13:07 +01:00
Martin Whitaker 73d688c313 Fix for br1003 - prevent segfault when delays are used outside a module.
(cherry picked from commit b8f9ed27c5)
2016-07-23 00:12:57 +01:00
Martin Whitaker 6155986d1c Fix for br1005 - segfault when SV queue is declared inside a class.
For now, output a "sorry" message to indicate this is not yet
supported.

(cherry picked from commit ad1101cc80)
2016-07-11 20:13:52 +01:00
Martin Whitaker face462cc2 Partial fix for br1006 - allow part selects in path declarations.
This just enables the compiler to parse path declarations that
contain part selects. As for bit selects, the part select is
discarded, and if elaboration of specify blocks is enabled,
the path declaration will be applied to the entire vector. If
elaboration is enabled, a warning message will now be output
when a bit or part select is discarded.

(cherry picked from commit ad87704809)
2016-07-10 20:25:39 +01:00
Martin Whitaker a5f6329500 Improved fix for GitHub issue #112.
This does a better job of setting the intermediate expression types
and widths when calculating the canonical index into a packed array.
It still doesn't properly handle out-of-bound indices (br953).

(cherry picked from commit 7f612270b3)
2016-07-10 13:38:44 +01:00
Martin Whitaker 3e13594816 Fix for GitHub issue 112 - index calculation for >2D packed arrays.
(cherry picked from commit 1448210f28)
2016-07-10 13:38:36 +01:00
Martin Whitaker 99138eafb1 Fix vector width calculation for multi-dimensional packed arrays.
(cherry picked from commit d496b095ff)
2016-07-10 13:38:23 +01:00
Martin Whitaker 86968e3752 Fix for GitHub issue #106 - prevent VPI writes during read-only synch.
(cherry picked from commit 8234f1845d)
2016-06-09 21:29:32 +01:00
Martin Whitaker 27a46f4afe Fix for GitHub issue #105 - fully support SV macro escape sequences.
The existing support for ``, `", and `\`" did not work in nested macro
definitions. Note that the new implementation only detects and replaces
these sequences inside the macro text (as required by the IEEE standard),
whereas the old implementation would detect and replace them anywhere in
the source files.

(cherry picked from commit 332170d36b)
2016-06-06 20:26:52 +01:00
Martin Whitaker d770199550 Add tgt-vvp sorry message for unsupported mixed NB/CA to vector. 2016-05-10 23:02:04 +01:00
Martin Whitaker 06f6a72770 Fix for GitHub issue #103 - vvp assertion failure on part select propagation.
The implementation of vvp_fun_part_pv::recv_vec4_pv was incorrect, and
propagated the incoming widths rather than the stored widths.

(cherry picked from commit 0c66116f51)
2016-05-10 22:41:58 +01:00
Maciej Suminski 30257e0914 ivl: Support for part selection in multidimensional packed ports assignment.
(cherry picked from commit b4baace4b1)
2016-04-19 21:32:38 +01:00
Maciej Suminski b2281b0e65 ivl: Fixed slice base calculation
when range is rising (e.g. logic [0:3] arr) or when it
starts with a non-zero integer (e.g. logic [4:1] arr).

(cherry picked from commit de775975e8)
2016-04-19 21:26:35 +01:00
Maciej Suminski 161cebb178 vvp: Corrected vvp_net_fun_t::recv_vec4_pv() (commit de968e18)
(cherry picked from commit 9cf1dcbae2)
2016-04-19 21:04:48 +01:00
Martin Whitaker b46d8b8389 Fix for br974 - support SV types in non-ansi port declarations.
(cherry picked from commit 6ba2bee977)
2016-04-19 20:47:33 +01:00
Martin Whitaker 2689ebacfe Extended fix for GitHub issue #99.
Most vvp functors need to support recv_vec4_pv. Any that are strength-aware
also need to support recv_vec8_pv. Note the simplifying assumption that is
documented in the base class recv_vec4_pv_ implementation.

(cherry picked from commit 6e5ed73b09)
2016-04-19 20:46:55 +01:00
Martin Whitaker 5bbb054173 Add check for explicit lifetime when initialising static variables.
If a static variable declared in a task, function, or block has an
initialisation expression, SystemVerilog requires the declaration to
have an explicit static lifetime. This is supposed to be a compile
error, but for now just output a warning.

Implementing this required adding support in the parser for explicit
lifetimes in variable declarations. For now, just output an error if
the user asks for a lifetime that isn't the default for that scope.

(cherry picked from commit 9538c81d34)
2016-04-19 20:43:25 +01:00
Martin Whitaker 7d2eeb0137 Added support for default subroutine lifetimes (SystemVerilog).
(cherry picked from commit 6e718c2e0c)
2016-04-19 20:43:14 +01:00
Martin Whitaker 4aef636559 Variable initialization blocks should be unamed.
Also add file/line info to initial process.

(cherry picked from commit 72bb63cf42)
2016-04-19 20:41:48 +01:00
Martin Whitaker 72fc3d712d For SystemVerilog, run variable initialization before main simulation starts.
(cherry picked from commit 54feb89bf5)
2016-04-19 20:41:25 +01:00
Martin Whitaker 3f75f6b155 Fully support variable initialization in tasks/functions/named blocks.
(cherry picked from commit 635adfc01e)
2016-04-19 20:40:14 +01:00
Martin Whitaker 9be3fc3a56 Fix GitHub issue #99 - recv_vec4_pv not implemented for arithmetic functors.
Also initialise the stored operand values to 'bz instead of 'bx to get
the correct results when bits are not driven.

(cherry picked from commit b2f7d09f0d)
2016-04-04 22:41:10 +01:00
Larry Doolittle aa2260f4fa Capitalize Verilog in a few places
(cherry picked from commit 89edf62206)
2016-04-02 22:42:26 +01:00
Martin Whitaker 6974613bff Fix for GitHub issue #96 - support mixed constant/variable delays in vvp.
If all three rise/fall/decay delay values are constant, we can use
the vvp .delay statement variant that takes three literal numbers.
If not, we have to use the variant that takes three net inputs. If
some of the delay values are constant, we need to create constant
drivers for those delay inputs.

(cherry picked from commit 20104c92c8)
2016-04-02 20:04:08 +01:00
Martin Whitaker 8bd4e9d481 Refactor to use new pad_to_width/cast_to_width functions.
(cherry picked from commit 7f475d4210)
2016-03-25 22:42:20 +00:00
Martin Whitaker 04ae07f03c Fix for GitHub issue #94 - enhance support for SystemVerilog size casting.
Allow the size expression to be any constant expression. Also ensure that
the expression width and type are correctly calculated and applied.

(cherry picked from commit dc1c3a4043)
2016-03-25 22:41:50 +00:00
Cary R d9be5318f9 Fix a cppcheck warning 2016-03-24 20:24:03 -07:00
Cary R 88cd5534c4 Use correct type when printing supply pull message 2016-03-15 03:51:39 -07:00
Martin Whitaker 3b577340ad Fix for br1001 - connect undriven wand/wor to 'bz in tgt-vvp.
(cherry picked from commit dbaf2471f2)
2016-03-13 16:45:22 +00:00
Martin Whitaker 583a31c121 Changed default for -gshared-loop-index to false. 2016-03-05 17:52:58 +00:00
Martin Whitaker a391c3ae28 Fix for br1000 - avoid infinite loop when processes share a for-loop index.
(cherry picked from commit b4d5248c67)
2016-03-05 17:45:37 +00:00
Martin Whitaker b551a783e8 Add support for real valued compressed assignment statements in tgt-vvp.
(cherry picked from commit a0bee0a76f)
2016-02-23 23:02:23 +00:00
Martin Whitaker 33db07ab8d Fix expression/operator type for compressed assignment/shift.
(cherry picked from commit a7066e3686)
2016-02-23 21:28:40 +00:00
Martin Whitaker e2aae72880 Fix expression type for compressed assignment statements.
A compressed assignment statement should give exactly the same
result as the equivalent uncompressed statement. This means
that the type (signed/unsigned) of the LHS affects the type of
the RHS expression (unlike in normal assignments). We need to
take care that bit/part selects and concatenations are correctly
identified as unsigned values, even in the cases where they
reduce to a single whole signal.

(cherry picked from commit 0199ad129d)
2016-02-23 21:27:55 +00:00
Martin Whitaker ec9897af5a Fix lval extension for compressed assignment in constant function.
The type of extension (zero/sign) is determined by the expression
type, not the operand type, so we need to cast to the expression
type before extending the value.

(cherry picked from commit 241b6723e5)
2016-02-23 21:22:25 +00:00
Martin Whitaker 2771abf86a Fix compressed assignments to concatenations.
When loading a lval concatenation, tgt-vvp was loading the elements
in the wrong order for the %concat instruction.

(cherry picked from commit b77d758f19)
2016-02-23 21:22:03 +00:00
Martin Whitaker b0461787c8 Extended constant function assignment operator support to real values.
(cherry-picked from master branch)

Also output a "sorry" message if the LHS is a concatenation.
2016-02-22 23:34:27 +00:00
Martin Whitaker 6f41576930 Add support for SystemVerilog assignment operators in constant functions.
(cherry-picked from master branch)
2016-02-22 22:24:11 +00:00
Stephen Williams cc7516eab3 Minor release update. 2016-02-10 11:39:12 -08:00
Stephen Williams 1a5ae96540 Fix broken "inherits dimensions from var/net" warning.
(cherry picked from commit 12c39aa4bb)
2016-02-10 11:23:44 -08:00
Stephen Williams 1ea8a13bf8 Prepare for 10.1 release. 2016-02-06 17:23:23 -08:00
Stephen Williams 490884cf7b Add the -Wimplicit-dimensions warning.
(cherry picked from commit f3647578d4)

Conflicts:
	scripts/devel-stub.conf
2016-02-06 16:48:43 -08:00
Martin Whitaker ca1d7ccffe Temporary fix for br993 - assertion failure in flip-flop synthesis.
(cherry-picked from master branch)

Synthesis does not currently support some commonly used styles for
representing flip-flops, e.g.

  q <= 0;
  if (en) q <= 1;

or

  if (clr) q <= 0;
  if (set) q <= 1;

For now, output a "sorry" message.
2016-01-30 22:44:26 +00:00
Martin Whitaker faf9bfe158 Fix for br994 - assertion failure when synthesising a mux.
(cherry-picked from master branch)

The elaborator allows the RHS of assignment to be wider than the
LHS. When using an if statement to represent a mux, this meant the
mux inputs could be different widths, resulting in an assertion
failure during synthesis. The fix is to prune the RHS to match the
LHS for each assignment. This has the benefit of minimising the
mux width.
2016-01-30 20:19:05 +00:00
Martin Whitaker 086ce04cf5 Temporary fix for br995 - assignment to memory not supported in synthesis.
(cherry-picked from master branch)

For now, output a "sorry" message.
2016-01-30 17:05:09 +00:00
Martin Whitaker 7b7231c417 Fix for br999 - incorrect result from binary comparison.
(cherry-picked from master branch)

When a binary (in)equality comparison has a constant left operand,
the tgt-vvp code generator swaps the left and right operands to
allow the cmpi instruction to be used. The code for swapping the
operands was incorrect.
2016-01-07 19:23:36 +00:00
Cary R d7b919f6d0 Update cppcheck suppression file 2015-12-19 11:58:38 -08:00
Cary R 9b34a96cb9 V10: Fix some compile warnings 2015-12-19 11:15:32 -08:00
Cary R 90cf0e5794 VHDL-10: fix a compile warning and add some missing newlines 2015-12-19 10:50:42 -08:00
Cary R 818379b9bc GTKWave (fstapi.c) needs realpath() so check for it 2015-12-19 09:11:56 -08:00
Cary R 9fbb7f84e6 A VHDL ExpAttribute() can share the base so don't just delete them 2015-12-13 19:02:26 -08:00
Cary R ed7d6c1002 Fix memory leak found with valgrind 2015-12-13 14:56:49 -08:00
Cary R a4306dbac1 Fix the modpath delay to ignore bits that are not changing 2015-10-21 22:02:17 -07:00
Cary R a682e13d82 Update LZ4 files to latest from GTKWave 2015-10-02 10:32:45 -07:00
Cary R 643e0a984e Fix some cppcheck warnings 2015-10-02 09:44:02 -07:00
Stephen Williams 63d2059b85 Have scope auto-rename generate names that use the index numbers
In generate blocks such as for loops, there may be many generated
scopes that have the same generated name. But in these cases, there
is an index number in the hname that can be used. So do so.

(cherry picked from commit 81f54ec0cb)
2015-09-30 09:48:56 -07:00
Martin Whitaker d9e09ceb59 Fix for GitHub issue #79 - literal numbers must have at least one digit.
(cherry-picked from master branch)

The bug report was for an assertion failure when a number contained only
a lowline (e.g. 'b_), but the standard says that a number can't start
with a lowline (e.g. 'b_1). The parser already rejected these cases for
decimal numbers, but allowed them through for binary/octal/hex numbers.
2015-09-23 00:15:50 +01:00
Stephen Williams 6d0ab9978f rpm spec file aware of stable versions. 2015-08-23 14:41:41 -07:00
Martin Whitaker e25cdf86ac Fix for br992 - prevent assertion/crash on declarations outside a module.
parse.y has been updated to allow declarations outside a module (legal
in SystemVerilog), but not all types of declaration are supported yet.
Output a sorry or error message as appropriate.
2015-08-21 00:11:59 +01:00
Stephen Williams 13bff8c50d Remove synthesis warning.
(cherry picked from commit d2c72a126d)
2015-08-20 13:53:13 -07:00
Stephen Williams b1b017251a Fix windres input version string for v10 and later. 2015-08-20 13:50:57 -07:00
Cary R e13a52637a A concatenation or the expression being replicated must have a non-zero width 2015-08-18 16:23:33 -07:00
Stephen Williams 4803f0d12b Rework vvp file version checking. 2015-08-17 15:38:27 -07:00
Martin Whitaker be44289fc0 Updated a few more copyright dates. 2015-08-17 22:23:43 +01:00
Martin Whitaker e682166253 Fix for br991 - compiler crashes due to null statements.
The reported problem was caused by a null statement in a case statement,
which caused the check for an infinite loop to fail. Further testing
exposed more problems with null statements in loop statements - these
caused crashes earlier in elaboration.
2015-08-17 22:19:36 +01:00
Larry Doolittle e2a1f21896 Squelch just a few trailing spaces in source code 2015-08-17 11:44:55 -07:00
Larry Doolittle cb73accd84 Spelling fixes 2015-08-17 11:34:58 -07:00
Stephen Williams a66361a4f2 Update some copyright dates. 2015-08-17 08:02:51 -07:00
Martin Whitaker 1159de0482 Fixed version number in vvp man page. 2015-08-16 23:11:54 +01:00
Stephen Williams ac5d4114ad Update v10 vvp examples to have correct version number 2015-08-16 12:30:43 -07:00
Stephen Williams 85f796fda2 Release compatible version stamp 2015-08-15 14:26:33 -07:00
Stephen Williams 8612ec5452 Main copyright date update. 2015-08-15 14:15:32 -07:00
Stephen Williams 870a351944 Change Version numbering scheme. 2015-08-15 13:42:57 -07:00
354 changed files with 9374 additions and 23620 deletions
-71
View File
@@ -1,71 +0,0 @@
language: cpp
sudo: required
dist: xenial
addons:
apt:
packages:
- gperf
sudo: false
notifications:
email: false
jobs:
include:
- stage: Test
os: linux
dist: xenial
before_install:
- git clone https://github.com/steveicarus/ivtest.git
- export PATH=$HOME/bin:$PATH
script:
- autoconf
- ./configure --prefix=$HOME
- make install
- make check
- cd ivtest
- perl vvp_reg.pl
- diff regression_report-devel.txt regression_report.txt
- perl vpi_reg.pl
- stage: Test
os: linux
dist: bionic
before_install:
- git clone https://github.com/steveicarus/ivtest.git
- export PATH=$HOME/bin:$PATH
script:
- autoconf
- ./configure --prefix=$HOME
- make install
- make check
- cd ivtest
- perl vvp_reg.pl
- diff regression_report-devel.txt regression_report.txt
- perl vpi_reg.pl
- stage: Test
os: windows
before_install:
- git clone https://github.com/steveicarus/ivtest.git
- choco uninstall -y mingw
- choco upgrade --no-progress -y msys2
- export msys2='cmd //C RefreshEnv.cmd '
- export msys2+='& set MSYS=winsymlinks:nativestrict '
- export msys2+='& C:\\tools\\msys64\\msys2_shell.cmd -defterm -no-start'
- export mingw64="$msys2 -mingw64 -full-path -here -c "\"\$@"\" --"
- export msys2+=" -msys2 -c "\"\$@"\" --"
- $msys2 pacman --sync --noconfirm --needed base-devel mingw-w64-x86_64-toolchain
script:
- $mingw64 ./autoconf.sh
- $mingw64 ./configure
- $mingw64 make install
- $mingw64 make check
- cd ivtest
- $mingw64 perl update_msys2_report.pl
- $mingw64 perl vvp_reg.pl
- diff --strip-trailing-cr regression_report-msys2.txt regression_report.txt
- $mingw64 perl vpi_reg.pl
+55 -49
View File
@@ -70,8 +70,7 @@ dllib=@DLLIB@
HOSTCC = @CC@
HOSTCFLAGS = @WARNING_FLAGS@ @WARNING_FLAGS_CC@ @CFLAGS@
BUILDCC = @CC_FOR_BUILD@
BUILDEXT = @BUILD_EXEEXT@
CC = @CC@
CXX = @CXX@
DLLTOOL = @DLLTOOL@
INSTALL = @INSTALL@
@@ -101,7 +100,7 @@ CTARGETFLAGS = @CTARGETFLAGS@
M = LineInfo.o StringHeap.o
TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-dll-analog.o
FF = cprop.o exposenodes.o nodangle.o synth.o synth2.o syn-rules.o
FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o
O = main.o async.o design_dump.o discipline.o dup_expr.o elaborate.o \
elab_expr.o elaborate_analog.o elab_lval.o elab_net.o \
@@ -117,10 +116,10 @@ O = main.o async.o design_dump.o discipline.o dup_expr.o elaborate.o \
net_udp.o pad_to_width.o parse.o parse_misc.o pform.o pform_analog.o \
pform_disciplines.o pform_dump.o pform_package.o pform_pclass.o \
pform_class_type.o pform_string_type.o pform_struct_type.o pform_types.o \
symbol_search.o sync.o sys_funcs.o verinum.o verireal.o vpi_modules.o target.o \
Attrib.o HName.o Module.o PClass.o PDelays.o PEvent.o PExpr.o PFunction.o \
PGate.o PGenerate.o PModport.o PNamedItem.o PPackage.o PScope.o PSpec.o \
PTask.o PUdp.o PWire.o Statement.o AStatement.o $M $(FF) $(TT)
symbol_search.o sync.o sys_funcs.o verinum.o verireal.o target.o \
Attrib.o HName.o Module.o PClass.o PDelays.o PEvent.o PExpr.o PGate.o \
PGenerate.o PModport.o PPackage.o PScope.o PSpec.o PTask.o PUdp.o \
PFunction.o PWire.o Statement.o AStatement.o $M $(FF) $(TT)
all: dep config.h _pli_types.h version_tag.h ivl@EXEEXT@ version.exe iverilog-vpi.man
$(foreach dir,$(SUBDIRS),$(MAKE) -C $(dir) $@ && ) true
@@ -128,9 +127,9 @@ all: dep config.h _pli_types.h version_tag.h ivl@EXEEXT@ version.exe iverilog-vp
# In the windows world, the installer will need a dosify program to
# dosify text files.
ifeq (@MINGW32@,yes)
all: dosify$(BUILDEXT)
dosify$(BUILDEXT): $(srcdir)/dosify.c
$(BUILDCC) $(CFLAGS) -o dosify$(BUILDEXT) $(srcdir)/dosify.c
all: dosify.exe
dosify.exe: $(srcdir)/dosify.c
$(HOSTCC) $(HOSTCFLAGS) -o dosify.exe $(srcdir)/dosify.c
endif
# This rule rules the compiler in the trivial hello.vl program to make
@@ -138,7 +137,7 @@ endif
check: all
$(foreach dir,$(SUBDIRS),$(MAKE) -C $(dir) $@ && ) true
test -r check.conf || cp $(srcdir)/check.conf .
driver/iverilog -B. -BMvpi -BPivlpp -tcheck -ocheck.vvp $(srcdir)/examples/hello.vl
driver/iverilog -B. -BPivlpp -tcheck -ocheck.vvp $(srcdir)/examples/hello.vl
ifeq (@WIN32@,yes)
ifeq (@install_suffix@,)
vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
@@ -157,7 +156,7 @@ clean:
$(foreach dir,$(SUBDIRS),$(MAKE) -C $(dir) $@ && ) true
rm -f *.o parse.cc parse.h lexor.cc
rm -f ivl.exp iverilog-vpi.man iverilog-vpi.pdf iverilog-vpi.ps
rm -f parse.output syn-rules.output dosify$(BUILDEXT) ivl@EXEEXT@ check.vvp
rm -f parse.output syn-rules.output dosify.exe ivl@EXEEXT@ check.vvp
rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc
rm -rf dep
rm -f version.exe
@@ -175,8 +174,7 @@ endif
rm -rf autom4te.cache
cppcheck: $(O:.o=.cc) $(srcdir)/dosify.c $(srcdir)/version.c
cppcheck --enable=all --std=posix --std=c99 --std=c++03 -f \
--suppressions-list=$(srcdir)/cppcheck.sup \
cppcheck --enable=all -f --suppressions-list=$(srcdir)/cppcheck.sup \
-UYYPARSE_PARAM -UYYPRINT -Ushort -Usize_t -Uyyoverflow \
-UYYTYPE_INT8 -UYYTYPE_INT16 -UYYTYPE_UINT8 -UYYTYPE_UINT16 \
--relative-paths=$(srcdir) $(INCLUDE_PATH) $^
@@ -241,7 +239,7 @@ iverilog-vpi: $(srcdir)/iverilog-vpi.sh Makefile
endif
version.exe: $(srcdir)/version.c $(srcdir)/version_base.h version_tag.h
$(BUILDCC) $(CFLAGS) -o version.exe -I. -I$(srcdir) $(srcdir)/version.c
$(HOSTCC) $(HOSTCFLAGS) -o version.exe -I. -I$(srcdir) $(srcdir)/version.c
%.o: %.cc config.h
$(CXX) $(CPPFLAGS) $(CXXFLAGS) @DEPENDENCY_FLAG@ -c $< -o $*.o
@@ -254,9 +252,12 @@ lexor.o: lexor.cc parse.h
parse.o: parse.cc
# Use pattern rules to avoid parallel build issues (see pr3462585)
parse%cc parse%h: $(srcdir)/parse%y
$(YACC) --verbose -t -p VL --defines=parse.h -o parse.cc $<
# Build this in two steps to avoid parallel build issues (see pr3462585)
parse.cc: $(srcdir)/parse.y
$(YACC) --verbose -t -p VL -d -o $@ $<
parse.h: parse.cc
mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@
touch $@
syn-rules.cc: $(srcdir)/syn-rules.y
$(YACC) --verbose -t -p syn_ -o $@ $<
@@ -305,61 +306,66 @@ version_tag.h version:
ifeq (@MINGW32@,yes)
ifeq ($(MAN),none)
INSTALL_DOC = installman
INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
else
ifeq ($(PS2PDF),none)
INSTALL_DOC = installman
INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
else
INSTALL_DOC = installpdf installman
INSTALL_DOC = $(prefix)/iverilog-vpi$(suffix).pdf $(mandir)/man1/iverilog-vpi$(suffix).1
all: dep iverilog-vpi.pdf
endif
endif
INSTALL_DOCDIR = $(mandir)/man1
else
INSTALL_DOC = installman
INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
INSTALL_DOCDIR = $(mandir)/man1
endif
ifeq (@MINGW32@,yes)
WIN32_INSTALL =
else
WIN32_INSTALL = installwin32
WIN32_INSTALL = $(bindir)/iverilog-vpi$(suffix)
endif
install: all installdirs installfiles
install: all installdirs $(libdir)/ivl$(suffix)/ivl@EXEEXT@ $(libdir)/ivl$(suffix)/include/constants.vams $(libdir)/ivl$(suffix)/include/disciplines.vams $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/sv_vpi_user.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
$(foreach dir,$(SUBDIRS),$(MAKE) -C $(dir) $@ && ) true
F = ./ivl@EXEEXT@ \
$(srcdir)/constants.vams \
$(srcdir)/disciplines.vams \
$(srcdir)/ivl_target.h \
./_pli_types.h \
$(srcdir)/sv_vpi_user.h \
$(srcdir)/vpi_user.h \
$(srcdir)/acc_user.h \
$(srcdir)/veriuser.h \
$(INSTALL_DOC) \
$(WIN32_INSTALL)
installwin32: ./iverilog-vpi installdirs
$(bindir)/iverilog-vpi$(suffix): ./iverilog-vpi
$(INSTALL_SCRIPT) ./iverilog-vpi "$(DESTDIR)$(bindir)/iverilog-vpi$(suffix)"
installman: iverilog-vpi.man installdirs
$(libdir)/ivl$(suffix)/ivl@EXEEXT@: ./ivl@EXEEXT@
$(INSTALL_PROGRAM) ./ivl@EXEEXT@ "$(DESTDIR)$(libdir)/ivl$(suffix)/ivl@EXEEXT@"
$(libdir)/ivl$(suffix)/include/constants.vams: $(srcdir)/constants.vams
$(INSTALL_DATA) $(srcdir)/constants.vams "$(DESTDIR)$(libdir)/ivl$(suffix)/include/constants.vams"
$(libdir)/ivl$(suffix)/include/disciplines.vams: $(srcdir)/disciplines.vams
$(INSTALL_DATA) $(srcdir)/disciplines.vams "$(DESTDIR)$(libdir)/ivl$(suffix)/include/disciplines.vams"
$(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
$(INSTALL_DATA) $(srcdir)/ivl_target.h "$(DESTDIR)$(includedir)/ivl_target.h"
$(includedir)/_pli_types.h: _pli_types.h
$(INSTALL_DATA) $< "$(DESTDIR)$(includedir)/_pli_types.h"
$(includedir)/sv_vpi_user.h: $(srcdir)/sv_vpi_user.h
$(INSTALL_DATA) $(srcdir)/sv_vpi_user.h "$(DESTDIR)$(includedir)/sv_vpi_user.h"
$(includedir)/vpi_user.h: $(srcdir)/vpi_user.h
$(INSTALL_DATA) $(srcdir)/vpi_user.h "$(DESTDIR)$(includedir)/vpi_user.h"
$(includedir)/acc_user.h: $(srcdir)/acc_user.h
$(INSTALL_DATA) $(srcdir)/acc_user.h "$(DESTDIR)$(includedir)/acc_user.h"
$(includedir)/veriuser.h: $(srcdir)/veriuser.h
$(INSTALL_DATA) $(srcdir)/veriuser.h "$(DESTDIR)$(includedir)/veriuser.h"
$(mandir)/man1/iverilog-vpi$(suffix).1: iverilog-vpi.man
$(INSTALL_DATA) iverilog-vpi.man "$(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1"
installpdf: iverilog-vpi.pdf installdirs
$(prefix)/iverilog-vpi$(suffix).pdf: iverilog-vpi.pdf
$(INSTALL_DATA) iverilog-vpi.pdf "$(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf"
installfiles: $(F) | installdirs
$(INSTALL_PROGRAM) ./ivl@EXEEXT@ "$(DESTDIR)$(libdir)/ivl$(suffix)/ivl@EXEEXT@"
$(INSTALL_DATA) $(srcdir)/constants.vams "$(DESTDIR)$(libdir)/ivl$(suffix)/include/constants.vams"
$(INSTALL_DATA) $(srcdir)/disciplines.vams "$(DESTDIR)$(libdir)/ivl$(suffix)/include/disciplines.vams"
$(INSTALL_DATA) $(srcdir)/ivl_target.h "$(DESTDIR)$(includedir)/ivl_target.h"
$(INSTALL_DATA) ./_pli_types.h "$(DESTDIR)$(includedir)/_pli_types.h"
$(INSTALL_DATA) $(srcdir)/sv_vpi_user.h "$(DESTDIR)$(includedir)/sv_vpi_user.h"
$(INSTALL_DATA) $(srcdir)/vpi_user.h "$(DESTDIR)$(includedir)/vpi_user.h"
$(INSTALL_DATA) $(srcdir)/acc_user.h "$(DESTDIR)$(includedir)/acc_user.h"
$(INSTALL_DATA) $(srcdir)/veriuser.h "$(DESTDIR)$(includedir)/veriuser.h"
installdirs: $(srcdir)/mkinstalldirs
$(srcdir)/mkinstalldirs "$(DESTDIR)$(bindir)" \
+2 -12
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2019 Stephen Williams ([email protected])
* Copyright (c) 1998-2016 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -32,9 +32,9 @@ Module::Module(LexicalScope*parent, perm_string n)
{
library_flag = false;
is_cell = false;
is_interface = false;
program_block = false;
uc_drive = UCD_NONE;
timescale_warn_done = false;
}
Module::~Module()
@@ -122,13 +122,3 @@ const list<PGate*>& Module::get_gates() const
{
return gates_;
}
PNamedItem::SymbolType Module::symbol_type() const
{
if (program_block)
return PROGRAM;
if (is_interface)
return INTERFACE;
return MODULE;
}
+6 -6
View File
@@ -1,7 +1,7 @@
#ifndef IVL_Module_H
#define IVL_Module_H
/*
* Copyright (c) 1998-2019 Stephen Williams ([email protected])
* Copyright (c) 1998-2016 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -28,7 +28,7 @@
# include "HName.h"
# include "named.h"
# include "PScope.h"
# include "PNamedItem.h"
# include "LineInfo.h"
# include "netlist.h"
# include "pform_types.h"
class PExpr;
@@ -54,7 +54,7 @@ class NetScope;
* these containers as well.
*/
class Module : public PScopeExtra, public PNamedItem {
class Module : public PScopeExtra, public LineInfo {
/* The module ports are in general a vector of port_t
objects. Each port has a name and an ordered list of
@@ -97,7 +97,7 @@ class Module : public PScopeExtra, public PNamedItem {
/* specparams are simpler than other parameters, in that they
can have a range, but not an explicit type. The restrictions
are enforced by the parser. */
map<perm_string,param_expr_t*>specparams;
map<perm_string,param_expr_t>specparams;
/* The module also has defparam assignments which don't create
new parameters within the module, but may be used to set
@@ -121,6 +121,8 @@ class Module : public PScopeExtra, public PNamedItem {
map<perm_string,PExpr*> attributes;
bool timescale_warn_done;
/* The module has a list of generate schemes that appear in
the module definition. These are used at elaboration time. */
list<PGenerate*> generate_schemes;
@@ -160,8 +162,6 @@ class Module : public PScopeExtra, public PNamedItem {
bool elaborate_sig(Design*, NetScope*scope) const;
SymbolType symbol_type() const;
private:
void dump_specparams_(ostream&out, unsigned indent) const;
list<PGate*> gates_;
+1 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2019 Stephen Williams ([email protected])
* Copyright (c) 2012 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -28,8 +28,3 @@ PClass::PClass(perm_string name, LexicalScope*parent)
PClass::~PClass()
{
}
PNamedItem::SymbolType PClass::symbol_type() const
{
return CLASS;
}
+3 -5
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PClass_H
#define IVL_PClass_H
/*
* Copyright (c) 2012-2019 Stephen Williams ([email protected])
* Copyright (c) 2012-2014 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -20,7 +20,7 @@
*/
# include "PScope.h"
# include "PNamedItem.h"
# include "LineInfo.h"
# include "StringHeap.h"
# include <iostream>
@@ -32,7 +32,7 @@ class PChainConstructor;
* collected.
*/
class PClass : public PScopeExtra, public PNamedItem {
class PClass : public PScopeExtra, public LineInfo {
public:
explicit PClass (perm_string name, LexicalScope*parent);
@@ -40,8 +40,6 @@ class PClass : public PScopeExtra, public PNamedItem {
void dump(std::ostream&out, unsigned indent) const;
SymbolType symbol_type() const;
public:
class_type_t*type;
};
+1 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2004-2019 Stephen Williams ([email protected])
* Copyright (c) 2004 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -35,7 +35,3 @@ perm_string PEvent::name() const
return name_;
}
PNamedItem::SymbolType PEvent::symbol_type() const
{
return EVENT;
}
+3 -5
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PEvent_H
#define IVL_PEvent_H
/*
* Copyright (c) 2000-2019 Stephen Williams ([email protected])
* Copyright (c) 2000-2014 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "PNamedItem.h"
# include "LineInfo.h"
# include "StringHeap.h"
# include <string>
@@ -31,7 +31,7 @@ class NetScope;
* are declared in Verilog as ``event foo;'' The name passed to the
* constructor is the "foo" part of the declaration.
*/
class PEvent : public PNamedItem {
class PEvent : public LineInfo {
public:
// The name is a perm-allocated string. It is the simple name
@@ -43,8 +43,6 @@ class PEvent : public PNamedItem {
void elaborate_scope(Design*des, NetScope*scope) const;
SymbolType symbol_type() const;
private:
perm_string name_;
+12 -11
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2020 Stephen Williams <[email protected]>
* Copyright (c) 1998-2016 Stephen Williams <[email protected]>
* Copyright CERN 2013 / Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
@@ -126,8 +126,9 @@ PEBinary::~PEBinary()
void PEBinary::declare_implicit_nets(LexicalScope*scope, NetNet::Type type)
{
if (left_) left_->declare_implicit_nets(scope, type);
if (right_) right_->declare_implicit_nets(scope, type);
assert(left_ && right_);
left_->declare_implicit_nets(scope, type);
right_->declare_implicit_nets(scope, type);
}
bool PEBinary::has_aa_term(Design*des, NetScope*scope) const
@@ -168,7 +169,7 @@ PEBComp::~PEBComp()
PEBLogic::PEBLogic(char op, PExpr*l, PExpr*r)
: PEBinary(op, l, r)
{
assert(op == 'a' || op == 'o' || op == 'q' || op == 'Q');
assert(op == 'a' || op == 'o');
}
PEBLogic::~PEBLogic()
@@ -203,12 +204,12 @@ PEBShift::~PEBShift()
}
PECallFunction::PECallFunction(const pform_name_t&n, const vector<PExpr *> &parms)
: package_(0), path_(n), parms_(parms), is_overridden_(false)
: package_(0), path_(n), parms_(parms)
{
}
PECallFunction::PECallFunction(PPackage*pkg, const pform_name_t&n, const vector<PExpr *> &parms)
: package_(pkg), path_(n), parms_(parms), is_overridden_(false)
: package_(pkg), path_(n), parms_(parms)
{
}
@@ -221,7 +222,7 @@ static pform_name_t pn_from_ps(perm_string n)
}
PECallFunction::PECallFunction(PPackage*pkg, perm_string n, const list<PExpr *> &parms)
: package_(pkg), path_(pn_from_ps(n)), parms_(parms.size()), is_overridden_(false)
: package_(pkg), path_(pn_from_ps(n)), parms_(parms.size())
{
int tmp_idx = 0;
assert(parms_.size() == parms.size());
@@ -231,18 +232,18 @@ PECallFunction::PECallFunction(PPackage*pkg, perm_string n, const list<PExpr *>
}
PECallFunction::PECallFunction(perm_string n, const vector<PExpr*>&parms)
: package_(0), path_(pn_from_ps(n)), parms_(parms), is_overridden_(false)
: package_(0), path_(pn_from_ps(n)), parms_(parms)
{
}
PECallFunction::PECallFunction(perm_string n)
: package_(0), path_(pn_from_ps(n)), is_overridden_(false)
: package_(0), path_(pn_from_ps(n))
{
}
// NOTE: Anachronism. Try to work all use of svector out.
PECallFunction::PECallFunction(const pform_name_t&n, const list<PExpr *> &parms)
: package_(0), path_(n), parms_(parms.size()), is_overridden_(false)
: package_(0), path_(n), parms_(parms.size())
{
int tmp_idx = 0;
assert(parms_.size() == parms.size());
@@ -252,7 +253,7 @@ PECallFunction::PECallFunction(const pform_name_t&n, const list<PExpr *> &parms)
}
PECallFunction::PECallFunction(perm_string n, const list<PExpr*>&parms)
: package_(0), path_(pn_from_ps(n)), parms_(parms.size()), is_overridden_(false)
: package_(0), path_(pn_from_ps(n)), parms_(parms.size())
{
int tmp_idx = 0;
assert(parms_.size() == parms.size());
+9 -10
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PExpr_H
#define IVL_PExpr_H
/*
* Copyright (c) 1998-2019 Stephen Williams <[email protected]>
* Copyright (c) 1998-2016 Stephen Williams <[email protected]>
* Copyright CERN 2013 / Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
@@ -379,8 +379,6 @@ class PEIdent : public PExpr {
virtual bool is_collapsible_net(Design*des, NetScope*scope) const;
const PPackage* package() const { return package_; }
const pform_name_t& path() const { return path_; }
private:
@@ -435,10 +433,10 @@ class PEIdent : public PExpr {
bool need_const_idx) const;
NetAssign_*elaborate_lval_net_class_member_(Design*, NetScope*,
NetNet*,
pform_name_t) const;
const perm_string&) const;
bool elaborate_lval_net_packed_member_(Design*, NetScope*,
NetAssign_*,
pform_name_t member_path) const;
const name_component_t&) const;
bool elaborate_lval_darray_bit_(Design*, NetScope*,
NetAssign_*) const;
@@ -523,13 +521,17 @@ class PEIdent : public PExpr {
unsigned flags) const;
unsigned test_width_method_(Design*des, NetScope*scope, width_mode_t&mode);
NetExpr*elaborate_expr_method_(Design*des,
NetScope*scope,
unsigned expr_wid,
unsigned flags) const;
private:
NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
bool bidirectional_flag) const;
NetAssign_*scan_lname_for_nested_members_(Design*des, NetScope*scope,
const pform_name_t&path) const;
bool eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
long&midx, long&lidx) const;
};
@@ -928,9 +930,6 @@ class PECallFunction : public PExpr {
pform_name_t path_;
std::vector<PExpr *> parms_;
// For system functions.
bool is_overridden_;
bool check_call_matches_definition_(Design*des, NetScope*dscope) const;
+3 -9
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2019 Stephen Williams ([email protected])
* Copyright (c) 1999-2013 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -43,7 +43,7 @@ void PFunction::set_statement(Statement*s)
void PFunction::push_statement_front(Statement*stmt)
{
// This should not be possible.
// This can only happen after the statement is initially set.
ivl_assert(*this, statement_);
// Get the PBlock of the statement. If it is not a PBlock,
@@ -75,8 +75,7 @@ PChainConstructor* PFunction::extract_chain_constructor()
PChainConstructor*res = 0;
if ((res = dynamic_cast<PChainConstructor*> (statement_))) {
statement_ = new PBlock(PBlock::BL_SEQ);
statement_->set_line(*this);
statement_ = 0;
} else if (PBlock*blk = dynamic_cast<PBlock*>(statement_)) {
res = blk->extract_chain_constructor();
@@ -84,8 +83,3 @@ PChainConstructor* PFunction::extract_chain_constructor()
return res;
}
PNamedItem::SymbolType PFunction::symbol_type() const
{
return FUNCTION;
}
+1 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2019 Stephen Williams ([email protected])
* Copyright (c) 1999-2013 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -117,11 +117,6 @@ unsigned PGate::delay_count() const
return delay_.delay_count();
}
PNamedItem::SymbolType PGate::symbol_type() const
{
return INSTANCE;
}
PGAssign::PGAssign(list<PExpr*>*pins)
: PGate(perm_string(), pins)
{
+3 -7
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PGate_H
#define IVL_PGate_H
/*
* Copyright (c) 1998-2019 Stephen Williams ([email protected])
* Copyright (c) 1998-2014 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -22,7 +22,7 @@
# include "svector.h"
# include "StringHeap.h"
# include "named.h"
# include "PNamedItem.h"
# include "LineInfo.h"
# include "PDelays.h"
# include "netlist.h"
# include <map>
@@ -47,7 +47,7 @@ class Module;
* single strength pair. There is a strength of the 0 drive, and a
* strength of the 1 drive.
*/
class PGate : public PNamedItem {
class PGate : public LineInfo {
public:
explicit PGate(perm_string name, list<PExpr*>*pins,
@@ -88,8 +88,6 @@ class PGate : public PNamedItem {
virtual void elaborate_scope(Design*des, NetScope*sc) const;
virtual bool elaborate_sig(Design*des, NetScope*scope) const;
SymbolType symbol_type() const;
protected:
const vector<PExpr*>& get_pins() const { return pins_; }
@@ -219,8 +217,6 @@ class PGModule : public PGate {
// method to pass the range to the pform.
void set_range(PExpr*msb, PExpr*lsb);
map<perm_string,PExpr*> attributes;
virtual void dump(ostream&out, unsigned ind =4) const;
virtual void elaborate(Design*, NetScope*scope) const;
virtual void elaborate_scope(Design*des, NetScope*sc) const;
+1 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2020 Stephen Williams ([email protected])
* Copyright (c) 2006-2011 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -26,7 +26,6 @@ PGenerate::PGenerate(LexicalScope*parent, unsigned id)
{
direct_nested_ = false;
scheme_type = GS_NONE;
local_index = false;
loop_init = 0;
loop_test = 0;
loop_step = 0;
@@ -113,8 +112,3 @@ ostream& operator << (ostream&out, PGenerate::scheme_t type)
}
return out;
}
PNamedItem::SymbolType PGenerate::symbol_type() const
{
return GENBLOCK;
}
+3 -8
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PGenerate_H
#define IVL_PGenerate_H
/*
* Copyright (c) 2006-2020 Stephen Williams ([email protected])
* Copyright (c) 2006-2014 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "PNamedItem.h"
# include "LineInfo.h"
# include "StringHeap.h"
# include "HName.h"
# include "PScope.h"
@@ -50,7 +50,7 @@ class PWire;
* The parent points to the GS_CASE that contains this item.
* the loop_test is compared with the parent->loop_test expression.
*/
class PGenerate : public PNamedItem, public LexicalScope {
class PGenerate : public LineInfo, public LexicalScope {
public:
explicit PGenerate(LexicalScope*parent, unsigned id_number);
@@ -71,9 +71,6 @@ class PGenerate : public PNamedItem, public LexicalScope {
// generate loops have an index variable and three
// expressions: for (index = <init>; <test>; index=<step>)
// the index is local if it was declared in the init expression,
// e.g. for (genvar index = <init>; <test>; index=<step>)
bool local_index;
perm_string loop_index;
PExpr*loop_init;
PExpr*loop_test;
@@ -110,8 +107,6 @@ class PGenerate : public PNamedItem, public LexicalScope {
void dump(ostream&out, unsigned indent) const;
SymbolType symbol_type() const;
private:
bool generate_scope_loop_(Design*des, NetScope*container);
bool generate_scope_condit_(Design*des, NetScope*container, bool else_flag);
+1 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2019 Stephen Williams ([email protected])
* Copyright (c) 2015 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -29,8 +29,3 @@ PModport::PModport(perm_string n)
PModport::~PModport()
{
}
PNamedItem::SymbolType PModport::symbol_type() const
{
return MODPORT;
}
+3 -5
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PModport_H
#define IVL_PModport_H
/*
* Copyright (c) 2015-2019 Stephen Williams ([email protected])
* Copyright (c) 2015 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "PNamedItem.h"
# include "LineInfo.h"
# include "PScope.h"
# include "StringHeap.h"
# include "netlist.h"
@@ -28,7 +28,7 @@
/*
* The PModport class represents a parsed SystemVerilog modport list.
*/
class PModport : public PNamedItem {
class PModport : public LineInfo {
public:
// The name is a perm-allocated string. It is the simple name
@@ -41,8 +41,6 @@ class PModport : public PNamedItem {
typedef pair <NetNet::PortType,PExpr*> simple_port_t;
map<perm_string,simple_port_t> simple_ports;
SymbolType symbol_type() const;
private:
perm_string name_;
-116
View File
@@ -1,116 +0,0 @@
/*
* Copyright (c) 2019 Martin Whitaker ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "PNamedItem.h"
# include <ostream>
PNamedItem::PNamedItem()
{
}
PNamedItem::~PNamedItem()
{
}
PNamedItem::SymbolType PNamedItem::symbol_type() const
{
return ANY;
}
std::ostream& operator << (std::ostream&o, PNamedItem::SymbolType st)
{
switch (st) {
case PNamedItem::ANY:
o << "a symbol";
break;
case PNamedItem::PARAM:
o << "a parameter";
break;
case PNamedItem::NET:
o << "a net";
break;
case PNamedItem::VAR:
o << "a variable";
break;
case PNamedItem::GENVAR:
o << "a genvar";
break;
case PNamedItem::EVENT:
o << "an event";
break;
case PNamedItem::TYPE:
o << "a type";
break;
case PNamedItem::ENUM:
o << "an enum type or value";
break;
case PNamedItem::CLASS:
o << "a class";
break;
case PNamedItem::FUNCTION:
o << "a function";
break;
case PNamedItem::TASK:
o << "a task";
break;
case PNamedItem::BLOCK:
o << "a named block";
break;
case PNamedItem::GENBLOCK:
o << "a generate block";
break;
case PNamedItem::MODPORT:
o << "a modport";
break;
case PNamedItem::PACKAGE:
o << "a package";
break;
case PNamedItem::MODULE:
o << "a module";
break;
case PNamedItem::PROGRAM:
o << "a program";
break;
case PNamedItem::INTERFACE:
o << "an interface";
break;
case PNamedItem::PRIMITIVE:
o << "a primitive";
break;
case PNamedItem::INSTANCE:
o << "an instance name";
break;
default:
break;
}
return o;
}
PGenvar::PGenvar()
{
}
PGenvar::~PGenvar()
{
}
PNamedItem::SymbolType PGenvar::symbol_type() const
{
return GENVAR;
}
-57
View File
@@ -1,57 +0,0 @@
#ifndef IVL_PNamedItem_H
#define IVL_PNamedItem_H
/*
* Copyright (c) 2019 Martin Whitaker ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "LineInfo.h"
/*
* The PNamedItem class is the base class for all items that can be added
* to a scope's local symbol map.
*/
class PNamedItem : virtual public LineInfo {
public:
enum SymbolType { ANY, PARAM, NET, VAR, GENVAR, EVENT, TYPE, ENUM,
CLASS, FUNCTION, TASK, BLOCK, GENBLOCK, MODPORT,
PACKAGE, MODULE, PROGRAM, INTERFACE, PRIMITIVE,
INSTANCE };
explicit PNamedItem();
virtual ~PNamedItem();
virtual SymbolType symbol_type() const;
};
extern std::ostream& operator << (std::ostream&, PNamedItem::SymbolType);
/*
* The PGenvar class represents a genvar. This is only used to represent
* genvar in a scope's local symbol map.
*/
class PGenvar : public PNamedItem {
public:
explicit PGenvar();
virtual ~PGenvar();
SymbolType symbol_type() const;
};
#endif /* IVL_PNamedItem_H */
+2 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2008-2019 Stephen Williams ([email protected])
* Copyright (c) 2008,2016 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -33,18 +33,12 @@ PWire* LexicalScope::wires_find(perm_string name)
return (*cur).second;
}
PNamedItem::SymbolType LexicalScope::param_expr_t::symbol_type() const
{
return PARAM;
}
PScope::PScope(perm_string n, LexicalScope*parent)
: LexicalScope(parent), name_(n)
{
time_unit = 0;
time_precision = 0;
time_unit_is_default = true;
time_prec_is_default = true;
time_from_timescale = false;
}
PScope::~PScope()
@@ -57,8 +51,6 @@ PScope::~PScope()
PScopeExtra::PScopeExtra(perm_string n, LexicalScope*parent)
: PScope(n, parent)
{
time_unit_is_local = false;
time_prec_is_local = false;
}
PScopeExtra::~PScopeExtra()
+11 -38
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PScope_H
#define IVL_PScope_H
/*
* Copyright (c) 2008-2019 Stephen Williams ([email protected])
* Copyright (c) 2008-2016 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "PNamedItem.h"
# include "LineInfo.h"
# include "StringHeap.h"
# include "pform_types.h"
# include "ivl_target.h"
@@ -61,24 +61,6 @@ class LexicalScope {
lifetime_t default_lifetime;
// Symbols that are defined or declared in this scope.
std::map<perm_string,PNamedItem*>local_symbols;
// Symbols that are explicitly imported. Bind the imported name
// to the package from which the name is imported.
std::map<perm_string,PPackage*>explicit_imports;
// Packages that are wildcard imported. When identifiers from
// these packages are referenced, they will be added to the
// explicit imports (IEEE 1800-2012 26.3).
std::set<PPackage*>potential_imports;
// A task or function call may reference a task or function defined
// later in the scope. So here we stash the potential imports for
// task and function calls. They will be added to the explicit
// imports if we don't find a local definition.
std::map<perm_string,PPackage*>possible_imports;
struct range_t {
// True if this is an exclude
bool exclude_flag;
@@ -97,7 +79,7 @@ class LexicalScope {
/* The scope has parameters that are evaluated when the scope
is elaborated. During parsing, I put the parameters into
this map. */
struct param_expr_t : public PNamedItem {
struct param_expr_t : public LineInfo {
param_expr_t() : type(IVL_VT_NO_TYPE), msb(0), lsb(0), signed_flag(false), expr(0), range(0) { }
// Type information
ivl_variable_type_t type;
@@ -108,11 +90,9 @@ class LexicalScope {
PExpr*expr;
// If there are range constraints, list them here
range_t*range;
SymbolType symbol_type() const;
};
map<perm_string,param_expr_t*>parameters;
map<perm_string,param_expr_t*>localparams;
map<perm_string,param_expr_t>parameters;
map<perm_string,param_expr_t>localparams;
// Defined types in the scope.
map<perm_string,data_type_t*>typedefs;
@@ -120,6 +100,10 @@ class LexicalScope {
// Named events in the scope.
map<perm_string,PEvent*>events;
// Symbols that are imported. Bind the imported name to the
// package from which the name is imported.
std::map<perm_string,PPackage*>imports;
// Nets and variables (wires) in the scope
map<perm_string,PWire*>wires;
PWire* wires_find(perm_string name);
@@ -180,18 +164,11 @@ class PScope : public LexicalScope {
perm_string pscope_name() const { return name_; }
/* These are the timescale for this scope. The value is
/* These are the timescale for this scope. The default is
set by the `timescale directive or, in SystemVerilog,
by timeunit and timeprecision statements. */
int time_unit, time_precision;
/* Flags used to support warnings about timescales. */
bool time_unit_is_default;
bool time_prec_is_default;
bool has_explicit_timescale() const {
return !(time_unit_is_default || time_prec_is_default);
}
bool time_from_timescale;
protected:
bool elaborate_sig_wires_(Design*des, NetScope*scope) const;
@@ -222,10 +199,6 @@ class PScopeExtra : public PScope {
elaboration to choose an elaboration order. */
std::vector<PClass*> classes_lexical;
/* Flags used to support warnings about timescales. */
bool time_unit_is_local;
bool time_prec_is_local;
protected:
void dump_classes_(ostream&out, unsigned indent) const;
void dump_tasks_(ostream&out, unsigned indent) const;
+1 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2019 Stephen Williams ([email protected])
* Copyright (c) 1999-2008,2010 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -73,8 +73,3 @@ void PTask::set_statement(Statement*s)
assert(statement_ == 0);
statement_ = s;
}
PNamedItem::SymbolType PTask::symbol_type() const
{
return TASK;
}
+3 -7
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PTask_H
#define IVL_PTask_H
/*
* Copyright (c) 1999-2019 Stephen Williams ([email protected])
* Copyright (c) 1999-2014 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,8 +19,8 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "LineInfo.h"
# include "PScope.h"
# include "PNamedItem.h"
# include "StringHeap.h"
# include <string>
# include <vector>
@@ -35,7 +35,7 @@ class Statement;
class PExpr;
class PTaskFunc : public PScope, public PNamedItem {
class PTaskFunc : public PScope, public LineInfo {
public:
PTaskFunc(perm_string name, LexicalScope*parent);
@@ -99,8 +99,6 @@ class PTask : public PTaskFunc {
void dump(ostream&, unsigned) const;
SymbolType symbol_type() const;
private:
Statement*statement_;
bool is_auto_;
@@ -150,8 +148,6 @@ class PFunction : public PTaskFunc {
void dump(ostream&, unsigned) const;
SymbolType symbol_type() const;
private:
data_type_t* return_type_;
Statement *statement_;
+2 -15
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2019 Stephen Williams ([email protected])
* Copyright (c) 1999-2012 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -29,7 +29,7 @@ PWire::PWire(perm_string n,
: name_(n), type_(t), port_type_(pt), data_type_(dt),
signed_(false), isint_(false),
port_set_(false), net_set_(false), is_scalar_(false),
error_cnt_(0), uarray_type_(0), set_data_type_(0),
error_cnt_(0), set_data_type_(0),
discipline_(0)
{
if (t == NetNet::INTEGER) {
@@ -67,7 +67,6 @@ bool PWire::set_wire_type(NetNet::Type t)
isint_ = true;
return true;
}
if (t == NetNet::IMPLICIT_REG) return true;
return false;
case NetNet::REG:
if (t == NetNet::INTEGER) {
@@ -283,15 +282,3 @@ ivl_discipline_t PWire::get_discipline(void) const
{
return discipline_;
}
PNamedItem::SymbolType PWire::symbol_type() const
{
switch (type_) {
case NetNet::IMPLICIT_REG:
case NetNet::INTEGER:
case NetNet::REG:
return VAR;
default:
return NET;
}
}
+3 -7
View File
@@ -1,7 +1,7 @@
#ifndef IVL_PWire_H
#define IVL_PWire_H
/*
* Copyright (c) 1998-2019 Stephen Williams ([email protected])
* Copyright (c) 1998-2014 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -20,7 +20,7 @@
*/
# include "netlist.h"
# include "PNamedItem.h"
# include "LineInfo.h"
# include <list>
# include <map>
# include "StringHeap.h"
@@ -51,7 +51,7 @@ enum PWSRType {SR_PORT, SR_NET, SR_BOTH};
* from that perspective, sub-scopes within the module are a part of
* the wire name.
*/
class PWire : public PNamedItem {
class PWire : public LineInfo {
public:
PWire(perm_string name,
@@ -80,7 +80,6 @@ class PWire : public PNamedItem {
void set_range(const std::list<pform_range_t>&ranges, PWSRType type);
void set_unpacked_idx(const std::list<pform_range_t>&ranges);
void set_uarray_type(uarray_type_t*type) { uarray_type_ = type; }
void set_data_type(data_type_t*type);
@@ -94,8 +93,6 @@ class PWire : public PNamedItem {
NetNet* elaborate_sig(Design*, NetScope*scope) const;
SymbolType symbol_type() const;
private:
perm_string name_;
NetNet::Type type_;
@@ -120,7 +117,6 @@ class PWire : public PNamedItem {
// If this wire is actually a memory, these indices will give
// me the size and address ranges of the memory.
std::list<pform_range_t>unpacked_;
uarray_type_t*uarray_type_;
// This is the complex type of the wire. the data_type_ may
// modify how this is interpreted.
+31 -45
View File
@@ -6,7 +6,7 @@
Icarus Verilog is intended to compile ALL of the Verilog HDL as
described in the IEEE-1364 standard. Of course, it's not quite there
yet. It does currently handle a mix of structural and behavioural
yet. It does currently handle a mix of structural and behavioral
constructs. For a view of the current state of Icarus Verilog, see its
home page at <http://iverilog.icarus.com/>.
@@ -20,13 +20,13 @@ tools.
2.0 Building/Installing Icarus Verilog From Source
If you are starting from the source, the build process is designed to be
If you are starting from source, the build process is designed to be
as simple as practical. Someone basically familiar with the target
system and C/C++ compilation should be able to build the source
distribution with little effort. Some actual programming skills are
not required, but helpful in case of problems.
If you are building on Windows, see the mingw.txt file.
If you are building for Windows, see the mingw.txt file.
2.1 Compile Time Prerequisites
@@ -46,10 +46,8 @@ on a UNIX-like system:
to work. MSVC++ 5 and 6 are known to definitely *not* work.
- bison and flex
OSX note: bison 2.3 shipped with MacOS including Catalina generates
broken code, but bison 3+ works. We recommend using the Fink
project version of bison and flex (finkproject.org), brew version
works fine either.
It has been reported that bison 2.3 on MacOS generates broken
code, but bison 3.0.4 works.
- gperf 3.0 or later
The lexical analyzer doesn't recognize keywords directly,
@@ -66,7 +64,7 @@ on a UNIX-like system:
that are needed.
- termcap
The readline library, in turn, uses termcap.
The readline library in turn uses termcap.
If you are building from git, you will also need software to generate
the configure scripts.
@@ -79,21 +77,15 @@ the configure scripts.
2.2 Compilation
Unpack the tar-ball and cd into the verilog-######### directory
(presumably, that is how you got to this README) and compile the source
(presumably that is how you got to this README) and compile the source
with the commands:
./configure
make
If you are building from git, you have to run the command below before
compiling the source. This will generate the "configure" file, which is
automatically done when building from tarball.
sh autoconf.sh
Normally, this command automatically figures out everything it needs
to know. It generally works pretty well. There are a few flags to the
configure script that modify its behaviour:
configure script that modify its behavior:
--prefix=<root>
The default is /usr/local, which causes the tool suite to
@@ -116,12 +108,6 @@ configure script that modify its behaviour:
with the same prefix but different suffix are guaranteed
to not interfere with each other.
--host=<host-type>
Compile iverilog for a different platform. You can use:
x64_64-w64-mingw32 for building 64-bit Windows executables
i686-w64-mingw32 for building 32-bit Windows executables
Both options require installing the required mingw-w64 packages.
2.3 (Optional) Testing
To run a simple test before installation, execute
@@ -171,7 +157,7 @@ output of the parse is a list of Module objects in "pform". The pform
step. There may be dangling references, and it is not yet clear which
module is the root.
One can see a human-readable version of the final pform by using the
One can see a human readable version of the final pform by using the
``-P <path>'' flag to the ``ivl'' subcommand. This will cause ivl
to dump the pform into the file named <path>. (Note that this is not
normally done, unless debugging the ``ivl'' subcommand.)
@@ -183,17 +169,17 @@ This phase takes the pform and generates a netlist. The driver selects
resolves references and expands the instantiations to form the design
netlist. (See netlist.txt.) Final semantic checks are performed during
elaboration, and some simple optimizations are performed. The netlist
includes all the behavioural descriptions, as well as gates and wires.
includes all the behavioral descriptions, as well as gates and wires.
The elaborate() function performs the elaboration.
One can see a human-readable version of the final, elaborated and
One can see a human readable version of the final, elaborated and
optimized netlist by using the ``-N <path>'' flag to the compiler. If
elaboration succeeds, the final netlist (i.e., after optimizations but
before code generation) will be dumped into the file named <path>.
Elaboration is performed in two steps: scopes and parameters
first, followed by the structural and behavioural elaboration.
Elaboration is actually performed in two steps: scopes and parameters
first, followed by the structural and behavioral elaboration.
3.3.1 Scope Elaboration
@@ -202,7 +188,7 @@ tree of NetScope objects is built up and placed in the Design object,
with the root module represented by the root NetScope object. The
elab_scope.cc file contains most of the code for handling this phase.
The tail of the elaborate_scope behaviour (after the pform is
The tail of the elaborate_scope behavior (after the pform is
traversed) includes a scan of the NetScope tree to locate defparam
assignments that were collected during scope elaboration. This is when
the defparam overrides are applied to the parameters.
@@ -211,14 +197,14 @@ the defparam overrides are applied to the parameters.
After the scopes and parameters are generated and the NetScope tree
fully formed, the elaboration runs through the pform again, this time
generating the structural and behavioural netlist. Parameters are
generating the structural and behavioral netlist. Parameters are
elaborated and evaluated by now so all the constants of code
generation are now known locally, so the netlist can be generated by
simply passing through the pform.
3.4 Optimization
This is a collection of processing steps that perform
This is actually a collection of processing steps that perform
optimizations that do not depend on the target technology. Examples of
some useful transformations are
@@ -236,7 +222,7 @@ generator (see target.h). This may require transforming the
design to suit the technology.
The emit() method of the Design class performs this step. It runs
through the design elements, calling target functions as the need arises
through the design elements, calling target functions as need arises
to generate actual output.
The user selects the target code generator with the -t flag on the
@@ -244,7 +230,7 @@ command line.
3.6 ATTRIBUTES
NOTE: The $attribute syntax will soon be deprecated in favour of the
NOTE: The $attribute syntax will soon be deprecated in favor of the
Verilog-2001 attribute syntax, which is cleaner and standardized.
The parser accepts, as an extension to Verilog, the $attribute module
@@ -267,7 +253,7 @@ Attributes can also be applied to gate types. When this is done, the
attribute is given to every instantiation of the primitive. The syntax
for the attribute statement is the same, except that the <identifier>
names a primitive earlier in the compilation unit and the statement is
placed in the global scope, instead of within a module. The semicolon is
placed in global scope, instead of within a module. The semicolon is
not part of a type attribute.
Note that attributes are also occasionally used for communication
@@ -326,7 +312,7 @@ by the compiler. See the iverilog(1) man page.
Icarus Verilog is in development - as such it still only supports a
(growing) subset of Verilog. Below is a description of some of the
currently unsupported Verilog features. This list is not exhaustive
currently unsupported Verilog features. This list is not exhaustive,
and does not account for errors in the compiler. See the Icarus
Verilog web page for the current state of support for Verilog, and in
particular, browse the bug report database for reported unsupported
@@ -355,7 +341,7 @@ constructs.
5.1 Nonstandard Constructs or Behaviors
Icarus Verilog includes some features that are not part of the
IEEE1364 standard, but have well-defined meaning, and also sometimes
IEEE1364 standard, but have well defined meaning, and also sometimes
gives nonstandard (but extended) meanings to some features of the
language that are defined. See the "extensions.txt" documentation for
more details.
@@ -372,7 +358,7 @@ more details.
function is undefined if the argument doesn't have a
self-determined size.
The $sizeof function is deprecated in favour of $bits, which is
The $sizeof function is deprecated in favor of $bits, which is
the same thing, but included in the SystemVerilog definition.
$simtime
@@ -398,8 +384,8 @@ more details.
Builtin system functions
Certain of the system functions have well-defined meanings, so
can theoretically be evaluated at compile-time, instead of
Certain of the system functions have well defined meanings, so
can theoretically be evaluated at compile time, instead of
using runtime VPI code. Doing so means that VPI cannot
override the definitions of functions handled in this
manner. On the other hand, this makes them synthesizable, and
@@ -418,8 +404,8 @@ more details.
Icarus Verilog does preprocess modules that are loaded from
libraries via the -y mechanism. However, the only macros
defined during the compilation of that file are those that it
defines itself (or includes) or that are defined in the
defined during compilation of that file are those that it
defines itself (or includes) or that are defined on the
command line or command file.
Specifically, macros defined in the non-library source files
@@ -436,7 +422,7 @@ more details.
Standard Verilog does not allow width fields in the %t formats
of display strings. For example, this is illegal:
$display("Time is %0t", $time);
$display("Time is %0t", %time);
Standard Verilog instead relies on the $timeformat to
completely specify the format.
@@ -460,7 +446,7 @@ more details.
time 0 race resolution.
Combinational logic is routinely modelled using always
Combinational logic is routinely modeled using always
blocks. However, this can lead to race conditions if the
inputs to the combinational block are initialized in initial
statements. Icarus Verilog slightly modifies time 0 scheduling
@@ -471,7 +457,7 @@ more details.
Nets with Types
Icarus Verilog supports an extended syntax that allows nets
Icarus Verilog support an extension syntax that allows nets
and regs to be explicitly typed. The currently supported types
are logic, bool and real. This implies that "logic" and "bool"
are new keywords. Typical syntax is:
@@ -488,6 +474,6 @@ more details.
Except where otherwise noted, Icarus Verilog, ivl and ivlpp are
Copyright Stephen Williams. The proper notices are in the head of each
file. However, I have early on received aid in the form of fixes,
Verilog guidance, and especially testing from many people. Testers, in
particular, include a larger community of people interested in a GPL
Verilog guidance, and especially testing from many people. Testers in
particular include a larger community of people interested in a GPL
Verilog for Linux.
+9 -14
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2019 Stephen Williams ([email protected])
* Copyright (c) 1998-2013 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -158,11 +158,6 @@ void PBlock::push_statement_front(Statement*that)
list_[0] = that;
}
PNamedItem::SymbolType PBlock::symbol_type() const
{
return BLOCK;
}
PCallTask::PCallTask(const pform_name_t&n, const list<PExpr*>&p)
: package_(0), path_(n), parms_(p.size())
{
@@ -206,8 +201,8 @@ const pform_name_t& PCallTask::path() const
return path_;
}
PCase::PCase(ivl_case_quality_t q, NetCase::TYPE t, PExpr*ex, svector<PCase::Item*>*l)
: quality_(q), type_(t), expr_(ex), items_(l)
PCase::PCase(NetCase::TYPE t, PExpr*ex, svector<PCase::Item*>*l)
: type_(t), expr_(ex), items_(l)
{
}
@@ -299,20 +294,20 @@ PDoWhile::~PDoWhile()
}
PEventStatement::PEventStatement(const svector<PEEvent*>&ee)
: expr_(ee), statement_(0), always_sens_(false)
: expr_(ee), statement_(0)
{
assert(expr_.count() > 0);
}
PEventStatement::PEventStatement(PEEvent*ee)
: expr_(1), statement_(0), always_sens_(false)
: expr_(1), statement_(0)
{
expr_[0] = ee;
}
PEventStatement::PEventStatement(bool always_sens)
: statement_(0), always_sens_(always_sens)
PEventStatement::PEventStatement(void)
: statement_(0)
{
}
@@ -416,8 +411,8 @@ PReturn::~PReturn()
delete expr_;
}
PTrigger::PTrigger(PPackage*pkg, const pform_name_t&e)
: package_(pkg), event_(e)
PTrigger::PTrigger(const pform_name_t&e)
: event_(e)
{
}
+8 -20
View File
@@ -1,7 +1,7 @@
#ifndef IVL_Statement_H
#define IVL_Statement_H
/*
* Copyright (c) 1998-2020 Stephen Williams ([email protected])
* Copyright (c) 1998-2014 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -75,7 +75,7 @@ class PProcess : public LineInfo {
* fact, the Statement class is abstract and represents all the
* possible kinds of statements that exist in Verilog.
*/
class Statement : virtual public LineInfo {
class Statement : public LineInfo {
public:
Statement() { }
@@ -170,7 +170,7 @@ class PAssignNB : public PAssign_ {
* statements before constructing this object, so it knows a priori
* what is contained.
*/
class PBlock : public PScope, public Statement, public PNamedItem {
class PBlock : public PScope, public Statement {
public:
enum BL_TYPE { BL_SEQ, BL_PAR, BL_JOIN_NONE, BL_JOIN_ANY };
@@ -205,8 +205,6 @@ class PBlock : public PScope, public Statement, public PNamedItem {
virtual void elaborate_scope(Design*des, NetScope*scope) const;
virtual void elaborate_sig(Design*des, NetScope*scope) const;
SymbolType symbol_type() const;
private:
BL_TYPE bl_type_;
std::vector<Statement*>list_;
@@ -232,8 +230,6 @@ class PCallTask : public Statement {
NetProc*elaborate_method_(Design*des, NetScope*scope,
bool add_this_flag = false) const;
NetProc*elaborate_function_(Design*des, NetScope*scope) const;
NetProc*elaborate_void_function_(Design*des, NetScope*scope,
NetFuncDef*def) const;
NetProc*elaborate_build_call_(Design*des, NetScope*scope,
NetScope*task, NetExpr*use_this) const;
@@ -241,10 +237,6 @@ class PCallTask : public Statement {
NetNet*net,
perm_string method_name,
const char*sys_task_name) const;
NetProc*elaborate_queue_method_(Design*des, NetScope*scope,
NetNet*net,
perm_string method_name,
const char*sys_task_name) const;
bool test_task_calls_ok_(Design*des, NetScope*scope) const;
PPackage*package_;
@@ -260,7 +252,7 @@ class PCase : public Statement {
Statement*stat;
};
PCase(ivl_case_quality_t, NetCase::TYPE, PExpr*ex, svector<Item*>*);
PCase(NetCase::TYPE, PExpr*ex, svector<Item*>*);
~PCase();
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
@@ -269,7 +261,6 @@ class PCase : public Statement {
virtual void dump(ostream&out, unsigned ind) const;
private:
ivl_case_quality_t quality_;
NetCase::TYPE type_;
PExpr*expr_;
@@ -301,7 +292,7 @@ class PCAssign : public Statement {
*/
class PChainConstructor : public Statement {
public:
explicit PChainConstructor(const list<PExpr*>&parms);
PChainConstructor(const list<PExpr*>&parms);
~PChainConstructor();
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
@@ -411,9 +402,8 @@ class PEventStatement : public Statement {
explicit PEventStatement(const svector<PEEvent*>&ee);
explicit PEventStatement(PEEvent*ee);
// Make an @* statement or make a special @* version with the items
// from functions added and outputs removed for always_comb/latch.
explicit PEventStatement(bool always_sens = false);
// Make an @* statement.
explicit PEventStatement(void);
~PEventStatement();
@@ -439,7 +429,6 @@ class PEventStatement : public Statement {
private:
svector<PEEvent*>expr_;
Statement*statement_;
bool always_sens_;
};
ostream& operator << (ostream&o, const PEventStatement&obj);
@@ -570,14 +559,13 @@ class PReturn : public Statement {
class PTrigger : public Statement {
public:
explicit PTrigger(PPackage*pkg, const pform_name_t&ev);
explicit PTrigger(const pform_name_t&ev);
~PTrigger();
virtual NetProc* elaborate(Design*des, NetScope*scope) const;
virtual void dump(ostream&out, unsigned ind) const;
private:
PPackage*package_;
pform_name_t event_;
};
Vendored
+4 -135
View File
@@ -23,13 +23,11 @@ AC_SUBST(install_suffix)
# ------------------------------
# Sub-macro for AX_C_UNDERSCORES_LEADING and AX_C_UNDERSCORES_TRAILING.
# Unwarranted assumptions:
# - the object file produced by AC_COMPILE_IFELSE is called
# "conftest.$ac_objext"
# - the nm(1) utility or an equivalent is available, and its name
# is defined by the $NM variable.
# - the object file produced by AC_COMPILE_IFELSE is called "conftest.$ac_objext"
# - the nm(1) utility is available, and its name is "nm".
AC_DEFUN([_AX_C_UNDERSCORES_MATCH_IF],
[AC_COMPILE_IFELSE([AC_LANG_SOURCE([void underscore(void){}])],
[AS_IF([$NM conftest.$ac_objext|grep $1 >/dev/null 2>/dev/null],[$2],[$3])],
[AS_IF([nm conftest.$ac_objext|grep $1 >/dev/null 2>/dev/null],[$2],[$3])],
[AC_MSG_ERROR([underscore test crashed])]
)])
@@ -227,9 +225,7 @@ AC_DEFUN([AX_C99_STRTOD],
[# On MinGW we need to jump through hoops to get a C99 compliant strtod().
# mingw-w64 doesn't need this, and the 64-bit version doesn't support it.
case "${host}" in
x86_64-w64-mingw32)
;;
*-*-mingw32)
*-pc-mingw32)
LDFLAGS+=" -Wl,--undefined=___strtod,--wrap,strtod,--defsym,___wrap_strtod=___strtod"
;;
esac
@@ -248,130 +244,3 @@ _config_header=$1
_stamp_name=stamp-`expr //$_config_header : '.*/\([[^./]]*\)\.[[^./]]*$'`-h
echo "timestamp for $_config_header" > `AS_DIRNAME(["$_config_header"])`/[]$_stamp_name
]) #_AC_AM_CONFIG_HEADER_HOOK
# ===========================================================================
# http://www.gnu.org/software/autoconf-archive/ax_prog_cc_for_build.html
# ===========================================================================
#
# SYNOPSIS
#
# AX_PROG_CC_FOR_BUILD
#
# DESCRIPTION
#
# This macro searches for a C compiler that generates native executables,
# that is a C compiler that surely is not a cross-compiler. This can be
# useful if you have to generate source code at compile-time like for
# example GCC does.
#
# The macro sets the CC_FOR_BUILD and CPP_FOR_BUILD macros to anything
# needed to compile or link (CC_FOR_BUILD) and preprocess (CPP_FOR_BUILD).
# The value of these variables can be overridden by the user by specifying
# a compiler with an environment variable (like you do for standard CC).
#
# It also sets BUILD_EXEEXT and BUILD_OBJEXT to the executable and object
# file extensions for the build platform, and GCC_FOR_BUILD to `yes' if
# the compiler we found is GCC. All these variables but GCC_FOR_BUILD are
# substituted in the Makefile.
#
# LICENSE
#
# Copyright (c) 2008 Paolo Bonzini <[email protected]>
#
# Copying and distribution of this file, with or without modification, are
# permitted in any medium without royalty provided the copyright notice
# and this notice are preserved. This file is offered as-is, without any
# warranty.
#serial 8
AU_ALIAS([AC_PROG_CC_FOR_BUILD], [AX_PROG_CC_FOR_BUILD])
AC_DEFUN([AX_PROG_CC_FOR_BUILD], [dnl
AC_REQUIRE([AC_PROG_CC])dnl
AC_REQUIRE([AC_PROG_CPP])dnl
AC_REQUIRE([AC_EXEEXT])dnl
AC_REQUIRE([AC_CANONICAL_HOST])dnl
dnl Use the standard macros, but make them use other variable names
dnl
pushdef([ac_cv_prog_CPP], ac_cv_build_prog_CPP)dnl
pushdef([ac_cv_prog_gcc], ac_cv_build_prog_gcc)dnl
pushdef([ac_cv_prog_cc_works], ac_cv_build_prog_cc_works)dnl
pushdef([ac_cv_prog_cc_cross], ac_cv_build_prog_cc_cross)dnl
pushdef([ac_cv_prog_cc_g], ac_cv_build_prog_cc_g)dnl
pushdef([ac_cv_exeext], ac_cv_build_exeext)dnl
pushdef([ac_cv_objext], ac_cv_build_objext)dnl
pushdef([ac_exeext], ac_build_exeext)dnl
pushdef([ac_objext], ac_build_objext)dnl
pushdef([CC], CC_FOR_BUILD)dnl
pushdef([CPP], CPP_FOR_BUILD)dnl
pushdef([CFLAGS], CFLAGS_FOR_BUILD)dnl
pushdef([CPPFLAGS], CPPFLAGS_FOR_BUILD)dnl
pushdef([LDFLAGS], LDFLAGS_FOR_BUILD)dnl
pushdef([host], build)dnl
pushdef([host_alias], build_alias)dnl
pushdef([host_cpu], build_cpu)dnl
pushdef([host_vendor], build_vendor)dnl
pushdef([host_os], build_os)dnl
pushdef([ac_cv_host], ac_cv_build)dnl
pushdef([ac_cv_host_alias], ac_cv_build_alias)dnl
pushdef([ac_cv_host_cpu], ac_cv_build_cpu)dnl
pushdef([ac_cv_host_vendor], ac_cv_build_vendor)dnl
pushdef([ac_cv_host_os], ac_cv_build_os)dnl
pushdef([ac_cpp], ac_build_cpp)dnl
pushdef([ac_compile], ac_build_compile)dnl
pushdef([ac_link], ac_build_link)dnl
save_cross_compiling=$cross_compiling
save_ac_tool_prefix=$ac_tool_prefix
cross_compiling=no
ac_tool_prefix=
AC_PROG_CC
AC_PROG_CPP
AC_EXEEXT
ac_tool_prefix=$save_ac_tool_prefix
cross_compiling=$save_cross_compiling
dnl Restore the old definitions
dnl
popdef([ac_link])dnl
popdef([ac_compile])dnl
popdef([ac_cpp])dnl
popdef([ac_cv_host_os])dnl
popdef([ac_cv_host_vendor])dnl
popdef([ac_cv_host_cpu])dnl
popdef([ac_cv_host_alias])dnl
popdef([ac_cv_host])dnl
popdef([host_os])dnl
popdef([host_vendor])dnl
popdef([host_cpu])dnl
popdef([host_alias])dnl
popdef([host])dnl
popdef([LDFLAGS])dnl
popdef([CPPFLAGS])dnl
popdef([CFLAGS])dnl
popdef([CPP])dnl
popdef([CC])dnl
popdef([ac_objext])dnl
popdef([ac_exeext])dnl
popdef([ac_cv_objext])dnl
popdef([ac_cv_exeext])dnl
popdef([ac_cv_prog_cc_g])dnl
popdef([ac_cv_prog_cc_cross])dnl
popdef([ac_cv_prog_cc_works])dnl
popdef([ac_cv_prog_gcc])dnl
popdef([ac_cv_prog_CPP])dnl
dnl Finally, set Makefile variables
dnl
BUILD_EXEEXT=$ac_build_exeext
BUILD_OBJEXT=$ac_build_objext
AC_SUBST(BUILD_EXEEXT)dnl
AC_SUBST(BUILD_OBJEXT)dnl
AC_SUBST([CFLAGS_FOR_BUILD])dnl
AC_SUBST([CPPFLAGS_FOR_BUILD])dnl
AC_SUBST([LDFLAGS_FOR_BUILD])dnl
])
+5 -7
View File
@@ -59,7 +59,7 @@ distclean: clean
rm -f Makefile config.log
cppcheck: $(O:.o=.c)
cppcheck --enable=all --std=posix --std=c99 --std=c++03 -f $(INCLUDE_PATH) $^
cppcheck --enable=all -f $(INCLUDE_PATH) $^
Makefile: $(srcdir)/Makefile.in ../config.status
cd ..; ./config.status --file=cadpli/$@
@@ -71,19 +71,17 @@ dep:
$(CC) $(CPPFLAGS) $(CFLAGS) @DEPENDENCY_FLAG@ -c $<
mv $*.d dep
SYSTEM_VPI_LDFLAGS = -L../vpi -lvpi
SYSTEM_VPI_LDFLAGS = -L../vvp -lvpi
ifeq (@MINGW32@,yes)
SYSTEM_VPI_LDFLAGS += @EXTRALIBS@
endif
cadpli.vpl: $O ../vpi/libvpi.a ../libveriuser/libveriuser.o
cadpli.vpl: $O ../vvp/libvpi.a ../libveriuser/libveriuser.o
$(CC) @shared@ $(LDFLAGS) -o $@ $O ../libveriuser/libveriuser.o $(SYSTEM_VPI_LDFLAGS)
install: all installdirs installfiles
install: all installdirs $(vpidir)/cadpli.vpl
F = ./cadpli.vpl
installfiles: $(F) | installdirs
$(vpidir)/cadpli.vpl: ./cadpli.vpl
$(INSTALL_PROGRAM) ./cadpli.vpl "$(DESTDIR)$(vpidir)/cadpli.vpl"
installdirs: $(srcdir)/../mkinstalldirs
+5 -26
View File
@@ -1,7 +1,7 @@
#ifndef IVL_compiler_H
#define IVL_compiler_H
/*
* Copyright (c) 1999-2019 Stephen Williams ([email protected])
* Copyright (c) 1999-2016 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -104,9 +104,6 @@ extern bool warn_sens_entire_arr;
/* Warn about level-appropriate anachronisms. */
extern bool warn_anachronisms;
/* Warn about nets that are references but not driven. */
extern bool warn_floating_nets;
/* This is true if verbose output is requested. */
extern bool verbose_flag;
@@ -117,13 +114,6 @@ extern bool debug_emit;
extern bool debug_synth2;
extern bool debug_optimizer;
/* Ignore errors about missing modules */
extern bool ignore_missing_modules;
/* Treat each source file as a separate compilation unit (as defined
by SystemVerilog). */
extern bool separate_compilation;
/* Control evaluation of functions at compile time:
* 0 = only for functions in constant expressions
* 1 = only for automatic functions
@@ -177,12 +167,9 @@ extern bool gn_icarus_misc_flag;
is false, then skip elaboration of specify behavior. */
extern bool gn_specify_blocks_flag;
/* If this flag is true, then elaborate supported assertion statements. If
this flag is false, then stub out supported assertion statements. */
extern bool gn_supported_assertions_flag;
/* If this flag is true, then error on unsupported assertion statements. If
this flag is false, then stub out unsupported assertion statements. */
extern bool gn_unsupported_assertions_flag;
/* If this flag is true, then elaborate assertions. If this flag is
false, then stub out assertion statements. */
extern bool gn_assertions_flag;
/* If this flag is true, then support/elaborate Verilog-AMS. */
extern bool gn_verilog_ams_flag;
@@ -286,20 +273,12 @@ struct sfunc_return_type {
const char* name;
ivl_variable_type_t type;
unsigned wid;
bool signed_flag;
bool override_flag;
int signed_flag;
};
extern void add_sys_func(const struct sfunc_return_type&ret_type);
extern const struct sfunc_return_type* lookup_sys_func(const char*name);
extern int load_sys_func_table(const char*path);
extern void cleanup_sys_func_table();
/*
* This temporarily loads a VPI module, to determine the return values
* of system functions provided by that module, and adds the return values
* to the system function table.
*/
extern bool load_vpi_module(const char*path);
/*
* In system Verilog it is allowed with a warning to call a function
+1 -11
View File
@@ -54,10 +54,6 @@ then
exit 1
fi
if test "x$NM" = "x"; then
NM=nm
fi
AC_EXEEXT
AC_SUBST(EXEEXT)
@@ -139,13 +135,7 @@ AC_CHECK_SIZEOF(unsigned)
# vvp uses these...
AC_CHECK_LIB(termcap, tputs)
AC_CHECK_LIB(readline, readline)
AC_CHECK_LIB(readline, add_history, NEED_LIBHISTORY=no, NEED_LIBHISTORY=yes)
if test "$NEED_LIBHISTORY" = "yes"; then
AC_CHECK_LIB(history, add_history)
else
# libreadline includes libhistory functions
AC_DEFINE(HAVE_LIBHISTORY, 1)
fi
AC_CHECK_HEADERS(readline/readline.h readline/history.h sys/resource.h)
case "${host}" in *linux*) AC_DEFINE([LINUX], [1], [Host operating system is Linux.]) ;; esac
@@ -335,5 +325,5 @@ then
AC_MSG_ERROR(cannot configure white space in libdir: $libdir)
fi
AC_MSG_RESULT(ok)
AX_PROG_CC_FOR_BUILD
AC_OUTPUT(Makefile ivlpp/Makefile vhdlpp/Makefile vvp/Makefile vpi/Makefile driver/Makefile driver-vpi/Makefile cadpli/Makefile libveriuser/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-vvp/Makefile tgt-vhdl/Makefile tgt-fpga/Makefile tgt-verilog/Makefile tgt-pal/Makefile tgt-vlog95/Makefile tgt-pcb/Makefile tgt-blif/Makefile tgt-sizer/Makefile)
+2 -618
View File
@@ -1,619 +1,3 @@
// These are correct and are used to find the base (zero) pin.
thisSubtraction:netlist.h:5126
thisSubtraction:netlist.h:5135
// These are the functions that the compiler exports to the targets.
//ivl_branch_island()
unusedFunction:t-dll-api.cc:39
//ivl_branch_terminal()
unusedFunction:t-dll-api.cc:45
//ivl_const_bits()
unusedFunction:t-dll-api.cc:196
//ivl_const_delay()
unusedFunction:t-dll-api.cc:214
//ivl_const_file()
unusedFunction:t-dll-api.cc:221
//ivl_const_lineno()
unusedFunction:t-dll-api.cc:227
//ivl_const_nex()
unusedFunction:t-dll-api.cc:233
//ivl_const_real()
unusedFunction:t-dll-api.cc:239
//ivl_const_scope()
unusedFunction:t-dll-api.cc:246
//ivl_const_signed()
unusedFunction:t-dll-api.cc:252
//ivl_const_type()
unusedFunction:t-dll-api.cc:190
//ivl_const_width()
unusedFunction:t-dll-api.cc:258
//ivl_design_const()
unusedFunction:t-dll-api.cc:127
//ivl_design_consts()
unusedFunction:t-dll-api.cc:121
//ivl_design_delay_sel()
unusedFunction:t-dll-api.cc:52
//ivl_design_discipline()
unusedFunction:t-dll-api.cc:140
//ivl_design_disciplines()
unusedFunction:t-dll-api.cc:134
//ivl_design_flag()
unusedFunction:t-dll-api.cc:59
//ivl_design_process()
unusedFunction:t-dll-api.cc:66
//ivl_design_root()
unusedFunction:t-dll-api.cc:80
//ivl_design_roots()
unusedFunction:t-dll-api.cc:89
//ivl_design_time_precision()
unusedFunction:t-dll-api.cc:115
//ivl_discipline_domain()
unusedFunction:t-dll-api.cc:147
//ivl_discipline_flow()
unusedFunction:t-dll-api.cc:153
//ivl_discipline_name()
unusedFunction:t-dll-api.cc:159
//ivl_discipline_potential()
unusedFunction:t-dll-api.cc:165
//ivl_enum_bits()
unusedFunction:t-dll-api.cc:277
//ivl_enum_file()
unusedFunction:t-dll-api.cc:302
//ivl_enum_lineno()
unusedFunction:t-dll-api.cc:308
//ivl_enum_name()
unusedFunction:t-dll-api.cc:270
//ivl_enum_names()
unusedFunction:t-dll-api.cc:264
//ivl_enum_signed()
unusedFunction:t-dll-api.cc:296
//ivl_enum_type()
unusedFunction:t-dll-api.cc:284
//ivl_enum_width()
unusedFunction:t-dll-api.cc:290
//ivl_event_any()
unusedFunction:t-dll-api.cc:369
//ivl_event_file()
unusedFunction:t-dll-api.cc:345
//ivl_event_lineno()
unusedFunction:t-dll-api.cc:351
//ivl_event_name()
unusedFunction:t-dll-api.cc:314
//ivl_event_nany()
unusedFunction:t-dll-api.cc:363
//ivl_event_neg()
unusedFunction:t-dll-api.cc:382
//ivl_event_nneg()
unusedFunction:t-dll-api.cc:376
//ivl_event_npos()
unusedFunction:t-dll-api.cc:389
//ivl_event_pos()
unusedFunction:t-dll-api.cc:395
//ivl_event_scope()
unusedFunction:t-dll-api.cc:357
//ivl_expr_bits()
unusedFunction:t-dll-api.cc:402
//ivl_expr_branch()
unusedFunction:t-dll-api.cc:409
//ivl_expr_def()
unusedFunction:t-dll-api.cc:416
//ivl_expr_delay_val()
unusedFunction:t-dll-api.cc:432
//ivl_expr_dvalue()
unusedFunction:t-dll-api.cc:439
//ivl_expr_enumtype()
unusedFunction:t-dll-api.cc:446
//ivl_expr_event()
unusedFunction:t-dll-api.cc:656
//ivl_expr_file()
unusedFunction:t-dll-api.cc:178
//ivl_expr_lineno()
unusedFunction:t-dll-api.cc:184
//ivl_expr_name()
unusedFunction:t-dll-api.cc:459
//ivl_expr_nature()
unusedFunction:t-dll-api.cc:483
//ivl_expr_net_type()
unusedFunction:t-dll-api.cc:453
//ivl_expr_opcode()
unusedFunction:t-dll-api.cc:490
//ivl_expr_oper1()
unusedFunction:t-dll-api.cc:506
//ivl_expr_oper2()
unusedFunction:t-dll-api.cc:544
//ivl_expr_oper3()
unusedFunction:t-dll-api.cc:570
//ivl_expr_parameter()
unusedFunction:t-dll-api.cc:584
//ivl_expr_parm()
unusedFunction:t-dll-api.cc:599
//ivl_expr_parms()
unusedFunction:t-dll-api.cc:626
//ivl_expr_repeat()
unusedFunction:t-dll-api.cc:649
//ivl_expr_scope()
unusedFunction:t-dll-api.cc:670
//ivl_expr_sel_type()
unusedFunction:t-dll-api.cc:677
//ivl_expr_signed()
unusedFunction:t-dll-api.cc:702
//ivl_expr_sized()
unusedFunction:t-dll-api.cc:708
//ivl_expr_string()
unusedFunction:t-dll-api.cc:714
//ivl_expr_type()
unusedFunction:t-dll-api.cc:171
//ivl_expr_uvalue()
unusedFunction:t-dll-api.cc:721
//ivl_expr_value()
unusedFunction:t-dll-api.cc:747
//ivl_expr_width()
unusedFunction:t-dll-api.cc:753
//ivl_file_table_index()
unusedFunction:t-dll-api.cc:795
//ivl_file_table_item()
unusedFunction:t-dll-api.cc:785
//ivl_file_table_size()
unusedFunction:t-dll-api.cc:813
//ivl_island_flag_set()
unusedFunction:t-dll-api.cc:822
//ivl_island_flag_test()
unusedFunction:t-dll-api.cc:837
//ivl_logic_attr()
unusedFunction:t-dll-api.cc:864
//ivl_logic_attr_cnt()
unusedFunction:t-dll-api.cc:880
//ivl_logic_attr_val()
unusedFunction:t-dll-api.cc:886
//ivl_logic_basename()
unusedFunction:t-dll-api.cc:935
//ivl_logic_delay()
unusedFunction:t-dll-api.cc:974
//ivl_logic_drive0()
unusedFunction:t-dll-api.cc:894
//ivl_logic_drive1()
unusedFunction:t-dll-api.cc:911
//ivl_logic_file()
unusedFunction:t-dll-api.cc:846
//ivl_logic_is_cassign()
unusedFunction:t-dll-api.cc:858
//ivl_logic_lineno()
unusedFunction:t-dll-api.cc:852
//ivl_logic_name()
unusedFunction:t-dll-api.cc:928
//ivl_logic_pins()
unusedFunction:t-dll-api.cc:953
//ivl_logic_scope()
unusedFunction:t-dll-api.cc:941
//ivl_logic_type()
unusedFunction:t-dll-api.cc:947
//ivl_logic_udp()
unusedFunction:t-dll-api.cc:966
//ivl_logic_width()
unusedFunction:t-dll-api.cc:981
//ivl_lpm_array()
unusedFunction:t-dll-api.cc:1109
//ivl_lpm_aset_value()
unusedFunction:t-dll-api.cc:1160
//ivl_lpm_async_clr()
unusedFunction:t-dll-api.cc:1054
//ivl_lpm_async_set()
unusedFunction:t-dll-api.cc:1085
//ivl_lpm_base()
unusedFunction:t-dll-api.cc:1121
//ivl_lpm_basename()
unusedFunction:t-dll-api.cc:1048
//ivl_lpm_clk()
unusedFunction:t-dll-api.cc:1148
//ivl_lpm_data()
unusedFunction:t-dll-api.cc:1221
//ivl_lpm_datab()
unusedFunction:t-dll-api.cc:1321
//ivl_lpm_define()
unusedFunction:t-dll-api.cc:1183
//ivl_lpm_delay()
unusedFunction:t-dll-api.cc:1078
//ivl_lpm_drive0()
unusedFunction:t-dll-api.cc:1453
//ivl_lpm_drive1()
unusedFunction:t-dll-api.cc:1470
//ivl_lpm_enable()
unusedFunction:t-dll-api.cc:1195
//ivl_lpm_file()
unusedFunction:t-dll-api.cc:1209
//ivl_lpm_lineno()
unusedFunction:t-dll-api.cc:1215
//ivl_lpm_name()
unusedFunction:t-dll-api.cc:1355
//ivl_lpm_negedge()
unusedFunction:t-dll-api.cc:1136
//ivl_lpm_select()
unusedFunction:t-dll-api.cc:1493
//ivl_lpm_selects()
unusedFunction:t-dll-api.cc:1510
//ivl_lpm_signed()
unusedFunction:t-dll-api.cc:1528
//ivl_lpm_size()
unusedFunction:t-dll-api.cc:1587
//ivl_lpm_sset_value()
unusedFunction:t-dll-api.cc:1171
//ivl_lpm_string()
unusedFunction:t-dll-api.cc:1640
//ivl_lpm_sync_clr()
unusedFunction:t-dll-api.cc:1066
//ivl_lpm_sync_set()
unusedFunction:t-dll-api.cc:1097
//ivl_lpm_trigger()
unusedFunction:t-dll-api.cc:1659
//ivl_lpm_type()
unusedFunction:t-dll-api.cc:1647
//ivl_lpm_width()
unusedFunction:t-dll-api.cc:1653
//ivl_lval_idx()
unusedFunction:t-dll-api.cc:1681
//ivl_lval_mux()
unusedFunction:t-dll-api.cc:1676
//ivl_lval_nest()
unusedFunction:t-dll-api.cc:1726
//ivl_lval_part_off()
unusedFunction:t-dll-api.cc:1690
//ivl_lval_property_idx()
unusedFunction:t-dll-api.cc:1708
//ivl_lval_sel_type()
unusedFunction:t-dll-api.cc:1696
//ivl_lval_sig()
unusedFunction:t-dll-api.cc:1714
//ivl_nature_name()
unusedFunction:t-dll-api.cc:1735
//ivl_nexus_get_private()
unusedFunction:t-dll-api.cc:1756
//ivl_nexus_name()
unusedFunction:t-dll-api.cc:1745
//ivl_nexus_ptr_branch()
unusedFunction:t-dll-api.cc:1799
//ivl_nexus_ptr_con()
unusedFunction:t-dll-api.cc:1808
//ivl_nexus_ptr_sig()
unusedFunction:t-dll-api.cc:1835
//ivl_nexus_ptr_switch()
unusedFunction:t-dll-api.cc:1844
//ivl_nexus_set_private()
unusedFunction:t-dll-api.cc:1762
//ivl_parameter_basename()
unusedFunction:t-dll-api.cc:1853
//ivl_parameter_expr()
unusedFunction:t-dll-api.cc:1896
//ivl_parameter_file()
unusedFunction:t-dll-api.cc:1902
//ivl_parameter_lineno()
unusedFunction:t-dll-api.cc:1908
//ivl_parameter_local()
unusedFunction:t-dll-api.cc:1859
//ivl_parameter_lsb()
unusedFunction:t-dll-api.cc:1877
//ivl_parameter_msb()
unusedFunction:t-dll-api.cc:1871
//ivl_parameter_scope()
unusedFunction:t-dll-api.cc:1914
//ivl_parameter_signed()
unusedFunction:t-dll-api.cc:1865
//ivl_parameter_width()
unusedFunction:t-dll-api.cc:1887
//ivl_path_condit()
unusedFunction:t-dll-api.cc:1920
//ivl_path_delay()
unusedFunction:t-dll-api.cc:1932
//ivl_path_is_condit()
unusedFunction:t-dll-api.cc:1926
//ivl_path_scope()
unusedFunction:t-dll-api.cc:1938
//ivl_path_source()
unusedFunction:t-dll-api.cc:1945
//ivl_path_source_negedge()
unusedFunction:t-dll-api.cc:1957
//ivl_path_source_posedge()
unusedFunction:t-dll-api.cc:1951
//ivl_process_analog()
unusedFunction:t-dll-api.cc:1981
//ivl_process_attr_cnt()
unusedFunction:t-dll-api.cc:1999
//ivl_process_attr_val()
unusedFunction:t-dll-api.cc:2005
//ivl_process_file()
unusedFunction:t-dll-api.cc:1963
//ivl_process_lineno()
unusedFunction:t-dll-api.cc:1969
//ivl_process_scope()
unusedFunction:t-dll-api.cc:1987
//ivl_process_stmt()
unusedFunction:t-dll-api.cc:1993
//ivl_process_type()
unusedFunction:t-dll-api.cc:1975
//ivl_scope_attr_cnt()
unusedFunction:t-dll-api.cc:2013
//ivl_scope_attr_val()
unusedFunction:t-dll-api.cc:2019
//ivl_scope_basename()
unusedFunction:t-dll-api.cc:2027
//ivl_scope_child()
unusedFunction:t-dll-api.cc:2054
//ivl_scope_children()
unusedFunction:t-dll-api.cc:2033
//ivl_scope_childs()
unusedFunction:t-dll-api.cc:2047
//ivl_scope_class()
unusedFunction:t-dll-api.cc:2061
//ivl_scope_classes()
unusedFunction:t-dll-api.cc:2068
//ivl_scope_def()
unusedFunction:t-dll-api.cc:2075
//ivl_scope_def_file()
unusedFunction:t-dll-api.cc:2081
//ivl_scope_def_lineno()
unusedFunction:t-dll-api.cc:2087
//ivl_scope_enumerate()
unusedFunction:t-dll-api.cc:2099
//ivl_scope_enumerates()
unusedFunction:t-dll-api.cc:2093
//ivl_scope_event()
unusedFunction:t-dll-api.cc:2112
//ivl_scope_events()
unusedFunction:t-dll-api.cc:2106
//ivl_scope_file()
unusedFunction:t-dll-api.cc:2119
//ivl_scope_func_signed
unusedFunction:t-dll-api.cc:2132
//ivl_scope_func_type
unusedFunction:t-dll-api.cc:2125
//ivl_scope_func_width
unusedFunction:t-dll-api.cc:2140
//ivl_scope_is_auto()
unusedFunction:t-dll-api.cc:2148
//ivl_scope_is_cell()
unusedFunction:t-dll-api.cc:2154
//ivl_scope_lineno()
unusedFunction:t-dll-api.cc:2160
//ivl_scope_log()
unusedFunction:t-dll-api.cc:2172
//ivl_scope_logs()
unusedFunction:t-dll-api.cc:2166
//ivl_scope_lpm()
unusedFunction:t-dll-api.cc:2185
//ivl_scope_lpms()
unusedFunction:t-dll-api.cc:2179
//ivl_scope_mod_module_port_name()
unusedFunction:t-dll-api.cc:2264
//ivl_scope_mod_module_port_type()
unusedFunction:t-dll-api.cc:2273
//ivl_scope_mod_module_port_width()
unusedFunction:t-dll-api.cc:2285
//ivl_scope_mod_module_ports()
unusedFunction:t-dll-api.cc:2257
//ivl_scope_mod_port()
unusedFunction:t-dll-api.cc:2310
//ivl_scope_param()
unusedFunction:t-dll-api.cc:2243
//ivl_scope_params()
unusedFunction:t-dll-api.cc:2237
//ivl_scope_parent()
unusedFunction:t-dll-api.cc:2250
//ivl_scope_port()
unusedFunction:t-dll-api.cc:2301
//ivl_scope_ports()
unusedFunction:t-dll-api.cc:2292
//ivl_scope_sig()
unusedFunction:t-dll-api.cc:2324
//ivl_scope_sigs()
unusedFunction:t-dll-api.cc:2318
//ivl_scope_switch()
unusedFunction:t-dll-api.cc:2337
//ivl_scope_switches()
unusedFunction:t-dll-api.cc:2331
//ivl_scope_time_precision()
unusedFunction:t-dll-api.cc:2344
//ivl_scope_time_units()
unusedFunction:t-dll-api.cc:2350
//ivl_scope_tname()
unusedFunction:t-dll-api.cc:2362
//ivl_scope_type()
unusedFunction:t-dll-api.cc:2356
//ivl_signal_array_addr_swapped()
unusedFunction:t-dll-api.cc:2380
//ivl_signal_array_base()
unusedFunction:t-dll-api.cc:2368
//ivl_signal_array_count()
unusedFunction:t-dll-api.cc:2374
//ivl_signal_attr()
unusedFunction:t-dll-api.cc:2398
//ivl_signal_attr_cnt()
unusedFunction:t-dll-api.cc:2414
//ivl_signal_attr_val()
unusedFunction:t-dll-api.cc:2420
//ivl_signal_basename()
unusedFunction:t-dll-api.cc:2427
//ivl_signal_data_type()
unusedFunction:t-dll-api.cc:2578
//ivl_signal_dimensions()
unusedFunction:t-dll-api.cc:2386
//ivl_signal_discipline()
unusedFunction:t-dll-api.cc:2392
//ivl_signal_file()
unusedFunction:t-dll-api.cc:2555
//ivl_signal_forced_net()
unusedFunction:t-dll-api.cc:2549
//ivl_signal_integer()
unusedFunction:t-dll-api.cc:2567
//ivl_signal_lineno()
unusedFunction:t-dll-api.cc:2561
//ivl_signal_local()
unusedFunction:t-dll-api.cc:2536
//ivl_signal_lsb()
unusedFunction:t-dll-api.cc:2501
//ivl_signal_module_port_index()
unusedFunction:t-dll-api.cc:2530
//ivl_signal_msb()
unusedFunction:t-dll-api.cc:2491
//ivl_signal_name()
unusedFunction:t-dll-api.cc:2433
//ivl_signal_nex()
unusedFunction:t-dll-api.cc:2454
//ivl_signal_npath()
unusedFunction:t-dll-api.cc:2591
//ivl_signal_packed_dimensions()
unusedFunction:t-dll-api.cc:2471
//ivl_signal_packed_lsb()
unusedFunction:t-dll-api.cc:2484
//ivl_signal_packed_msb()
unusedFunction:t-dll-api.cc:2477
//ivl_signal_path()
unusedFunction:t-dll-api.cc:2597
//ivl_signal_port()
unusedFunction:t-dll-api.cc:2524
//ivl_signal_scope()
unusedFunction:t-dll-api.cc:2511
//ivl_signal_signed()
unusedFunction:t-dll-api.cc:2542
//ivl_signal_width()
unusedFunction:t-dll-api.cc:2517
//ivl_statement_type()
unusedFunction:t-dll-api.cc:2610
//ivl_stmt_block_count()
unusedFunction:t-dll-api.cc:2643
//ivl_stmt_block_scope()
unusedFunction:t-dll-api.cc:2628
//ivl_stmt_block_stmt()
unusedFunction:t-dll-api.cc:2658
//ivl_stmt_call()
unusedFunction:t-dll-api.cc:2674
//ivl_stmt_case_count()
unusedFunction:t-dll-api.cc:2695
//ivl_stmt_case_expr()
unusedFunction:t-dll-api.cc:2710
//ivl_stmt_case_stmt()
unusedFunction:t-dll-api.cc:2727
//ivl_stmt_cond_expr()
unusedFunction:t-dll-api.cc:2744
//ivl_stmt_cond_false()
unusedFunction:t-dll-api.cc:2771
//ivl_stmt_cond_true()
unusedFunction:t-dll-api.cc:2781
//ivl_stmt_delay_expr()
unusedFunction:t-dll-api.cc:2791
//ivl_stmt_delay_val()
unusedFunction:t-dll-api.cc:2808
//ivl_stmt_events()
unusedFunction:t-dll-api.cc:2834
//ivl_stmt_file()
unusedFunction:t-dll-api.cc:2616
//ivl_stmt_lexp()
unusedFunction:t-dll-api.cc:2862
//ivl_stmt_lineno()
unusedFunction:t-dll-api.cc:2622
//ivl_stmt_lval()
unusedFunction:t-dll-api.cc:2874
//ivl_stmt_lvals()
unusedFunction:t-dll-api.cc:2893
//ivl_stmt_lwidth()
unusedFunction:t-dll-api.cc:2911
//ivl_stmt_name()
unusedFunction:t-dll-api.cc:2944
//ivl_stmt_nevent()
unusedFunction:t-dll-api.cc:2815
//ivl_stmt_opcode()
unusedFunction:t-dll-api.cc:2957
//ivl_stmt_parm()
unusedFunction:t-dll-api.cc:2969
//ivl_stmt_parm_count()
unusedFunction:t-dll-api.cc:2983
//ivl_stmt_rval()
unusedFunction:t-dll-api.cc:2995
//ivl_stmt_sfunc_as_task()
unusedFunction:t-dll-api.cc:3013
//ivl_stmt_sub_stmt()
unusedFunction:t-dll-api.cc:3026
//ivl_switch_a()
unusedFunction:t-dll-api.cc:3067
//ivl_switch_b()
unusedFunction:t-dll-api.cc:3073
//ivl_switch_basename()
unusedFunction:t-dll-api.cc:3049
//ivl_switch_delay()
unusedFunction:t-dll-api.cc:3103
//ivl_switch_enable()
unusedFunction:t-dll-api.cc:3079
//ivl_switch_file()
unusedFunction:t-dll-api.cc:3110
//ivl_switch_island()
unusedFunction:t-dll-api.cc:3116
//ivl_switch_lineno()
unusedFunction:t-dll-api.cc:3122
//ivl_switch_offset()
unusedFunction:t-dll-api.cc:3097
//ivl_switch_part()
unusedFunction:t-dll-api.cc:3091
//ivl_switch_scope()
unusedFunction:t-dll-api.cc:3055
//ivl_switch_type()
unusedFunction:t-dll-api.cc:3061
//ivl_switch_width()
unusedFunction:t-dll-api.cc:3085
//ivl_type_base()
unusedFunction:t-dll-api.cc:3128
//ivl_type_element()
unusedFunction:t-dll-api.cc:3134
//ivl_type_name()
unusedFunction:t-dll-api.cc:3166
//ivl_type_packed_dimensions()
unusedFunction:t-dll-api.cc:3143
//ivl_type_packed_lsb()
unusedFunction:t-dll-api.cc:3150
//ivl_type_packed_msb()
unusedFunction:t-dll-api.cc:3158
//ivl_type_prop_type()
unusedFunction:t-dll-api.cc:3191
//ivl_type_properties()
unusedFunction:t-dll-api.cc:3174
//ivl_type_signed()
unusedFunction:t-dll-api.cc:3199
//ivl_udp_file()
unusedFunction:t-dll-api.cc:1036
//ivl_udp_init()
unusedFunction:t-dll-api.cc:999
//ivl_udp_lineno()
unusedFunction:t-dll-api.cc:1042
//ivl_udp_name()
unusedFunction:t-dll-api.cc:1029
//ivl_udp_nin()
unusedFunction:t-dll-api.cc:993
//ivl_udp_port()
unusedFunction:t-dll-api.cc:1005
//ivl_udp_row()
unusedFunction:t-dll-api.cc:1014
//ivl_udp_rows()
unusedFunction:t-dll-api.cc:1023
// ivl_udp_sequ()
unusedFunction:t-dll-api.cc:987
thisSubtraction:netlist.h:4976
thisSubtraction:netlist.h:4985
+23 -88
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2020 Stephen Williams ([email protected])
* Copyright (c) 1998-2015 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -187,14 +187,8 @@ ostream& operator << (ostream&fd, NetCaseCmp::kind_t that)
case NetCaseCmp::NEQ:
fd << "!==";
break;
case NetCaseCmp::WEQ:
fd << "==?";
break;
case NetCaseCmp::WNE:
fd << "!=?";
break;
case NetCaseCmp::XEQ:
fd << "==x?";
fd << "==?";
break;
case NetCaseCmp::ZEQ:
fd << "==z?";
@@ -232,15 +226,13 @@ ostream& netdarray_t::debug_dump(ostream&o) const
ostream& netqueue_t::debug_dump(ostream&fd) const
{
fd << "queue of ";
if (max_idx_ >= 0) fd << "(maximum of " << max_idx_+1 << " elements) ";
fd << *element_type();
fd << "queue of " << *element_type();
return fd;
}
ostream& netvector_t::debug_dump(ostream&o) const
{
o << "netvector_t:" << type_ << (signed_? " signed" : " unsigned") << packed_dims_;
o << type_ << (signed_? " signed" : " unsigned") << packed_dims_;
return o;
}
@@ -352,10 +344,6 @@ void NetDelaySrc::dump(ostream&o, unsigned ind) const
if (has_condit()) o << " if";
else o << " ifnone";
}
if (parallel_)
o << " parallel";
else
o << " full";
o << " src "
<< "(" << transition_delays_[IVL_PE_01]
<< "," << transition_delays_[IVL_PE_10]
@@ -700,14 +688,6 @@ void NetFF::dump_node(ostream&o, unsigned ind) const
dump_obj_attr(o, ind+4);
}
void NetLatch::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "LPM_LATCH: " << name()
<< " scope=" << scope_path(scope()) << endl;
dump_node_pins(o, ind+4);
dump_obj_attr(o, ind+4);
}
void NetLiteral::dump_node(ostream&o, unsigned ind) const
{
o << setw(ind) << "" << "constant real " << real_
@@ -741,12 +721,6 @@ void NetLogic::dump_node(ostream&o, unsigned ind) const
case CMOS:
o << "cmos";
break;
case EQUIV:
o << "<->";
break;
case IMPL:
o << "->";
break;
case NAND:
o << "nand";
break;
@@ -1002,18 +976,6 @@ void NetProcTop::dump(ostream&o, unsigned ind) const
o << "always /* " << get_fileline() << " in "
<< scope_path(scope_) << " */" << endl;
break;
case IVL_PR_ALWAYS_COMB:
o << "always_comb /* " << get_fileline() << " in "
<< scope_path(scope_) << " */" << endl;
break;
case IVL_PR_ALWAYS_FF:
o << "always_ff /* " << get_fileline() << " in "
<< scope_path(scope_) << " */" << endl;
break;
case IVL_PR_ALWAYS_LATCH:
o << "always_latch /* " << get_fileline() << " in "
<< scope_path(scope_) << " */" << endl;
break;
case IVL_PR_FINAL:
o << "final /* " << get_fileline() << " in "
<< scope_path(scope_) << " */" << endl;
@@ -1041,13 +1003,6 @@ void NetAnalogTop::dump(ostream&o, unsigned ind) const
<< scope_path(scope_) << " */" << endl;
break;
// These are not used in an analog context.
case IVL_PR_ALWAYS_COMB:
case IVL_PR_ALWAYS_FF:
case IVL_PR_ALWAYS_LATCH:
assert(0);
break;
case IVL_PR_FINAL:
o << "analog final /* " << get_fileline() << " in "
<< scope_path(scope_) << " */" << endl;
@@ -1065,11 +1020,7 @@ void NetAlloc::dump(ostream&o, unsigned ind) const
void NetAssign_::dump_lval(ostream&o) const
{
if (sig_) o << sig_->name();
else if (nest_) {
o << "(";
nest_->dump_lval(o);
o << ")";
}
else if (nest_) nest_->dump_lval(o);
else o << "<?>";
if (! member_.nil()) {
@@ -1162,29 +1113,15 @@ void NetBlock::dump(ostream&o, unsigned ind) const
void NetCase::dump(ostream&o, unsigned ind) const
{
o << setw(ind) << "";
switch (quality_) {
case IVL_CASE_QUALITY_BASIC:
break;
case IVL_CASE_QUALITY_UNIQUE:
o << "unique ";
break;
case IVL_CASE_QUALITY_UNIQUE0:
o << "unique0 ";
break;
case IVL_CASE_QUALITY_PRIORITY:
o << "priority ";
break;
}
switch (type_) {
case EQ:
o << "case (" << *expr_ << ")" << endl;
o << setw(ind) << "" << "case (" << *expr_ << ")" << endl;
break;
case EQX:
o << "casex (" << *expr_ << ")" << endl;
o << setw(ind) << "" << "casex (" << *expr_ << ")" << endl;
break;
case EQZ:
o << "casez (" << *expr_ << ")" << endl;
o << setw(ind) << "" << "casez (" << *expr_ << ")" << endl;
break;
}
@@ -1445,8 +1382,6 @@ void NetScope::dump(ostream&o) const
if (is_interface()) o << " (interface)";
o << " " << children_.size() << " children, "
<< classes_.size() << " classes" << endl;
if (unit() && !is_unit())
o << " in compilation unit " << unit()->basename() << endl;
for (unsigned idx = 0 ; idx < attr_cnt() ; idx += 1)
o << " (* " << attr_key(idx) << " = "
@@ -1686,14 +1621,11 @@ void NetEBinary::dump(ostream&o) const
case 'A':
o << "~&";
break;
case 'e':
o << "==";
break;
case 'E':
o << "===";
break;
case 'w':
o << "==?";
case 'e':
o << "==";
break;
case 'G':
o << ">=";
@@ -1710,9 +1642,6 @@ void NetEBinary::dump(ostream&o) const
case 'N':
o << "!==";
break;
case 'W':
o << "!=?";
break;
case 'o':
o << "||";
break;
@@ -1722,12 +1651,6 @@ void NetEBinary::dump(ostream&o) const
case 'p':
o << "**";
break;
case 'q':
o << "->";
break;
case 'Q':
o << "<->";
break;
case 'r':
o << ">>";
break;
@@ -1747,7 +1670,7 @@ void NetECast::dump(ostream&fd) const
{
if (op_=='2')
fd << "bool<" << expr_width() << ">(" << *expr_ << ")";
else if (op_=='v')
else if (op_=='4')
fd << "logic<" << expr_width() << ">(" << *expr_ << ")";
else
NetEUnary::dump(fd);
@@ -1971,6 +1894,18 @@ void Design::dump(ostream&o) const
cur->second->dump(o);
}
o << "$ROOT CLASSES:" << endl;
for (map<perm_string,netclass_t*>::const_iterator cur = classes_.begin()
; cur != classes_.end() ; ++cur) {
cur->second->dump_scope(o);
}
o << "$ROOT TASKS/FUNCTIONS:" << endl;
for (map<NetScope*,PTaskFunc*>::const_iterator cur = root_tasks_.begin()
; cur != root_tasks_.end() ; ++ cur) {
cur->first->dump(o);
}
o << "SCOPES:" << endl;
for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
scope != root_scopes_.end(); ++ scope ) {
+1 -1
View File
@@ -19,7 +19,7 @@
/*
* This is a simple program to make a dosified copy of the
* original. That is, it converts Unix style line ends to DOS
* original. That is, it converts unix style line ends to DOS
* style. This is useful for installing text files.
*
* The exact substitution is to replace \n with \r\n. If the line
+3 -13
View File
@@ -36,7 +36,6 @@ mandir = @mandir@
dllib=@DLLIB@
CC = @CC@
HOSTCC := @CC@
WINDRES = @WINDRES@
INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
@@ -66,7 +65,7 @@ distclean: clean
rm -f Makefile config.log
cppcheck: main.c
cppcheck --enable=all --std=posix --std=c99 --std=c++03 -f $(INCLUDE_PATH) $^
cppcheck --enable=all -f $(INCLUDE_PATH) $^
Makefile: $(srcdir)/Makefile.in ../config.status
cd ..; ./config.status --file=driver-vpi/$@
@@ -94,19 +93,10 @@ res.o: res.rc
$(WINDRES) -i res.rc -o res.o
#
install: all installdirs installfiles
install: all installdirs $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
F = ./iverilog-vpi@EXEEXT@
installfiles: $(F) | installdirs
$(bindir)/iverilog-vpi$(suffix)@EXEEXT@: ./iverilog-vpi@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ "$(bindir)/iverilog-vpi$(suffix)@EXEEXT@"
ifeq (@WIN32@,yes)
ifneq ($(HOSTCC),$(CC))
$(INSTALL_PROGRAM) $(shell $(HOSTCC) --print-file-name=libwinpthread-1.dll) "$(DESTDIR)$(bindir)"
$(INSTALL_PROGRAM) $(shell $(HOSTCC) --print-file-name=libgcc_s_sjlj-1.dll) "$(DESTDIR)$(bindir)"
$(INSTALL_PROGRAM) $(shell $(HOSTCC) --print-file-name=libstdc++-6.dll) "$(DESTDIR)$(bindir)"
endif
endif
installdirs: $(srcdir)/../mkinstalldirs
$(srcdir)/../mkinstalldirs "$(bindir)"
+14 -16
View File
@@ -67,7 +67,7 @@ distclean: clean
rm -f Makefile config.log
cppcheck: $(O:.o=.c)
cppcheck --enable=all --std=posix --std=c99 --std=c++03 -f \
cppcheck --enable=all -f \
-UYY_USER_INIT \
-UYYPARSE_PARAM -UYYPRINT -Ushort -Uyyoverflow \
-UYYTYPE_INT8 -UYYTYPE_INT16 -UYYTYPE_UINT8 -UYYTYPE_UINT16 \
@@ -85,9 +85,10 @@ iverilog@EXEEXT@: $O
cflexor.c: $(srcdir)/cflexor.lex
$(LEX) -s -t $< > $@
# Use pattern rules to avoid parallel build issues (see pr3462585)
cfparse%c cfparse%h: $(srcdir)/cfparse%y
$(YACC) --verbose -t -p cf -d -o cfparse.c $<
# Build this in two steps to avoid parallel build issues (see pr3462585)
cfparse.c: $(srcdir)/cfparse.y
$(YACC) --verbose -t -p cf -d -o $@ $<
cfparse.h: cfparse.c
%.o: %.c
$(CC) $(CPPFLAGS) $(CFLAGS) @DEPENDENCY_FLAG@ -c $< -o $*.o
@@ -111,35 +112,32 @@ iverilog.pdf: iverilog.ps
ifeq (@MINGW32@,yes)
ifeq ($(MAN),none)
INSTALL_DOC = installman
INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
else
ifeq ($(PS2PDF),none)
INSTALL_DOC = installman
INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
else
INSTALL_DOC = installpdf installman
INSTALL_DOC = $(prefix)/iverilog$(suffix).pdf $(mandir)/man1/iverilog$(suffix).1
all: iverilog.pdf
endif
endif
INSTALL_DOCDIR = $(mandir)/man1
else
INSTALL_DOC = installman
INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
INSTALL_DOCDIR = $(mandir)/man1
endif
install: all installdirs installfiles
install: all installdirs $(bindir)/iverilog$(suffix)@EXEEXT@ $(INSTALL_DOC)
F = ./iverilog@EXEEXT@ \
$(INSTALL_DOC)
$(bindir)/iverilog$(suffix)@EXEEXT@: ./iverilog@EXEEXT@
$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ "$(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@"
installman: iverilog.man installdirs
$(mandir)/man1/iverilog$(suffix).1: iverilog.man
$(INSTALL_DATA) iverilog.man "$(DESTDIR)$(mandir)/man1/iverilog$(suffix).1"
installpdf: iverilog.pdf installdirs
$(prefix)/iverilog$(suffix).pdf: iverilog.pdf
$(INSTALL_DATA) iverilog.pdf "$(DESTDIR)$(prefix)/iverilog$(suffix).pdf"
installfiles: $(F) | installdirs
$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ "$(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@"
installdirs: $(srcdir)/../mkinstalldirs
$(srcdir)/../mkinstalldirs "$(DESTDIR)$(bindir)" "$(DESTDIR)$(INSTALL_DOCDIR)"
-2
View File
@@ -27,8 +27,6 @@
# include "globals.h"
# include <string.h>
char *current_file = NULL;
static int comment_enter;
static char* trim_trailing_white(char*txt, int trim);
+1 -1
View File
@@ -39,6 +39,6 @@ int cferror(const char *);
int cfparse(void);
void switch_to_command_file(const char *);
void destroy_lexor(void);
extern char *current_file;
char *current_file;
#endif /* IVL_cfparse_misc_H */
+20 -94
View File
@@ -1,15 +1,14 @@
.TH iverilog 1 "Aug 10th, 2020" "" "Version %M.%n%E"
.TH iverilog 1 "Oct 2nd, 2016" "" "Version %M.%n%E"
.SH NAME
iverilog - Icarus Verilog compiler
.SH SYNOPSIS
.B iverilog
[\-EiSuVv] [\-Bpath] [\-ccmdfile|\-fcmdfile] [\-Dmacro[=defn]]
[\-ESVv] [\-Bpath] [\-ccmdfile|\-fcmdfile] [\-Dmacro[=defn]]
[\-Pparameter=value] [\-pflag=value] [\-dname]
[\-g1995\:|\-g2001\:|\-g2005\:|\-g2005-sv\:|\-g2009\:|\-g2012\:|\-g<feature>]
[\-Iincludedir] [\-Lmoduledir] [\-mmodule] [\-M[mode=]file] [\-Nfile]
[\-ooutputfilename] [\-stopmodule] [\-ttype] [\-Tmin/typ/max] [\-Wclass]
[\-ypath] [\-lfile]
[\-Iincludedir] [\-mmodule] [\-M[mode=]file] [\-Nfile] [\-ooutputfilename]
[\-stopmodule] [\-ttype] [\-Tmin/typ/max] [\-Wclass] [\-ypath] [\-lfile]
sourcefile
.SH DESCRIPTION
@@ -81,12 +80,6 @@ use any of the new \fIIEEE1800\fP keywords.
Enable or disable (default) support for Verilog\-AMS.
Very little Verilog\-AMS specific functionality is currently supported.
.TP 8
.B -gassertions\fI|\fP-gsupported-assertions\fI|\fP-gno-assertions
Enable (default) or disable SystemVerilog assertions. When enabled,
assertion statements are elaborated. When disabled, assertion statements
are parsed but ignored. The \fB\-gsupported-assertions\fP option only
enables assertions that are currently supported by the compiler.
.TP 8
.B -gspecify\fI|\fP-gno-specify
Enable or disable (default) specify block support. When enabled,
specify block code is elaborated. When disabled, specify blocks are
@@ -131,7 +124,7 @@ default, parts of the expression that do not depend on the changed
input value(s) are not re-evaluated. If an expression contains a call
to a function that doesn't depend solely on its input values or that
has side effects, the resulting behavior will differ from that
required by the standard. Using \fB\-gstrict\-ca\-eval\fP will force
required by the standard. Using \fI\-gstrict\-ca\-eval\fP will force
standard compliant behavior (with some loss in performance).
.TP 8
.B -gstrict-expr-width\fI|\fP-gno-strict-expr-width
@@ -142,7 +135,7 @@ expression containing an unsized constant number, and unsized constant
numbers are not truncated to integer width.
.TP 8
.B -gshared-loop-index\fI|\fP-gno-shared-loop-index
Enable (default) or disable the exclusion of for-loop control variables
Enable or disable (default) the exclusion of for-loop control variables
from implicit event_expression lists. When enabled, if a for-loop control
variable (loop index) is only used inside the for-loop statement, the
compiler will not include it in an implicit event_expression list it
@@ -158,19 +151,6 @@ for Verilog include files. The \fB\-I\fP switch may be used many times
to specify several directories to search, the directories are searched
in the order they appear on the command line.
.TP 8
.B -i
Ignore missing modules. Normally it is an error if a module instantiation
refers to an undefined module. This option causes the compiler to skip
over that instantiation. It will also stop the compiler returning an
error if there are no top level modules. This allows the compiler to be
used to check incomplete designs for errors.
.TP 8
.B -L\fIpath\fP
This flag adds a directory to the path list used to locate VPI
modules. The default path includes only the install directory for the
system.vpi module, but this flag can add other directories. Multiple
paths are allowed, and the paths will be searched in order.
.TP 8
.B -l\fIfile\fP
Add the specified file to the list of source files to be compiled,
but mark it as a library file. All modules contained within that
@@ -197,13 +177,9 @@ prefixed by "I " and other files are prefixed by "M ".
.B -m\fImodule\fP
Add this module to the list of VPI modules to be loaded by the
simulation. Many modules can be specified, and all will be loaded, in
the order specified. The system module is implicit and always included
(and loaded last).
If the specified name includes at least one directory character, it is
assumed to be prefixed by the path to the module, otherwise the module
is searched for in the paths specified by preceding \fB-L\fP options,
and if not found there, in the \fIiverilog\fP base directory.
the order specified. The system module is implicit and always included.
If a System Function Table file (<module>.sft) exists for the module it
will be loaded automatically.
.TP 8
.B -N\fIpath\fP
This is used for debugging the compiler proper. Dump the final netlist
@@ -246,12 +222,6 @@ will suppress the warning that the compiler is making a choice.
Use this switch to specify the target output format. See the
\fBTARGETS\fP section below for a list of valid output formats.
.TP 8
.B -u
Treat each source file as a separate compilation unit (as defined in
SystemVerilog). If compiling for an \fIIEEE1364\fP generation, this
will just reset all compiler directives (including macro definitions)
before each new file is processed.
.TP 8
.B -v
Turn on verbose messages. This will print the command lines that are
executed to perform the actual compilation, along with version
@@ -317,10 +287,7 @@ This is the default. The vvp target generates code for the vvp
runtime. The output is a complete program that simulates the design
but must be run by the \fBvvp\fP command. The -pfileline=1 option
can be used to add procedural statement debugging opcodes to the
generated code. These opcodes are also used to generate file and
line information for procedural warning/error messages. To enable
the debug command tracing us the trace command (trace on) from
the vvp interactive prompt.
generated code.
.TP 8
.B fpga
This is a synthesis target that supports a variety of fpga devices,
@@ -343,9 +310,8 @@ after a \fB\-Wall\fP argument to suppress isolated warning types.
.TP 8
.B all
This enables the anachronisms, implicit, macro-replacement, portbind,
select\-range, timescale, and sensitivity\-entire\-array warning
categories.
This enables the anachronisms, implicit, portbind, select\-range,
timescale, and sensitivity\-entire\-array warning categories.
.TP 8
.B anachronisms
@@ -358,13 +324,6 @@ This enables warnings for creation of implicit declarations. For
example, if a scalar wire X is used but not declared in the Verilog
source, this will print a warning at its first use.
.TP 8
.B macro-redefinition\fI | \fPmacro-replacement
This enables preprocessor warnings when a macro is being redefined.
The first variant prints a warning any time a macro is redefined.
The second variant only prints a warning if the macro text changes.
Use \fBno-macro-redefinition\fP to turn off all warnings of this type.
.TP 8
.B portbind
This enables warnings for ports of module instantiations that are not
@@ -416,23 +375,13 @@ sensitivity list. Although this behaviour is prescribed by the IEEE
standard, it is not what might be expected and can have performance
implications if the array is large.
.SH "VPI MODULES"
If the source file name has a \fB.vpi\fP or \fB.vpl\fP suffix, then it
is taken to be a VPI module. VPI modules supplied by the user are scanned
to determine the return types of any system functions they provide. This
.SH "SYSTEM FUNCTION TABLE FILES"
If the source file name as a \fB.sft\fP suffix, then it is taken to be
a system function table file. A System function table file is used to
describe to the compiler the return types for system functions. This
is necessary because the compiler needs this information to elaborate
expressions that contain these system functions. The module path/name is
passed on to the target to allow the VPI module to be automatically loaded
at the start of simulation.
VPI modules may also be supplied using the \fB-L\fP and \fB-m\fP options.
.SH "SYSTEM FUNCTION TABLE FILES [deprecated]"
If the source file name has a \fB.sft\fP suffix, then it is taken to be a
system function table file. A system function table file is the old method
used to describe to the compiler the return types for system functions.
Users are encouraged to switch to the new method of simply supplying the
VPI module.
expressions that contain these system functions, but cannot run the
sizetf functions since it has no run-time.
The format of the table is ASCII, one function per line. Empty lines
are ignored, and lines that start with the '\fI#\fP' character are
@@ -453,11 +402,6 @@ The function returns an integer.
The function returns a vector with the given width, and is signed or
unsigned according to the flag.
.TP 8
.B vpiSysFuncString
The function returns a string. This is an Icarus-specific extension, not
available in the VPI standard.
.SH "COMMAND FILES"
The command file allows the user to place source file names and
certain command line switches into a text file instead of on a long
@@ -505,7 +449,7 @@ Variables in the \fIincludedir\fP are substituted.
.TP 8
.B +libext+\fIext\fP
The \fB+libext\fP token in command files lists file extensions to try
The \fB+libext\fP token in command files fives file extensions to try
when looking for a library file. This is useful in conjunction with
\fB\-y\fP flags to list suffixes to try in each directory before moving
on to the next library directory.
@@ -586,24 +530,6 @@ This is always defined when compiling with Icarus Verilog.
.B __VAMS_ENABLE__ = 1
This is defined if Verilog\-AMS is enabled.
.SH ENVIRONMENT
.PP
\fIiverilog\fP also accepts some environment variables that control
its behavior. These can be used to make semi-permanent changes.
.TP 8
.B IVERILOG_ICONFIG=\fIfile-name\fP
This sets the name used for the temporary file that passes parameters
to the compiler proper, and prevents that file being deleted after the
compiler has exited.
.TP 8
.B IVERILOG_VPI_MODULE_PATH=\fI/some/path:/some/other/path\fP
This adds additional components to the VPI module search path. Paths
specified in this way are searched after paths specified with \fB-L\fP,
but before the default search path. Multiple paths can be separated with
colons (semicolons if using Windows).
.SH EXAMPLES
These examples assume that you have a Verilog source file called hello.v in
the current directory
@@ -633,7 +559,7 @@ Tips on using, debugging, and developing the compiler can be found at
.SH COPYRIGHT
.nf
Copyright \(co 2002\-2020 Stephen Williams
Copyright \(co 2002\-2016 Stephen Williams
This document can be freely redistributed according to the terms of the
GNU General Public License version 2.0
+86 -332
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2016 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -38,9 +38,9 @@ const char NOTICE[] =
;
const char HELP[] =
"Usage: iverilog [-EiSuvV] [-B base] [-c cmdfile|-f cmdfile]\n"
"Usage: iverilog [-ESvV] [-B base] [-c cmdfile|-f cmdfile]\n"
" [-g1995|-g2001|-g2005|-g2005-sv|-g2009|-g2012] [-g<feature>]\n"
" [-D macro[=defn]] [-I includedir] [-L moduledir]\n"
" [-D macro[=defn]] [-I includedir]\n"
" [-M [mode=]depfile] [-m module]\n"
" [-N file] [-o filename] [-p flag=value]\n"
" [-s topmodule] [-t target] [-T min|typ|max]\n"
@@ -99,16 +99,13 @@ extern const char*optarg;
#ifdef __MINGW32__
const char sep = '\\';
const char path_sep = ';';
#else
const char sep = '/';
const char path_sep = ':';
#endif
extern void cfreset(FILE*fd, const char*path);
const char*base = 0;
const char*vpi_dir = 0;
const char*ivlpp_dir = 0;
const char*vhdlpp_dir= 0;
const char*vhdlpp_work = 0;
@@ -131,7 +128,7 @@ const char*gen_icarus = "icarus-misc";
const char*gen_io_range_error = "io-range-error";
const char*gen_strict_ca_eval = "no-strict-ca-eval";
const char*gen_strict_expr_width = "no-strict-expr-width";
const char*gen_shared_loop_index = "shared-loop-index";
const char*gen_shared_loop_index = "no-shared-loop-index";
const char*gen_verilog_ams = "no-verilog-ams";
/* Boolean: true means use a default include dir, false means don't */
@@ -141,12 +138,7 @@ int gen_std_include = 1;
of the include list. */
int gen_relative_include = 0;
char warning_flags[17] = "n";
int separate_compilation_flag = 0;
/* Boolean: true means ignore errors about missing modules */
int ignore_missing_modules = 0;
char warning_flags[16] = "n";
unsigned integer_width = 32;
@@ -172,12 +164,6 @@ char*compiled_defines_path = 0;
static char iconfig_common_path[4096] = "";
static const char**vpi_path_list = 0;
static unsigned vpi_path_list_size = 0;
static const char**env_vpi_path_list = 0;
static unsigned env_vpi_path_list_size = 0;
int synth_flag = 0;
int verbose_flag = 0;
@@ -355,15 +341,10 @@ static int t_version_only(void)
static void build_preprocess_command(int e_flag)
{
snprintf(tmp, sizeof tmp, "%s%civlpp %s%s%s -F\"%s\" -f\"%s\" -p\"%s\"%s",
ivlpp_dir, sep,
verbose_flag ? " -v" : "",
e_flag ? "" : " -L",
strchr(warning_flags, 'r') ? " -Wredef-all " :
strchr(warning_flags, 'R') ? " -Wredef-chg " : "",
defines_path, source_path,
compiled_defines_path,
e_flag ? "" : " | ");
snprintf(tmp, sizeof tmp, "%s%civlpp %s%s -F\"%s\" -f\"%s\" -p\"%s\" ",
ivlpp_dir, sep, verbose_flag?" -v":"",
e_flag?"":" -L", defines_path, source_path,
compiled_defines_path);
}
static int t_preprocess_only(void)
@@ -426,12 +407,8 @@ static int t_compile(void)
{
unsigned rc;
/* Start by building the preprocess command line, if required.
This pipes into the main ivl command. */
if (!separate_compilation_flag)
build_preprocess_command(0);
else
strcpy(tmp, "");
/* Start by building the preprocess command line. */
build_preprocess_command(0);
size_t ncmd = strlen(tmp);
char*cmd = malloc(ncmd + 1);
@@ -441,8 +418,8 @@ static int t_compile(void)
int rtn;
#endif
/* Build the ivl command. */
snprintf(tmp, sizeof tmp, "%s%civl", base, sep);
/* Build the ivl command and pipe it to the preprocessor. */
snprintf(tmp, sizeof tmp, " | %s%civl", base, sep);
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
@@ -470,16 +447,7 @@ static int t_compile(void)
strcpy(cmd+ncmd, tmp);
ncmd += rc;
snprintf(tmp, sizeof tmp, " -C\"%s\"", iconfig_common_path);
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
ncmd += rc;
if (separate_compilation_flag)
snprintf(tmp, sizeof tmp, " -F\"%s\"", source_path);
else
snprintf(tmp, sizeof tmp, " -- -");
snprintf(tmp, sizeof tmp, " -C\"%s\" -- -", iconfig_common_path);
rc = strlen(tmp);
cmd = realloc(cmd, ncmd+rc+1);
strcpy(cmd+ncmd, tmp);
@@ -530,7 +498,6 @@ static void process_warning_switch(const char*name)
process_warning_switch("anachronisms");
process_warning_switch("implicit");
process_warning_switch("implicit-dimensions");
process_warning_switch("macro-replacement");
process_warning_switch("portbind");
process_warning_switch("select-range");
process_warning_switch("timescale");
@@ -538,21 +505,12 @@ static void process_warning_switch(const char*name)
} else if (strcmp(name,"anachronisms") == 0) {
if (! strchr(warning_flags, 'n'))
strcat(warning_flags, "n");
} else if (strcmp(name,"floating-nets") == 0) {
if (! strchr(warning_flags, 'f'))
strcat(warning_flags, "f");
} else if (strcmp(name,"implicit") == 0) {
if (! strchr(warning_flags, 'i'))
strcat(warning_flags, "i");
} else if (strcmp(name,"implicit-dimensions") == 0) {
if (! strchr(warning_flags, 'd'))
strcat(warning_flags, "d");
} else if (strcmp(name,"macro-redefinition") == 0) {
if (! strchr(warning_flags, 'r'))
strcat(warning_flags, "r");
} else if (strcmp(name,"macro-replacement") == 0) {
if (! strchr(warning_flags, 'R'))
strcat(warning_flags, "R");
} else if (strcmp(name,"portbind") == 0) {
if (! strchr(warning_flags, 'p'))
strcat(warning_flags, "p");
@@ -579,12 +537,6 @@ static void process_warning_switch(const char*name)
cp[0] = cp[1];
cp += 1;
}
} else if (strcmp(name,"no-floating-nets") == 0) {
char*cp = strchr(warning_flags, 'f');
if (cp) while (*cp) {
cp[0] = cp[1];
cp += 1;
}
} else if (strcmp(name,"no-implicit") == 0) {
char*cp = strchr(warning_flags, 'i');
if (cp) while (*cp) {
@@ -597,17 +549,6 @@ static void process_warning_switch(const char*name)
cp[0] = cp[1];
cp += 1;
}
} else if (strcmp(name,"no-macro-redefinition") == 0) {
char*cp = strchr(warning_flags, 'r');
if (cp) while (*cp) {
cp[0] = cp[1];
cp += 1;
}
cp = strchr(warning_flags, 'R');
if (cp) while (*cp) {
cp[0] = cp[1];
cp += 1;
}
} else if (strcmp(name,"no-portbind") == 0) {
char*cp = strchr(warning_flags, 'p');
if (cp) while (*cp) {
@@ -682,19 +623,14 @@ void process_timescale(const char*ts_string)
/*
* This function is called while processing a file name in a command
* file, or a file name on the command line. Look to see if there is a
* .sft or .vpi suffix, and if so pass that as a sys_func or module
* file. Otherwise, it is a Verilog source file to be written into the
* file list.
* .sft suffix, and if so pass that as a sys_func file. Otherwise, it
* is a Verilog source file to be written into the file list.
*/
void process_file_name(const char*name, int lib_flag)
{
if (strlen(name) > 4 && strcasecmp(".sft", name+strlen(name)-4) == 0) {
fprintf(stderr, "SFT files are deprecated. Please pass the VPI module instead.\n");
fprintf(iconfig_file,"sys_func:%s\n", name);
} else if (strlen(name) > 4 && strcasecmp(".vpi", name+strlen(name)-4) == 0) {
fprintf(iconfig_file,"module:%s\n", name);
} else {
fprintf(source_file, "%s\n", name);
source_count += 1;
@@ -762,9 +698,6 @@ static int process_generation(const char*name)
else if (strcmp(name,"assertions") == 0)
gen_assertions = "assertions";
else if (strcmp(name,"supported-assertions") == 0)
gen_assertions = "supported-assertions";
else if (strcmp(name,"no-assertions") == 0)
gen_assertions = "no-assertions";
@@ -821,7 +754,6 @@ static int process_generation(const char*name)
" 2009 -- IEEE1800-2009\n"
" 2012 -- IEEE1800-2012\n"
"Other generation flags:\n"
" assertions | supported-assertions | no-assertions\n"
" specify | no-specify\n"
" verilog-ams | no-verilog-ams\n"
" std-include | no-std-include\n"
@@ -870,217 +802,18 @@ static int process_depfile(const char*name)
return 0;
}
static void add_env_vpi_module_path(const char*path)
{
env_vpi_path_list_size += 1;
env_vpi_path_list = (const char**)realloc(env_vpi_path_list,
env_vpi_path_list_size*sizeof(char*));
env_vpi_path_list[env_vpi_path_list_size-1] = path;
}
static void get_env_vpi_module_paths(void)
{
char *var = getenv("IVERILOG_VPI_MODULE_PATH");
char *ptr, *end;
if (!var)
return;
var = strdup(var);
#ifdef __MINGW32__
convert_to_MS_path(var);
#endif
ptr = var;
end = var+strlen(var);
int len = 0;
while (ptr <= end) {
if (*ptr == 0 || *ptr == path_sep) {
*ptr = 0;
if (len > 0) {
add_env_vpi_module_path(var);
}
len = 0;
var = ptr+1;
} else {
len++;
}
ptr++;
}
}
static void add_vpi_module_path(const char*path)
{
#ifdef __MINGW32__
char*tmp_path = strdup(path);
convert_to_MS_path(tmp_path);
path = tmp_path;
#endif
vpi_path_list_size += 1;
vpi_path_list = (const char**)realloc(vpi_path_list,
vpi_path_list_size*sizeof(char*));
vpi_path_list[vpi_path_list_size-1] = path;
}
static int probe_for_vpi_module(const char*base_path, const char*name,
char*path, unsigned path_size)
{
snprintf(path, path_size, "%s%c%s.vpi", base_path, sep, name);
if (access(path, R_OK) == 0)
return 1;
snprintf(path, path_size, "%s%c%s.vpl", base_path, sep, name);
if (access(path, R_OK) == 0)
return 1;
return 0;
}
/*
* If it exists add the VPI file for the given module.
* If it exists add the SFT file for the given module.
*/
static void add_vpi_file(const char *name)
static void add_sft_file(const char *module)
{
const char*base_dir = vpi_dir ? vpi_dir : base;
char *file;
char path[4096];
#ifdef __MINGW32__
char*tmp_name = strdup(name);
convert_to_MS_path(tmp_name);
name = tmp_name;
#endif
int found = 0;
if (strchr(name, sep)) {
/* If the name has at least one directory character in it
then assume it is a complete name, maybe including any
possible .vpi or .vpl suffix. */
found = access(name, R_OK) == 0;
if (!found) {
snprintf(path, sizeof(path), "%s.vpi", name);
found = access(path, R_OK) == 0;
if (!found) {
snprintf(path, sizeof(path), "%s.vpl", name);
found = access(path, R_OK) == 0;
}
} else {
strncpy(path, name, sizeof(path) - 1);
}
} else {
for (unsigned idx = 0; !found && (idx < vpi_path_list_size); idx += 1) {
found = probe_for_vpi_module(vpi_path_list[idx], name,
path, sizeof(path));
}
for (unsigned idx = 0; !found && (idx < env_vpi_path_list_size); idx += 1) {
found = probe_for_vpi_module(env_vpi_path_list[idx], name,
path, sizeof(path));
}
if (!found) {
found = probe_for_vpi_module(base_dir, name,
path, sizeof(path));
}
}
if (found) {
fprintf(iconfig_file, "module:%s\n", path);
} else {
fprintf(stderr, "Unable to find VPI module '%s'\n", name);
}
#ifdef __MINGW32__
free(tmp_name);
#endif
}
static void find_ivl_root_failed(const char *reason)
{
fprintf(stderr, "Cannot locate IVL modules : %s\n", reason);
exit(1);
}
static void find_ivl_root(void)
{
#ifdef __MINGW32__
const char *ivl_lib_prefix = "\\lib";
const char *ivl_lib_suffix = "\\ivl" IVL_SUFFIX;
#else
const char *ivl_lib_prefix = IVL_LIB;
const char *ivl_lib_suffix = "/ivl" IVL_SUFFIX;
#endif
ssize_t len = 0;
char *s;
#ifndef __MINGW32__
/* First try the location specified in the build process. */
if (access(IVL_ROOT, F_OK) != -1) {
assert(strlen(IVL_ROOT) < sizeof ivl_root);
strcpy(ivl_root, IVL_ROOT);
return;
}
#endif
/* If that fails, calculate the ivl_root from the path to the
command. This is always necessary on Windows because of the
installation process, but may also be necessary on other OSs
if the package has been relocated.
On Windows we know the command path is formed like this:
$(prefix)\bin\iverilog.exe
The module path in a Windows installation is the path:
$(prefix)\lib\ivl$(suffix)
so we chop the file name and the last directory by
turning the last two \ characters to null. Then we append
the lib\ivl$(suffix) to finish.
On other OSs, we expect the command path to be:
$(prefix)/bin/iverilog
and the module path to be:
$(prefix)/$(lib)/ivl$(suffix)
so we extract the $(prefix) from the command location as for
Windows and the $(lib) from IVL_LIB. This will of course fail
if the user has overridden $(bindir) or $(libdir), but there's
not a lot we can do in that case.
*/
#ifdef __MINGW32__
char tmppath[MAXSIZE];
len = GetModuleFileName(NULL, tmppath, sizeof tmppath);
if (len >= (ssize_t) sizeof ivl_root) {
find_ivl_root_failed("command path exceeds size of string buffer.");
}
/* Convert to a short name to remove any embedded spaces. */
len = GetShortPathName(tmppath, ivl_root, sizeof ivl_root);
#else
len = readlink("/proc/self/exe", ivl_root, sizeof ivl_root);
#endif
if (len >= (ssize_t) sizeof ivl_root) {
find_ivl_root_failed("command path exceeds size of string buffer.");
}
if (len <= 0) {
find_ivl_root_failed("couldn't get command path from OS.");
}
s = strrchr(ivl_root, sep);
if (s == 0) {
find_ivl_root_failed("missing first separator in command path.");
}
*s = 0;
s = strrchr(ivl_root, sep);
if (s == 0) {
find_ivl_root_failed("missing second separator in command path.");
}
*s = 0;
len = s - ivl_root;
s = strrchr(ivl_lib_prefix, sep);
assert(s);
if (len + strlen(s) + strlen(ivl_lib_suffix) >= (ssize_t) sizeof ivl_root) {
find_ivl_root_failed("module path exceeds size of string buffer.");
}
strcat(ivl_root, s);
strcat(ivl_root, ivl_lib_suffix);
file = (char *) malloc(strlen(base)+1+strlen(module)+4+1);
sprintf(file, "%s%c%s.sft", base, sep, module);
if (access(file, R_OK) == 0)
fprintf(iconfig_file, "sys_func:%s\n", file);
free(file);
}
int main(int argc, char **argv)
@@ -1089,10 +822,51 @@ int main(int argc, char **argv)
int version_flag = 0;
int opt;
find_ivl_root();
#ifdef __MINGW32__
/* Calculate the ivl_root from the path to the command. This
is necessary because of the installation process on
Windows. Mostly, it is those darn drive letters, but oh
well. We know the command path is formed like this:
D:\iverilog\bin\iverilog.exe
The module path in a Windows installation is the path:
D:\iverilog\lib\ivl$(suffix)
so we chop the file name and the last directory by
turning the last two \ characters to null. Then we append
the lib\ivl$(suffix) to finish. */
char *s;
char tmppath[MAXSIZE];
GetModuleFileName(NULL, tmppath, sizeof tmppath);
/* Convert to a short name to remove any embedded spaces. */
GetShortPathName(tmppath, ivl_root, sizeof ivl_root);
s = strrchr(ivl_root, sep);
if (s) *s = 0;
else {
fprintf(stderr, "%s: Missing first %c in exe path!\n",
argv[0], sep);
exit(1);
}
s = strrchr(ivl_root, sep);
if (s) *s = 0;
else {
fprintf(stderr, "%s: Missing second %c in exe path!\n",
argv[0], sep);
exit(1);
}
strcat(ivl_root, "\\lib\\ivl" IVL_SUFFIX);
base = ivl_root;
get_env_vpi_module_paths();
#else
/* In a UNIX environment, the IVL_ROOT from the Makefile is
dependable. It points to the $prefix/lib/ivl directory,
where the sub-parts are installed. */
strcpy(ivl_root, IVL_ROOT);
base = ivl_root;
#endif
/* Create a temporary file for communicating input parameters
to the preprocessor. */
@@ -1154,7 +928,7 @@ int main(int argc, char **argv)
}
}
while ((opt = getopt(argc, argv, "B:c:D:d:Ef:g:hl:I:iL:M:m:N:o:P:p:Ss:T:t:uvVW:y:Y:")) != EOF) {
while ((opt = getopt(argc, argv, "B:c:D:d:Ef:g:hl:I:M:m:N:o:P:p:Ss:T:t:vVW:y:Y:")) != EOF) {
switch (opt) {
case 'B':
@@ -1163,9 +937,6 @@ int main(int argc, char **argv)
character of the path indicates which path the
user is specifying. */
switch (optarg[0]) {
case 'M': /* Path for the VPI modules */
vpi_dir = optarg+1;
break;
case 'P': /* Path for the ivlpp preprocessor */
ivlpp_dir = optarg+1;
break;
@@ -1212,14 +983,6 @@ int main(int argc, char **argv)
process_include_dir(optarg);
break;
case 'i':
ignore_missing_modules = 1;
break;
case 'L':
add_vpi_module_path(optarg);
break;
case 'l':
process_file_name(optarg, 1);
break;
@@ -1230,7 +993,8 @@ int main(int argc, char **argv)
break;
case 'm':
add_vpi_file(optarg);
fprintf(iconfig_file, "module:%s\n", optarg);
add_sft_file(optarg);
break;
case 'N':
@@ -1263,9 +1027,6 @@ int main(int argc, char **argv)
case 't':
targ = optarg;
break;
case 'u':
separate_compilation_flag = 1;
break;
case 'v':
verbose_flag = 1;
break;
@@ -1301,8 +1062,6 @@ int main(int argc, char **argv)
}
}
if (vpi_dir == 0)
vpi_dir = base;
if (ivlpp_dir == 0)
ivlpp_dir = base;
if (vhdlpp_dir == 0)
@@ -1310,7 +1069,7 @@ int main(int argc, char **argv)
if (version_flag || verbose_flag) {
printf("Icarus Verilog version " VERSION " (" VERSION_TAG ")\n\n");
printf("Copyright 1998-2020 Stephen Williams\n\n");
printf("Copyright 1998-2015 Stephen Williams\n\n");
puts(NOTICE);
}
@@ -1321,10 +1080,11 @@ int main(int argc, char **argv)
/* Write values to the iconfig file. */
fprintf(iconfig_file, "basedir:%s\n", base);
/* Tell the core where to find the system VPI modules. */
fprintf(iconfig_file, "module:%s%csystem.vpi\n", vpi_dir, sep);
fprintf(iconfig_file, "module:%s%cvhdl_sys.vpi\n", vpi_dir, sep);
fprintf(iconfig_file, "module:%s%cvhdl_textio.vpi\n", vpi_dir, sep);
/* Tell the core where to find the system.sft. This file
describes the system functions so that elaboration knows
how to handle them. */
fprintf(iconfig_file, "sys_func:%s%csystem.sft\n", base, sep);
fprintf(iconfig_file, "sys_func:%s%cvhdl_sys.sft\n", base, sep);
/* If verilog-2005/09/12 is enabled or icarus-misc or verilog-ams,
* then include the v2005_math library. */
@@ -1333,20 +1093,23 @@ int main(int argc, char **argv)
strcmp(generation, "2012") == 0 ||
strcmp(gen_icarus, "icarus-misc") == 0 ||
strcmp(gen_verilog_ams, "verilog-ams") == 0) {
fprintf(iconfig_file, "module:%s%cv2005_math.vpi\n", vpi_dir, sep);
fprintf(iconfig_file, "sys_func:%s%cv2005_math.sft\n", base, sep);
fprintf(iconfig_file, "module:v2005_math\n");
}
/* If verilog-ams or icarus_misc is enabled, then include the
* va_math module as well. */
if (strcmp(gen_verilog_ams,"verilog-ams") == 0 ||
strcmp(gen_icarus, "icarus-misc") == 0) {
fprintf(iconfig_file, "module:%s%cva_math.vpi\n", vpi_dir, sep);
fprintf(iconfig_file, "sys_func:%s%cva_math.sft\n", base, sep);
fprintf(iconfig_file, "module:va_math\n");
}
/* If verilog-2009 (SystemVerilog) is enabled, then include the
v2009 module. */
if (strcmp(generation, "2005-sv") == 0 ||
strcmp(generation, "2009") == 0 ||
strcmp(generation, "2012") == 0) {
fprintf(iconfig_file, "module:%s%cv2009.vpi\n", vpi_dir, sep);
fprintf(iconfig_file, "sys_func:%s%cv2009.sft\n", base, sep);
fprintf(iconfig_file, "module:v2009\n");
}
if (mtm != 0) fprintf(iconfig_file, "-T:%s\n", mtm);
@@ -1361,7 +1124,6 @@ int main(int argc, char **argv)
fprintf(iconfig_file, "generation:%s\n", gen_verilog_ams);
fprintf(iconfig_file, "generation:%s\n", gen_icarus);
fprintf(iconfig_file, "warnings:%s\n", warning_flags);
fprintf(iconfig_file, "ignore_missing_modules:%s\n", ignore_missing_modules ? "true" : "false");
fprintf(iconfig_file, "out:%s\n", opath);
if (depfile) {
fprintf(iconfig_file, "depfile:%s\n", depfile);
@@ -1438,12 +1200,8 @@ int main(int argc, char **argv)
will append to the file, so this is necessary to make sure
it starts out empty. */
if (depfile) {
FILE *fd = fopen(depfile, "w");
if (!fd) {
fprintf(stderr, "%s: can't open %s file.\n\n%s\n", argv[0], depfile, HELP);
return 1;
}
fclose(fd);
FILE*fd = fopen(depfile, "w");
fclose(fd);
}
if (source_count == 0 && !version_flag) {
@@ -1458,12 +1216,8 @@ int main(int argc, char **argv)
/* Write the preprocessor command needed to preprocess a
single file. This may be used to preprocess library
files. */
fprintf(iconfig_file, "ivlpp:%s%civlpp %s -L -F\"%s\" -P\"%s\"\n",
ivlpp_dir, sep,
strchr(warning_flags, 'r') ? "-Wredef-all" :
strchr(warning_flags, 'R') ? "-Wredef-chg" : "",
defines_path, compiled_defines_path
);
fprintf(iconfig_file, "ivlpp:%s%civlpp -L -F\"%s\" -P\"%s\"\n",
ivlpp_dir, sep, defines_path, compiled_defines_path);
/* Done writing to the iconfig file. Close it now. */
fclose(iconfig_file);
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -233,7 +233,7 @@ NetESelect* NetESelect::dup_expr() const
NetESFunc* NetESFunc::dup_expr() const
{
NetESFunc*tmp = new NetESFunc(name_, type_, expr_width(), nparms(), is_overridden_);
NetESFunc*tmp = new NetESFunc(name_, type_, expr_width(), nparms());
ivl_assert(*this, tmp);
tmp->cast_signed(has_sign());
+321 -689
View File
File diff suppressed because it is too large Load Diff
+220 -423
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2016 Stephen Williams (steve@icarus.com)
* Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
@@ -29,7 +29,6 @@
# include "netdarray.h"
# include "netparray.h"
# include "netvector.h"
# include "netenum.h"
# include "compiler.h"
# include <cstdlib>
# include <iostream>
@@ -76,8 +75,15 @@
*/
NetAssign_* PExpr::elaborate_lval(Design*, NetScope*, bool, bool) const
{
cerr << get_fileline() << ": Assignment l-value too complex." << endl;
return 0;
NetNet*ll = 0;
if (ll == 0) {
cerr << get_fileline() << ": Assignment l-value too complex."
<< endl;
return 0;
}
NetAssign_*lv = new NetAssign_(ll);
return lv;
}
/*
@@ -147,6 +153,57 @@ NetAssign_* PEConcat::elaborate_lval(Design*des,
return res;
}
NetAssign_*PEIdent::scan_lname_for_nested_members_(Design*des, NetScope*scope,
const pform_name_t&cur_path) const
{
if (cur_path.size() == 1)
return 0;
pform_name_t use_path = cur_path;
name_component_t tail = use_path.back();
use_path.pop_back();
NetNet* reg = 0;
const NetExpr*par = 0;
NetEvent* eve = 0;
symbol_search(this, des, scope, use_path, reg, par, eve);
if (reg == 0) {
NetAssign_*tmp = scan_lname_for_nested_members_(des, scope, use_path);
if (tmp == 0)
return 0;
tmp = new NetAssign_(tmp);
tmp->set_property(tail.name);
return tmp;
}
if (reg->struct_type() && reg->struct_type()->packed()) {
NetAssign_*tmp = new NetAssign_(reg);
elaborate_lval_net_packed_member_(des, scope, tmp, tail);
return tmp;
}
#if 0
if (reg->struct_type() && reg->struct_type()->packed()) {
cerr << get_fileline() << ": sorry: "
<< "I don't know what to do with packed struct " << use_path
<< " with member " << tail << "." << endl;
return 0;
}
#endif
if (reg->struct_type() && !reg->struct_type()->packed()) {
cerr << get_fileline() << ": sorry: "
<< "I don't know what to do with unpacked struct " << use_path
<< " with member " << tail << "." << endl;
return 0;
}
if (reg->class_type()) {
return elaborate_lval_net_class_member_(des, scope, reg, tail.name);
}
return 0;
}
/*
* Handle the ident as an l-value. This includes bit and part selects
@@ -160,6 +217,7 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
NetNet* reg = 0;
const NetExpr*par = 0;
NetEvent* eve = 0;
perm_string method_name;
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval: "
@@ -180,31 +238,35 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
ivl_assert(*this, use_scope);
}
/* Try to find the base part of the path that names the
variable. The remainer is the member path. For example, if
the path is a.b.c.d, and a.b is the path to a variable,
then a.b becomes the base_path and c.d becomes the
member_path. If we cannot find the variable with any
prefix, then the base_path will be empty after this loop
and reg will remain nil. */
pform_name_t base_path = path_;
pform_name_t member_path;
while (reg == 0 && base_path.size() > 0) {
symbol_search(this, des, use_scope, base_path, reg, par, eve);
// Found it!
if (reg != 0) break;
// Not found. Try to pop another name off the base_path
// and push it to the front of the member_path.
member_path.push_front( base_path.back() );
base_path.pop_back();
symbol_search(this, des, use_scope, path_, reg, par, eve);
/* If the signal is not found, check to see if this is a
member of a struct. Take the name of the form "a.b.member",
remove the member and store it into method_name, and retry
the search with "a.b". */
if (reg == 0 && path_.size() >= 2) {
pform_name_t use_path = path_;
perm_string tmp_name = peek_tail_name(use_path);
use_path.pop_back();
symbol_search(this, des, use_scope, use_path, reg, par, eve);
if (reg && reg->struct_type()) {
method_name = tmp_name;
} else if (reg && reg->class_type()) {
method_name = tmp_name;
} else if (NetAssign_*subl = scan_lname_for_nested_members_(des, use_scope, path_)) {
return subl;
} else {
reg = 0;
}
}
/* The l-value must be a variable. If not, then give up and
print a useful error message. */
if (reg == 0) {
if (use_scope->type()==NetScope::FUNC
&& use_scope->func_def()->is_void()
&& use_scope->func_def()->return_sig()==0
&& use_scope->basename()==peek_tail_name(path_)) {
cerr << get_fileline() << ": error: "
<< "Cannot assign to " << path_
@@ -223,10 +285,7 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval: "
<< "Found l-value path_=" << path_
<< " as reg=" << reg->name()
<< " base_path=" << base_path
<< ", member_path=" << member_path
<< "Found l-value as reg."
<< " unpacked_dimensions()=" << reg->unpacked_dimensions() << endl;
}
@@ -272,27 +331,21 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
return 0;
}
// If we find that the matched variable is a packed struct,
// then we can handled it with the net_packed_member_ method.
if (reg->struct_type() && member_path.size() > 0) {
if (reg->struct_type() && !method_name.nil()) {
NetAssign_*lv = new NetAssign_(reg);
elaborate_lval_net_packed_member_(des, use_scope, lv, member_path);
name_component_t tmp_name (method_name);
elaborate_lval_net_packed_member_(des, use_scope, lv, tmp_name);
return lv;
}
// If the variable is a class object, then handle it with the
// net_class_member_ method.
if (reg->class_type() && member_path.size() > 0 && gn_system_verilog()) {
NetAssign_*lv = elaborate_lval_net_class_member_(des, use_scope, reg, member_path);
if (reg->class_type() && !method_name.nil() && gn_system_verilog()) {
NetAssign_*lv = elaborate_lval_net_class_member_(des, use_scope, reg, method_name);
return lv;
}
// Past this point, we should have taken care of the cases
// where the name is a member/method of a struct/class.
// XXXX ivl_assert(*this, method_name.nil());
ivl_assert(*this, member_path.size() == 0);
ivl_assert(*this, method_name.nil());
bool need_const_idx = is_cassign || is_force || (reg->type()==NetNet::UNRESOLVED_WIRE);
@@ -359,7 +412,7 @@ NetAssign_* PEIdent::elaborate_lval_method_class_member_(Design*des,
{
if (!gn_system_verilog())
return 0;
if (scope->parent() == 0 || scope->type() == NetScope::CLASS)
if (scope->parent() == 0)
return 0;
if (path_.size() != 1)
return 0;
@@ -378,7 +431,7 @@ NetAssign_* PEIdent::elaborate_lval_method_class_member_(Design*des,
NetScope*scope_method = find_method_containing_scope(*this, scope);
ivl_assert(*this, scope_method);
NetNet*this_net = scope_method->find_signal(perm_string::literal(THIS_TOKEN));
NetNet*this_net = scope_method->find_signal(perm_string::literal("@"));
if (this_net == 0) {
cerr << get_fileline() << ": internal error: "
<< "Unable to find 'this' port of " << scope_path(scope_method)
@@ -1017,140 +1070,87 @@ bool PEIdent::elaborate_lval_net_idx_(Design*des,
return true;
}
/*
* When the l-value turns out to be a class object, this method is
* called with the bound variable, and the method path. For example,
* if path_=a.b.c and a.b binds to the variable, then sig is b, and
* member_path=c. if path_=obj.base.x, and base_path=obj, then sig is
* obj, and member_path=base.x.
*/
NetAssign_* PEIdent::elaborate_lval_net_class_member_(Design*des, NetScope*scope,
NetNet*sig, pform_name_t member_path) const
NetNet*sig, const perm_string&method_name) const
{
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_class_member_: "
<< "l-value is property " << member_path
cerr << get_fileline() << ": elaborate_lval_net_class_member_: "
<< "l-value is property " << method_name
<< " of " << sig->name() << "." << endl;
}
const netclass_t*class_type = sig->class_type();
ivl_assert(*this, class_type);
// Iterate over the member_path. This handles nested class
// object, by generating nested NetAssign_ object. We start
// with lv==0, so the front of the member_path is the member
// of the outermost class. This generates an lv from sig. Then
// iterate over the remaining of the member_path, replacing
// the outer lv with an lv that nests the lv from the previous
// iteration.
NetAssign_*lv = 0;
do {
// Start with the first component of the member path...
perm_string method_name = peek_head_name(member_path);
// Pull that component from the member_path. We need to
// know the current member being worked on, and will
// need to know if there are more members to be worked on.
name_component_t member_cur = member_path.front();
member_path.pop_front();
/* Make sure the property is really present in the class. If
not, then generate an error message and return an error. */
int pidx = class_type->property_idx_from_name(method_name);
if (pidx < 0) {
cerr << get_fileline() << ": error: Class " << class_type->get_name()
<< " does not have a property " << method_name << "." << endl;
des->errors += 1;
return 0;
}
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_class_member_: "
<< "Processing member_cur=" << member_cur
property_qualifier_t qual = class_type->get_prop_qual(pidx);
if (qual.test_local() && ! class_type->test_scope_is_method(scope)) {
cerr << get_fileline() << ": error: "
<< "Local property " << class_type->get_prop_name(pidx)
<< " is not accessible (l-value) in this context."
<< " (scope=" << scope_path(scope) << ")" << endl;
des->errors += 1;
} else if (qual.test_static()) {
// Special case: this is a static property. Ignore the
// "this" sig and use the property itself, which is not
// part of the sig, as the l-value.
NetNet*psig = class_type->find_static_property(method_name);
ivl_assert(*this, psig);
NetAssign_*lv = new NetAssign_(psig);
return lv;
} else if (qual.test_const()) {
cerr << get_fileline() << ": error: "
<< "Property " << class_type->get_prop_name(pidx)
<< " is constant in this context." << endl;
des->errors += 1;
}
NetAssign_*lv = new NetAssign_(sig);
lv->set_property(method_name);
ivl_type_t ptype = class_type->get_prop_type(pidx);
const netdarray_t*mtype = dynamic_cast<const netdarray_t*> (ptype);
if (mtype) {
const name_component_t&name_tail = path_.back();
if (! name_tail.index.empty()) {
cerr << get_fileline() << ": sorry: "
<< "Array index of array properties not supported."
<< endl;
}
// Make sure the property is really present in the class. If
// not, then generate an error message and return an error.
int pidx = class_type->property_idx_from_name(method_name);
if (pidx < 0) {
cerr << get_fileline() << ": error: Class " << class_type->get_name()
<< " does not have a property " << method_name << "." << endl;
des->errors += 1;
return 0;
}
property_qualifier_t qual = class_type->get_prop_qual(pidx);
if (qual.test_local() && ! class_type->test_scope_is_method(scope)) {
cerr << get_fileline() << ": error: "
<< "Local property " << class_type->get_prop_name(pidx)
<< " is not accessible (l-value) in this context."
<< " (scope=" << scope_path(scope) << ")" << endl;
des->errors += 1;
} else if (qual.test_static()) {
// Special case: this is a static property. Ignore the
// "this" sig and use the property itself, which is not
// part of the sig, as the l-value.
NetNet*psig = class_type->find_static_property(method_name);
ivl_assert(*this, psig);
lv = new NetAssign_(psig);
return lv;
} else if (qual.test_const()) {
cerr << get_fileline() << ": error: "
<< "Property " << class_type->get_prop_name(pidx)
<< " is constant in this context." << endl;
des->errors += 1;
}
lv = lv? new NetAssign_(lv) : new NetAssign_(sig);
lv->set_property(method_name);
// Now get the type of the property.
ivl_type_t ptype = class_type->get_prop_type(pidx);
const netdarray_t*mtype = dynamic_cast<const netdarray_t*> (ptype);
if (mtype) {
if (! member_cur.index.empty()) {
cerr << get_fileline() << ": sorry: "
<< "Array index of array properties not supported."
<< endl;
des->errors += 1;
}
}
// If the current member is a class object, then get the
// type. We may wind up iterating, and need the proper
// class type.
class_type = dynamic_cast<const netclass_t*>(ptype);
} while (member_path.size() > 0);
}
return lv;
}
/*
* This method is caled to handle l-value identifiers that are packed
* structs. The lv is already attached to the variable, so this method
* calculates the part select that is defined by the member_path. For
* example, if the path_ is main.sub.sub_local, and the variable is
* main, then we know at this point that main is a packed struct, and
* lv contains the reference to the bound variable (main). In this
* case member_path==sub.sub_local, and it is up to this method to
* work out the part select that the member_path represents.
*/
bool PEIdent::elaborate_lval_net_packed_member_(Design*des, NetScope*scope,
NetAssign_*lv,
pform_name_t member_path) const
const name_component_t&member_comp) const
{
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "path_=" << path_
<< " member_path=" << member_path
<< endl;
}
const perm_string&member_name = member_comp.name;
NetNet*reg = lv->sig();
ivl_assert(*this, reg);
const netstruct_t*struct_type = reg->struct_type();
ivl_assert(*this, struct_type);
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "Type=" << *struct_type
<< endl;
cerr << get_fileline() << ": debug: elaborate lval packed member: "
<< "path_=" << path_ << endl;
}
if (! struct_type->packed()) {
@@ -1160,302 +1160,99 @@ bool PEIdent::elaborate_lval_net_packed_member_(Design*des, NetScope*scope,
return false;
}
// Looking for the base name. We need that to know about
// indices we may need to apply. This is to handle the case
// that the base is an array of structs, and not just a
// struct.
pform_name_t::const_reverse_iterator name_idx = path_.rbegin();
for (size_t idx = 1 ; idx < member_path.size() ; idx += 1)
++ name_idx;
if (name_idx->name != peek_head_name(member_path)) {
cerr << get_fileline() << ": internal error: "
<< "name_idx=" << name_idx->name
<< ", expecting member_name=" << peek_head_name(member_path)
<< endl;
des->errors += 1;
return false;
}
ivl_assert(*this, name_idx->name == peek_head_name(member_path));
++ name_idx;
const name_component_t&name_base = *name_idx;
// Shouldn't be seeing unpacked arrays of packed structs...
ivl_assert(*this, reg->unpacked_dimensions() == 0);
// These make up the "part" select that is the equivilent of
// following the member path through the nested structs. To
// start with, the off[set] is zero, and use_width is the
// width of the entire variable. The first member_comp is at
// some offset within the variable, and will have a reduced
// width. As we step through the member_path the off
// increases, and use_width shrinks.
unsigned long off = 0;
unsigned long use_width = struct_type->packed_width();
// This is a packed member, so the name is of the form
// "a.b[...].c[...]" which means that the path_ must have at
// least 2 components. We are processing "c[...]" at that
// point (otherwise known as member_name) so we'll save a
// reference to it in name_tail. We are also processing "b[]"
// so save that as name_base.
pform_name_t completed_path;
do {
const name_component_t member_comp = member_path.front();
const perm_string&member_name = member_comp.name;
ivl_assert(*this, path_.size() >= 2);
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "Processing member_comp=" << member_comp
<< " (completed_path=" << completed_path << ")"
<< endl;
}
pform_name_t::const_reverse_iterator name_idx = path_.rbegin();
ivl_assert(*this, name_idx->name == member_name);
const name_component_t&name_tail = *name_idx;
++ name_idx;
const name_component_t&name_base = *name_idx;
// This is a packed member, so the name is of the form
// "a.b[...].c[...]" which means that the path_ must have at
// least 2 components. We are processing "c[...]" at that
// point (otherwise known as member_name) and we have a
// reference to it in member_comp.
// Calculate the offset within the packed structure of the
// member, and any indices. We will add in the offset of the
// struct into the packed array later. Note that this works
// for packed unions as well (although the offset will be 0
// for union members).
unsigned long off;
const netstruct_t::member_t* member = struct_type->packed_member(member_name, off);
// The member_path is the members we want to follow for the
// variable. For example, main[N].a.b may have main[N] as the
// base_name, and member_path=a.b. The member_name is the
// start of the member_path, and is "a". The member_name
// should be a member of the struct_type type.
if (member == 0) {
cerr << get_fileline() << ": error: Member " << member_name
<< " is not a member of variable " << reg->name() << endl;
des->errors += 1;
return false;
}
// Calculate the offset within the packed structure of the
// member, and any indices. We will add in the offset of the
// struct into the packed array later. Note that this works
// for packed unions as well (although the offset will be 0
// for union members).
unsigned long tmp_off;
const netstruct_t::member_t* member = struct_type->packed_member(member_name, tmp_off);
unsigned long use_width = member->net_type->packed_width();
if (member == 0) {
cerr << get_fileline() << ": error: Member " << member_name
<< " is not a member of struct type of "
<< reg->name()
<< "." << completed_path << endl;
des->errors += 1;
return false;
}
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "Member type: " << *(member->net_type)
<< endl;
}
// Get the index component type. At this point, we only
// support bit select or none.
index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
if (!name_tail.index.empty())
use_sel = name_tail.index.back().sel;
off += tmp_off;
ivl_assert(*this, use_width >= (unsigned long)member->net_type->packed_width());
use_width = member->net_type->packed_width();
if (use_sel != index_component_t::SEL_NONE && use_sel != index_component_t::SEL_BIT) {
cerr << get_fileline() << ": sorry: Assignments to part selects of "
"a struct member are not yet supported." << endl;
des->errors += 1;
return false;
}
// At this point, off and use_width are the part select
// expressed by the member_comp, which is a member of the
// struct. We can further refine the part select with any
// indices that might be present.
if (! name_tail.index.empty()) {
// Get the index component type. At this point, we only
// support bit select or none.
index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
if (!member_comp.index.empty())
use_sel = member_comp.index.back().sel;
// If there are index expressions in this l-value
// expression, then the implicit assumption is that the
// member is a vector type with packed dimensions. For
// example, if the l-value expression is "foo.member[1][2]",
// then the member should be something like:
// ... logic [h:l][m:n] foo;
// Get the dimensions from the netvector_t that this implies.
const netvector_t*mem_vec = dynamic_cast<const netvector_t*>(member->net_type);
ivl_assert(*this, mem_vec);
const vector<netrange_t>&mem_packed_dims = mem_vec->packed_dims();
if (use_sel != index_component_t::SEL_NONE
&& use_sel != index_component_t::SEL_BIT
&& use_sel != index_component_t::SEL_PART) {
cerr << get_fileline() << ": sorry: Assignments to part selects of "
"a struct member are not yet supported." << endl;
if (name_tail.index.size() > mem_packed_dims.size()) {
cerr << get_fileline() << ": error: "
<< "Too many index expressions for member." << endl;
des->errors += 1;
return false;
}
if (const netvector_t*mem_vec = dynamic_cast<const netvector_t*>(member->net_type)) {
// If the member type is a netvector_t, then it is a
// vector of atom or scaler objects. For example, if the
// l-value expression is "foo.member[1][2]",
// then the member should be something like:
// ... logic [h:l][m:n] member;
// There should be index expressions index the vector
// down, but there doesn't need to be all of them. We
// can, for example, be selecting a part of the vector.
// Evaluate all but the last index expression, into prefix_indices.
list<long>prefix_indices;
bool rc = evaluate_index_prefix(des, scope, prefix_indices, name_tail.index);
ivl_assert(*this, rc);
// We only need to process this if there are any
// index expressions. If not, then the packed
// vector can be handled atomically.
// In any case, this should be the tail of the
// member_path, because the array element of this
// kind of array cannot be a struct.
if (member_comp.index.size() > 0) {
// These are the dimensions defined by the type
const vector<netrange_t>&mem_packed_dims = mem_vec->packed_dims();
if (member_comp.index.size() > mem_packed_dims.size()) {
cerr << get_fileline() << ": error: "
<< "Too many index expressions for member." << endl;
des->errors += 1;
return false;
}
// Evaluate all but the last index expression, into prefix_indices.
list<long>prefix_indices;
bool rc = evaluate_index_prefix(des, scope, prefix_indices, member_comp.index);
ivl_assert(*this, rc);
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "prefix_indices.size()==" << prefix_indices.size()
<< ", mem_packed_dims.size()==" << mem_packed_dims.size()
<< " (netvector_t context)"
<< endl;
}
long tail_off = 0;
unsigned long tail_wid = 0;
rc = calculate_part(this, des, scope, member_comp.index.back(), tail_off, tail_wid);
ivl_assert(*this, rc);
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "calculate_part for tail returns tail_off=" << tail_off
<< ", tail_wid=" << tail_wid
<< endl;
}
// Now use the prefix_to_slice function to calculate the
// offset and width of the addressed slice of the member.
long loff;
unsigned long lwid;
prefix_to_slice(mem_packed_dims, prefix_indices, tail_off, loff, lwid);
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "Calculate loff=" << loff << " lwid=" << lwid
<< " tail_off=" << tail_off << " tail_wid=" << tail_wid
<< " off=" << off << " use_width=" << use_width
<< endl;
}
off += loff;
use_width = lwid * tail_wid;
}
// The netvector_t only has atom elements, to
// there is no next struct type.
struct_type = 0;
} else if (const netparray_t*array = dynamic_cast<const netparray_t*> (member->net_type)) {
// If the member is a parray, then the elements
// are themselves packed object, including
// possibly a struct. Handle this by taking the
// part select of the current part of the
// variable, then stepping to the element type to
// possibly iterate through more of the member_path.
ivl_assert(*this, array->packed());
ivl_assert(*this, member_comp.index.size() > 0);
// These are the dimensions defined by the type
const vector<netrange_t>&mem_packed_dims = array->static_dimensions();
if (member_comp.index.size() != mem_packed_dims.size()) {
cerr << get_fileline() << ": error: "
<< "Incorrect number of index expressions for member "
<< member_name << "." << endl;
des->errors += 1;
return false;
}
// Evaluate all but the last index expression, into prefix_indices.
list<long>prefix_indices;
bool rc = evaluate_index_prefix(des, scope, prefix_indices, member_comp.index);
ivl_assert(*this, rc);
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "prefix_indices.size()==" << prefix_indices.size()
<< ", mem_packed_dims.size()==" << mem_packed_dims.size()
<< " (netparray_t context)"
<< endl;
}
// Evaluate the last index expression into a constant long.
NetExpr*texpr = elab_and_eval(des, scope, member_comp.index.back().msb, -1, true);
long tmp;
if (texpr == 0 || !eval_as_long(tmp, texpr)) {
cerr << get_fileline() << ": error: "
<< "Array index expressions for member " << member_name
<< " must be constant here." << endl;
des->errors += 1;
return false;
}
delete texpr;
// Now use the prefix_to_slice function to calculate the
// offset and width of the addressed slice of the member.
long loff;
unsigned long lwid;
prefix_to_slice(mem_packed_dims, prefix_indices, tmp, loff, lwid);
ivl_type_t element_type = array->element_type();
long element_width = element_type->packed_width();
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "parray subselection loff=" << loff
<< ", lwid=" << lwid
<< ", element_width=" << element_width
<< endl;
}
// The width and offset calculated from the
// indices is actually in elements, and not
// bits. In fact, in this context, the lwid should
// come down to 1 (one element).
off += loff * element_width;
ivl_assert(*this, lwid==1);
use_width = element_width;
// To move on to the next component in the member
// path, get the element type. For example, for
// the path a.b[1].c, we are processing b[1] here,
// and the element type should be a netstruct_t
// that will wind up containing the member c.
struct_type = dynamic_cast<const netstruct_t*> (element_type);
} else if (const netstruct_t*tmp_struct = dynamic_cast<const netstruct_t*> (member->net_type)) {
// If the member is itself a struct, then get
// ready to go on to the next iteration.
struct_type = tmp_struct;
} else if (const netenum_t*tmp_enum = dynamic_cast<const netenum_t*> (member->net_type)) {
// If the element is an enum, then we don't have
// anything special to do.
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "Tail element is an enum: " << *tmp_enum
<< endl;
}
struct_type = 0;
} else {
// Unknown type?
cerr << get_fileline() << ": internal error: "
<< "Unexpected member type? " << *(member->net_type)
<< endl;
// Evaluate the last index expression into a constant long.
NetExpr*texpr = elab_and_eval(des, scope, name_tail.index.back().msb, -1, true);
long tmp;
if (texpr == 0 || !eval_as_long(tmp, texpr)) {
cerr << get_fileline() << ": error: "
"Array index expressions must be constant here." << endl;
des->errors += 1;
return false;
struct_type = 0;
}
// Complete this component of the path, mark it
// completed, and set up for the next component.
completed_path .push_back(member_comp);
member_path.pop_front();
delete texpr;
} while (member_path.size() > 0 && struct_type != 0);
// Now use the prefix_to_slice function to calculate the
// offset and width of the addressed slice of the member.
long loff;
unsigned long lwid;
prefix_to_slice(mem_packed_dims, prefix_indices, tmp, loff, lwid);
if (debug_elaborate) {
cerr << get_fileline() << ": PEIdent::elaborate_lval_net_packed_member_: "
<< "After processing member_path, "
<< "off=" << off
<< ", use_width=" << use_width
<< ", completed_path=" << completed_path
<< ", member_path=" << member_path
<< endl;
off += loff;
use_width = lwid;
}
// The dimensions in the expression must match the packed
+449 -100
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2017 Stephen Williams (steve@icarus.com)
* Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
@@ -59,11 +59,11 @@ void set_scope_timescale(Design*des, NetScope*scope, PScope*pscope)
{
scope->time_unit(pscope->time_unit);
scope->time_precision(pscope->time_precision);
scope->time_from_timescale(pscope->has_explicit_timescale());
scope->time_from_timescale(pscope->time_from_timescale);
des->set_precision(pscope->time_precision);
}
typedef map<perm_string,LexicalScope::param_expr_t*>::const_iterator mparm_it_t;
typedef map<perm_string,LexicalScope::param_expr_t>::const_iterator mparm_it_t;
static void collect_parm_item_(Design*des, NetScope*scope, perm_string name,
const LexicalScope::param_expr_t&cur,
@@ -110,37 +110,65 @@ static void collect_parm_item_(Design*des, NetScope*scope, perm_string name,
}
static void collect_scope_parameters_(Design*des, NetScope*scope,
const map<perm_string,LexicalScope::param_expr_t*>&parameters)
const map<perm_string,LexicalScope::param_expr_t>&parameters)
{
for (mparm_it_t cur = parameters.begin()
; cur != parameters.end() ; ++ cur ) {
collect_parm_item_(des, scope, cur->first, *(cur->second), false, false);
// A parameter can not have the same name as a genvar.
if (scope->find_genvar((*cur).first)) {
cerr << cur->second.get_fileline()
<< ": error: parameter and genvar in '"
<< scope->fullname() << "' have the same name '"
<< (*cur).first << "'." << endl;
des->errors += 1;
}
collect_parm_item_(des, scope, (*cur).first, (*cur).second, false, false);
}
}
static void collect_scope_localparams_(Design*des, NetScope*scope,
const map<perm_string,LexicalScope::param_expr_t*>&localparams)
const map<perm_string,LexicalScope::param_expr_t>&localparams)
{
for (mparm_it_t cur = localparams.begin()
; cur != localparams.end() ; ++ cur ) {
collect_parm_item_(des, scope, cur->first, *(cur->second), false, true);
// A localparam can not have the same name as a genvar.
if (scope->find_genvar((*cur).first)) {
cerr << cur->second.get_fileline()
<< ": error: localparam and genvar in '"
<< scope->fullname() << "' have the same name '"
<< (*cur).first << "'." << endl;
des->errors += 1;
}
collect_parm_item_(des, scope, (*cur).first, (*cur).second, false, true);
}
}
static void collect_scope_specparams_(Design*des, NetScope*scope,
const map<perm_string,LexicalScope::param_expr_t*>&specparams)
const map<perm_string,LexicalScope::param_expr_t>&specparams)
{
for (mparm_it_t cur = specparams.begin()
; cur != specparams.end() ; ++ cur ) {
collect_parm_item_(des, scope, cur->first, *(cur->second), true, false);
// A specparam can not have the same name as a genvar.
if (scope->find_genvar((*cur).first)) {
cerr << cur->second.get_fileline()
<< ": error: specparam and genvar in '"
<< scope->fullname() << "' have the same name '"
<< (*cur).first << "'." << endl;
des->errors += 1;
}
collect_parm_item_(des, scope, (*cur).first, (*cur).second, true, false);
}
}
/*
* Elaborate the enumeration into the given scope.
* Elaborate the enumeration into the given scope. If scope==0, then
* the enumeration goes into $root instead of a scope.
*/
static void elaborate_scope_enumeration(Design*des, NetScope*scope,
enum_type_t*enum_type)
@@ -165,7 +193,10 @@ static void elaborate_scope_enumeration(Design*des, NetScope*scope,
enum_type);
use_enum->set_line(enum_type->li);
scope->add_enumeration_set(enum_type, use_enum);
if (scope)
scope->add_enumeration_set(enum_type, use_enum);
else
des->add_enumeration_set(enum_type, use_enum);
size_t name_idx = 0;
// Find the enumeration width.
@@ -333,7 +364,10 @@ static void elaborate_scope_enumeration(Design*des, NetScope*scope,
}
rc_flag = use_enum->insert_name(name_idx, cur->name, cur_value);
rc_flag &= scope->add_enumeration_name(use_enum, cur->name);
if (scope)
rc_flag &= scope->add_enumeration_name(use_enum, cur->name);
else
rc_flag &= des->add_enumeration_name(use_enum, cur->name);
if (! rc_flag) {
cerr << use_enum->get_fileline()
@@ -363,6 +397,15 @@ static void elaborate_scope_enumerations(Design*des, NetScope*scope,
}
}
void elaborate_rootscope_enumerations(Design*des)
{
for (set<enum_type_t*>::const_iterator cur = pform_enum_sets.begin()
; cur != pform_enum_sets.end() ; ++ cur) {
enum_type_t*curp = *cur;
elaborate_scope_enumeration(des, 0, curp);
}
}
/*
* If the pclass includes an implicit and explicit constructor, then
* merge the implicit constructor into the explicit constructor as
@@ -453,9 +496,7 @@ static void elaborate_scope_class(Design*des, NetScope*scope, PClass*pclass)
if (debug_scopes) {
cerr << pclass->get_fileline() <<": elaborate_scope_class: "
<< "Elaborate scope class " << pclass->pscope_name()
<< " within scope " << scope_path(scope)
<< endl;
<< "Elaborate scope class " << pclass->pscope_name() << endl;
}
class_type_t*base_class = dynamic_cast<class_type_t*> (use_type->base_type);
@@ -468,7 +509,10 @@ static void elaborate_scope_class(Design*des, NetScope*scope, PClass*pclass)
netclass_t*use_base_class = 0;
if (base_class) {
use_base_class = scope->find_class(base_class->name);
if (scope)
use_base_class = scope->find_class(base_class->name);
if (use_base_class == 0)
use_base_class = des->find_class(base_class->name);
if (use_base_class == 0) {
cerr << pclass->get_fileline() << ": error: "
<< "Base class " << base_class->name
@@ -482,34 +526,22 @@ static void elaborate_scope_class(Design*des, NetScope*scope, PClass*pclass)
ivl_assert(*pclass, use_type->save_elaborated_type == 0);
use_type->save_elaborated_type = use_class;
NetScope*class_scope = new NetScope(scope, hname_t(pclass->pscope_name()),
NetScope::CLASS, scope->unit());
// Class scopes have no parent scope, because references are
// not allowed to escape a class method.
NetScope*class_scope = new NetScope(0, hname_t(pclass->pscope_name()),
NetScope::CLASS);
class_scope->set_line(pclass);
class_scope->set_class_def(use_class);
use_class->set_class_scope(class_scope);
use_class->set_definition_scope(scope);
set_scope_timescale(des, class_scope, pclass);
class_scope->add_typedefs(&pclass->typedefs);
// Elaborate enum types declared in the class. We need these
// now because enumeration constants can be used during scope
// elaboration.
if (debug_scopes) {
cerr << pclass->get_fileline() << ": elaborate_scope_class: "
<< "Elaborate " << pclass->enum_sets.size() << " enumerations"
<< " in class " << scope_path(class_scope)
<< ", scope=" << scope_path(scope) << "."
<< endl;
}
elaborate_scope_enumerations(des, class_scope, pclass->enum_sets);
// Collect the properties, elaborate them, and add them to the
// elaborated class definition.
for (map<perm_string, class_type_t::prop_info_t>::iterator cur = use_type->properties.begin()
; cur != use_type->properties.end() ; ++ cur) {
ivl_type_s*tmp = cur->second.type->elaborate_type(des, class_scope);
ivl_type_s*tmp = cur->second.type->elaborate_type(des, scope);
ivl_assert(*pclass, tmp);
if (debug_scopes) {
cerr << pclass->get_fileline() << ": elaborate_scope_class: "
@@ -528,7 +560,6 @@ static void elaborate_scope_class(Design*des, NetScope*scope, PClass*pclass)
// Task methods are always automatic...
method_scope->is_auto(true);
method_scope->set_line(cur->second);
method_scope->add_imports(&cur->second->explicit_imports);
if (debug_scopes) {
cerr << cur->second->get_fileline() << ": elaborate_scope_class: "
@@ -547,7 +578,6 @@ static void elaborate_scope_class(Design*des, NetScope*scope, PClass*pclass)
// Function methods are always automatic...
method_scope->is_auto(true);
method_scope->set_line(cur->second);
method_scope->add_imports(&cur->second->explicit_imports);
if (debug_scopes) {
cerr << cur->second->get_fileline() << ": elaborate_scope_class: "
@@ -558,7 +588,12 @@ static void elaborate_scope_class(Design*des, NetScope*scope, PClass*pclass)
cur->second->elaborate_scope(des, method_scope);
}
scope->add_class(use_class);
if (scope) {
scope->add_class(use_class);
} else {
des->add_class(use_class, pclass);
}
}
static void elaborate_scope_classes(Design*des, NetScope*scope,
@@ -570,6 +605,14 @@ static void elaborate_scope_classes(Design*des, NetScope*scope,
}
}
void elaborate_rootscope_classes(Design*des)
{
for (size_t idx = 0 ; idx < pform_classes.size() ; idx += 1) {
blend_class_constructors(pform_classes[idx]);
elaborate_scope_class(des, 0, pform_classes[idx]);
}
}
static void replace_scope_parameters_(NetScope*scope, const LineInfo&loc,
const Module::replace_t&replacements)
{
@@ -618,7 +661,11 @@ static void elaborate_scope_task(Design*des, NetScope*scope, PTask*task)
NetScope*task_scope = new NetScope(scope, use_name, NetScope::TASK);
task_scope->is_auto(task->is_auto());
task_scope->set_line(task);
task_scope->add_imports(&task->explicit_imports);
if (scope==0) {
set_scope_timescale(des, task_scope, task);
des->add_root_task(task_scope, task);
}
if (debug_scopes) {
cerr << task->get_fileline() << ": elaborate_scope_task: "
@@ -636,6 +683,39 @@ static void elaborate_scope_tasks(Design*des, NetScope*scope,
for (tasks_it_t cur = tasks.begin()
; cur != tasks.end() ; ++ cur ) {
hname_t use_name( (*cur).first );
// A task can not have the same name as another scope object.
const NetScope *child = scope->child(use_name);
if (child) {
cerr << cur->second->get_fileline() << ": error: task and ";
child->print_type(cerr);
cerr << " in '" << scope->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
continue;
}
// A task can not have the same name as a genvar.
if (scope->find_genvar((*cur).first)) {
cerr << cur->second->get_fileline()
<< ": error: task and genvar in '"
<< scope->fullname() << "' have the same name '"
<< (*cur).first << "'." << endl;
des->errors += 1;
}
// A task can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = scope->get_parameter(des, (*cur).first,
ex_msb, ex_lsb);
if (parm) {
cerr << cur->second->get_fileline()
<< ": error: task and parameter in '"
<< scope->fullname() << "' have the same name '"
<< (*cur).first << "'." << endl;
des->errors += 1;
}
elaborate_scope_task(des, scope, cur->second);
}
@@ -648,7 +728,11 @@ static void elaborate_scope_func(Design*des, NetScope*scope, PFunction*task)
NetScope*task_scope = new NetScope(scope, use_name, NetScope::FUNC);
task_scope->is_auto(task->is_auto());
task_scope->set_line(task);
task_scope->add_imports(&task->explicit_imports);
if (scope==0) {
set_scope_timescale(des, task_scope, task);
des->add_root_task(task_scope, task);
}
if (debug_scopes) {
cerr << task->get_fileline() << ": elaborate_scope_func: "
@@ -666,11 +750,67 @@ static void elaborate_scope_funcs(Design*des, NetScope*scope,
for (funcs_it_t cur = funcs.begin()
; cur != funcs.end() ; ++ cur ) {
hname_t use_name( (*cur).first );
// A function can not have the same name as another scope object.
const NetScope *child = scope->child(use_name);
if (child) {
cerr << cur->second->get_fileline()
<< ": error: function and ";
child->print_type(cerr);
cerr << " in '" << scope->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
continue;
}
// A function can not have the same name as a genvar.
if (scope->find_genvar((*cur).first)) {
cerr << cur->second->get_fileline()
<< ": error: function and genvar in '"
<< scope->fullname() << "' have the same name '"
<< (*cur).first << "'." << endl;
des->errors += 1;
}
// A function can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = scope->get_parameter(des, (*cur).first,
ex_msb, ex_lsb);
if (parm) {
cerr << cur->second->get_fileline()
<< ": error: function and parameter in '"
<< scope->fullname() << "' have the same name '"
<< (*cur).first << "'." << endl;
des->errors += 1;
}
elaborate_scope_func(des, scope, cur->second);
}
}
void elaborate_rootscope_tasks(Design*des)
{
for (map<perm_string,PTaskFunc*>::iterator cur = pform_tasks.begin()
; cur != pform_tasks.end() ; ++ cur) {
if (PTask*task = dynamic_cast<PTask*> (cur->second)) {
elaborate_scope_task(des, 0, task);
continue;
}
if (PFunction*func = dynamic_cast<PFunction*>(cur->second)) {
elaborate_scope_func(des, 0, func);
continue;
}
cerr << cur->second->get_fileline() << ": internal error: "
<< "elaborate_rootscope_tasks does not understand "
<< "this object," << endl;
des->errors += 1;
}
}
class generate_schemes_work_item_t : public elaborator_work_item_t {
public:
generate_schemes_work_item_t(Design*des__, NetScope*scope, Module*mod)
@@ -710,23 +850,12 @@ bool PPackage::elaborate_scope(Design*des, NetScope*scope)
<< "Elaborate package " << scope_path(scope) << "." << endl;
}
scope->add_typedefs(&typedefs);
collect_scope_parameters_(des, scope, parameters);
collect_scope_localparams_(des, scope, localparams);
if (debug_scopes) {
cerr << get_fileline() << ": PPackage::elaborate_scope: "
<< "Elaborate " << enum_sets.size() << " enumerations"
<< " in package scope " << scope_path(scope) << "."
<< endl;
}
elaborate_scope_enumerations(des, scope, enum_sets);
elaborate_scope_classes(des, scope, classes_lexical);
elaborate_scope_funcs(des, scope, funcs);
elaborate_scope_tasks(des, scope, tasks);
elaborate_scope_events_(des, scope, events);
return true;
}
@@ -738,8 +867,6 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
<< "Elaborate " << scope_path(scope) << "." << endl;
}
scope->add_typedefs(&typedefs);
// Add the genvars to the scope.
typedef map<perm_string,LineInfo*>::const_iterator genvar_it_t;
for (genvar_it_t cur = genvars.begin(); cur != genvars.end(); ++ cur ) {
@@ -762,12 +889,6 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
replace_scope_parameters_(scope, *this, replacements);
if (debug_scopes) {
cerr << get_fileline() << ": Module::elaborate_scope: "
<< "Elaborate " << enum_sets.size() << " enumerations"
<< " in scope " << scope_path(scope) << "."
<< endl;
}
elaborate_scope_enumerations(des, scope, enum_sets);
assert(classes.size() == classes_lexical.size());
@@ -899,19 +1020,17 @@ bool PGenerate::generate_scope(Design*des, NetScope*container)
*/
bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
{
if (!local_index) {
// Check that the loop_index variable was declared in a
// genvar statement.
NetScope*cscope = container;
while (cscope && !cscope->find_genvar(loop_index))
cscope = cscope->parent();
if (!cscope) {
cerr << get_fileline() << ": error: genvar is missing for "
"generate \"loop\" variable '" << loop_index << "'."
<< endl;
des->errors += 1;
return false;
}
// Check that the loop_index variable was declared in a
// genvar statement.
NetScope*cscope = container;
while (cscope && !cscope->find_genvar(loop_index))
cscope = cscope->parent();
if (!cscope) {
cerr << get_fileline() << ": error: genvar is missing for "
"generate \"loop\" variable '" << loop_index << "'."
<< endl;
des->errors += 1;
return false;
}
// We're going to need a genvar...
@@ -929,6 +1048,56 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
return false;
}
// Check the generate block name.
// A generate "loop" can not have the same name as another
// scope object. Find any scope with this name, not just an
// exact match scope.
const NetScope *child = container->child_byname(scope_name);
if (child) {
cerr << get_fileline() << ": error: generate \"loop\" and ";
child->print_type(cerr);
cerr << " in '" << container->fullname()
<< "' have the same name '" << scope_name << "'." << endl;
des->errors += 1;
return false;
}
// A generate "loop" can not have the same name as a genvar.
if (container->find_genvar(scope_name)) {
cerr << get_fileline() << ": error: generate \"loop\" and "
"genvar in '" << container->fullname()
<< "' have the same name '" << scope_name << "'." << endl;
des->errors += 1;
}
// A generate "loop" can not have the same name as a named event.
const NetEvent *event = container->find_event(scope_name);
if (event) {
cerr << get_fileline() << ": error: generate \"loop\" and "
"named event in '" << container->fullname()
<< "' have the same name '" << scope_name << "'." << endl;
des->errors += 1;
}
// A generate "loop" can not have the same name as a parameter.
const NetExpr*tmsb;
const NetExpr*tlsb;
const NetExpr*texpr = container->get_parameter(des, scope_name,
tmsb, tlsb);
if (texpr != 0) {
cerr << get_fileline() << ": error: generate \"loop\" and "
"parameter in '" << container->fullname()
<< "' have the same name '" << scope_name << "'." << endl;
des->errors += 1;
}
// These have all been checked so we just need to skip the actual
// generation for these name conflicts. Not skipping these two will
// cause the compiler to have problems (assert, inf. loop, etc.).
if (container->get_parameter(des, loop_index, tmsb, tlsb)) return false;
if (container->find_event(loop_index)) return false;
genvar = init->value().as_long();
delete init_ex;
@@ -959,18 +1128,13 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
NetScope*scope = new NetScope(container, use_name,
NetScope::GENBLOCK);
scope->set_line(get_file(), get_lineno());
scope->add_imports(&explicit_imports);
// Set in the scope a localparam for the value of the
// genvar within this instance of the generate
// block. Code within this scope thus has access to the
// genvar as a constant.
{
verinum genvar_verinum;
if (gn_strict_expr_width_flag)
genvar_verinum = verinum(genvar, integer_width);
else
genvar_verinum = verinum(genvar);
verinum genvar_verinum(genvar);
genvar_verinum.has_sign(true);
NetEConstParam*gp = new NetEConstParam(scope,
loop_index,
@@ -1003,7 +1167,7 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
container->genvar_tmp_val = genvar;
delete step;
delete test_ex;
test_ex = elab_and_eval(des, container, loop_test, -1, true);
test_ex = elab_and_eval(des, container, loop_test, -1);
test = dynamic_cast<NetEConst*>(test_ex);
assert(test);
}
@@ -1040,6 +1204,45 @@ bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else
}
hname_t use_name (scope_name);
// A generate "if" can not have the same name as another scope object.
const NetScope *child = container->child(use_name);
if (child) {
cerr << get_fileline() << ": error: generate \"if\" and ";
child->print_type(cerr);
cerr << " in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
return false;
}
// A generate "if" can not have the same name as a genvar.
if (container->find_genvar(scope_name)) {
cerr << get_fileline() << ": error: generate \"if\" and "
"genvar in '" << container->fullname()
<< "' have the same name '" << scope_name << "'." << endl;
des->errors += 1;
}
// A generate "if" can not have the same name as a named event.
const NetEvent *event = container->find_event(scope_name);
if (event) {
cerr << get_fileline() << ": error: generate \"if\" and "
"named event in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
// A generate "if" can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = container->get_parameter(des, scope_name,
ex_msb, ex_lsb);
if (parm) {
cerr << get_fileline() << ": error: generate \"if\" and "
"parameter in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
if (debug_scopes)
cerr << get_fileline() << ": debug: Generate condition "
<< (else_flag? "(else)" : "(if)")
@@ -1060,7 +1263,6 @@ bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else
// for myself. That is what I will pass to the subscope.
NetScope*scope = new NetScope(container, use_name, NetScope::GENBLOCK);
scope->set_line(get_file(), get_lineno());
scope->add_imports(&explicit_imports);
elaborate_subscope_(des, scope);
@@ -1144,6 +1346,44 @@ bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
// The name of the scope to generate, whatever that item is.
hname_t use_name (item->scope_name);
// A generate "case" can not have the same name as another scope object.
const NetScope *child = container->child(use_name);
if (child) {
cerr << get_fileline() << ": error: generate \"case\" and ";
child->print_type(cerr);
cerr << " in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
return false;
}
// A generate "case" can not have the same name as a genvar.
if (container->find_genvar(item->scope_name)) {
cerr << get_fileline() << ": error: generate \"case\" and "
"genvar in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
// A generate "case" can not have the same name as a named event.
const NetEvent *event = container->find_event(item->scope_name);
if (event) {
cerr << get_fileline() << ": error: generate \"case\" and "
"named event in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
// A generate "case" can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = container->get_parameter(des, item->scope_name,
ex_msb, ex_lsb);
if (parm) {
cerr << get_fileline() << ": error: generate \"case\" and "
"parameter in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
item->probe_for_direct_nesting_();
if (item->direct_nested_) {
@@ -1163,8 +1403,6 @@ bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
NetScope*scope = new NetScope(container, use_name,
NetScope::GENBLOCK);
scope->set_line(get_file(), get_lineno());
scope->add_imports(&explicit_imports);
item->elaborate_subscope_(des, scope);
return true;
@@ -1173,6 +1411,46 @@ bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
bool PGenerate::generate_scope_nblock_(Design*des, NetScope*container)
{
hname_t use_name (scope_name);
// A generate "block" can not have the same name as another scope
// object.
const NetScope *child = container->child(use_name);
if (child) {
cerr << get_fileline() << ": error: generate \"block\" and ";
child->print_type(cerr);
cerr << " in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
return false;
}
// A generate "block" can not have the same name as a genvar.
if (container->find_genvar(scope_name)) {
cerr << get_fileline() << ": error: generate \"block\" and "
"genvar in '" << container->fullname()
<< "' have the same name '" << scope_name << "'." << endl;
des->errors += 1;
}
// A generate "block" can not have the same name as a named event.
const NetEvent *event = container->find_event(scope_name);
if (event) {
cerr << get_fileline() << ": error: generate \"block\" and "
"named event in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
// A generate "block" can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = container->get_parameter(des, scope_name,
ex_msb, ex_lsb);
if (parm) {
cerr << get_fileline() << ": error: generate \"block\" and "
"parameter in '" << container->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
if (debug_scopes)
cerr << get_fileline() << ": debug: Generate named block "
<< ": Generate scope=" << use_name << endl;
@@ -1180,7 +1458,6 @@ bool PGenerate::generate_scope_nblock_(Design*des, NetScope*container)
NetScope*scope = new NetScope(container, use_name,
NetScope::GENBLOCK);
scope->set_line(get_file(), get_lineno());
scope->add_imports(&explicit_imports);
elaborate_subscope_(des, scope);
@@ -1204,8 +1481,6 @@ void PGenerate::elaborate_subscope_direct_(Design*des, NetScope*scope)
void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
{
scope->add_typedefs(&typedefs);
// Add the genvars to this scope.
typedef map<perm_string,LineInfo*>::const_iterator genvar_it_t;
for (genvar_it_t cur = genvars.begin(); cur != genvars.end(); ++ cur ) {
@@ -1314,6 +1589,36 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
// Missing module instance names have already been rejected.
assert(get_name() != "");
// A module instance can not have the same name as another scope object.
const NetScope *child = sc->child(hname_t(get_name()));
if (child) {
cerr << get_fileline() << ": error: module <" << mod->mod_name()
<< "> instance and ";
child->print_type(cerr);
cerr << " in '" << sc->fullname()
<< "' have the same name '" << get_name() << "'." << endl;
des->errors += 1;
return;
}
// A module instance can not have the same name as a genvar.
if (sc->find_genvar(get_name())) {
cerr << get_fileline() << ": error: module <" << mod->mod_name()
<< "> instance and genvar in '" << sc->fullname()
<< "' have the same name '" << get_name() << "'." << endl;
des->errors += 1;
}
// A module instance can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = sc->get_parameter(des, get_name(), ex_msb, ex_lsb);
if (parm) {
cerr << get_fileline() << ": error: module <" << mod->mod_name()
<< "> instance and parameter in '" << sc->fullname()
<< "' have the same name '" << get_name() << "'." << endl;
des->errors += 1;
}
// check for recursive instantiation by scanning the current
// scope and its parents. Look for a module instantiation of
// the same module, but farther up in the scope.
@@ -1421,10 +1726,6 @@ void PGModule::elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*s
<< "." << endl;
}
struct attrib_list_t*attrib_list;
unsigned attrib_list_n = 0;
attrib_list = evaluate_attributes(attributes, attrib_list_n, des, sc);
// Run through the module instances, and make scopes out of
// them. Also do parameter overrides that are done on the
// instantiation line.
@@ -1451,17 +1752,13 @@ void PGModule::elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*s
// Create the new scope as a MODULE with my name. Note
// that if this is a nested module, mark it thus so that
// scope searches will continue into the parent scope.
NetScope*my_scope = new NetScope(sc, use_name, NetScope::MODULE, 0,
NetScope*my_scope = new NetScope(sc, use_name, NetScope::MODULE,
bound_type_? true : false,
mod->program_block,
mod->is_interface);
my_scope->set_line(get_file(), mod->get_file(),
get_lineno(), mod->get_lineno());
my_scope->set_module_name(mod->mod_name());
my_scope->add_imports(&mod->explicit_imports);
for (unsigned adx = 0 ; adx < attrib_list_n ; adx += 1)
my_scope->attribute(attrib_list[adx].key, attrib_list[adx].val);
instances[idx] = my_scope;
@@ -1521,7 +1818,6 @@ void PGModule::elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*s
mod->elaborate_scope(des, my_scope, replace);
}
delete[]attrib_list;
/* Stash the instance array of scopes into the parent
scope. Later elaboration passes will use this vector to
@@ -1540,8 +1836,36 @@ void PGModule::elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*s
* no hierarchy, but neither does the NetEvent, until it is stored in
* the NetScope object.
*/
void PEvent::elaborate_scope(Design*, NetScope*scope) const
void PEvent::elaborate_scope(Design*des, NetScope*scope) const
{
// A named event can not have the same name as another scope object.
const NetScope *child = scope->child(hname_t(name_));
if (child) {
cerr << get_fileline() << ": error: named event and ";
child->print_type(cerr);
cerr << " in '" << scope->fullname()
<< "' have the same name '" << name_ << "'." << endl;
des->errors += 1;
}
// A named event can not have the same name as a genvar.
if (scope->find_genvar(name_)) {
cerr << get_fileline() << ": error: named event and "
<< "genvar in '" << scope->fullname()
<< "' have the same name '" << name_ << "'." << endl;
des->errors += 1;
}
// A named event can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = scope->get_parameter(des, name_, ex_msb, ex_lsb);
if (parm) {
cerr << get_fileline() << ": error: named event and "
<< "parameter in '" << scope->fullname()
<< "' have the same name '" << name_ << "'." << endl;
des->errors += 1;
}
NetEvent*ev = new NetEvent(name_);
ev->set_line(*this);
scope->add_event(ev);
@@ -1559,8 +1883,6 @@ void PFunction::elaborate_scope(Design*des, NetScope*scope) const
// find otherwise.
scope->is_const_func(true);
scope->add_typedefs(&typedefs);
// Scan the parameters in the function, and store the information
// needed to evaluate the parameter expressions.
@@ -1579,8 +1901,6 @@ void PTask::elaborate_scope(Design*des, NetScope*scope) const
{
assert(scope->type() == NetScope::TASK);
scope->add_typedefs(&typedefs);
// Scan the parameters in the task, and store the information
// needed to evaluate the parameter expressions.
@@ -1616,6 +1936,37 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
if (pscope_name() != 0) {
hname_t use_name(pscope_name());
// A named block can not have the same name as another scope
// object.
const NetScope *child = scope->child(use_name);
if (child) {
cerr << get_fileline() << ": error: named block and ";
child->print_type(cerr);
cerr << " in '" << scope->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
return;
}
// A named block can not have the same name as a genvar.
if (scope->find_genvar(pscope_name())) {
cerr << get_fileline() << ": error: named block and "
"genvar in '" << scope->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
// A named block can not have the same name as a parameter.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = scope->get_parameter(des, pscope_name(),
ex_msb, ex_lsb);
if (parm) {
cerr << get_fileline() << ": error: named block and "
"parameter in '" << scope->fullname()
<< "' have the same name '" << use_name << "'." << endl;
des->errors += 1;
}
if (debug_scopes)
cerr << get_fileline() << ": debug: "
<< "Elaborate block scope " << use_name
@@ -1628,8 +1979,6 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
: NetScope::BEGIN_END);
my_scope->set_line(get_file(), get_lineno());
my_scope->is_auto(scope->is_auto());
my_scope->add_imports(&explicit_imports);
my_scope->add_typedefs(&typedefs);
// Scan the parameters in the scope, and store the information
// needed to evaluate the parameter expressions.
+113 -74
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2016 Stephen Williams (steve@icarus.com)
* Copyright CERN 2012 / Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
@@ -47,8 +47,6 @@
using namespace std;
#if 0
/* These functions are not currently used. */
static bool get_const_argument(NetExpr*exp, verinum&res)
{
switch (exp->expr_type()) {
@@ -75,6 +73,8 @@ static bool get_const_argument(NetExpr*exp, verinum&res)
return true;
}
#if 0
/* This function is not currently used. */
static bool get_const_argument(NetExpr*exp, long&res)
{
verinum tmp;
@@ -578,10 +578,10 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
// source code for the definition may be:
// function new(...);
// endfunction
// In this case, the "@" port (THIS_TOKEN) is the synthetic
// "this" argument and we also use it as a return value at
// the same time.
ret_sig = scope->find_signal(perm_string::literal(THIS_TOKEN));
// In this case, the "@" port is the synthetic "this"
// argument and we also use it as a return value at the
// same time.
ret_sig = scope->find_signal(perm_string::literal("@"));
ivl_assert(*this, ret_sig);
if (debug_elaborate)
@@ -876,13 +876,13 @@ static ivl_type_s*elaborate_type(Design*des, NetScope*scope,
return 0;
}
static netparray_t* elaborate_parray_type(Design*des, NetScope*scope, const LineInfo*li,
static netparray_t* elaborate_parray_type(Design*des, NetScope*scope,
parray_type_t*data_type)
{
vector<netrange_t>packed_dimensions;
bool dimensions_ok = evaluate_ranges(des, scope, li, packed_dimensions, * data_type->dims);
ivl_assert(*data_type, dimensions_ok);
bool bad_range = evaluate_ranges(des, scope, packed_dimensions, * data_type->dims);
ivl_assert(*data_type, !bad_range);
ivl_type_s*element_type = elaborate_type(des, scope, data_type->base_type);
@@ -932,35 +932,54 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
wtype = NetNet::WIRE;
is_implicit_scalar = true;
}
// Certain contexts, such as arguments to functions, presume
// "reg" instead of "wire". The parser reports these as
// IMPLICIT_REG. Also, certain cases, such as:
// fun(string arg1) ...
// are implicitly NOT scalar, so detect that case here.
if (wtype == NetNet::IMPLICIT_REG) {
wtype = NetNet::REG;
if (data_type_!=IVL_VT_STRING)
is_implicit_scalar = true;
}
if (debug_elaborate) {
cerr << get_fileline() << ": PWire::elaborate_sig: "
<< "Signal " << basename()
<< ", wtype=" << wtype
<< ", data_type_=" << data_type_
<< ", is_implicit_scalar=" << (is_implicit_scalar?"true":"false")
<< endl;
is_implicit_scalar = true;
}
unsigned wid = 1;
vector<netrange_t>packed_dimensions;
NetScope*base_type_scope = scope;
if (set_data_type_ && !set_data_type_->name.nil())
base_type_scope = scope->find_typedef_scope(des, set_data_type_);
des->errors += error_cnt_;
// A signal can not have the same name as a scope object.
const NetScope *child = scope->child_byname(name_);
if (child) {
cerr << get_fileline() << ": error: signal and ";
child->print_type(cerr);
cerr << " in '" << scope->fullname()
<< "' have the same name '" << name_ << "'." << endl;
des->errors += 1;
}
// A signal can not have the same name as a genvar.
const LineInfo *genvar = scope->find_genvar(name_);
if (genvar) {
cerr << get_fileline() << ": error: signal and genvar in '"
<< scope->fullname() << "' have the same name '" << name_
<< "'." << endl;
des->errors += 1;
}
// A signal can not have the same name as a parameter. Note
// that we treat enumeration literals similar to parameters,
// so if the name matches an enumeration literal, it will be
// caught here.
const NetExpr *ex_msb, *ex_lsb;
const NetExpr *parm = scope->get_parameter(des, name_, ex_msb, ex_lsb);
if (parm) {
cerr << get_fileline() << ": error: signal and parameter in '"
<< scope->fullname() << "' have the same name '" << name_
<< "'." << endl;
des->errors += 1;
}
// A signal can not have the same name as a named event.
const NetEvent *event = scope->find_event(name_);
if (event) {
cerr << get_fileline() << ": error: signal and named event in '"
<< scope->fullname() << "' have the same name '" << name_
<< "'." << endl;
des->errors += 1;
}
if (port_set_ || net_set_) {
if (warn_implicit_dimensions
@@ -979,7 +998,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
<< " inherits dimensions from var/net." << endl;
}
bool dimensions_ok = true;
bool bad_range = false;
vector<netrange_t> plist, nlist;
/* If they exist get the port definition MSB and LSB */
if (port_set_ && !port_.empty()) {
@@ -987,7 +1006,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
cerr << get_fileline() << ": PWire::elaborate_sig: "
<< "Evaluate ranges for port " << basename() << endl;
}
dimensions_ok &= evaluate_ranges(des, scope, this, plist, port_);
bad_range |= evaluate_ranges(des, scope, plist, port_);
nlist = plist;
/* An implicit port can have a range so note that here. */
is_implicit_scalar = false;
@@ -995,13 +1014,13 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
assert(port_set_ || port_.empty());
/* If they exist get the net/etc. definition MSB and LSB */
if (net_set_ && !net_.empty() && dimensions_ok) {
if (net_set_ && !net_.empty() && !bad_range) {
nlist.clear();
if (debug_elaborate) {
cerr << get_fileline() << ": PWire::elaborate_sig: "
<< "Evaluate ranges for net " << basename() << endl;
}
dimensions_ok &= evaluate_ranges(des, base_type_scope, this, nlist, net_);
bad_range |= evaluate_ranges(des, scope, nlist, net_);
}
assert(net_set_ || net_.empty());
@@ -1072,10 +1091,6 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
list<netrange_t>unpacked_dimensions;
netdarray_t*netdarray = 0;
NetScope*array_type_scope = scope;
if (uarray_type_ && !uarray_type_->name.nil())
array_type_scope = scope->find_typedef_scope(des, uarray_type_);
for (list<pform_range_t>::const_iterator cur = unpacked_.begin()
; cur != unpacked_.end() ; ++cur) {
PExpr*use_lidx = cur->first;
@@ -1094,51 +1109,51 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
}
// Special case: Detect the mark for a QUEUE
// declaration, which is the dimensions [null:max_idx].
if (dynamic_cast<PENull*>(use_lidx)) {
// declaration, which is the dimensions [null:<nil>].
if (use_ridx==0 && dynamic_cast<PENull*>(use_lidx)) {
netvector_t*vec = new netvector_t(packed_dimensions, data_type_);
vec->set_signed(get_signed());
packed_dimensions.clear();
ivl_assert(*this, netdarray==0);
long max_idx;
if (use_ridx) {
NetExpr*tmp = elab_and_eval(des, array_type_scope, use_ridx,
-1, true);
NetEConst*cv = dynamic_cast<NetEConst*>(tmp);
if (cv == 0) {
cerr << get_fileline() << ": error: queue '" << name_
<< "' bound must be a constant!" << endl;
des->errors += 1;
max_idx = -1;
} else {
verinum res = cv->value();
if (res.is_defined()) {
max_idx = res.as_long();
if (max_idx < 0) {
cerr << get_fileline() << ": error: queue '"
<< name_ << "' bound must be positive ("
<< max_idx << ")!" << endl;
des->errors += 1;
max_idx = -1;
}
} else {
cerr << get_fileline() << ": error: queue '" << name_
<< "' bound is undefined!" << endl;
des->errors += 1;
max_idx = -1;
}
}
} else max_idx = -1;
netdarray = new netqueue_t(vec, max_idx);
netdarray = new netqueue_t(vec);
continue;
}
// Cannot handle dynamic arrays of arrays yet.
ivl_assert(*this, netdarray==0);
ivl_assert(*this, use_lidx && use_ridx);
NetExpr*lexp = elab_and_eval(des, scope, use_lidx, -1, true);
NetExpr*rexp = elab_and_eval(des, scope, use_ridx, -1, true);
if ((lexp == 0) || (rexp == 0)) {
cerr << get_fileline() << ": internal error: There is "
<< "a problem evaluating indices for ``"
<< name_ << "''." << endl;
des->errors += 1;
return 0;
}
bool const_flag = true;
verinum lval, rval;
const_flag &= get_const_argument(lexp, lval);
const_flag &= get_const_argument(rexp, rval);
delete rexp;
delete lexp;
long index_l, index_r;
evaluate_range(des, array_type_scope, this, *cur, index_l, index_r);
if (! const_flag) {
cerr << get_fileline() << ": error: The indices "
<< "are not constant for array ``"
<< name_ << "''." << endl;
des->errors += 1;
/* Attempt to recover from error, */
index_l = 0;
index_r = 0;
} else {
index_l = lval.as_long();
index_r = rval.as_long();
}
if (abs(index_r - index_l) > warn_dimension_size) {
cerr << get_fileline() << ": warning: Array dimension "
"is greater than " << warn_dimension_size
@@ -1228,7 +1243,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
} else if (enum_type_t*enum_type = dynamic_cast<enum_type_t*>(set_data_type_)) {
list<named_pexpr_t>::const_iterator sample_name = enum_type->names->begin();
const netenum_t*use_enum = base_type_scope->find_enumeration_for_name(des, sample_name->name);
const netenum_t*use_enum = scope->find_enumeration_for_name(sample_name->name);
if (debug_elaborate) {
cerr << get_fileline() << ": debug: Create signal " << wtype
@@ -1261,7 +1276,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
// The trick here is that the parray type has an
// arbitrary sub-type, and not just a scalar bit...
netparray_t*use_type = elaborate_parray_type(des, scope, this, parray_type);
netparray_t*use_type = elaborate_parray_type(des, scope, parray_type);
// Should not be getting packed dimensions other than
// through the parray type declaration.
ivl_assert(*this, packed_dimensions.empty());
@@ -1323,3 +1338,27 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
return sig;
}
void Design::root_elaborate_sig(void)
{
for (map<perm_string,netclass_t*>::const_iterator cur = classes_.begin()
; cur != classes_.end() ; ++ cur) {
netclass_t*cur_class = cur->second;
PClass*cur_pclass = class_to_pclass_[cur_class];
cur_class->elaborate_sig(this, cur_pclass);
}
for (map<NetScope*,PTaskFunc*>::iterator cur = root_tasks_.begin()
; cur != root_tasks_.end() ; ++ cur) {
if (debug_elaborate) {
cerr << cur->second->get_fileline() << ": root_elaborate_sig: "
<< "Elaborate_sig for root task/func " << scope_path(cur->first) << endl;
}
cur->second->elaborate_sig(this, cur->first);
}
}
+14 -19
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2012-2016 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -78,13 +78,9 @@ static void elaborate_array_ranges(Design*des, NetScope*scope,
*/
ivl_type_s* data_type_t::elaborate_type(Design*des, NetScope*scope)
{
// User-defined types must be elaborated in the context
// where they were defined.
if (!name.nil())
scope = scope->find_typedef_scope(des, this);
ivl_assert(*this, scope);
Definitions*use_definitions = scope;
if (use_definitions == 0)
use_definitions = des;
map<Definitions*,ivl_type_s*>::iterator pos = cache_type_elaborate_.lower_bound(use_definitions);
if (pos != cache_type_elaborate_.end() && pos->first == use_definitions)
@@ -151,13 +147,13 @@ ivl_type_s* class_type_t::elaborate_type_raw(Design*, NetScope*) const
* available at the right time. At that time, the netenum_t* object is
* stashed in the scope so that I can retrieve it here.
*/
ivl_type_s* enum_type_t::elaborate_type_raw(Design*, NetScope*scope) const
ivl_type_s* enum_type_t::elaborate_type_raw(Design*des, NetScope*scope) const
{
ivl_assert(*this, scope);
ivl_type_s*tmp = scope->enumeration_for_key(this);
if (tmp == 0 && scope->unit()) {
tmp = scope->unit()->enumeration_for_key(this);
}
if (tmp) return tmp;
tmp = des->enumeration_for_key(this);
return tmp;
}
@@ -220,9 +216,9 @@ netstruct_t* struct_type_t::elaborate_type_raw(Design*des, NetScope*scope) const
// There may be several names that are the same type:
// <data_type> name1, name2, ...;
// Process all the member, and give them a type.
for (list<decl_assignment_t*>::iterator cur_name = curp->names->begin()
; cur_name != curp->names->end() ; ++ cur_name) {
decl_assignment_t*namep = *cur_name;
for (list<decl_assignment_t*>::iterator name = curp->names->begin()
; name != curp->names->end() ; ++ name) {
decl_assignment_t*namep = *name;
netstruct_t::member_t memb;
memb.name = namep->name;
@@ -252,20 +248,19 @@ ivl_type_s* uarray_type_t::elaborate_type_raw(Design*des, NetScope*scope) const
}
// Special case: if the dimension is null:nil. this is a queue.
if (dynamic_cast<PENull*>(cur->first)) {
if (cur->second==0 && dynamic_cast<PENull*>(cur->first)) {
cerr << get_fileline() << ": sorry: "
<< "SV queues inside classes are not yet supported." << endl;
des->errors += 1;
// FIXME: Need to set the max size if cur->second is defined
ivl_type_s*res = new netqueue_t(btype, -1);
ivl_type_s*res = new netqueue_t(btype);
return res;
}
vector<netrange_t> dimensions;
bool dimensions_ok = evaluate_ranges(des, scope, this, dimensions, *dims);
bool bad_range = evaluate_ranges(des, scope, dimensions, *dims);
if (!dimensions_ok) {
if (bad_range) {
cerr << get_fileline() << " : warning: "
<< "Bad dimensions for type here." << endl;
}
+128 -741
View File
File diff suppressed because it is too large Load Diff
+19 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2017 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -123,12 +123,6 @@ bool NetFF::emit_node(struct target_t*tgt) const
return true;
}
bool NetLatch::emit_node(struct target_t*tgt) const
{
tgt->lpm_latch(this);
return true;
}
bool NetLiteral::emit_node(struct target_t*tgt) const
{
return tgt->net_literal(this);
@@ -510,12 +504,24 @@ int Design::emit(struct target_t*tgt) const
if (tgt->start_design(this) == false)
return -2;
for (map<NetScope*,PTaskFunc*>::const_iterator scope = root_tasks_.begin()
; scope != root_tasks_.end() ; ++ scope) {
scope->first->emit_scope(tgt);
}
// enumerate package scopes
for (map<perm_string,NetScope*>::const_iterator scope = packages_.begin()
; scope != packages_.end() ; ++ scope) {
scope->second->emit_scope(tgt);
}
for (map<perm_string,netclass_t*>::const_iterator cur = classes_.begin()
; cur != classes_.end() ; ++cur) {
const NetScope*use_scope = cur->second->class_scope();
cur->second->emit_scope(tgt);
tgt->class_type(use_scope, cur->second);
}
// enumerate root scopes
for (list<NetScope*>::const_iterator scope = root_scopes_.begin()
; scope != root_scopes_.end(); ++ scope ) {
@@ -540,6 +546,12 @@ int Design::emit(struct target_t*tgt) const
// emit task and function definitions
bool tasks_rc = true;
for (map<NetScope*,PTaskFunc*>::const_iterator scope = root_tasks_.begin()
; scope != root_tasks_.end() ; ++ scope)
tasks_rc &= scope->first->emit_defs(tgt);
for (map<perm_string,netclass_t*>::const_iterator cur = classes_.begin()
; cur != classes_.end() ; ++cur)
tasks_rc &= cur->second->emit_defs(tgt);
for (map<perm_string,NetScope*>::const_iterator scope = packages_.begin()
; scope != packages_.end() ; ++ scope )
tasks_rc &= scope->second->emit_defs(tgt);
+159 -292
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2014 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -545,7 +545,7 @@ NetEConst* NetEBComp::eval_eqeq_real_(bool ne_flag, const NetExpr*le, const NetE
bool flag = get_real_arguments(le, re, lval, rval);
if (! flag) return 0;
verinum result(((lval == rval) != ne_flag) ?
verinum result(((lval == rval) ^ ne_flag) ?
verinum::V1 : verinum::V0, 1);
NetEConst*res = new NetEConst(result);
ivl_assert(*this, res);
@@ -570,11 +570,11 @@ NetEConst* NetEBComp::eval_eqeq_(bool ne_flag, const NetExpr*le, const NetExpr*r
const verinum::V ne_res = ne_flag? verinum::V1 : verinum::V0;
verinum::V res = eq_res;
unsigned top = lv.len();
if (rv.len() < top)
top = rv.len();
// The two expressions should already be padded to the same size.
ivl_assert(*this, lv.len() == rv.len());
for (unsigned idx = 0 ; idx < lv.len() ; idx += 1) {
for (unsigned idx = 0 ; idx < top ; idx += 1) {
bool x_bit_present = false;
@@ -611,6 +611,60 @@ NetEConst* NetEBComp::eval_eqeq_(bool ne_flag, const NetExpr*le, const NetExpr*r
}
}
if (res != verinum::Vx) {
verinum::V lpad = verinum::V0;
verinum::V rpad = verinum::V0;
if (lv.has_sign() && lv.get(lv.len()-1) == verinum::V1)
lpad = verinum::V1;
if (rv.has_sign() && rv.get(rv.len()-1) == verinum::V1)
rpad = verinum::V1;
for (unsigned idx = top ; idx < lv.len() ; idx += 1)
switch (lv.get(idx)) {
case verinum::Vx:
case verinum::Vz:
res = verinum::Vx;
break;
case verinum::V0:
if (res != verinum::Vx && rpad != verinum::V0)
res = ne_res;
break;
case verinum::V1:
if (res != verinum::Vx && rpad != verinum::V1)
res = ne_res;
break;
default:
break;
}
for (unsigned idx = top ; idx < rv.len() ; idx += 1)
switch (rv.get(idx)) {
case verinum::Vx:
case verinum::Vz:
res = verinum::Vx;
break;
case verinum::V0:
if (res != verinum::Vx && lpad != verinum::V0)
res = ne_res;
break;
case verinum::V1:
if (res != verinum::Vx && lpad != verinum::V1)
res = ne_res;
break;
default:
break;
}
}
NetEConst*result = new NetEConst(verinum(res, 1));
ivl_assert(*this, result);
return result;
@@ -627,15 +681,46 @@ NetEConst* NetEBComp::eval_eqeqeq_(bool ne_flag, const NetExpr*le, const NetExpr
verinum::V res = verinum::V1;
// The two expressions should already be padded to the same size.
ivl_assert(*this, lv.len() == rv.len());
// Find the smallest argument length.
unsigned cnt = lv.len();
if (cnt > rv.len()) cnt = rv.len();
for (unsigned idx = 0 ; idx < lv.len() ; idx += 1)
// Check the common bits.
for (unsigned idx = 0 ; idx < cnt ; idx += 1)
if (lv.get(idx) != rv.get(idx)) {
res = verinum::V0;
break;
}
bool is_signed = lv.has_sign() && rv.has_sign();
// If the left value is longer check it against the pad bit.
if (res == verinum::V1) {
verinum::V pad = verinum::V0;
if (is_signed)
pad = rv.get(rv.len()-1);
for (unsigned idx = cnt ; idx < lv.len() ; idx += 1)
if (lv.get(idx) != pad) {
res = verinum::V0;
break;
}
}
// If the right value is longer check it against the pad bit.
if (res == verinum::V1) {
verinum::V pad = verinum::V0;
if (is_signed)
pad = lv.get(lv.len()-1);
for (unsigned idx = cnt ; idx < rv.len() ; idx += 1) {
if (rv.get(idx) != pad) {
res = verinum::V0;
break;
}
}
}
if (ne_flag) {
if (res == verinum::V0) res = verinum::V1;
else res = verinum::V0;
@@ -646,55 +731,6 @@ NetEConst* NetEBComp::eval_eqeqeq_(bool ne_flag, const NetExpr*le, const NetExpr
return result;
}
NetEConst* NetEBComp::eval_weqeq_(bool ne_flag, const NetExpr*le, const NetExpr*re) const
{
const NetEConst*lc = dynamic_cast<const NetEConst*>(le);
const NetEConst*rc = dynamic_cast<const NetEConst*>(re);
if (lc == 0 || rc == 0) return 0;
const verinum&lv = lc->value();
const verinum&rv = rc->value();
const verinum::V eq_res = ne_flag ? verinum::V0 : verinum::V1;
const verinum::V ne_res = ne_flag ? verinum::V1 : verinum::V0;
verinum::V res = eq_res;
// The two expressions should already be padded to the same size.
ivl_assert(*this, lv.len() == rv.len());
for (unsigned idx = 0 ; idx < lv.len() ; idx += 1) {
// An X or Z in the R-value matches any L-value.
switch (rv.get(idx)) {
case verinum::Vx:
case verinum::Vz:
continue;
default:
break;
}
// An X or Z in the L-value that is not matches by an R-value X/Z returns undefined.
switch (lv.get(idx)) {
case verinum::Vx:
case verinum::Vz:
res = verinum::Vx;
continue;
default:
break;
}
// A hard (0/1) mismatch gives a not-equal result.
if (rv.get(idx) != lv.get(idx)) {
res = ne_res;
break;
}
}
NetEConst*result = new NetEConst(verinum(res, 1));
ivl_assert(*this, result);
return result;
}
NetEConst* NetEBComp::eval_arguments_(const NetExpr*l, const NetExpr*r) const
{
NetEConst*res = 0;
@@ -708,10 +744,6 @@ NetEConst* NetEBComp::eval_arguments_(const NetExpr*l, const NetExpr*r) const
res = eval_eqeq_(false, l, r);
break;
case 'w': // Wild equality (==?)
res = eval_weqeq_(false, l, r);
break;
case 'G': // >=
res = eval_gteq_(l, r);
break;
@@ -728,10 +760,6 @@ NetEConst* NetEBComp::eval_arguments_(const NetExpr*l, const NetExpr*r) const
res = eval_eqeq_(true, l, r);
break;
case 'W': // Wild not-equal (!=?)
res = eval_weqeq_(true, l, r);
break;
case '<': // Less than
res = eval_less_(l, r);
break;
@@ -808,10 +836,44 @@ NetExpr* NetEBDiv::eval_arguments_(const NetExpr*l, const NetExpr*r) const
return tmp;
}
NetEConst* NetEBLogic::eval_tree_real_(const NetExpr*l, const NetExpr*r) const
{
double lval;
double rval;
bool flag = get_real_arguments(l, r, lval, rval);
if (! flag) return 0;
verinum::V res;
switch (op_) {
case 'a': // Logical AND (&&)
if ((lval != 0.0) && (rval != 0.0))
res = verinum::V1;
else
res = verinum::V0;
break;
case 'o': // Logical OR (||)
if ((lval != 0.0) || (rval != 0.0))
res = verinum::V1;
else
res = verinum::V0;
break;
default:
return 0;
}
NetEConst*tmp = new NetEConst(verinum(res, 1));
ivl_assert(*this, tmp);
eval_debug(this, tmp, true);
return tmp;
}
NetEConst* NetEBLogic::eval_arguments_(const NetExpr*l, const NetExpr*r) const
{
// NetEBLogic arguments should have already been reduced so real is not possible.
ivl_assert(*this, (l->expr_type() != IVL_VT_REAL) && (r->expr_type() != IVL_VT_REAL));
if (l->expr_type() == IVL_VT_REAL || r->expr_type() == IVL_VT_REAL)
return eval_tree_real_(l,r);
assert(expr_type() == IVL_VT_LOGIC);
const NetEConst*lc = dynamic_cast<const NetEConst*>(l);
@@ -844,39 +906,25 @@ NetEConst* NetEBLogic::eval_arguments_(const NetExpr*l, const NetExpr*r) const
case 'a': // Logical AND (&&)
if ((lv == verinum::V0) || (rv == verinum::V0))
res = verinum::V0;
else if ((lv == verinum::V1) && (rv == verinum::V1))
res = verinum::V1;
else
res = verinum::Vx;
break;
case 'o': // Logical OR (||)
if ((lv == verinum::V1) || (rv == verinum::V1))
res = verinum::V1;
else if ((lv == verinum::V0) && (rv == verinum::V0))
res = verinum::V0;
else
res = verinum::Vx;
break;
case 'q': // Logical implication (->)
if ((lv == verinum::V0) || (rv == verinum::V1))
res = verinum::V1;
else if ((lv == verinum::V1) && (rv == verinum::V0))
res = verinum::V0;
else
res = verinum::Vx;
break;
case 'Q': // Logical equivalence (<->)
if (((lv == verinum::V0) && (rv == verinum::V0)) ||
((lv == verinum::V1) && (rv == verinum::V1)))
res = verinum::V1;
else if (((lv == verinum::V0) && (rv == verinum::V1)) ||
((lv == verinum::V1) && (rv == verinum::V0)))
res = verinum::V0;
else
res = verinum::Vx;
break;
default:
@@ -1893,111 +1941,15 @@ NetExpr* NetESFunc::evaluate_min_max_(ID id, const NetExpr*arg0_,
return res;
}
static void no_string_arg(const NetESFunc*info, unsigned arg_num)
NetEConst* NetESFunc::evaluate_countbits_(const NetExpr* /*arg0*/,
const NetExpr* /*arg1*/) const
{
cerr << info->get_fileline() << ": error: constant function "
<< info->name() << "() does not support a string argument ("
<< arg_num+1 << ")." << endl;
return 0;
}
NetEConst* NetESFunc::evaluate_countbits_() const
NetEConst* NetESFunc::evaluate_countones_(const NetExpr* /*arg*/) const
{
const NetEConst*tmpi = dynamic_cast<const NetEConst*>(parms_[0]);
NetEConst*res = 0;
if (tmpi) {
verinum value = tmpi->value();
if (value.is_string()) {
no_string_arg(this, 0);
return 0;
}
/* Find which values need to be counted. */
bool count_0 = false;
bool count_1 = false;
bool count_z = false;
bool count_x = false;
for (unsigned arg=1; arg < parms_.size(); ++arg) {
const NetEConst*argi = dynamic_cast<const NetEConst*>(parms_[arg]);
if (! argi) return 0;
verinum check_for = argi->value();
if (check_for.is_string()) {
no_string_arg(this, arg);
return 0;
}
switch (check_for[0]) {
case verinum::V0:
count_0 = true;
break;
case verinum::V1:
count_1 = true;
break;
case verinum::Vz:
count_z = true;
break;
case verinum::Vx:
count_x = true;
break;
}
}
/* Search each bit of the vector looking for the values to
* be counted. */
int count = 0;
for (unsigned bit=0; bit < value.len(); ++bit) {
switch (value[bit]) {
case verinum::V0:
if (count_0) ++count;
break;
case verinum::V1:
if (count_1) ++count;
break;
case verinum::Vz:
if (count_z) ++count;
break;
case verinum::Vx:
if (count_x) ++count;
break;
}
}
verinum tmp (count, integer_width);
tmp.has_sign(true);
res = new NetEConst(tmp);
ivl_assert(*this, res);
}
return res;
}
NetEConst* NetESFunc::evaluate_countones_(const NetExpr* arg) const
{
const NetEConst*tmpi = dynamic_cast<const NetEConst*>(arg);
NetEConst*res = 0;
if (tmpi) {
verinum value = tmpi->value();
int count = 0;
if (value.is_string()) {
no_string_arg(this, 0);
return 0;
}
for (unsigned bit=0; bit < value.len(); ++bit) {
if (value[bit] == verinum::V1) ++count;
}
verinum tmp (count, integer_width);
tmp.has_sign(true);
res = new NetEConst(tmp);
ivl_assert(*this, res);
}
return res;
return 0;
}
/* Get the total number of dimensions for the given expression. */
@@ -2020,92 +1972,19 @@ NetEConst* NetESFunc::evaluate_dimensions_(const NetExpr*arg) const
return new NetEConst(verinum(verinum(res), integer_width));
}
NetEConst* NetESFunc::evaluate_isunknown_(const NetExpr* arg) const
NetEConst* NetESFunc::evaluate_isunknown_(const NetExpr* /*arg*/) const
{
const NetEConst*tmpi = dynamic_cast<const NetEConst*>(arg);
NetEConst*res = 0;
if (tmpi) {
verinum value = tmpi->value();
unsigned is_unknown = 1;
if (value.is_string()) {
no_string_arg(this, 0);
return 0;
}
if (value.is_defined()) is_unknown = 0;
verinum tmp (is_unknown, 1U);
tmp.has_sign(false);
res = new NetEConst(tmp);
ivl_assert(*this, res);
}
return res;
return 0;
}
static bool is_onehot(verinum&value, bool zero_is_okay)
NetEConst* NetESFunc::evaluate_onehot_(const NetExpr* /*arg*/) const
{
bool found_a_one = false;
for (unsigned bit=0; bit < value.len(); ++bit) {
if (value[bit] == verinum::V1) {
if (found_a_one) return false;
found_a_one = true;
}
}
/* If no one bit was found return true if zero is okay. */
if (zero_is_okay) found_a_one = true;
return found_a_one;
return 0;
}
NetEConst* NetESFunc::evaluate_onehot_(const NetExpr* arg) const
NetEConst* NetESFunc::evaluate_onehot0_(const NetExpr* /*arg*/) const
{
const NetEConst*tmpi = dynamic_cast<const NetEConst*>(arg);
NetEConst*res = 0;
if (tmpi) {
verinum value = tmpi->value();
if (value.is_string()) {
no_string_arg(this, 0);
return 0;
}
verinum tmp (is_onehot(value, false), 1U);
tmp.has_sign(false);
res = new NetEConst(tmp);
ivl_assert(*this, res);
}
return res;
}
NetEConst* NetESFunc::evaluate_onehot0_(const NetExpr* arg) const
{
const NetEConst*tmpi = dynamic_cast<const NetEConst*>(arg);
NetEConst*res = 0;
if (tmpi) {
verinum value = tmpi->value();
if (value.is_string()) {
no_string_arg(this, 0);
return 0;
}
verinum tmp (is_onehot(value, true), 1U);
tmp.has_sign(false);
res = new NetEConst(tmp);
ivl_assert(*this, res);
}
return res;
return 0;
}
/* Get the number of unpacked dimensions for the given expression. */
@@ -2277,7 +2156,7 @@ NetExpr* NetESFunc::evaluate_two_arg_(ID id, const NetExpr*arg0,
{
switch (id) {
case CTBITS:
return evaluate_countbits_();
return evaluate_countbits_(arg0, arg1);
/* The array functions are handled together. */
case HIGH:
case INCR:
@@ -2348,12 +2227,12 @@ NetESFunc::ID NetESFunc::built_in_id_() const
built_in_func["$unpacked_dimensions" ] = UPDIMS;
}
/* This is available in 1800-2009 and later. */
/* These are available in 1800-2009 and later. */
if (funcs_need_init && (generation_flag >= GN_VER2009)) {
built_in_func["$countones" ] = CTONES;
}
/* This is available in 1800-2012 and later. */
/* These are available in 1800-2012 and later. */
if (funcs_need_init && (generation_flag >= GN_VER2012)) {
built_in_func["$countbits" ] = CTBITS;
}
@@ -2380,11 +2259,7 @@ NetESFunc::ID NetESFunc::built_in_id_() const
NetExpr* NetESFunc::eval_tree()
{
/* We don't support evaluating overridden functions. */
if (is_overridden_)
return 0;
/* Get the ID for this system function if it can be used as a
/* Get the ID for this system function if it is can be used as a
* constant function. */
ID id = built_in_id_();
if (id == NOT_BUILT_IN) return 0;
@@ -2392,9 +2267,8 @@ NetExpr* NetESFunc::eval_tree()
switch (parms_.size()) {
case 1:
if (! takes_nargs_(id, 1)) {
cerr << get_fileline() << ": error: constant function "
<< name_ << "() does not support a single argument."
<< endl;
cerr << get_fileline() << ": error: " << name_
<< "() does not support a single argument." << endl;
return 0;
}
eval_expr(parms_[0]);
@@ -2402,9 +2276,8 @@ NetExpr* NetESFunc::eval_tree()
case 2:
if (! takes_nargs_(id, 2)) {
cerr << get_fileline() << ": error: constant function "
<< name_ << "() does not support two arguments."
<< endl;
cerr << get_fileline() << ": error: " << name_
<< "() does not support two arguments." << endl;
return 0;
}
eval_expr(parms_[0]);
@@ -2414,21 +2287,15 @@ NetExpr* NetESFunc::eval_tree()
default:
/* Check to see if the function was called correctly. */
if (! takes_nargs_(id, parms_.size())) {
cerr << get_fileline() << ": error: constant function "
<< name_ << "() does not support " << parms_.size()
cerr << get_fileline() << ": error: " << name_
<< "() does not support " << parms_.size()
<< " arguments." << endl;
return 0;
}
if (id == CTBITS) {
for (unsigned bit = 0; bit < parms_.size(); ++bit) {
eval_expr(parms_[bit]);
}
return evaluate_countbits_();
} else {
cerr << get_fileline() << ": sorry: constant functions with "
<< parms_.size() << " arguments are not supported: "
<< name_ << "()." << endl;
}
// HERE: Need to add support for a multi argument $countbits().
cerr << get_fileline() << ": sorry: functions with "
<< parms_.size() << " arguments are not supported: "
<< name_ << "()." << endl;
return 0;
}
}
-128
View File
@@ -1,128 +0,0 @@
/*
* Copyright (c) 2016 Martin Whitaker (icarus@martin-whitaker.me.uk)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
# include "config.h"
# include <cstdlib>
# include <sstream>
# include "netlist.h"
# include "functor.h"
# include "compiler.h"
# include "ivl_assert.h"
/*
* The exposenodes functor is primarily provided for use by the vlog95
* target. To implement some LPM objects, it needs to take a bit or part
* of one of the LPM inputs. If that input is not connected to a real
* net in the design, we need to create a net at that point so that
* there is something to which we can apply a bit or part select. This
* has the effect of splitting the synthesised structure at that point.
* Rather than creating a new net, we just look for a temporary net
* created by the synthesis process (there should be at least one) and
* reset its "local" flag. We also prepend another '_' to the synthetic
* name to avoid name collisions when we recompile the vlog95 output
* (because NetScope::local_symbol() doesn't actually check that the
* name it generates is unique).
*/
struct exposenodes_functor : public functor_t {
unsigned count;
virtual void lpm_mux(Design*des, NetMux*obj);
virtual void lpm_part_select(Design*des, NetPartSelect*obj);
virtual void lpm_substitute(Design*des, NetSubstitute*obj);
};
static bool expose_nexus(Nexus*nex)
{
NetNet*sig = 0;
for (Link*cur = nex->first_nlink() ; cur ; cur = cur->next_nlink()) {
// Don't expose nodes that are attached to constants
if (dynamic_cast<NetConst*> (cur->get_obj()))
return false;
if (dynamic_cast<NetLiteral*> (cur->get_obj()))
return false;
NetNet*cur_sig = dynamic_cast<NetNet*> (cur->get_obj());
if (cur_sig == 0)
continue;
if (!cur_sig->local_flag())
return false;
sig = cur_sig;
}
assert(sig);
ostringstream res;
res << "_" << sig->name();
sig->rename(lex_strings.make(res.str()));
sig->local_flag(false);
return true;
}
/*
* The vlog95 target implements a wide mux as a hierarchy of 2:1 muxes,
* picking off one bit of the select input at each level of the hierarchy.
*/
void exposenodes_functor::lpm_mux(Design*, NetMux*obj)
{
if (obj->sel_width() == 1)
return;
if (expose_nexus(obj->pin_Sel().nexus()))
count += 1;
}
/*
* A VP part select is going to select a part from its input.
*/
void exposenodes_functor::lpm_part_select(Design*, NetPartSelect*obj)
{
if (obj->dir() != NetPartSelect::VP)
return;
if (expose_nexus(obj->pin(1).nexus()))
count += 1;
}
/*
* A substitute is going to select one or two parts from the wider input signal.
*/
void exposenodes_functor::lpm_substitute(Design*, NetSubstitute*obj)
{
if (expose_nexus(obj->pin(1).nexus()))
count += 1;
}
void exposenodes(Design*des)
{
exposenodes_functor exposenodes;
exposenodes.count = 0;
if (verbose_flag) {
cout << " ... Look for intermediate nodes" << endl << flush;
}
des->functor(&exposenodes);
if (verbose_flag) {
cout << " ... Exposed " << exposenodes.count
<< " intermediate signals." << endl << flush;
}
}
+19 -50
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2018 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -274,18 +274,7 @@ NetNet* NetEBComp::synthesize(Design*des, NetScope*scope, NetExpr*root)
if (op_ == 'E' || op_ == 'N') {
NetCaseCmp*gate = new NetCaseCmp(scope, scope->local_symbol(),
width, op_=='E' ? NetCaseCmp::EEQ : NetCaseCmp::NEQ);
gate->set_line(*this);
connect(gate->pin(0), osig->pin(0));
connect(gate->pin(1), lsig->pin(0));
connect(gate->pin(2), rsig->pin(0));
des->add_node(gate);
return osig;
}
if (op_ == 'w' || op_ == 'W') {
NetCaseCmp*gate = new NetCaseCmp(scope, scope->local_symbol(),
width, op_=='w' ? NetCaseCmp::WEQ : NetCaseCmp::WNE);
width, op_=='E'?NetCaseCmp::EEQ:NetCaseCmp::NEQ);
gate->set_line(*this);
connect(gate->pin(0), osig->pin(0));
connect(gate->pin(1), lsig->pin(0));
@@ -545,40 +534,27 @@ NetNet* NetEBLogic::synthesize(Design*des, NetScope*scope, NetExpr*root)
return 0;
}
NetLogic*olog;
perm_string oname = scope->local_symbol();
/* Create the logic OR/AND gate. This has a single bit output,
* with single bit inputs for the two operands. */
switch (op()) {
case 'a':
olog = new NetLogic(scope, oname, 3, NetLogic::AND, 1, true);
break;
case 'o':
olog = new NetLogic(scope, oname, 3, NetLogic::OR, 1, true);
break;
case 'q':
olog = new NetLogic(scope, oname, 3, NetLogic::IMPL, 1, true);
break;
case 'Q':
olog = new NetLogic(scope, oname, 3, NetLogic::EQUIV, 1, true);
break;
default:
cerr << get_fileline() << ": sorry: "
<< human_readable_op(op_)
<< " is not currently supported." << endl;
des->errors += 1;
return 0;
}
olog->set_line(*this);
des->add_node(olog);
netvector_t*osig_tmp = new netvector_t(expr_type());
NetNet*osig = new NetNet(scope, scope->local_symbol(),
NetNet::IMPLICIT, osig_tmp);
osig->set_line(*this);
osig->local_flag(true);
NetLogic*olog;
perm_string oname = scope->local_symbol();
/* Create the logic OR/AND gate. This has a single bit output,
* with single bit inputs for the two operands. */
if (op() == 'o') {
olog = new NetLogic(scope, oname, 3, NetLogic::OR, 1, true);
} else {
assert(op() == 'a');
olog = new NetLogic(scope, oname, 3, NetLogic::AND, 1, true);
}
olog->set_line(*this);
des->add_node(olog);
connect(osig->pin(0), olog->pin(0));
/* The left and right operands have already been reduced to a
@@ -760,18 +736,12 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope, NetExpr*root)
}
}
if (flag == false) {
delete[]tmp;
return 0;
}
if (flag == false) return 0;
ivl_assert(*this, data_type != IVL_VT_NO_TYPE);
/* If this is a replication of zero just return 0. */
if (expr_width() == 0) {
delete[]tmp;
return 0;
}
if (expr_width() == 0) return 0;
/* Make a NetNet object to carry the output vector. */
perm_string path = scope->local_symbol();
@@ -1374,7 +1344,6 @@ static NetEvWait* make_func_trigger(Design*des, NetScope*scope, NetExpr*root)
if (nset && (nset->size() > 0)) {
NetEvent*ev = new NetEvent(scope->local_symbol());
ev->set_line(*root);
ev->local_flag(true);
NetEvProbe*pr = new NetEvProbe(scope, scope->local_symbol(),
ev, NetEvProbe::ANYEDGE,
+1 -19
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2016 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2012 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -78,10 +78,6 @@ void functor_t::lpm_ff(Design*, NetFF*)
{
}
void functor_t::lpm_latch(Design*, NetLatch*)
{
}
void functor_t::lpm_logic(Design*, NetLogic*)
{
}
@@ -106,10 +102,6 @@ void functor_t::sign_extend(Design*, NetSignExtend*)
{
}
void functor_t::lpm_substitute(Design*, NetSubstitute*)
{
}
void functor_t::lpm_ureduce(Design*, NetUReduce*)
{
}
@@ -223,11 +215,6 @@ void NetFF::functor_node(Design*des, functor_t*fun)
fun->lpm_ff(des, this);
}
void NetLatch::functor_node(Design*des, functor_t*fun)
{
fun->lpm_latch(des, this);
}
void NetLiteral::functor_node(Design*des, functor_t*fun)
{
fun->lpm_literal(des, this);
@@ -268,11 +255,6 @@ void NetSignExtend::functor_node(Design*des, functor_t*fun)
fun->sign_extend(des, this);
}
void NetSubstitute::functor_node(Design*des, functor_t*fun)
{
fun->lpm_substitute(des, this);
}
void NetUReduce::functor_node(Design*des, functor_t*fun)
{
fun->lpm_ureduce(des, this);
+1 -7
View File
@@ -1,7 +1,7 @@
#ifndef IVL_functor_H
#define IVL_functor_H
/*
* Copyright (c) 1999-2016 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2014 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -75,9 +75,6 @@ struct functor_t {
/* This method is called for each FF in the design. */
virtual void lpm_ff(class Design*des, class NetFF*);
/* This method is called for each LATCH in the design. */
virtual void lpm_latch(class Design*des, class NetLatch*);
/* Handle LPM combinational logic devices. */
virtual void lpm_logic(class Design*des, class NetLogic*);
@@ -92,9 +89,6 @@ struct functor_t {
/* This method is called for each power. */
virtual void lpm_pow(class Design*des, class NetPow*);
/* This method is called for each part substitute. */
virtual void lpm_substitute(class Design*des, class NetSubstitute*);
/* This method is called for each unary reduction gate. */
virtual void lpm_ureduce(class Design*des, class NetUReduce*);
-5
View File
@@ -96,11 +96,6 @@ do
exit;
;;
--ccflags)
echo "$CXXFLAGS"
exit;
;;
--ldflags)
echo "$LDFLAGS"
exit;
-6
View File
@@ -181,7 +181,6 @@ ivl_parameter_width
ivl_path_condit
ivl_path_delay
ivl_path_is_condit
ivl_path_is_parallel
ivl_path_scope
ivl_path_source
ivl_path_source_negedge
@@ -212,9 +211,6 @@ ivl_scope_enumerates
ivl_scope_event
ivl_scope_events
ivl_scope_file
ivl_scope_func_type
ivl_scope_func_signed
ivl_scope_func_width
ivl_scope_is_auto
ivl_scope_is_cell
ivl_scope_lineno
@@ -281,7 +277,6 @@ ivl_stmt_block_stmt
ivl_stmt_call
ivl_stmt_case_count
ivl_stmt_case_expr
ivl_stmt_case_quality
ivl_stmt_case_stmt
ivl_stmt_cond_expr
ivl_stmt_cond_false
@@ -296,7 +291,6 @@ ivl_stmt_lval
ivl_stmt_lvals
ivl_stmt_lwidth
ivl_stmt_name
ivl_stmt_needs_t0_trigger
ivl_stmt_nevent
ivl_stmt_opcode
ivl_stmt_parm
+12 -52
View File
@@ -1,7 +1,7 @@
#ifndef IVL_ivl_target_H
#define IVL_ivl_target_H
/*
* Copyright (c) 2000-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2015 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -265,8 +265,6 @@ typedef enum ivl_logic_e {
IVL_LO_BUFT = 24, /* transparent bufz. (NOT "tri-state") */
IVL_LO_BUFZ = 5,
IVL_LO_CMOS = 22,
IVL_LO_EQUIV = 25,
IVL_LO_IMPL = 26,
IVL_LO_NAND = 6,
IVL_LO_NMOS = 7,
IVL_LO_NOR = 8,
@@ -282,6 +280,7 @@ typedef enum ivl_logic_e {
IVL_LO_RPMOS = 16,
IVL_LO_XNOR = 18,
IVL_LO_XOR = 19,
IVL_LO_UDP = 21
} ivl_logic_t;
@@ -307,10 +306,8 @@ typedef enum ivl_lpm_type_e {
IVL_LPM_CONCAT = 16,
IVL_LPM_CONCATZ = 36, /* Transparent concat */
IVL_LPM_CMP_EEQ= 18, /* Case EQ (===) */
IVL_LPM_CMP_EQX= 37, /* Wildcard EQ (casex) */
IVL_LPM_CMP_EQX= 37, /* Wildcard EQ (==?) */
IVL_LPM_CMP_EQZ= 38, /* casez EQ */
IVL_LPM_CMP_WEQ= 41,
IVL_LPM_CMP_WNE= 42,
IVL_LPM_CMP_EQ = 10,
IVL_LPM_CMP_GE = 1,
IVL_LPM_CMP_GT = 2,
@@ -318,7 +315,6 @@ typedef enum ivl_lpm_type_e {
IVL_LPM_CMP_NEE= 19, /* Case NE (!==) */
IVL_LPM_DIVIDE = 12,
IVL_LPM_FF = 3,
IVL_LPM_LATCH = 40,
IVL_LPM_MOD = 13,
IVL_LPM_MULT = 4,
IVL_LPM_MUX = 5,
@@ -356,12 +352,9 @@ typedef enum ivl_path_edge_e {
/* Processes are initial, always, or final blocks with a statement. This is
the type of the ivl_process_t object. */
typedef enum ivl_process_type_e ENUM_UNSIGNED_INT {
IVL_PR_INITIAL = 0,
IVL_PR_ALWAYS = 1,
IVL_PR_ALWAYS_COMB = 3,
IVL_PR_ALWAYS_FF = 4,
IVL_PR_ALWAYS_LATCH = 5,
IVL_PR_FINAL = 2
IVL_PR_INITIAL = 0,
IVL_PR_ALWAYS = 1,
IVL_PR_FINAL = 2
} ivl_process_type_t;
/* These are the sorts of reasons a scope may come to be. These types
@@ -435,14 +428,6 @@ typedef enum ivl_statement_type_e {
IVL_ST_WHILE = 23
} ivl_statement_type_t;
/* Case statements can be tagged as unique/unique0/priority. */
typedef enum ivl_case_quality_t {
IVL_CASE_QUALITY_BASIC = 0, /* no quality flags */
IVL_CASE_QUALITY_UNIQUE = 1,
IVL_CASE_QUALITY_UNIQUE0 = 2,
IVL_CASE_QUALITY_PRIORITY = 3
} ivl_case_quality_t;
/* SystemVerilog allows a system function to be called as a task. */
typedef enum ivl_sfunc_as_task_e {
IVL_SFUNC_AS_TASK_ERROR = 0,
@@ -525,10 +510,6 @@ extern ivl_island_t ivl_branch_island(ivl_branch_t obj);
* ivl_path_is_condit
* Is this a conditional structure? Needed for ifnone.
*
* ivl_path_is_parallel
* This returns true if the path is a parallel connection and
* false if the path is a full connection.
*
* ivl_path_source_posedge
* ivl_path_source_negedge
* These functions return true if the source is edge sensitive.
@@ -539,8 +520,6 @@ extern uint64_t ivl_path_delay(ivl_delaypath_t obj, ivl_path_edge_t pt);
extern ivl_nexus_t ivl_path_condit(ivl_delaypath_t obj);
extern int ivl_path_is_condit(ivl_delaypath_t obj);
extern int ivl_path_is_parallel(ivl_delaypath_t obj);
extern int ivl_path_source_posedge(ivl_delaypath_t obj);
extern int ivl_path_source_negedge(ivl_delaypath_t obj);
@@ -1332,13 +1311,8 @@ extern unsigned ivl_lpm_lineno(ivl_lpm_t net);
* inputs and the Q. All the types must be exactly the same.
*
* - D-FlipFlop (IVL_LPM_FF)
* This device is an edge sensitive register. The ivl_lpm_q output and
* single ivl_lpm_data input are the same width, ivl_lpm_width. This
* device carries a vector like other LPM devices.
*
* - Latch (IVL_LPM_LATCH)
* This device is an asynchronous latch. The ivl_lpm_q output and
* single ivl_lpm_data input are the same width, ivl_lpm_width. This
* This data is an edge sensitive register. The ivl_lpm_q output and
* single ivl_lpm_data input are the same with, ivl_lpm_width. This
* device carries a vector like other LPM devices.
*
* - Memory port (IVL_LPM_RAM) (deprecated in favor of IVL_LPM_ARRAY)
@@ -1456,18 +1430,18 @@ extern unsigned ivl_lpm_negedge(ivl_lpm_t net);
extern ivl_nexus_t ivl_lpm_clk(ivl_lpm_t net);
/* IVL_LPM_UFUNC */
extern ivl_scope_t ivl_lpm_define(ivl_lpm_t net);
/* IVL_LPM_FF IVL_LPM_LATCH*/
/* IVL_LPM_FF */
extern ivl_nexus_t ivl_lpm_enable(ivl_lpm_t net);
/* IVL_LPM_ADD IVL_LPM_CONCAT IVL_LPM_FF IVL_LPM_PART IVL_LPM_MULT
IVL_LPM_MUX IVL_LPM_POW IVL_LPM_SHIFTL IVL_LPM_SHIFTR IVL_LPM_SUB
IVL_LPM_UFUNC IVL_LPM_SUBSTITUTE IVL_LPM_LATCH */
IVL_LPM_UFUNC IVL_LPM_SUBSTITUTE */
extern ivl_nexus_t ivl_lpm_data(ivl_lpm_t net, unsigned idx);
/* IVL_LPM_ADD IVL_LPM_MULT IVL_LPM_POW IVL_LPM_SUB IVL_LPM_CMP_EQ
IVL_LPM_CMP_EEQ IVL_LPM_CMP_EQX IVL_LPM_CMP_EQZ IVL_LPM_CMP_NEE */
extern ivl_nexus_t ivl_lpm_datab(ivl_lpm_t net, unsigned idx);
/* IVL_LPM_ADD IVL_LPM_FF IVL_LPM_MULT IVL_LPM_PART IVL_LPM_POW
IVL_LPM_SUB IVL_LPM_UFUNC IVL_LPM_CMP_EEQ IVL_LPM_CMP_EQX
IVL_LPM_CMP_EQZ IVL_LPM_CMP_NEE IVL_LPM_SUBSTITUTE IVL_LPM_LATCH */
IVL_LPM_CMP_EQZ IVL_LPM_CMP_NEE IVL_LPM_SUBSTITUTE */
extern ivl_nexus_t ivl_lpm_q(ivl_lpm_t net);
extern ivl_drive_t ivl_lpm_drive0(ivl_lpm_t net);
extern ivl_drive_t ivl_lpm_drive1(ivl_lpm_t net);
@@ -1773,13 +1747,6 @@ extern unsigned ivl_parameter_lineno(ivl_parameter_t net);
* ivl_scope_lineno
* Returns the instantiation file and line for this scope.
*
* ivl_scope_func_type
* ivl_scope_func_signed
* ivl_scope_func_width
*
* If the scope is a function, these function can be used to get
* the type of the return value.
*
* ivl_scope_is_auto
* Is the task or function declared to be automatic?
*
@@ -1898,9 +1865,6 @@ extern const char* ivl_scope_tname(ivl_scope_t net);
extern int ivl_scope_time_precision(ivl_scope_t net);
extern int ivl_scope_time_units(ivl_scope_t net);
extern ivl_variable_type_t ivl_scope_func_type(ivl_scope_t net);
extern int ivl_scope_func_signed(ivl_scope_t net);
extern unsigned ivl_scope_func_width(ivl_scope_t net);
/* SIGNALS
* Signals are named things in the Verilog source, like wires and
@@ -2122,7 +2086,6 @@ extern unsigned ivl_stmt_lineno(ivl_statement_t net);
* handle disable statements.
*
* ivl_stmt_events
* ivl_stmt_needs_t0_trigger
* ivl_stmt_nevent
* Statements that have event arguments (TRIGGER and WAIT) make
* those event objects available through these methods.
@@ -2237,8 +2200,6 @@ extern ivl_scope_t ivl_stmt_call(ivl_statement_t net);
extern unsigned ivl_stmt_case_count(ivl_statement_t net);
/* IVL_ST_CASE,IVL_ST_CASER,IVL_ST_CASEX,IVL_ST_CASEZ */
extern ivl_expr_t ivl_stmt_case_expr(ivl_statement_t net, unsigned i);
/* IVL+ST_CASE,IVL_ST_CASER,IVL_ST_CASEX,IVL_ST_CASEZ */
extern ivl_case_quality_t ivl_stmt_case_quality(ivl_statement_t net);
/* IVL_ST_CASE,IVL_ST_CASER,IVL_ST_CASEX,IVL_ST_CASEZ */
extern ivl_statement_t ivl_stmt_case_stmt(ivl_statement_t net, unsigned i);
/* IVL_ST_CONDIT IVL_ST_CASE IVL_ST_REPEAT IVL_ST_WHILE */
@@ -2252,7 +2213,6 @@ extern ivl_expr_t ivl_stmt_delay_expr(ivl_statement_t net);
/* IVL_ST_DELAY */
extern uint64_t ivl_stmt_delay_val(ivl_statement_t net);
/* IVL_ST_WAIT IVL_ST_TRIGGER */
extern unsigned ivl_stmt_needs_t0_trigger(ivl_statement_t net);
extern unsigned ivl_stmt_nevent(ivl_statement_t net);
extern ivl_event_t ivl_stmt_events(ivl_statement_t net, unsigned idx);
/* IVL_ST_CONTRIB */
@@ -2361,7 +2321,7 @@ extern const char* ivl_type_prop_name(ivl_type_t net, int idx);
extern ivl_type_t ivl_type_prop_type(ivl_type_t net, int idx);
#if defined(__MINGW32__) || defined (__CYGWIN__)
#if defined(__MINGW32__) || defined (__CYGWIN32__)
# define DLLEXPORT __declspec(dllexport)
#else
# define DLLEXPORT
+3 -1
View File
@@ -1,7 +1,7 @@
#ifndef IVL_ivl_target_priv_H
#define IVL_ivl_target_priv_H
/*
* Copyright (c) 2008-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 2008-2014 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -51,6 +51,8 @@ struct ivl_design_s {
ivl_process_t threads_;
// Keep arrays of root scopes.
std::map<const NetScope*,ivl_scope_t> classes;
std::map<const NetScope*,ivl_scope_t> root_tasks;
std::vector<ivl_scope_t> packages;
std::vector<ivl_scope_t> roots;
+3 -5
View File
@@ -60,7 +60,7 @@ distclean: clean
rm -f Makefile config.log
cppcheck: $(O:.o=.c)
cppcheck --enable=all --std=posix --std=c99 --std=c++03 -f $(INCLUDE_PATH) $^
cppcheck --enable=all -f $(INCLUDE_PATH) $^
Makefile: $(srcdir)/Makefile.in ../config.status
cd ..; ./config.status --file=ivlpp/$@
@@ -71,11 +71,9 @@ ivlpp@EXEEXT@: $O
lexor.c: $(srcdir)/lexor.lex
$(LEX) -t $< > $@
install: all installdirs installfiles
install: all installdirs $(libdir)/ivl$(suffix)/ivlpp@EXEEXT@
F = ivlpp@EXEEXT@
installfiles: $(F) | installdirs
$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@: ivlpp@EXEEXT@
$(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ "$(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@"
installdirs: $(srcdir)/../mkinstalldirs
+1 -4
View File
@@ -1,7 +1,7 @@
#ifndef IVL_globals_H
#define IVL_globals_H
/*
* Copyright (c) 1999-2017 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2014 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -53,9 +53,6 @@ extern char dep_mode;
extern int verbose_flag;
extern int warn_redef;
extern int warn_redef_all;
/* This is the entry to the lexer. */
extern int yylex(void);
+76 -150
View File
@@ -1,7 +1,7 @@
%option prefix="yy"
%{
/*
* Copyright (c) 1999-2020 Stephen Williams ([email protected])
* Copyright (c) 1999-2016 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -153,17 +153,28 @@ static void ifdef_leave(void)
size_t rc = fread(buf, 1, max_size, istack->file); \
result = (rc == 0) ? YY_NULL : rc; \
} else { \
/* We are expanding a macro. Handle the SV `` delimiter. \
If the delimiter terminates a defined macro usage, leave \
it in place, otherwise remove it now. */ \
if (!(yytext[0] == '`' && is_defined(yytext+1))) { \
while ((istack->str[0] == '`') && \
(istack->str[1] == '`')) { \
istack->str += 2; \
} \
/* We are expanding a macro. Handle the SV macro escape \
sequences. There doesn't seem to be any good reason \
not to allow them in traditional Verilog as well. */ \
while ((istack->str[0] == '`') && \
(istack->str[1] == '`')) { \
istack->str += 2; \
} \
if (*istack->str == 0) { \
result = YY_NULL; \
} else if ((istack->str[0] == '`') && \
(istack->str[1] == '"')) { \
istack->str += 2; \
buf[0] = '"'; \
result = 1; \
} else if ((istack->str[0] == '`') && \
(istack->str[1] == '\\')&& \
(istack->str[2] == '`') && \
(istack->str[3] == '"')) { \
istack->str += 4; \
buf[0] = '\\'; \
buf[1] = '"'; \
result = 2; \
} else { \
buf[0] = *istack->str++; \
result = 1; \
@@ -174,23 +185,21 @@ static void ifdef_leave(void)
static int comment_enter = 0;
static int pragma_enter = 0;
static int string_enter = 0;
static int prev_state = 0;
static int ma_parenthesis_level = 0;
%}
%option stack
%option nounput
%option noinput
%option noyy_top_state
%option noyywrap
%x PPINCLUDE
%x DEF_NAME
%x DEF_ESC
%x DEF_ARG
%x DEF_SEP
%x DEF_TXT
%x MN_ESC
%x MA_START
%x MA_ADD
%x CCOMMENT
@@ -199,11 +208,6 @@ static int ma_parenthesis_level = 0;
%x CSTRING
%x ERROR_LINE
%x IFDEF_NAME
%x IFNDEF_NAME
%x ELSIF_NAME
%x ELSIF_SUPR
%x IFDEF_FALSE
%s IFDEF_TRUE
%x IFDEF_SUPR
@@ -258,7 +262,9 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
if (macro_needs_args(yytext+1)) yy_push_state(MA_START); else do_expand(0);
}
/* Strings do not contain preprocessor directives or macro expansions.
/* Strings do not contain preprocessor directives, but can expand
* macros. If that happens, they get expanded in the context of the
* string.
*/
\" { string_enter = YY_START; BEGIN(CSTRING); ECHO; }
<CSTRING>\\\\ |
@@ -340,11 +346,6 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
<DEF_NAME>[a-zA-Z_][a-zA-Z0-9_$]*"("{W}? { BEGIN(DEF_ARG); def_start(); }
<DEF_NAME>[a-zA-Z_][a-zA-Z0-9_$]*{W}? { BEGIN(DEF_TXT); def_start(); }
<DEF_NAME>\\ { BEGIN(DEF_ESC); }
<DEF_ESC>[^ \t\b\f\n\r]+{W}"("{W}? { BEGIN(DEF_ARG); def_start(); }
<DEF_ESC>[^ \t\b\f\n\r]+{W} { BEGIN(DEF_TXT); def_start(); }
/* define arg: <name> = <text> */
<DEF_ARG>[a-zA-Z_][a-zA-Z0-9_$]*{W}*"="[^,\)]*{W}? { BEGIN(DEF_SEP); def_add_arg(); }
/* define arg: <name> */
@@ -359,7 +360,7 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
<DEF_ARG,DEF_SEP>(\n|"\r\n"|"\n\r"|\r){W}? { istack->lineno += 1; fputc('\n', yyout); }
<DEF_NAME,DEF_ESC,DEF_ARG,DEF_SEP>. {
<DEF_NAME,DEF_ARG,DEF_SEP>. {
emit_pathline(istack);
fprintf(stderr, "error: malformed `define directive.\n");
error_count += 1;
@@ -406,52 +407,57 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
* condition that stacks on top of the IFDEF_FALSE so that output is
* not accidentally turned on within nested ifdefs.
*/
`ifdef{W} {
`ifdef{W}[a-zA-Z_][a-zA-Z0-9_$]* {
char* name = strchr(yytext, '`'); assert(name);
name += 6;
name += strspn(name, " \t\b\f");
ifdef_enter();
yy_push_state(IFDEF_NAME);
if (is_defined(name))
yy_push_state(IFDEF_TRUE);
else
yy_push_state(IFDEF_FALSE);
}
`ifndef{W} {
`ifndef{W}[a-zA-Z_][a-zA-Z0-9_$]* {
char* name = strchr(yytext, '`'); assert(name);
name += 7;
name += strspn(name, " \t\b\f");
ifdef_enter();
yy_push_state(IFNDEF_NAME);
if (!is_defined(name))
yy_push_state(IFDEF_TRUE);
else
yy_push_state(IFDEF_FALSE);
}
<IFDEF_FALSE,IFDEF_SUPR>`ifdef{W} |
<IFDEF_FALSE,IFDEF_SUPR>`ifndef{W} { ifdef_enter(); yy_push_state(IFDEF_SUPR); }
<IFDEF_TRUE>`elsif{W} { prev_state = YYSTATE; BEGIN(ELSIF_SUPR); }
<IFDEF_FALSE>`elsif{W} { prev_state = YYSTATE; BEGIN(ELSIF_NAME); }
<IFDEF_SUPR>`elsif{W} { prev_state = YYSTATE; BEGIN(ELSIF_SUPR); }
<IFDEF_TRUE>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* { BEGIN(IFDEF_SUPR); }
<IFDEF_FALSE>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
char* name = strchr(yytext, '`'); assert(name);
name += 6;
name += strspn(name, " \t\b\f");
if (is_defined(name))
BEGIN(IFDEF_TRUE);
else
BEGIN(IFDEF_FALSE);
}
<IFDEF_SUPR>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* { }
<IFDEF_TRUE>`else { BEGIN(IFDEF_SUPR); }
<IFDEF_FALSE>`else { BEGIN(IFDEF_TRUE); }
<IFDEF_SUPR>`else {}
<IFDEF_NAME>[a-zA-Z_][a-zA-Z0-9_$]* {
if (is_defined(yytext))
BEGIN(IFDEF_TRUE);
else
BEGIN(IFDEF_FALSE);
}
<IFNDEF_NAME>[a-zA-Z_][a-zA-Z0-9_$]* {
if (!is_defined(yytext))
BEGIN(IFDEF_TRUE);
else
BEGIN(IFDEF_FALSE);
}
<ELSIF_NAME>[a-zA-Z_][a-zA-Z0-9_$]* {
if (is_defined(yytext))
BEGIN(IFDEF_TRUE);
else
BEGIN(IFDEF_FALSE);
}
<ELSIF_SUPR>[a-zA-Z_][a-zA-Z0-9_$]* {
BEGIN(IFDEF_SUPR);
}
<IFDEF_FALSE,IFDEF_SUPR>"//"[^\r\n]* {}
<IFDEF_FALSE,IFDEF_SUPR>"/*" { comment_enter = YY_START; BEGIN(IFCCOMMENT); }
@@ -471,45 +477,25 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
<IFDEF_FALSE,IFDEF_TRUE,IFDEF_SUPR>`endif { ifdef_leave(); yy_pop_state(); }
<IFDEF_NAME>(\n|\r) |
<IFDEF_NAME>. |
`ifdef {
error_count += 1;
fprintf(stderr, "%s:%u: `ifdef without a macro name - ignored.\n",
istack->path, istack->lineno+1);
if (YY_START == IFDEF_NAME) {
ifdef_leave();
yy_pop_state();
unput(yytext[0]);
}
}
<IFNDEF_NAME>(\n|\r) |
<IFNDEF_NAME>. |
`ifndef {
error_count += 1;
fprintf(stderr, "%s:%u: `ifndef without a macro name - ignored.\n",
istack->path, istack->lineno+1);
if (YY_START == IFNDEF_NAME) {
ifdef_leave();
yy_pop_state();
unput(yytext[0]);
}
}
<ELSIF_NAME,ELSIF_SUPR>(\n|\r) |
<ELSIF_NAME,ELSIF_SUPR>. |
`elsif {
error_count += 1;
fprintf(stderr, "%s:%u: `elsif without a macro name - ignored.\n",
istack->path, istack->lineno+1);
if (YY_START != INITIAL) {
BEGIN(prev_state);
unput(yytext[0]);
}
}
<INITIAL>`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
`elsif{W}[a-zA-Z_][a-zA-Z0-9_$]* {
error_count += 1;
fprintf(stderr, "%s:%u: `elsif without a matching `ifdef - ignored.\n",
istack->path, istack->lineno+1);
@@ -542,54 +528,19 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
do_expand(0);
}
`\\ { yy_push_state(MN_ESC); }
<MN_ESC>[^ \t\b\f\n\r]+ {
yy_pop_state();
if (macro_needs_args(yytext))
/* Stringified version of macro expansion. This is an Icarus extension.
When expanding macro text, the SV usage of `` takes precedence. */
``[a-zA-Z_][a-zA-Z0-9_$]* {
assert(istack->file);
assert(do_expand_stringify_flag == 0);
do_expand_stringify_flag = 1;
fputc('"', yyout);
if (macro_needs_args(yytext+2))
yy_push_state(MA_START);
else
do_expand(0);
}
<MN_ESC>. {
yy_pop_state();
unput(yytext[0]);
emit_pathline(istack);
fprintf(stderr, "error: malformed macro name.\n");
error_count += 1;
}
/* Stringified version of macro expansion. This is an Icarus extension.
When expanding macro text, the SV usage of `` takes precedence. */
``[a-zA-Z_][a-zA-Z0-9_$]* {
if (istack->file) {
assert(do_expand_stringify_flag == 0);
do_expand_stringify_flag = 1;
fputc('"', yyout);
if (macro_needs_args(yytext+2))
yy_push_state(MA_START);
else
do_expand(0);
} else {
REJECT;
}
}
/* If we are expanding a macro, remove the SV `` delimiter, otherwise
* leave it to be handled by the normal rules.
*/
`` { if (istack->file) REJECT; }
/* If we are expanding a macro, handle the SV `" override. This avoids
* entering CSTRING state, thus allowing nested macro expansions.
*/
`\" { if (!istack->file) fputc('"', yyout); else REJECT; }
/* If we are expanding a macro, handle the SV `\`" escape sequence.
*/
`\\`\" { if (!istack->file) fputs("\\\"", yyout); else REJECT; }
<MA_START>\( { BEGIN(MA_ADD); macro_start_args(); }
<MA_START>{W} {}
@@ -624,7 +575,7 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
<MA_ADD>{W} { macro_add_to_arg(1); }
<MA_ADD>[({] { macro_add_to_arg(0); ma_parenthesis_level++; }
<MA_ADD>"(" { macro_add_to_arg(0); ma_parenthesis_level++; }
<MA_ADD>"," {
if (ma_parenthesis_level > 0)
@@ -633,7 +584,7 @@ keywords (include|define|undef|ifdef|ifndef|else|elseif|endif)
macro_finish_arg();
}
<MA_ADD>[)}] {
<MA_ADD>")" {
if (ma_parenthesis_level > 0) {
macro_add_to_arg(0);
ma_parenthesis_level--;
@@ -850,13 +801,8 @@ static void def_add_arg(void)
/* This can happen because we are also processing "argv[0]", the
macro name, as a pseudo-argument. The lexor will match that
as name(, so chop off the ( here. If we have an escaped name,
we also need to strip off the white space that terminates the
name. */
if (yytext[length - 1] == '(') {
length--;
while (isspace((int)yytext[length - 1])) length--;
}
as name(, so chop off the ( here. */
if (yytext[length - 1] == '(') length--;
yytext[length] = 0;
@@ -912,25 +858,6 @@ void define_macro(const char* name, const char* value, int keyword, int argc)
{
int idx;
struct define_t* def;
struct define_t* prev;
/* Verilog has a very nasty system of macros jumping from
* file to file, resulting in a global macro scope. Here
* we optionally warn about any redefinitions.
*
* If istack is empty, we are processing a configuration
* or precompiled macro file, so don't want to check for
* redefinitions - when a precompiled macro file is used,
* it will contain copies of any predefined macros.
*/
if (warn_redef && istack) {
prev = def_lookup(name);
if (prev && (warn_redef_all || (strcmp(prev->value, value) != 0))) {
emit_pathline(istack);
fprintf(stderr, "warning: redefinition of macro %s from value '%s' to '%s'\n",
name, prev->value, value);
}
}
def = malloc(sizeof(struct define_t));
def->name = strdup(name);
@@ -1735,8 +1662,7 @@ static void do_include(void)
}
for (idx = start ; idx < include_cnt ; idx += 1) {
snprintf(path, sizeof(path), "%s/%s",
include_dir[idx], standby->path);
sprintf(path, "%s/%s", include_dir[idx], standby->path);
if ((standby->file = fopen(path, "r"))) {
standby->file_close = fclose;
+3 -19
View File
@@ -1,5 +1,5 @@
const char COPYRIGHT[] =
"Copyright (c) 1999-2020 Stephen Williams ([email protected])";
"Copyright (c) 1999-2011,2015 Stephen Williams ([email protected])";
/*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -98,10 +98,6 @@ int line_direct_flag = 0;
unsigned error_count = 0;
FILE *depend_file = NULL;
/* Should we warn about macro redefinitions? */
int warn_redef = 0;
int warn_redef_all = 0;
static int flist_read_flags(const char*path)
{
char line_buf[2048];
@@ -286,7 +282,7 @@ int main(int argc, char*argv[])
include_dir[0] = 0; /* 0 is reserved for the current files path. */
include_dir[1] = strdup(".");
while ((opt=getopt(argc, argv, "F:f:K:Lo:p:P:vVW:")) != EOF) switch (opt) {
while ((opt=getopt(argc, argv, "F:f:K:Lo:p:P:vV")) != EOF) switch (opt) {
case 'F':
flist_read_flags(optarg);
@@ -340,15 +336,6 @@ int main(int argc, char*argv[])
break;
}
case 'W':
if (strcmp(optarg, "redef-all") == 0) {
warn_redef_all = 1;
warn_redef = 1;
} else if (strcmp(optarg, "redef-chg") == 0) {
warn_redef = 1;
}
break;
case 'v':
fprintf(stderr, "Icarus Verilog Preprocessor version "
VERSION " (" VERSION_TAG ")\n\n");
@@ -379,10 +366,7 @@ int main(int argc, char*argv[])
" -p<fil> - Write precompiled defines to <fil>\n"
" -P<fil> - Read precompiled defines from <fil>\n"
" -v - Verbose\n"
" -V - Print version information and quit\n"
" -W<cat> - Enable extra ivlpp warning category:\n"
" o redef-all - all macro redefinitions\n"
" o redef-chg - macro definition changes\n",
" -V - Print version information and quit\n",
argv[0]);
return flag_errors;
}
+19 -60
View File
@@ -4,7 +4,7 @@
%{
/*
* Copyright (c) 1998-2020 Stephen Williams ([email protected])
* Copyright (c) 1998-2015 Stephen Williams ([email protected])
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -51,22 +51,6 @@
*/
extern YYLTYPE yylloc;
char* yytext_string_filter(const char*str, size_t str_len)
{
if (str == 0) return 0;
char*buf = new char[str_len+1];
for (size_t idx = 0 ; idx < str_len ; idx += 1) {
if (str[idx] == 0) {
VLerror(yylloc, "error: Found nil (\\000) in string literal, replacing with space (\\015) character.");
buf[idx] = ' ';
} else {
buf[idx] = str[idx];
}
}
buf[str_len] = 0;
return buf;
}
char* strdupnew(char const *str)
{
return str ? strcpy(new char [strlen(str)+1], str) : 0;
@@ -88,7 +72,6 @@ static const char* set_file_name(char*text)
void reset_lexor();
static void line_directive();
static void line_directive2();
static void reset_all();
verinum*make_unsized_binary(const char*txt);
verinum*make_undef_highz_dec(const char*txt);
@@ -204,11 +187,8 @@ TU [munpf]
"!=" { return K_NE; }
"===" { return K_CEQ; }
"!==" { return K_CNE; }
"==?" { return K_WEQ; }
"!=?" { return K_WNE; }
"||" { return K_LOR; }
"&&" { return K_LAND; }
"<->" { return K_LEQUIV; }
"&&&" { return K_TAND; }
"~|" { return K_NOR; }
"~^" { return K_NXOR; }
@@ -247,12 +227,12 @@ TU [munpf]
<CSTRING>\\\\ { yymore(); /* Catch \\, which is a \ escaping itself */ }
<CSTRING>\\\" { yymore(); /* Catch \", which is an escaped quote */ }
<CSTRING>\n { BEGIN(0);
yylval.text = yytext_string_filter(yytext, yyleng);
yylval.text = strdupnew(yytext);
VLerror(yylloc, "Missing close quote of string.");
yylloc.first_line += 1;
return STRING; }
<CSTRING>\" { BEGIN(0);
yylval.text = yytext_string_filter(yytext, yyleng);
yylval.text = strdupnew(yytext);
yylval.text[strlen(yytext)-1] = 0;
return STRING; }
<CSTRING>. { yymore(); }
@@ -330,6 +310,15 @@ TU [munpf]
BEGIN(UDPTABLE);
break;
/* Translate these to checks if we already have or are
* outside the declaration region. */
case K_timeunit:
if (have_timeunit_decl) rc = K_timeunit_check;
break;
case K_timeprecision:
if (have_timeprec_decl) rc = K_timeprecision_check;
break;
default:
yylval.text = 0;
break;
@@ -379,7 +368,7 @@ TU [munpf]
/* If this identifier names a previously declared type, then
return this as a TYPE_IDENTIFIER instead. */
if (rc == IDENTIFIER && gn_system_verilog()) {
if (data_type_t*type = pform_test_type_identifier(yylloc, yylval.text)) {
if (data_type_t*type = pform_test_type_identifier(yylval.text)) {
yylval.type_identifier.text = yylval.text;
yylval.type_identifier.type = type;
rc = TYPE_IDENTIFIER;
@@ -400,7 +389,7 @@ TU [munpf]
}
}
if (gn_system_verilog()) {
if (data_type_t*type = pform_test_type_identifier(yylloc, yylval.text)) {
if (data_type_t*type = pform_test_type_identifier(yylval.text)) {
yylval.type_identifier.text = yylval.text;
yylval.type_identifier.type = type;
return TYPE_IDENTIFIER;
@@ -439,12 +428,6 @@ TU [munpf]
if (strcmp(yytext,"$attribute") == 0)
return KK_attribute;
if (gn_system_verilog() && strcmp(yytext,"$unit") == 0) {
yylval.package = pform_units.back();
return PACKAGE_IDENTIFIER;
}
yylval.text = strdupnew(yytext);
return SYSTEM_IDENTIFIER; }
@@ -583,7 +566,11 @@ TU [munpf]
"definition." << endl;
error_count += 1;
} else {
reset_all();
pform_set_default_nettype(NetNet::WIRE, yylloc.text,
yylloc.first_line);
in_celldefine = false;
uc_drive = UCD_NONE;
pform_set_timescale(def_ts_units, def_ts_prec, 0, 0);
} }
/* Notice and handle the `unconnected_drive directive. */
@@ -885,14 +872,6 @@ verinum*make_unsized_binary(const char*txt)
for (const char*idx = ptr ; *idx ; idx += 1)
if (*idx != '_') size += 1;
if (size == 0) {
VLerror(yylloc, "Numeric literal has no digits in it.");
verinum*out = new verinum();
out->has_sign(sign_flag);
out->is_single(single_flag);
return out;
}
if ((based_size > 0) && (size > based_size)) yywarn(yylloc,
"extra digits given for sized binary constant.");
@@ -1610,18 +1589,6 @@ static void line_directive2()
yylloc.first_line = lineno;
}
/*
* Reset all compiler directives. This will be called when a `resetall
* directive is encountered or when a new compilation unit is started.
*/
static void reset_all()
{
pform_set_default_nettype(NetNet::WIRE, yylloc.text, yylloc.first_line);
in_celldefine = false;
uc_drive = UCD_NONE;
pform_set_timescale(def_ts_units, def_ts_prec, 0, 0);
}
extern FILE*vl_input;
void reset_lexor()
{
@@ -1630,14 +1597,6 @@ void reset_lexor()
/* Announce the first file name. */
yylloc.text = set_file_name(strdupnew(vl_file.c_str()));
if (separate_compilation) {
reset_all();
if (!keyword_mask_stack.empty()) {
lexor_keyword_mask = keyword_mask_stack.back();
keyword_mask_stack.clear();
}
}
}
/*
+6 -29
View File
@@ -29,12 +29,10 @@ static char **string_pool = NULL;
static unsigned string_pool_count = 0;
#endif
static const unsigned DEFAULT_CELL_SIZE = 0x10000;
StringHeap::StringHeap()
{
cell_base_ = 0;
cell_size_ = 0;
cell_ptr_ = 0;
}
@@ -47,37 +45,17 @@ StringHeap::~StringHeap()
const char* StringHeap::add(const char*text)
{
unsigned len = strlen(text);
unsigned rem = cell_base_==0? 0 : (DEFAULT_CELL_SIZE - cell_ptr_);
// Special case: huge items get their own allocation.
if ( (len+1) >= DEFAULT_CELL_SIZE ) {
char*buf = strdup(text);
#ifdef CHECK_WITH_VALGRIND
string_pool_count += 1;
string_pool = (char**)realloc(string_pool,
string_pool_count*sizeof(char**));
string_pool[string_pool_count-1] = buf;
#endif
return buf;
}
// If the current cell that I'm working through cannot hold
// the current string, then set it aside and get another cell
// to put the string into.
unsigned rem = cell_size_ - cell_ptr_;
if (rem < (len+1)) {
// release any unused memory. This assumes that a
// realloc shrink of the memory region will return the
// same pointer.
// release any unused memory
if (rem > 0) {
char*old = cell_base_;
cell_base_ = (char*)realloc(cell_base_, cell_ptr_);
assert(cell_base_ != 0);
assert(cell_base_ == old);
}
// start new cell
cell_base_ = (char*)malloc(DEFAULT_CELL_SIZE);
cell_size_ = (len+1) > DEFAULT_CELL_SIZE ? len+1 : DEFAULT_CELL_SIZE;
cell_base_ = (char*)malloc(cell_size_);
cell_ptr_ = 0;
rem = DEFAULT_CELL_SIZE;
assert(cell_base_ != 0);
#ifdef CHECK_WITH_VALGRIND
string_pool_count += 1;
@@ -87,13 +65,12 @@ const char* StringHeap::add(const char*text)
#endif
}
assert( (len+1) <= rem );
char*res = cell_base_ + cell_ptr_;
memcpy(res, text, len);
cell_ptr_ += len;
cell_base_[cell_ptr_++] = 0;
assert(cell_ptr_ <= DEFAULT_CELL_SIZE);
assert(cell_ptr_ <= cell_size_);
return res;
}
+4 -1
View File
@@ -46,7 +46,7 @@ class perm_string {
private:
friend class StringHeap;
friend class StringHeapLex;
explicit perm_string(const char*t) : text_(t) { };
perm_string(const char*t) : text_(t) { };
private:
const char*text_;
@@ -78,7 +78,10 @@ class StringHeap {
perm_string make(const char*);
private:
static const unsigned DEFAULT_CELL_SIZE = 0x10000;
char*cell_base_;
unsigned cell_size_;
unsigned cell_ptr_;
private: // not implemented
+3 -7
View File
@@ -76,9 +76,7 @@ distclean: clean
rm -f config.h stamp-config-h
cppcheck: $(O:.o=.c)
cppcheck --enable=all --std=posix --std=c99 --std=c++03 -f \
--suppressions-list=$(srcdir)/cppcheck.sup \
--relative-paths=$(srcdir) $(INCLUDE_PATH) $^
cppcheck --enable=all -f $(INCLUDE_PATH) $^
Makefile: $(srcdir)/Makefile.in
cd ..; ./config.status --file=libveriuser/$@
@@ -103,11 +101,9 @@ libveriuser.a: libveriuser.o
$(CC) $(CPPFLAGS) $(CFLAGS) @DEPENDENCY_FLAG@ -c $< -o $*.o
mv $*.d dep
install:: all installdirs installfiles
install:: all installdirs $(libdir)/libveriuser$(suffix).a $(INSTALL32)
F = ./libveriuser.a
installfiles: $(F) | installdirs
$(libdir)/libveriuser$(suffix).a: ./libveriuser.a
$(INSTALL_DATA) ./libveriuser.a "$(DESTDIR)$(libdir)/libveriuser$(suffix).a"
installdirs: $(srcdir)/../mkinstalldirs
-187
View File
@@ -1,187 +0,0 @@
// These are the functions that the runtime exports.
// The ACC functions.
// acc_close()
unusedFunction:a_close.c:23
// acc_compare_handles()
unusedFunction:a_compare_handles.c:23
// acc_configure()
unusedFunction:a_configure.c:25
// acc_fetch_argc()
unusedFunction:a_fetch_argc.c:27
// acc_fetch_argv()
unusedFunction:a_fetch_argv.c:27
// acc_fetch_defname()
unusedFunction:a_fetch_fullname.c:37
// acc_fetch_direction()
unusedFunction:a_fetch_dir.c:26
// acc_fetch_fulltype()
unusedFunction:a_fetch_type.c:66
// acc_fetch_itfarg()
unusedFunction:a_fetch_tfarg.c:27
// acc_fetch_location()
unusedFunction:a_fetch_location.c:23
// acc_fetch_name()
unusedFunction:a_fetch_fullname.c:32
// acc_fetch_paramtype()
unusedFunction:a_fetch_type_str.c:47
// acc_fetch_paramval()
unusedFunction:a_fetch_param.c:25
// acc_fetch_range()
unusedFunction:a_fetch_range.c:26
// acc_fetch_size()
unusedFunction:a_fetch_type.c:24
// acc_fetch_tfarg()
unusedFunction:a_fetch_tfarg.c:56
// acc_fetch_tfarg_int()
unusedFunction:a_fetch_tfarg.c:91
// acc_fetch_timescale_info()
unusedFunction:a_fetch_time.c:24
// acc_fetch_type()
unusedFunction:a_fetch_type.c:29
// acc_fetch_type_str()
unusedFunction:a_fetch_type_str.c:24
// acc_fetch_value()
unusedFunction:a_fetch_value.c:115
// acc_handle_by_name()
unusedFunction:a_handle_by_name.c:29
// acc_handle_hiconn()
unusedFunction:a_handle_hiconn.c:26
// acc_handle_object()
unusedFunction:a_handle_object.c:26
// acc_handle_parent()
unusedFunction:a_handle_parent.c:24
// acc_handle_scope()
unusedFunction:a_handle_parent.c:34
// acc_handle_simulated_net()
unusedFunction:a_handle_simulated_net.c:26
// acc_handle_tfarg()
unusedFunction:a_handle_tfarg.c:26
// acc_handle_tfinst()
unusedFunction:a_handle_tfarg.c:53
// acc_initialize()
unusedFunction:a_initialize.c:24
// acc_next_bit()
unusedFunction:a_next_bit.c:26
// acc_next_port()
unusedFunction:a_next_port.c:26
// acc_next_scope()
unusedFunction:a_next.c:86
// acc_next_topmod()
unusedFunction:a_next_topmod.c:30
// acc_product_version()
unusedFunction:a_product_version.c:23
// acc_set_scope()
unusedFunction:a_handle_object.c:40
// acc_set_value()
unusedFunction:a_set_value.c:27
// acc_vcl_add()
unusedFunction:a_vcl.c:157
// acc_vcl_delete()
unusedFunction:a_vcl.c:196
// acc_version()
unusedFunction:a_version.c:23
// These are the TF routines.
// io_printf()
unusedFunction:io_print.c:26
// mc_scan_plusargs()
unusedFunction:mc_scan_plusargs.c:27
// tf_asynchoff()
unusedFunction:asynch.c:34
// tf_asynchon()
unusedFunction:asynch.c:28
// tf_dofinish()
unusedFunction:finish.c:26
// tf_dostop()
unusedFunction:finish.c:32
// tf_error()
unusedFunction:io_print.c:45
// tf_exprinfo()
unusedFunction:exprinfo.c:26
// tf_getcstringp()
unusedFunction:getcstringp.c:26
// tf_getlongp()
unusedFunction:getlongp.c:29
// tf_getlongtime()
unusedFunction:getsimtime.c:112
// tf_getp()
unusedFunction:getp.c:73
// tf_getrealp()
unusedFunction:getp.c:120
// tf_gettime()
unusedFunction:getsimtime.c:77
// tf_getworkarea()
unusedFunction:workarea.c:62
// tf_igettimeprecision()
unusedFunction:getsimtime.c:198
// tf_igettimeunit()
unusedFunction:getsimtime.c:228
// tf_long_to_real()
unusedFunction:math.c:47
// tf_message()
unusedFunction:io_print.c:56
// tf_mipname()
unusedFunction:spname.c:47
// tf_multiply_long()
unusedFunction:math.c:27
// tf_nodeinfo()
unusedFunction:nodeinfo.c:27
// tf_nump()
unusedFunction:nump.c:42
// tf_putlongp()
unusedFunction:putlongp.c:28
// tf_putp()
unusedFunction:putp.c:88
// tf_putrealp()
unusedFunction:putp.c:137
// tf_real_to_long()
unusedFunction:math.c:40
// tf_rosynchronize()
unusedFunction:veriusertfs.c:391
// tf_scale_longdelay()
unusedFunction:getsimtime.c:136
// tf_scale_realdelay()
unusedFunction:getsimtime.c:161
// tf_setdelay()
unusedFunction:delay.c:75
// tf_setrealdelay()
unusedFunction:veriusertfs.c:426
// tf_setworkarea()
unusedFunction:workarea.c:36
// tf_spname()
unusedFunction:spname.c:25
// tf_strgetp()
unusedFunction:getp.c:177
// tf_strgettime()
unusedFunction:getsimtime.c:85
// tf_synchronize()
unusedFunction:veriusertfs.c:364
// tf_typep()
unusedFunction:typep.c:24
// tf_unscale_longdelay()
unusedFunction:getsimtime.c:144
// tf_unscale_realdelay()
unusedFunction:getsimtime.c:171
// tf_warning()
unusedFunction:io_print.c:34
// Non-standard TF routines the Icarus provides.
// tf_getlongsimtime()
unusedFunction:getsimtime.c:126
// veriusertfs_register_table()
unusedFunction:veriusertfs.c:76
+1 -1
View File
@@ -31,6 +31,6 @@ extern char* __acc_newstring(const char*txt);
/*
* Trace file for logging ACC and TF calls.
*/
extern FILE* pli_trace;
FILE* pli_trace;
#endif /* IVL_priv_H */
+5 -30
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2016 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2015 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -102,17 +102,6 @@ bool Nexus::drivers_constant() const
break;
}
const NetSubstitute*ps = dynamic_cast<const NetSubstitute*>(cur->get_obj());
if (ps) {
if (ps->pin(1).nexus()->drivers_constant() &&
ps->pin(2).nexus()->drivers_constant() ) {
constant_drivers += 1;
continue;
}
driven_ = VAR;
return false;
}
if (! dynamic_cast<const NetConst*>(cur->get_obj())) {
driven_ = VAR;
return false;
@@ -173,13 +162,13 @@ verinum::V Nexus::driven_value() const
if ((sig->type() == NetNet::SUPPLY0) ||
(sig->type() == NetNet::TRI0)) {
// Multiple drivers are not currently supported.
ivl_assert(*sig, val == verinum::Vz);
ivl_assert(*obj, val == verinum::Vz);
val = verinum::V0;
}
if ((sig->type() == NetNet::SUPPLY1) ||
(sig->type() == NetNet::TRI1)) {
// Multiple drivers are not currently supported.
ivl_assert(*sig, val == verinum::Vz);
ivl_assert(*obj, val == verinum::Vz);
val = verinum::V1;
}
}
@@ -210,12 +199,10 @@ verinum Nexus::driven_vector() const
const Link*cur = list_;
verinum val;
verinum pval;
unsigned width = 0;
for (cur = first_nlink() ; cur ; cur = cur->next_nlink()) {
const NetSubstitute*ps;
const NetConst*obj;
const NetNet*sig;
if ((obj = dynamic_cast<const NetConst*>(cur->get_obj()))) {
@@ -225,18 +212,6 @@ verinum Nexus::driven_vector() const
val = obj->value();
width = val.len();
} else if ((ps = dynamic_cast<const NetSubstitute*>(cur->get_obj()))) {
if (cur->get_pin() != 0)
continue;
// Multiple drivers are not currently supported.
ivl_assert(*ps, val.len() == 0);
val = ps->pin(1).nexus()->driven_vector();
pval = ps->pin(2).nexus()->driven_vector();
for (unsigned idx = 0; idx < pval.len(); idx += 1)
val.set(ps->base() + idx, pval.get(idx));
width = val.len();
} else if ((sig = dynamic_cast<const NetNet*>(cur->get_obj()))) {
width = sig->vector_width();
@@ -247,13 +222,13 @@ verinum Nexus::driven_vector() const
if ((sig->type() == NetNet::SUPPLY0) ||
(sig->type() == NetNet::TRI0)) {
// Multiple drivers are not currently supported.
ivl_assert(*sig, val.len() == 0);
ivl_assert(*obj, val.len() == 0);
val = verinum(verinum::V0, width);
}
if ((sig->type() == NetNet::SUPPLY1) ||
(sig->type() == NetNet::TRI1)) {
// Multiple drivers are not currently supported.
ivl_assert(*sig, val.len() == 0);
ivl_assert(*obj, val.len() == 0);
val = verinum(verinum::V1, width);
}
}
+31 -5
View File
@@ -73,8 +73,7 @@ bool load_module(const char*type, int&parser_errors)
if (cur == lcur->name_map.end())
continue;
snprintf(path, sizeof(path), "%s%c%s",
lcur->dir, dir_character, (*cur).second);
sprintf(path, "%s%c%s", lcur->dir, dir_character, (*cur).second);
if(depend_file) {
if (depfile_mode == 'p') {
@@ -85,10 +84,36 @@ bool load_module(const char*type, int&parser_errors)
fflush(depend_file);
}
if (verbose_flag)
cerr << "Loading library file " << path << "." << endl;
if (ivlpp_string) {
char*cmdline = (char*)malloc(strlen(ivlpp_string) +
strlen(path) + 4);
strcpy(cmdline, ivlpp_string);
strcat(cmdline, " \"");
strcat(cmdline, path);
strcat(cmdline, "\"");
parser_errors = pform_parse(path);
if (verbose_flag)
cerr << "Executing: " << cmdline << endl<< flush;
FILE*file = popen(cmdline, "r");
if (verbose_flag)
cerr << "...parsing output from preprocessor..." << endl << flush;
parser_errors = pform_parse(path, file);
pclose(file);
free(cmdline);
} else {
if (verbose_flag)
cerr << "Loading library file "
<< path << "." << endl;
FILE*file = fopen(path, "r");
assert(file);
parser_errors = pform_parse(path, file);
fclose(file);
}
if (verbose_flag)
cerr << "... Load module complete." << endl << flush;
@@ -96,6 +121,7 @@ bool load_module(const char*type, int&parser_errors)
return parser_errors == 0;
}
return false;
}
+88
View File
@@ -0,0 +1,88 @@
This file describes the procedure to build and install Icarus Verilog
on Mac OS X. I assume that you have experience with Unix and
Terminal.app and a basic knowledge of how to download, compile and
install software from source form.
Yasuhisa Kato wrote another set of instructions that has also been
known to work: <http://adwis.com/verilog/index.html>. You may try
those instructions instead of these, although they are essentially
quite similar.
1) Obtain and install a libdl compatibility library.
If you don't already have /usr/local/lib/libdl.{a,dylib} and
/usr/local/include/dlfcn.h, you can obtain the source for a
compatibility layer from at least one of two places:
http://download.sourceforge.net/fink/dlcompat-20010831.tar.gz
http://www.omnigroup.com/~bungi/dlcompat-20010831.tar.gz
Unpack this tar file and read the README and Makefile. Install the
library according to the instructions. Installation in /usr/local
is strongly recommended since otherwise autoconf very likely won't
be able to find it.
2) Make sure you have a copy of the 'gperf' tool. This does not come
with the Mac OS X 10.1 developer tools, so you probably don't. You
can check with:
% which gperf
If not found, grab a gperf source package and install it. See "GPERF
FOR MACOSX" below.
Snapshots of Icarus Verilog source now come with the
lexor_keyword.cc file pre-made, so if you have trouble with gperf,
then just make sure the distributed lexor_keyword.cc is newer than
lexor_keyword.gperf, and use that.
3) If working with source from git, you must run autoconf in the top
directory. This is simplified by the 'autoconf.sh' script at the
top of the source tree:
sh ./autoconf.sh
This will also run the gperf command, so make sure you've completed
step #2 first.
4) Configure, build and install the Icarus Verilog sources as normal.
The only change you need to make here is to use a configure command like:
% CC="cc -no-cpp-precomp" ./configure
This assumes you are using 'sh', 'zsh', or 'bash'. If you are using
'csh' or 'tcsh', then you'll want something like:
% setenv CC "cc -no-cpp-precomp"
% ./configure
You can, of course, add other configure options.
6) NOTE: 'make check' will not work until after 'make install' has been run
since dynamically loaded code is searched for in the install location
rather than the build location. The dlopen emulation library doesn't
support a search path option.
If you are worried about overwriting a working installation with a new,
potentially broken one, you can always configure using --prefix="/some/path",
and install there to make sure everything is working and then re-configure
with the real path you want to install at, make clean, and make install.
5) Done!
GPERF FOR MACOSX
Get version 2.7.2 of gperf from here:
<ftp://ftp.gnu.org/gnu/gperf/gperf-2.7.2.tar.gz>
Get a MacosX patch from here:
http://www.eternal.nest.or.jp/~shiro/binaries/gperf-2.7.2-macosx-patch.gz
Apply the patch to the gperf-2.7.2 source that you previously
downloaded, then follow the remaining gperf installation
instructions.
+37 -125
View File
@@ -1,5 +1,5 @@
const char COPYRIGHT[] =
"Copyright (c) 1998-2020 Stephen Williams ([email protected])";
"Copyright (c) 1998-2017 Stephen Williams ([email protected])";
/*
* This source code is free software; you can redistribute it
@@ -68,7 +68,7 @@ extern "C" int optind;
extern "C" const char*optarg;
#endif
#if defined(__CYGWIN__) && !defined(HAVE_GETOPT_H)
#if defined(__CYGWIN32__) && !defined(HAVE_GETOPT_H)
extern "C" int getopt(int argc, char*argv[], const char*fmt);
extern "C" int optind;
extern "C" const char*optarg;
@@ -104,12 +104,11 @@ generation_t generation_flag = GN_DEFAULT;
bool gn_icarus_misc_flag = true;
bool gn_cadence_types_flag = true;
bool gn_specify_blocks_flag = true;
bool gn_supported_assertions_flag = true;
bool gn_unsupported_assertions_flag = true;
bool gn_assertions_flag = true;
bool gn_io_range_error_flag = true;
bool gn_strict_ca_eval_flag = false;
bool gn_strict_expr_width_flag = false;
bool gn_shared_loop_index_flag = true;
bool gn_shared_loop_index_flag = false;
bool gn_verilog_ams_flag = false;
/*
@@ -136,14 +135,11 @@ void add_vpi_module(const char*name)
vpi_module_list = tmp;
}
flags["VPI_MODULE_LIST"] = vpi_module_list;
load_vpi_module(name);
}
map<perm_string,unsigned> missing_modules;
map<perm_string,bool> library_file_map;
vector<perm_string> source_files;
list<const char*> library_suff;
list<perm_string> roots;
@@ -166,12 +162,6 @@ bool warn_ob_select = false;
bool warn_sens_entire_vec = false;
bool warn_sens_entire_arr = false;
bool warn_anachronisms = false;
bool warn_floating_nets = false;
/*
* Ignore errors about missing modules
*/
bool ignore_missing_modules = false;
/*
* Debug message class flags.
@@ -183,11 +173,6 @@ bool debug_emit = false;
bool debug_synth2 = false;
bool debug_optimizer = false;
/*
* Compilation control flags.
*/
bool separate_compilation = false;
/*
* Optimization control flags.
*/
@@ -241,7 +226,6 @@ const bool CASE_SENSITIVE = true;
bool synthesis = false;
extern void cprop(Design*des);
extern void exposenodes(Design*des);
extern void synth(Design*des);
extern void synth2(Design*des);
extern void syn_rules(Design*des);
@@ -252,11 +236,10 @@ static struct net_func_map {
const char*name;
void (*func)(Design*);
} func_table[] = {
{ "cprop", &cprop },
{ "exposenodes", &exposenodes },
{ "nodangle", &nodangle },
{ "synth", &synth },
{ "synth2", &synth2 },
{ "cprop", &cprop },
{ "nodangle",&nodangle },
{ "synth", &synth },
{ "synth2", &synth2 },
{ "syn-rules", &syn_rules },
{ 0, 0 }
};
@@ -333,16 +316,10 @@ static void process_generation_flag(const char*gen)
gn_specify_blocks_flag = false;
} else if (strcmp(gen,"assertions") == 0) {
gn_supported_assertions_flag = true;
gn_unsupported_assertions_flag = true;
} else if (strcmp(gen,"supported-assertions") == 0) {
gn_supported_assertions_flag = true;
gn_unsupported_assertions_flag = false;
gn_assertions_flag = true;
} else if (strcmp(gen,"no-assertions") == 0) {
gn_supported_assertions_flag = false;
gn_unsupported_assertions_flag = false;
gn_assertions_flag = false;
} else if (strcmp(gen,"verilog-ams") == 0) {
gn_verilog_ams_flag = true;
@@ -590,15 +567,11 @@ static bool set_default_timescale(const char*ts_string)
*
* warnings:<string>
* Warning flag letters.
*
* ignore_missing_modules:<bool>
* true to ignore errors about missing modules
*/
bool had_timescale = false;
static void read_iconfig_file(const char*ipath)
{
char buf[8*1024];
vector<pair<char*,bool> > to_build_library_index;
FILE*ifile = fopen(ipath, "r");
if (ifile == 0) {
@@ -607,14 +580,6 @@ static void read_iconfig_file(const char*ipath)
}
while (fgets(buf, sizeof buf, ifile) != 0) {
assert(strlen(buf) < sizeof buf);
if ((strlen(buf) == ((sizeof buf) - 1))
&& buf[sizeof buf -2] != '\n') {
cerr << "WARNING: Line buffer overflow reading iconfig file: "
<< ipath
<< "." << endl;
assert(0);
}
if (buf[0] == '#')
continue;
char*cp = strchr(buf, ':');
@@ -718,9 +683,6 @@ static void read_iconfig_file(const char*ipath)
} else if (strcmp(buf,"warnings") == 0) {
/* Scan the warnings enable string for warning flags. */
for ( ; *cp ; cp += 1) switch (*cp) {
case 'f':
warn_floating_nets = true;
break;
case 'i':
warn_implicit = true;
break;
@@ -752,15 +714,11 @@ static void read_iconfig_file(const char*ipath)
break;
}
} else if (strcmp(buf, "ignore_missing_modules") == 0) {
if (strcmp(cp, "true") == 0)
ignore_missing_modules = true;
} else if (strcmp(buf, "-y") == 0) {
to_build_library_index.push_back(make_pair(strdup(cp), CASE_SENSITIVE));
build_library_index(cp, CASE_SENSITIVE);
} else if (strcmp(buf, "-yl") == 0) {
to_build_library_index.push_back(make_pair(strdup(cp), false));
build_library_index(cp, false);
} else if (strcmp(buf, "-Y") == 0) {
library_suff.push_back(strdup(cp));
@@ -799,54 +757,6 @@ static void read_iconfig_file(const char*ipath)
}
}
fclose(ifile);
for (vector<pair<char *, bool> >::iterator it = to_build_library_index.begin() ;
it != to_build_library_index.end() ; ++ it ) {
build_library_index(it->first, it->second);
free(it->first);
}
}
/*
* This function reads a list of source file names. Each name starts
* with the first non-space character, and ends with the last non-space
* character. Spaces in the middle are OK.
*/
static void read_sources_file(const char*path)
{
char line_buf[2048];
FILE*fd = fopen(path, "r");
if (fd == 0) {
cerr << "ERROR: Unable to read source file list: " << path << endl;
return;
}
while (fgets(line_buf, sizeof line_buf, fd) != 0) {
// assertion test that we are not overflowing the line
// buffer. Really should make this more robust, but
// better to assert then go weird.
assert(strlen(line_buf) < sizeof line_buf);
if ((strlen(line_buf) == ((sizeof line_buf) - 1))
&& line_buf[sizeof line_buf -2] != '\n') {
cerr << "WARNING: Line buffer overflow reading sources file: "
<< path
<< "." << endl;
assert(0);
}
char*cp = line_buf + strspn(line_buf, " \t\r\b\f");
char*tail = cp + strlen(cp);
while (tail > cp) {
if (! isspace((int)tail[-1]))
break;
tail -= 1;
tail[0] = 0;
}
if (cp < tail)
source_files.push_back(filename_strings.make(cp));
}
fclose(fd);
}
extern Design* elaborate(list <perm_string> root);
@@ -926,18 +836,20 @@ int main(int argc, char*argv[])
}
library_suff.push_back(strdup(".v"));
// Start the module list with the base system module.
add_vpi_module("system");
add_vpi_module("vhdl_sys");
flags["-o"] = strdup("a.out");
min_typ_max_flag = TYP;
min_typ_max_warn = 10;
while ((opt = getopt(argc, argv, "C:F:f:hN:P:p:Vv")) != EOF) switch (opt) {
while ((opt = getopt(argc, argv, "C:f:hN:P:p:Vv")) != EOF) switch (opt) {
case 'C':
read_iconfig_file(optarg);
break;
case 'F':
read_sources_file(optarg);
break;
case 'f':
parm_to_flagmap(optarg);
break;
@@ -990,7 +902,6 @@ int main(int argc, char*argv[])
"usage: ivl <options> <file>\n"
"options:\n"
"\t-C <name> Config file from driver.\n"
"\t-F <file> List of source files from driver.\n"
"\t-h Print usage information, and exit.\n"
"\t-N <file> Dump the elaborated netlist to <file>.\n"
"\t-P <file> Write the parsed input to <file>.\n"
@@ -1006,19 +917,11 @@ int main(int argc, char*argv[])
return 0;
}
int arg = optind;
while (arg < argc) {
perm_string path = filename_strings.make(argv[arg++]);
source_files.push_back(path);
}
if (source_files.empty()) {
if (optind == argc) {
cerr << "No input files." << endl;
return 1;
}
separate_compilation = source_files.size() > 1;
if( depfile_name ) {
depend_file = fopen(depfile_name, "a");
if(! depend_file) {
@@ -1119,10 +1022,8 @@ int main(int argc, char*argv[])
if (flag_tmp) disable_concatz_generation = strcmp(flag_tmp,"true")==0;
/* Parse the input. Make the pform. */
int rc = 0;
for (unsigned idx = 0; idx < source_files.size(); idx += 1) {
rc += pform_parse(source_files[idx]);
}
pform_set_timescale(def_ts_units, def_ts_prec, 0, 0);
int rc = pform_parse(argv[optind]);
if (pf_path) {
ofstream out (pf_path);
@@ -1136,16 +1037,21 @@ int main(int argc, char*argv[])
; cur != disciplines.end() ; ++ cur ) {
pform_dump(out, (*cur).second);
}
out << "PFORM DUMP COMPILATION UNITS:" << endl;
for (vector<PPackage*>::iterator pac = pform_units.begin()
; pac != pform_units.end() ; ++ pac) {
pform_dump(out, *pac);
out << "PFORM DUMP $ROOT TASKS/FUNCTIONS:" << endl;
for (map<perm_string,PTaskFunc*>::iterator cur = pform_tasks.begin()
; cur != pform_tasks.end() ; ++ cur) {
pform_dump(out, cur->second);
}
out << "PFORM DUMP $ROOT CLASSES:" << endl;
for (size_t idx = 0 ; idx < pform_classes.size() ; idx += 1) {
pform_dump(out, pform_classes[idx]);
}
out << "PFORM DUMP PACKAGES:" << endl;
for (map<perm_string,PPackage*>::iterator pac = pform_packages.begin()
; pac != pform_packages.end() ; ++ pac) {
pform_dump(out, pac->second);
}
out << "PFORM DUMP MODULES:" << endl;
for (map<perm_string,Module*>::iterator mod = pform_modules.begin()
; mod != pform_modules.end() ; ++ mod ) {
@@ -1202,7 +1108,7 @@ int main(int argc, char*argv[])
if (roots.empty()) {
cerr << "No top level modules, and no -s option." << endl;
return ignore_missing_modules ? 0 : 1;
return 1;
}
@@ -1263,6 +1169,12 @@ int main(int argc, char*argv[])
(*idx).second = 0;
}
for(map<perm_string,data_type_t*>::iterator it = pform_typedefs.begin()
; it != pform_typedefs.end() ; ++it) {
delete (*it).second;
(*it).second = 0;
}
if (verbose_flag) {
if (times_flag) {
times(cycles+2);
-27
View File
@@ -1,27 +0,0 @@
These are instructions for building Icarus Verilog binaries for
Windows using mingw cross compiler tools on Linux.
To start with, you need the mingw64-cross-* packages for your linux
distribution, which gives you the x86_64-w64-mingw32-* commands
installed on your system. Installing the cross environment is outside
the scope of this writeup.
First, configure with this command:
$ ./configure --host=x86_64-w64-mingw32
This generates the Makefiles needed to cross compile everything with
the mingw32 compiler. The configure script will generate the command
name paths, so long as commands line x86_64-w64-mingw32-gcc
et. al. are in your path.
Next, compile with the command:
$ make
The configure generated the cross compiler flags, but there are a few
bits that need to be compiled with the native compiler. (version.exe
for example is used by the build process but is not installed.) The
configure script should have gotten all that right.
+1 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2015 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -42,7 +42,6 @@ unsigned count_lval_width(const NetAssign_*idx)
NetAssign_::NetAssign_(NetAssign_*n)
: nest_(n), sig_(0), word_(0), base_(0), sel_type_(IVL_SEL_OTHER)
{
lwid_ = 0;
more = 0;
signed_ = false;
turn_sig_to_wire_on_release_ = false;
+88 -138
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -101,11 +101,11 @@ uint64_t Design::scale_to_precision(uint64_t val,
return val;
}
NetScope* Design::make_root_scope(perm_string root, NetScope*unit_scope,
bool program_block, bool is_interface)
NetScope* Design::make_root_scope(perm_string root, bool program_block,
bool is_interface)
{
NetScope *root_scope_;
root_scope_ = new NetScope(0, hname_t(root), NetScope::MODULE, unit_scope,
root_scope_ = new NetScope(0, hname_t(root), NetScope::MODULE,
false, program_block, is_interface);
/* This relies on the fact that the basename return value is
permallocated. */
@@ -125,18 +125,31 @@ list<NetScope*> Design::find_root_scopes() const
return root_scopes_;
}
NetScope* Design::make_package_scope(perm_string name, NetScope*unit_scope,
bool is_unit)
NetScope* Design::make_package_scope(perm_string name)
{
NetScope*scope;
scope = new NetScope(0, hname_t(name), NetScope::PACKAGE, unit_scope,
false, false, false, is_unit);
scope = new NetScope(0, hname_t(name), NetScope::PACKAGE, false, false);
scope->set_module_name(scope->basename());
packages_[name] = scope;
return scope;
}
void Design::add_class(netclass_t*cl, PClass*pclass)
{
Definitions::add_class(cl);
class_to_pclass_[cl] = pclass;
}
netclass_t* Design::find_class(perm_string name) const
{
map<perm_string,netclass_t*>::const_iterator cur = classes_.find(name);
if (cur != classes_.end())
return cur->second;
return 0;
}
NetScope* Design::find_package(perm_string name) const
{
map<perm_string,NetScope*>::const_iterator cur = packages_.find(name);
@@ -157,6 +170,17 @@ list<NetScope*> Design::find_package_scopes() const
return res;
}
list<NetScope*> Design::find_roottask_scopes() const
{
list<NetScope*>res;
for (map<NetScope*,PTaskFunc*>::const_iterator cur = root_tasks_.begin()
; cur != root_tasks_.end() ; ++ cur) {
res.push_back (cur->first);
}
return res;
}
/*
* This method locates a scope in the design, given its rooted
* hierarchical name. Each component of the key is used to scan one
@@ -187,6 +211,25 @@ NetScope* Design::find_scope(const std::list<hname_t>&path) const
}
}
for (map<NetScope*,PTaskFunc*>::const_iterator root = root_tasks_.begin()
; root != root_tasks_.end() ; ++ root) {
NetScope*cur = root->first;
if (path.front() != cur->fullname())
continue;
std::list<hname_t> tmp = path;
tmp.pop_front();
while (cur) {
if (tmp.empty()) return cur;
cur = cur->child( tmp.front() );
tmp.pop_front();
}
}
return 0;
}
@@ -210,55 +253,6 @@ NetScope* Design::find_scope(const hname_t&path) const
return 0;
}
static bool is_design_unit(NetScope*scope)
{
return (scope->type() == NetScope::MODULE && !scope->nested_module())
|| (scope->type() == NetScope::PACKAGE);
}
static bool is_subroutine(NetScope::TYPE type)
{
return type == NetScope::TASK || type == NetScope::FUNC;
}
/*
* This method locates a scope within another scope, given its relative
* hierarchical name. Each component of the key is used to scan one
* more step down the tree until the name runs out or the search
* fails.
*/
NetScope* Design::find_scope_(NetScope*scope, const std::list<hname_t>&path,
NetScope::TYPE type) const
{
std::list<hname_t> tmp = path;
do {
hname_t key = tmp.front();
/* If we are looking for a module or we are not
* looking at the last path component check for
* a name match (second line). */
if (scope->type() == NetScope::MODULE
&& (type == NetScope::MODULE || tmp.size() > 1)
&& scope->module_name()==key.peek_name()) {
/* Up references may match module name */
} else {
NetScope*found_scope = scope->child(key);
if (found_scope == 0) {
found_scope = scope->find_import(this, key.peek_name());
if (found_scope)
found_scope = found_scope->child(key);
}
scope = found_scope;
if (scope == 0) break;
}
tmp.pop_front();
} while (! tmp.empty());
return scope;
}
/*
* This is a relative lookup of a scope by name. The starting point is
* the scope parameter within which I start looking for the scope. If
@@ -272,68 +266,36 @@ NetScope* Design::find_scope(NetScope*scope, const std::list<hname_t>&path,
if (path.empty())
return scope;
// Record the compilation unit scope for use later.
NetScope*unit_scope = scope->unit();
for ( ; scope ; scope = scope->parent()) {
// First search upwards through the hierarchy.
while (scope) {
NetScope*found_scope = find_scope_(scope, path, type);
if (found_scope)
return found_scope;
std::list<hname_t> tmp = path;
// Avoid searching the unit scope twice.
if (scope == unit_scope)
unit_scope = 0;
NetScope*cur = scope;
do {
hname_t key = tmp.front();
/* If we are looking for a module or we are not
* looking at the last path component check for
* a name match (second line). */
if (cur->type() == NetScope::MODULE
&& (type == NetScope::MODULE || tmp.size() > 1)
&& cur->module_name()==key.peek_name()) {
// Special case - see IEEE 1800-2012 section 23.8.1.
if (unit_scope && is_design_unit(scope) && is_subroutine(type)) {
found_scope = find_scope_(unit_scope, path, type);
if (found_scope)
return found_scope;
/* Up references may match module name */
unit_scope = 0;
}
} else {
cur = cur->child( key );
if (cur == 0) break;
}
tmp.pop_front();
} while (! tmp.empty());
scope = scope->parent();
}
// If we haven't already done so, search the compilation unit scope.
if (unit_scope) {
NetScope*found_scope = find_scope_(unit_scope, path, type);
if (found_scope)
return found_scope;
if (cur) return cur;
}
// Last chance. Look for the name starting at the root.
return find_scope(path);
}
/*
* This method locates a scope within another scope, given its relative
* hierarchical name. Each component of the key is used to scan one
* more step down the tree until the name runs out or the search
* fails.
*/
NetScope* Design::find_scope_(NetScope*scope, const hname_t&path,
NetScope::TYPE type) const
{
/* If we are looking for a module or we are not
* looking at the last path component check for
* a name match (second line). */
if ((scope->type() == NetScope::MODULE) && (type == NetScope::MODULE)
&& (scope->module_name() == path.peek_name())) {
/* Up references may match module name */
return scope;
}
NetScope*found_scope = scope->child(path);
if (found_scope == 0) {
found_scope = scope->find_import(this, path.peek_name());
if (found_scope)
found_scope = found_scope->child(path);
}
return found_scope;
}
/*
* This is a relative lookup of a scope by name. The starting point is
* the scope parameter within which I start looking for the scope. If
@@ -345,36 +307,24 @@ NetScope* Design::find_scope(NetScope*scope, const hname_t&path,
{
assert(scope);
// Record the compilation unit scope for use later.
NetScope*unit_scope = scope->unit();
for ( ; scope ; scope = scope->parent()) {
// First search upwards through the hierarchy.
while (scope) {
NetScope*found_scope = find_scope_(scope, path, type);
if (found_scope)
return found_scope;
NetScope*cur = scope;
// Avoid searching the unit scope twice.
if (scope == unit_scope)
unit_scope = 0;
/* If we are looking for a module or we are not
* looking at the last path component check for
* a name match (second line). */
if (cur->type() == NetScope::MODULE
&& (type == NetScope::MODULE)
&& cur->module_name()==path.peek_name()) {
// Special case - see IEEE 1800-2012 section 23.8.1.
if (unit_scope && is_design_unit(scope) && is_subroutine(type)) {
found_scope = find_scope_(unit_scope, path, type);
if (found_scope)
return found_scope;
/* Up references may match module name */
unit_scope = 0;
} else {
cur = cur->child( path );
}
scope = scope->parent();
}
// If we haven't already done so, search the compilation unit scope.
if (unit_scope) {
NetScope*found_scope = find_scope_(unit_scope, path, type);
if (found_scope)
return found_scope;
if (cur) return cur;
}
// Last chance. Look for the name starting at the root.
@@ -876,11 +826,6 @@ NetNet* Design::find_signal(NetScope*scope, pform_name_t path)
if (NetNet*net = scope->find_signal(key))
return net;
if (NetScope*import_scope = scope->find_import(this, key)) {
scope = import_scope;
continue;
}
if (scope->type() == NetScope::MODULE)
break;
@@ -922,6 +867,11 @@ NetScope* Design::find_task(NetScope*scope, const pform_name_t&name)
return 0;
}
void Design::add_root_task(NetScope*tscope, PTaskFunc*tf)
{
root_tasks_[tscope] = tf;
}
void Design::add_node(NetNode*net)
{
assert(net->design_ == 0);
@@ -940,8 +890,8 @@ void Design::add_node(NetNode*net)
void Design::del_node(NetNode*net)
{
assert(net != 0);
assert(net->design_ == this);
assert(net != 0);
/* Interact with the Design::functor method by manipulating the
cur and nxt pointers that it is using. */
+2 -9
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2017 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -28,7 +28,6 @@
NetEvent::NetEvent(perm_string n)
: name_(n)
{
local_flag_ = false;
scope_ = 0;
snext_ = 0;
probes_ = 0;
@@ -346,7 +345,7 @@ void NetEvProbe::find_similar_probes(list<NetEvProbe*>&plist)
}
NetEvWait::NetEvWait(NetProc*pr)
: statement_(pr), has_t0_trigger_(false)
: statement_(pr)
{
}
@@ -370,7 +369,6 @@ NetEvWait::~NetEvWait()
tmp->next = tmp->next->next;
delete tmp;
}
delete tgt;
}
events_.clear();
}
@@ -443,8 +441,3 @@ NetProc* NetEvWait::statement()
{
return statement_;
}
const NetProc* NetEvWait::statement() const
{
return statement_;
}
+19 -21
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -403,14 +403,7 @@ ivl_variable_type_t NetEProperty::expr_type() const
NetESelect::NetESelect(NetExpr*exp, NetExpr*base, unsigned wid,
ivl_select_type_t sel_type)
: expr_(exp), base_(base), use_type_(0), sel_type_(sel_type)
{
expr_width(wid);
}
NetESelect::NetESelect(NetExpr*exp, NetExpr*base, unsigned wid,
ivl_type_t use_type)
: expr_(exp), base_(base), use_type_(use_type), sel_type_(IVL_SEL_OTHER)
: expr_(exp), base_(base), sel_type_(sel_type)
{
expr_width(wid);
}
@@ -438,9 +431,6 @@ ivl_select_type_t NetESelect::select_type() const
ivl_variable_type_t NetESelect::expr_type() const
{
if (use_type_)
return use_type_->base_type();
ivl_variable_type_t type = expr_->expr_type();
// Special case: If the sub-expression is an IVL_VT_STRING,
@@ -449,12 +439,20 @@ ivl_variable_type_t NetESelect::expr_type() const
if (type == IVL_VT_STRING && expr_width()==8)
return IVL_VT_BOOL;
return type;
}
if (type != IVL_VT_DARRAY)
return type;
const netenum_t* NetESelect::enumeration() const
{
return dynamic_cast<const netenum_t*> (use_type_);
ivl_assert(*this, type == IVL_VT_DARRAY);
// Special case: If the expression is a DARRAY, then the
// sub-expression must be a NetESignal and the type of the
// NetESelect expression is the element type of the arrayed signal.
NetESignal*sig = dynamic_cast<NetESignal*>(expr_);
ivl_assert(*this, sig);
const netarray_t*array_type = dynamic_cast<const netarray_t*> (sig->sig()->net_type());
ivl_assert(*this, array_type);
return array_type->element_type()->base_type();
}
bool NetESelect::has_width() const
@@ -463,15 +461,15 @@ bool NetESelect::has_width() const
}
NetESFunc::NetESFunc(const char*n, ivl_variable_type_t t,
unsigned width, unsigned np, bool is_overridden)
: name_(0), type_(t), enum_type_(0), parms_(np), is_overridden_(is_overridden)
unsigned width, unsigned np)
: name_(0), type_(t), enum_type_(0), parms_(np)
{
name_ = lex_strings.add(n);
expr_width(width);
}
NetESFunc::NetESFunc(const char*n, ivl_type_t rtype, unsigned np)
: NetExpr(rtype), name_(0), type_(IVL_VT_NO_TYPE), enum_type_(0), parms_(np), is_overridden_(false)
: NetExpr(rtype), name_(0), type_(IVL_VT_NO_TYPE), enum_type_(0), parms_(np)
{
name_ = lex_strings.add(n);
expr_width(rtype->packed_width());
@@ -487,7 +485,7 @@ NetESFunc::NetESFunc(const char*n, ivl_type_t rtype, unsigned np)
}
NetESFunc::NetESFunc(const char*n, const netenum_t*enum_type, unsigned np)
: name_(0), type_(enum_type->base_type()), enum_type_(enum_type), parms_(np), is_overridden_(false)
: name_(0), type_(enum_type->base_type()), enum_type_(enum_type), parms_(np)
{
name_ = lex_strings.add(n);
expr_width(enum_type->packed_width());
+1 -12
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2016 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -481,17 +481,6 @@ NetNet* Nexus::pick_any_net()
return 0;
}
NetNode* Nexus::pick_any_node()
{
for (Link*cur = first_nlink() ; cur ; cur = cur->next_nlink()) {
NetNode*node = dynamic_cast<NetNode*>(cur->get_obj());
if (node != 0)
return node;
}
return 0;
}
const char* Nexus::name() const
{
if (name_)
+147 -249
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2016 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -19,37 +19,37 @@
# include "config.h"
# include <iostream>
# include <set>
# include <iostream>
# include <cassert>
# include <typeinfo>
# include "compiler.h"
# include "netlist.h"
# include "netmisc.h"
NexusSet* NetExpr::nex_input(bool, bool, bool) const
NexusSet* NetExpr::nex_input(bool)
{
cerr << get_fileline()
<< ": internal error: nex_input not implemented: "
<< *this << endl;
return new NexusSet;
return 0;
}
NexusSet* NetProc::nex_input(bool, bool, bool) const
NexusSet* NetProc::nex_input(bool)
{
cerr << get_fileline()
<< ": internal error: NetProc::nex_input not implemented"
<< endl;
return new NexusSet;
return 0;
}
NexusSet* NetEArrayPattern::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetEArrayPattern::nex_input(bool rem_out)
{
NexusSet*result = new NexusSet;
for (size_t idx = 0 ; idx < items_.size() ; idx += 1) {
if (items_[idx]==0) continue;
NexusSet*tmp = items_[idx]->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = items_[idx]->nex_input(rem_out);
if (tmp == 0) continue;
result->add(*tmp);
@@ -58,32 +58,32 @@ NexusSet* NetEArrayPattern::nex_input(bool rem_out, bool always_sens, bool neste
return result;
}
NexusSet* NetEBinary::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetEBinary::nex_input(bool rem_out)
{
NexusSet*result = left_->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = right_->nex_input(rem_out, always_sens, nested_func);
NexusSet*result = left_->nex_input(rem_out);
NexusSet*tmp = right_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
return result;
}
NexusSet* NetEConcat::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetEConcat::nex_input(bool rem_out)
{
if (parms_[0] == NULL) return new NexusSet;
NexusSet*result = parms_[0]->nex_input(rem_out, always_sens, nested_func);
if (parms_[0] == NULL) return NULL;
NexusSet*result = parms_[0]->nex_input(rem_out);
for (unsigned idx = 1 ; idx < parms_.size() ; idx += 1) {
if (parms_[idx] == NULL) {
delete result;
return new NexusSet;
return NULL;
}
NexusSet*tmp = parms_[idx]->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = parms_[idx]->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
return result;
}
NexusSet* NetEAccess::nex_input(bool, bool, bool) const
NexusSet* NetEAccess::nex_input(bool)
{
return new NexusSet;
}
@@ -91,73 +91,63 @@ NexusSet* NetEAccess::nex_input(bool, bool, bool) const
/*
* A constant has not inputs, so always return an empty set.
*/
NexusSet* NetEConst::nex_input(bool, bool, bool) const
NexusSet* NetEConst::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetECReal::nex_input(bool, bool, bool) const
NexusSet* NetECReal::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetEEvent::nex_input(bool, bool, bool) const
NexusSet* NetEEvent::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetELast::nex_input(bool, bool, bool) const
NexusSet* NetELast::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetENetenum::nex_input(bool, bool, bool) const
NexusSet* NetENetenum::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetENew::nex_input(bool, bool, bool) const
NexusSet* NetENew::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetENull::nex_input(bool, bool, bool) const
NexusSet* NetENull::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetEProperty::nex_input(bool, bool, bool) const
NexusSet* NetEProperty::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetEScope::nex_input(bool, bool, bool) const
NexusSet* NetEScope::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetESelect::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetESelect::nex_input(bool rem_out)
{
NexusSet*result = base_? base_->nex_input(rem_out, always_sens, nested_func) : new NexusSet();
NexusSet*tmp = expr_->nex_input(rem_out, always_sens, nested_func);
bool const_select = result->size() == 0;
if (always_sens && const_select) {
if (NetEConst *val = dynamic_cast <NetEConst*> (base_)) {
assert(select_type() == IVL_SEL_OTHER);
if (NetESignal *sig = dynamic_cast<NetESignal*> (expr_)) {
delete tmp;
tmp = sig->nex_input_base(rem_out, always_sens, nested_func,
val->value().as_unsigned(), expr_width());
} else {
cerr << get_fileline() << ": Sorry, cannot determine the sensitivity "
<< "for the select of " << *expr_ << ", using all bits." << endl;
}
}
NexusSet*result = base_? base_->nex_input(rem_out) : new NexusSet();
NexusSet*tmp = expr_->nex_input(rem_out);
if (tmp == NULL) {
delete result;
return NULL;
}
result->add(*tmp);
delete tmp;
/* See the comment for NetESignal below. */
if (base_ && ! always_sens && warn_sens_entire_vec) {
if (base_ && warn_sens_entire_vec) {
cerr << get_fileline() << ": warning: @* is sensitive to all "
"bits in '" << *expr_ << "'." << endl;
}
@@ -167,35 +157,30 @@ NexusSet* NetESelect::nex_input(bool rem_out, bool always_sens, bool nested_func
/*
* The $fread, etc. system functions can have NULL arguments.
*/
NexusSet* NetESFunc::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetESFunc::nex_input(bool rem_out)
{
NexusSet*result = new NexusSet;
if (parms_.empty())
return new NexusSet;
if (parms_.empty()) return result;
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
NexusSet*result;
if (parms_[0]) result = parms_[0]->nex_input(rem_out);
else result = new NexusSet;
for (unsigned idx = 1 ; idx < parms_.size() ; idx += 1) {
if (parms_[idx]) {
NexusSet*tmp = parms_[idx]->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = parms_[idx]->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
}
return result;
}
NexusSet* NetEShallowCopy::nex_input(bool, bool, bool) const
NexusSet* NetEShallowCopy::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetESignal::nex_input(bool rem_out, bool always_sens, bool nested_func) const
{
return nex_input_base(rem_out, always_sens, nested_func, 0, 0);
}
NexusSet* NetESignal::nex_input_base(bool rem_out, bool always_sens, bool nested_func,
unsigned base, unsigned width) const
NexusSet* NetESignal::nex_input(bool rem_out)
{
/*
* This is not what I would expect for the various selects (bit,
@@ -203,88 +188,48 @@ NexusSet* NetESignal::nex_input_base(bool rem_out, bool always_sens, bool nested
* instead of building the appropriate select and then using it
* as the trigger. Other simulators also add everything.
*/
bool const_select = false;
unsigned const_word = 0;
NexusSet*result = new NexusSet;
/* Local signals are not added to the sensitivity list. */
if (net_->local_flag()) return result;
/* If we have an array index add it to the sensitivity list. */
if (word_) {
NexusSet*tmp;
tmp = word_->nex_input(rem_out, always_sens, nested_func);
tmp = word_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
if (!always_sens && warn_sens_entire_arr) {
if (warn_sens_entire_arr) {
cerr << get_fileline() << ": warning: @* is sensitive to all "
<< net_->unpacked_count() << " words in array '"
<< name() << "'." << endl;
}
if (always_sens) if (NetEConst *val = dynamic_cast <NetEConst*> (word_)) {
const_select = true;
const_word = val->value().as_unsigned();
}
}
if ((base == 0) && (width == 0)) width = net_->vector_width();
if (const_select) {
result->add(net_->pin(const_word).nexus(), base, width);
} else {
for (unsigned idx = 0 ; idx < net_->pin_count() ; idx += 1)
result->add(net_->pin(idx).nexus(), base, width);
}
for (unsigned idx = 0 ; idx < net_->pin_count() ; idx += 1)
result->add(net_->pin(idx).nexus(), 0, net_->vector_width());
return result;
}
NexusSet* NetETernary::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetETernary::nex_input(bool rem_out)
{
NexusSet*tmp;
NexusSet*result = cond_->nex_input(rem_out, always_sens, nested_func);
NexusSet*result = cond_->nex_input(rem_out);
tmp = true_val_->nex_input(rem_out, always_sens, nested_func);
tmp = true_val_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
tmp = false_val_->nex_input(rem_out, always_sens, nested_func);
tmp = false_val_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
return result;
}
NexusSet* NetEUFunc::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetEUFunc::nex_input(bool rem_out)
{
NexusSet*result = new NexusSet;
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
NexusSet*tmp = parms_[idx]->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
if (always_sens) {
NetFuncDef*func = func_->func_def();
// Avoid recursive function calls.
static set<NetFuncDef*> func_set;
if (!nested_func)
func_set.clear();
if (!func_set.insert(func).second)
return result;
NexusSet*tmp = func->proc()->nex_input(rem_out, always_sens, true);
// Remove the function inputs
NexusSet*in = new NexusSet;
for (unsigned idx = 0 ; idx < func->port_count() ; idx += 1) {
NetNet*net = func->port(idx);
assert(net->pin_count() == 1);
in->add(net->pin(0).nexus(), 0, net->vector_width());
}
tmp->rem(*in);
delete in;
NexusSet*tmp = parms_[idx]->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
@@ -292,28 +237,21 @@ NexusSet* NetEUFunc::nex_input(bool rem_out, bool always_sens, bool nested_func)
return result;
}
NexusSet* NetEUnary::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetEUnary::nex_input(bool rem_out)
{
return expr_->nex_input(rem_out, always_sens, nested_func);
return expr_->nex_input(rem_out);
}
NexusSet* NetAlloc::nex_input(bool, bool, bool) const
NexusSet* NetAssign_::nex_input(bool rem_out)
{
return new NexusSet;
}
NexusSet* NetAssign_::nex_input(bool rem_out, bool always_sens, bool nested_func) const
{
assert(! nest_);
NexusSet*result = new NexusSet;
if (word_) {
NexusSet*tmp = word_->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = word_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
if (base_) {
NexusSet*tmp = base_->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = base_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
@@ -321,21 +259,15 @@ NexusSet* NetAssign_::nex_input(bool rem_out, bool always_sens, bool nested_func
return result;
}
NexusSet* NetAssignBase::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetAssignBase::nex_input(bool rem_out)
{
NexusSet*result = new NexusSet;
// For the deassign and release statements there is no R-value.
if (rval_) {
NexusSet*tmp = rval_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
NexusSet*result = rval_->nex_input(rem_out);
/* It is possible that the lval_ can have nex_input values. In
particular, index expressions are statement inputs as well,
so should be addressed here. */
for (NetAssign_*cur = lval_ ; cur ; cur = cur->more) {
NexusSet*tmp = cur->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = cur->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
@@ -360,15 +292,16 @@ NexusSet* NetAssignBase::nex_input(bool rem_out, bool always_sens, bool nested_f
* In this example, "t" should not be in the input set because it is
* used by the sequence as a temporary value.
*/
NexusSet* NetBlock::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetBlock::nex_input(bool rem_out)
{
if (last_ == 0) return new NexusSet;
if (last_ == 0)
return new NexusSet;
if (! always_sens && (type_ != SEQU)) {
if (type_ != SEQU) {
cerr << get_fileline() << ": internal error: Sorry, "
<< "I don't know how to synthesize fork/join blocks."
<< endl;
return new NexusSet;
return 0;
}
NetProc*cur = last_->next_;
@@ -379,10 +312,10 @@ NexusSet* NetBlock::nex_input(bool rem_out, bool always_sens, bool nested_func)
do {
/* Get the inputs for the current statement. */
NexusSet*tmp = cur->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = cur->nex_input(rem_out);
/* Add the current input set to the accumulated input set. */
result->add(*tmp);
if (tmp != 0) result->add(*tmp);
delete tmp;
/* Add the current outputs to the accumulated output set if
@@ -406,9 +339,11 @@ NexusSet* NetBlock::nex_input(bool rem_out, bool always_sens, bool nested_func)
* the inputs to all the guards, and the inputs to all the guarded
* statements.
*/
NexusSet* NetCase::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetCase::nex_input(bool rem_out)
{
NexusSet*result = expr_->nex_input(rem_out, always_sens, nested_func);
NexusSet*result = expr_->nex_input(rem_out);
if (result == 0)
return 0;
for (size_t idx = 0 ; idx < items_.size() ; idx += 1) {
@@ -416,7 +351,8 @@ NexusSet* NetCase::nex_input(bool rem_out, bool always_sens, bool nested_func) c
if (items_[idx].statement == 0)
continue;
NexusSet*tmp = items_[idx].statement->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = items_[idx].statement->nex_input(rem_out);
assert(tmp);
result->add(*tmp);
delete tmp;
@@ -424,7 +360,8 @@ NexusSet* NetCase::nex_input(bool rem_out, bool always_sens, bool nested_func) c
case is special and is identified by a null
guard. The default guard obviously has no input. */
if (items_[idx].guard) {
tmp = items_[idx].guard->nex_input(rem_out, always_sens, nested_func);
tmp = items_[idx].guard->nex_input(rem_out);
assert(tmp);
result->add(*tmp);
delete tmp;
}
@@ -433,18 +370,24 @@ NexusSet* NetCase::nex_input(bool rem_out, bool always_sens, bool nested_func) c
return result;
}
NexusSet* NetCondit::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetCAssign::nex_input(bool)
{
NexusSet*result = expr_->nex_input(rem_out, always_sens, nested_func);
cerr << get_fileline() << ": internal warning: NetCAssign::nex_input()"
<< " not implemented." << endl;
return new NexusSet;
}
NexusSet* NetCondit::nex_input(bool rem_out)
{
NexusSet*result = expr_->nex_input(rem_out);
if (if_ != 0) {
NexusSet*tmp = if_->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = if_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
if (else_ != 0) {
NexusSet*tmp = else_->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = else_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
@@ -452,85 +395,51 @@ NexusSet* NetCondit::nex_input(bool rem_out, bool always_sens, bool nested_func)
return result;
}
NexusSet* NetDisable::nex_input(bool, bool, bool) const
NexusSet* NetDoWhile::nex_input(bool rem_out)
{
NexusSet*result = proc_->nex_input(rem_out);
NexusSet*tmp = cond_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
return result;
}
NexusSet* NetEvWait::nex_input(bool rem_out)
{
NexusSet*result;
if (statement_)
result = statement_->nex_input(rem_out);
else
result = new NexusSet;
return result;
}
NexusSet* NetForce::nex_input(bool)
{
cerr << get_fileline() << ": internal warning: NetForce::nex_input()"
<< " not implemented." << endl;
return new NexusSet;
}
NexusSet* NetDoWhile::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetForLoop::nex_input(bool rem_out)
{
NexusSet*result = cond_->nex_input(rem_out, always_sens, nested_func);
NexusSet*result = init_expr_->nex_input(rem_out);
if (proc_) {
NexusSet*tmp = proc_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
NexusSet*tmp = condition_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
return result;
}
tmp = statement_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
NexusSet* NetEvTrig::nex_input(bool, bool, bool) const
{
return new NexusSet;
}
NexusSet* NetEvWait::nex_input(bool rem_out, bool always_sens, bool nested_func) const
{
NexusSet*result = new NexusSet;
if (statement_) {
NexusSet*tmp = statement_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
return result;
}
NexusSet* NetForever::nex_input(bool rem_out, bool always_sens, bool nested_func) const
{
NexusSet*result = new NexusSet;
if (statement_) {
NexusSet*tmp = statement_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
return result;
}
NexusSet* NetForLoop::nex_input(bool rem_out, bool always_sens, bool nested_func) const
{
NexusSet*result = new NexusSet;
if (init_expr_) {
NexusSet*tmp = init_expr_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
if (condition_) {
NexusSet*tmp = condition_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
if (step_statement_) {
NexusSet*tmp = step_statement_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
if (statement_) {
NexusSet*tmp = statement_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
tmp = step_statement_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
if (gn_shared_loop_index_flag) {
NexusSet*tmp = new NexusSet();
tmp = new NexusSet();
for (unsigned idx = 0 ; idx < index_->pin_count() ; idx += 1)
tmp->add(index_->pin(idx).nexus(), 0, index_->vector_width());
@@ -541,9 +450,10 @@ NexusSet* NetForLoop::nex_input(bool rem_out, bool always_sens, bool nested_func
return result;
}
NexusSet* NetFree::nex_input(bool, bool, bool) const
NexusSet* NetForever::nex_input(bool rem_out)
{
return new NexusSet;
NexusSet*result = statement_->nex_input(rem_out);
return result;
}
/*
@@ -555,44 +465,36 @@ NexusSet* NetFree::nex_input(bool, bool, bool) const
* include the input set of the <expr> because it does not affect the
* result. The statement can be omitted.
*/
NexusSet* NetPDelay::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetPDelay::nex_input(bool rem_out)
{
NexusSet*result = new NexusSet;
if (statement_) {
NexusSet*tmp = statement_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
if (statement_ == 0) return 0;
NexusSet*result = statement_->nex_input(rem_out);
return result;
}
NexusSet* NetRepeat::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetRepeat::nex_input(bool rem_out)
{
NexusSet*result = expr_->nex_input(rem_out, always_sens, nested_func);
if (statement_) {
NexusSet*tmp = statement_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
NexusSet*result = statement_->nex_input(rem_out);
NexusSet*tmp = expr_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
return result;
}
/*
* The $display, etc. system tasks can have NULL arguments.
*/
NexusSet* NetSTask::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetSTask::nex_input(bool rem_out)
{
NexusSet*result = new NexusSet;
if (parms_.empty())
return new NexusSet;
if (parms_.empty()) return result;
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
NexusSet*result;
if (parms_[0]) result = parms_[0]->nex_input(rem_out);
else result = new NexusSet;
for (unsigned idx = 1 ; idx < parms_.size() ; idx += 1) {
if (parms_[idx]) {
NexusSet*tmp = parms_[idx]->nex_input(rem_out, always_sens, nested_func);
NexusSet*tmp = parms_[idx]->nex_input(rem_out);
result->add(*tmp);
delete tmp;
}
@@ -606,20 +508,16 @@ NexusSet* NetSTask::nex_input(bool rem_out, bool always_sens, bool nested_func)
* parameters to consider, because the compiler already removed them
* and converted them to blocking assignments.
*/
NexusSet* NetUTask::nex_input(bool, bool, bool) const
NexusSet* NetUTask::nex_input(bool)
{
return new NexusSet;
}
NexusSet* NetWhile::nex_input(bool rem_out, bool always_sens, bool nested_func) const
NexusSet* NetWhile::nex_input(bool rem_out)
{
NexusSet*result = cond_->nex_input(rem_out, always_sens, nested_func);
if (proc_) {
NexusSet*tmp = proc_->nex_input(rem_out, always_sens, nested_func);
result->add(*tmp);
delete tmp;
}
NexusSet*result = proc_->nex_input(rem_out);
NexusSet*tmp = cond_->nex_input(rem_out);
result->add(*tmp);
delete tmp;
return result;
}
+16 -35
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2002-2017 Stephen Williams (steve@icarus.com)
* Copyright (c) 2002-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -36,13 +36,8 @@ void NetProc::nex_output(NexusSet&)
<< endl;
}
void NetAlloc::nex_output(NexusSet&)
{
}
void NetAssign_::nex_output(NexusSet&out)
{
assert(! nest_);
assert(sig_);
unsigned use_word = 0;
unsigned use_base = 0;
@@ -94,7 +89,8 @@ void NetAssignBase::nex_output(NexusSet&out)
void NetBlock::nex_output(NexusSet&out)
{
if (last_ == 0) return;
if (last_ == 0)
return;
NetProc*cur = last_;
do {
@@ -108,8 +104,10 @@ void NetCase::nex_output(NexusSet&out)
for (size_t idx = 0 ; idx < items_.size() ; idx += 1) {
// Empty statements clearly have no output.
if (items_[idx].statement == 0) continue;
if (items_[idx].statement == 0)
continue;
assert(items_[idx].statement);
items_[idx].statement->nex_output(out);
}
@@ -117,31 +115,22 @@ void NetCase::nex_output(NexusSet&out)
void NetCondit::nex_output(NexusSet&out)
{
if (if_) if_->nex_output(out);
if (else_) else_->nex_output(out);
}
void NetDisable::nex_output(NexusSet&)
{
if (if_ != 0)
if_->nex_output(out);
if (else_ != 0)
else_->nex_output(out);
}
void NetDoWhile::nex_output(NexusSet&out)
{
if (proc_) proc_->nex_output(out);
}
void NetEvTrig::nex_output(NexusSet&)
{
if (proc_ != 0)
proc_->nex_output(out);
}
void NetEvWait::nex_output(NexusSet&out)
{
if (statement_) statement_->nex_output(out);
}
void NetForever::nex_output(NexusSet&out)
{
if (statement_) statement_->nex_output(out);
assert(statement_);
statement_->nex_output(out);
}
void NetForLoop::nex_output(NexusSet&out)
@@ -149,20 +138,11 @@ void NetForLoop::nex_output(NexusSet&out)
if (statement_) statement_->nex_output(out);
}
void NetFree::nex_output(NexusSet&)
{
}
void NetPDelay::nex_output(NexusSet&out)
{
if (statement_) statement_->nex_output(out);
}
void NetRepeat::nex_output(NexusSet&out)
{
if (statement_) statement_->nex_output(out);
}
/*
* For the purposes of synthesis, system task calls have no output at
* all. This is OK because most system tasks are not synthesizable in
@@ -183,5 +163,6 @@ void NetUTask::nex_output(NexusSet&)
void NetWhile::nex_output(NexusSet&out)
{
if (proc_) proc_->nex_output(out);
if (proc_ != 0)
proc_->nex_output(out);
}
+3 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000-2015 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2014 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -83,8 +83,8 @@ const NetProc* NetBlock::proc_next(const NetProc*cur) const
return cur->next_;
}
NetCase::NetCase(ivl_case_quality_t q, NetCase::TYPE c, NetExpr*ex, unsigned cnt)
: quality_(q), type_(c), expr_(ex), items_(cnt)
NetCase::NetCase(NetCase::TYPE c, NetExpr*ex, unsigned cnt)
: type_(c), expr_(ex), items_(cnt)
{
ivl_assert(*this, expr_);
}
@@ -199,7 +199,6 @@ NetForever::~NetForever()
NetForLoop::NetForLoop(NetNet*ind, NetExpr*iexpr, NetExpr*cond, NetProc*sub, NetProc*step)
: index_(ind), init_expr_(iexpr), condition_(cond), statement_(sub), step_statement_(step)
{
as_block_ = NULL;
}
void NetForLoop::wrap_up()
+31 -138
View File
@@ -1,6 +1,5 @@
/*
* Copyright (c) 2000-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 2016 CERN Michele Castellana (michele.castellana@cern.ch)
* Copyright (c) 2000-2017 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -24,8 +23,6 @@
# include "netlist.h"
# include "netclass.h"
# include "netenum.h"
# include "netvector.h"
# include "PPackage.h"
# include <cstring>
# include <cstdlib>
# include <sstream>
@@ -113,13 +110,11 @@ void Definitions::add_class(netclass_t*net_class)
* in question.
*/
NetScope::NetScope(NetScope*up, const hname_t&n, NetScope::TYPE t, NetScope*in_unit,
bool nest, bool program, bool interface, bool compilation_unit)
NetScope::NetScope(NetScope*up, const hname_t&n, NetScope::TYPE t, bool nest,
bool program, bool interface)
: type_(t), name_(n), nested_module_(nest), program_block_(program),
is_interface_(interface), is_unit_(compilation_unit), unit_(in_unit), up_(up)
is_interface_(interface), up_(up)
{
imports_ = 0;
typedefs_ = 0;
events_ = 0;
lcounter_ = 0;
is_auto_ = false;
@@ -127,10 +122,8 @@ NetScope::NetScope(NetScope*up, const hname_t&n, NetScope::TYPE t, NetScope*in_u
calls_stask_ = false;
in_final_ = false;
if (compilation_unit)
unit_ = this;
if (up) {
assert(t!=CLASS);
need_const_func_ = up->need_const_func_;
is_const_func_ = up->is_const_func_;
time_unit_ = up->time_unit();
@@ -138,8 +131,6 @@ NetScope::NetScope(NetScope*up, const hname_t&n, NetScope::TYPE t, NetScope*in_u
time_from_timescale_ = up->time_from_timescale();
// Need to check for duplicate names?
up_->children_[name_] = this;
if (unit_ == 0)
unit_ = up_->unit_;
} else {
need_const_func_ = false;
is_const_func_ = false;
@@ -171,8 +162,6 @@ NetScope::NetScope(NetScope*up, const hname_t&n, NetScope::TYPE t, NetScope*in_u
lineno_ = 0;
def_lineno_ = 0;
genvar_tmp_val = 0;
tie_hi_ = 0;
tie_lo_ = 0;
}
NetScope::~NetScope()
@@ -207,72 +196,16 @@ void NetScope::set_line(perm_string file, perm_string def_file,
def_lineno_ = def_lineno;
}
void NetScope::add_imports(const map<perm_string,PPackage*>*imports)
{
if (!imports->empty())
imports_ = imports;
}
NetScope*NetScope::find_import(const Design*des, perm_string name)
{
if (imports_ == 0)
return 0;
map<perm_string,PPackage*>::const_iterator cur = imports_->find(name);
if (cur != imports_->end()) {
return des->find_package(cur->second->pscope_name());
} else
return 0;
}
void NetScope::add_typedefs(const map<perm_string,data_type_t*>*typedefs)
{
if (!typedefs->empty())
typedefs_ = typedefs;
}
NetScope*NetScope::find_typedef_scope(const Design*des, data_type_t*type)
{
assert(type);
NetScope *cur_scope = this;
while (cur_scope) {
if (cur_scope->typedefs_ && cur_scope->typedefs_->find(type->name) != cur_scope->typedefs_->end())
return cur_scope;
NetScope*import_scope = cur_scope->find_import(des, type->name);
if (import_scope)
cur_scope = import_scope;
else if (cur_scope == unit_)
return 0;
else
cur_scope = cur_scope->parent();
if (cur_scope == 0)
cur_scope = unit_;
}
return 0;
}
/*
* Look for the enumeration in the current scope and any parent scopes.
*/
const netenum_t*NetScope::find_enumeration_for_name(const Design*des, perm_string name)
const netenum_t*NetScope::find_enumeration_for_name(perm_string name)
{
NetScope *cur_scope = this;
while (cur_scope) {
NetEConstEnum*tmp = cur_scope->enum_names_[name];
if (tmp) break;
NetScope*import_scope = cur_scope->find_import(des, name);
if (import_scope)
cur_scope = import_scope;
else if (cur_scope == unit_)
return 0;
else
cur_scope = cur_scope->parent();
if (cur_scope == 0)
cur_scope = unit_;
cur_scope = cur_scope->parent();
}
assert(cur_scope);
@@ -427,7 +360,12 @@ const NetExpr* NetScope::get_parameter(Design*des,
msb = 0;
lsb = 0;
const NetExpr*tmp = enumeration_expr(key);
return tmp;
if (tmp) return tmp;
tmp = des->enumeration_expr(key);
if (tmp) return tmp;
return 0;
}
NetScope::param_ref_t NetScope::find_parameter(perm_string key)
@@ -444,6 +382,11 @@ NetScope::param_ref_t NetScope::find_parameter(perm_string key)
return idx;
}
NetScope::TYPE NetScope::type() const
{
return type_;
}
void NetScope::print_type(ostream&stream) const
{
switch (type_) {
@@ -562,7 +505,6 @@ void NetScope::add_module_port_info( unsigned idx, perm_string name, PortType::E
unsigned long width )
{
assert(type_ == MODULE);
assert(ports_.size() > idx);
PortInfo &info = ports_[idx];
info.name = name;
info.type = ptype;
@@ -710,11 +652,15 @@ netclass_t*NetScope::find_class(perm_string name)
if (type_==CLASS && name_==hname_t(name))
return class_def_;
// Look for the class directly within this scope.
// Look for the class that directly within this scope.
map<perm_string,netclass_t*>::const_iterator cur = classes_.find(name);
if (cur != classes_.end())
return cur->second;
// If this is a module scope, then look no further.
if (type_==MODULE)
return 0;
if (up_==0 && type_==CLASS) {
assert(class_def_);
@@ -722,16 +668,12 @@ netclass_t*NetScope::find_class(perm_string name)
return def_parent->find_class(name);
}
// If there is no further to look, ...
if (up_ == 0)
return 0;
// Try looking up for the class.
if (up_!=0 && type_!=MODULE)
return up_->find_class(name);
// Try the compilation unit.
if (unit_ != 0)
return unit_->find_class(name);
// Nowhere left to try...
return 0;
return up_->find_class(name);
}
/*
@@ -799,56 +741,7 @@ const NetScope* NetScope::child_byname(perm_string name) const
perm_string NetScope::local_symbol()
{
perm_string sym;
do {
ostringstream res;
res << "_ivl_" << (lcounter_++);
perm_string sym_tmp = lex_strings.make(res.str());
// If the name already exists as a signal, try again.
if (signals_map_.find(sym_tmp) != signals_map_.end())
continue;
// If the name already exists as a parameter, try again.
if (parameters.find(sym_tmp) != parameters.end())
continue;
if (genvars_.find(sym_tmp) != genvars_.end())
continue;
// If the name already exists as a class, try again.
if (classes_.find(sym_tmp) != classes_.end())
continue;
// No collisions, this is the one.
sym = sym_tmp;
} while (sym.nil());
return sym;
}
void NetScope::add_tie_hi(Design*des)
{
if (tie_hi_ == 0) {
NetNet*sig = new NetNet(this, lex_strings.make("_LOGIC1"),
NetNet::WIRE, &netvector_t::scalar_logic);
sig->local_flag(true);
tie_hi_ = new NetLogic(this, local_symbol(),
1, NetLogic::PULLUP, 1);
des->add_node(tie_hi_);
connect(sig->pin(0), tie_hi_->pin(0));
}
}
void NetScope::add_tie_lo(Design*des)
{
if (tie_lo_ == 0) {
NetNet*sig = new NetNet(this, lex_strings.make("_LOGIC0"),
NetNet::WIRE, &netvector_t::scalar_logic);
sig->local_flag(true);
tie_lo_ = new NetLogic(this, local_symbol(),
1, NetLogic::PULLDOWN, 1);
des->add_node(tie_lo_);
connect(sig->pin(0), tie_lo_->pin(0));
}
ostringstream res;
res << "_s" << (lcounter_++);
return lex_strings.make(res.str());
}
+4 -12
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2012 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -18,7 +18,6 @@
*/
# include "netdarray.h"
# include "netqueue.h"
# include <iostream>
using namespace std;
@@ -39,16 +38,9 @@ ivl_variable_type_t netdarray_t::base_type(void) const
bool netdarray_t::test_compatibility(ivl_type_t that) const
{
ivl_type_t elem_type = 0;
if (const netdarray_t*that_da = dynamic_cast<const netdarray_t*>(that))
elem_type = that_da->element_type();
if (const netqueue_t*that_q = dynamic_cast<const netqueue_t*>(that))
elem_type = that_q->element_type();
if (elem_type == 0)
const netdarray_t*that_da = dynamic_cast<const netdarray_t*>(that);
if (that_da == 0)
return false;
return element_type()->type_compatible(elem_type);
return element_type()->type_compatible(that_da->element_type());
}
+48 -727
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2017 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -24,7 +24,6 @@
# include <typeinfo>
# include <cstdlib>
# include <climits>
# include <cstring>
# include "compiler.h"
# include "netlist.h"
# include "netmisc.h"
@@ -176,7 +175,6 @@ bool NetPins::pins_are_virtual(void) const
NetPins::NetPins(unsigned npins)
: npins_(npins)
{
default_dir_ = Link::PASSIVE;
pins_ = NULL; // Wait until someone asks.
if (disable_virtual_pins) devirtualize_pins(); // Ask. Bummer.
}
@@ -309,12 +307,11 @@ unsigned NetBus::find_link(const Link&that) const
}
NetDelaySrc::NetDelaySrc(NetScope*s, perm_string n, unsigned npins,
bool condit_src, bool conditional, bool parallel)
bool condit_src, bool conditional)
: NetObj(s, n, npins + (condit_src?1:0))
{
condit_flag_ = false;
conditional_ = conditional;
parallel_ = parallel;
posedge_ = false;
negedge_ = false;
for (unsigned idx = 0 ; idx < npins ; idx += 1) {
@@ -473,11 +470,6 @@ const Link& NetDelaySrc::condit_pin() const
return pin(pin_count()-1);
}
bool NetDelaySrc::is_parallel() const
{
return parallel_;
}
PortType::Enum PortType::merged( Enum lhs, Enum rhs )
{
if( lhs == NOT_A_PORT || rhs == NOT_A_PORT )
@@ -565,7 +557,7 @@ void NetNet::calculate_slice_widths_from_packed_dims_(void)
ivl_assert(*this, ! slice_wids_.empty());
slice_wids_[0] = netrange_width(slice_dims_);
vector<netrange_t>::const_iterator cur = slice_dims_.begin();
for (size_t idx = 1 ; idx < slice_wids_.size() ; idx += 1, ++cur) {
for (size_t idx = 1 ; idx < slice_wids_.size() ; idx += 1, cur++) {
slice_wids_[idx] = slice_wids_[idx-1] / cur->width();
}
}
@@ -1029,36 +1021,11 @@ NetProc::~NetProc()
NetProcTop::NetProcTop(NetScope*s, ivl_process_type_t t, NetProc*st)
: type_(t), statement_(st), scope_(s)
{
synthesized_design_ = 0;
}
NetProcTop::~NetProcTop()
{
if (!synthesized_design_) {
delete statement_;
return;
}
NexusSet nex_set;
statement_->nex_output(nex_set);
delete statement_;
bool flag = false;
for (unsigned idx = 0 ; idx < nex_set.size() ; idx += 1) {
NetNet*net = nex_set[idx].lnk.nexus()->pick_any_net();
if (net->peek_lref() > 0) {
cerr << get_fileline() << ": warning: '" << net->name()
<< "' is driven by more than one process." << endl;
flag = true;
}
}
if (flag) {
cerr << get_fileline() << ": sorry: Cannot synthesize signals "
"that are driven by more than one process." << endl;
synthesized_design_->errors += 1;
}
}
NetProc* NetProcTop::statement()
@@ -1313,60 +1280,6 @@ const verinum& NetFF::sset_value() const
return sset_value_;
}
/*
* The NetLatch class represents an LPM_LATCH device. The pinout is assigned
* like so:
* 0 -- Enable
* 1 -- Data
* 2 -- Q
*/
NetLatch::NetLatch(NetScope*s, perm_string n, unsigned width__)
: NetNode(s, n, 3), width_(width__)
{
pin_Enable().set_dir(Link::INPUT);
pin_Data().set_dir(Link::INPUT);
pin_Q().set_dir(Link::OUTPUT);
}
NetLatch::~NetLatch()
{
}
unsigned NetLatch::width() const
{
return width_;
}
Link& NetLatch::pin_Enable()
{
return pin(0);
}
const Link& NetLatch::pin_Enable() const
{
return pin(0);
}
Link& NetLatch::pin_Data()
{
return pin(1);
}
const Link& NetLatch::pin_Data() const
{
return pin(1);
}
Link& NetLatch::pin_Q()
{
return pin(2);
}
const Link& NetLatch::pin_Q() const
{
return pin(2);
}
NetAbs::NetAbs(NetScope*s, perm_string n, unsigned w)
: NetNode(s, n, 2), width_(w)
@@ -2241,14 +2154,6 @@ ivl_variable_type_t NetEUFunc::expr_type() const
return IVL_VT_VOID;
}
const netenum_t* NetEUFunc::enumeration() const
{
if (result_sig_)
return result_sig_->enumeration();
return 0;
}
NetUTask::NetUTask(NetScope*def)
: task_(def)
{
@@ -2538,20 +2443,6 @@ NetETernary::~NetETernary()
delete false_val_;
}
const netenum_t* NetETernary::enumeration() const
{
// If the condition can evaluate to an ambiguous value,
// the result may be blended, and so is not guaranteed
// to be a valid enumeration value.
if (cond_->expr_type() != IVL_VT_BOOL)
return 0;
if (true_val_->enumeration() != false_val_->enumeration())
return 0;
return true_val_->enumeration();
}
const NetExpr* NetETernary::cond_expr() const
{
return cond_;
@@ -2797,7 +2688,7 @@ static DelayType delay_type_from_expr(const NetExpr*expr)
* The looping structures can use the same basic code so put it here
* instead of duplicating it for each one (repeat and while).
*/
static DelayType get_loop_delay_type(const NetExpr*expr, const NetProc*proc, bool print_delay)
static DelayType get_loop_delay_type(const NetExpr*expr, const NetProc*proc)
{
DelayType result;
@@ -2808,20 +2699,12 @@ static DelayType get_loop_delay_type(const NetExpr*expr, const NetProc*proc, boo
break;
/* We have a constant true expression so the body always runs. */
case DEFINITE_DELAY:
if (proc) {
result = proc->delay_type(print_delay);
} else {
result = NO_DELAY;
}
result = proc->delay_type();
break;
/* We don't know if the body will run so reduce a DEFINITE_DELAY
* to a POSSIBLE_DELAY. All other stay the same. */
case POSSIBLE_DELAY:
if (proc) {
result = combine_delays(NO_DELAY, proc->delay_type(print_delay));
} else {
result = NO_DELAY;
}
result = combine_delays(NO_DELAY, proc->delay_type());
break;
/* This should never happen since delay_type_from_expr() only
* returns three different values. */
@@ -2834,12 +2717,12 @@ static DelayType get_loop_delay_type(const NetExpr*expr, const NetProc*proc, boo
}
/* The default object does not have any delay. */
DelayType NetProc::delay_type(bool /* print_delay */ ) const
DelayType NetProc::delay_type() const
{
return NO_DELAY;
}
DelayType NetBlock::delay_type(bool print_delay) const
DelayType NetBlock::delay_type() const
{
// A join_none has no delay.
if (type() == PARA_JOIN_NONE) return NO_DELAY;
@@ -2849,25 +2732,25 @@ DelayType NetBlock::delay_type(bool print_delay) const
if (type() == PARA_JOIN_ANY) {
result = DEFINITE_DELAY;
for (const NetProc*cur = proc_first(); cur; cur = proc_next(cur)) {
DelayType dt = cur->delay_type(print_delay);
DelayType dt = cur->delay_type();
if (dt < result) result = dt;
if ((dt == NO_DELAY) && !print_delay) break;
if (dt == NO_DELAY) break;
}
// A begin or join has the maximum delay.
} else {
result = NO_DELAY;
for (const NetProc*cur = proc_first(); cur; cur = proc_next(cur)) {
DelayType dt = cur->delay_type(print_delay);
DelayType dt = cur->delay_type();
if (dt > result) result = dt;
if ((dt == DEFINITE_DELAY) && !print_delay) break;
if (dt == DEFINITE_DELAY) break;
}
}
return result;
}
DelayType NetCase::delay_type(bool print_delay) const
DelayType NetCase::delay_type() const
{
DelayType result = NO_DELAY;
bool def_stmt = false;
@@ -2875,7 +2758,7 @@ DelayType NetCase::delay_type(bool print_delay) const
for (unsigned idx = 0; idx < nstmts; idx += 1) {
if (!expr(idx)) def_stmt = true;
DelayType dt = stat(idx) ? stat(idx)->delay_type(print_delay) : NO_DELAY;
DelayType dt = stat(idx) ? stat(idx)->delay_type() : NO_DELAY;
if (idx == 0) {
result = dt;
} else {
@@ -2883,7 +2766,6 @@ DelayType NetCase::delay_type(bool print_delay) const
}
}
// FIXME: If all the cases are covered (e.g. an enum) then this is not true.
/* If we don't have a default statement we don't know for sure
* that we have a delay. */
if (!def_stmt) result = combine_delays(NO_DELAY, result);
@@ -2891,636 +2773,75 @@ DelayType NetCase::delay_type(bool print_delay) const
return result;
}
DelayType NetCondit::delay_type(bool print_delay) const
DelayType NetCondit::delay_type() const
{
DelayType if_type = if_ ? if_->delay_type(print_delay) : NO_DELAY;
DelayType el_type = else_? else_->delay_type(print_delay) : NO_DELAY;
DelayType if_type = if_ ? if_->delay_type() : NO_DELAY;
DelayType el_type = else_? else_->delay_type() : NO_DELAY;
return combine_delays(if_type, el_type);
}
/*
* A do/while will execute the body at least once.
*/
DelayType NetDoWhile::delay_type(bool print_delay) const
DelayType NetDoWhile::delay_type() const
{
if (proc_) return proc_->delay_type(print_delay);
return ZERO_DELAY;
ivl_assert(*this, proc_);
return proc_->delay_type();
}
DelayType NetEvWait::delay_type(bool print_delay) const
DelayType NetEvWait::delay_type() const
{
if (print_delay) {
cerr << get_fileline() << ": error: an event control is not allowed "
"in an always_comb, always_ff or always_latch process."
<< endl;
}
return DEFINITE_DELAY;
}
DelayType NetForever::delay_type(bool print_delay) const
DelayType NetForever::delay_type() const
{
if (statement_) return statement_->delay_type(print_delay);
return ZERO_DELAY;
ivl_assert(*this, statement_);
return statement_->delay_type();
}
DelayType NetForLoop::delay_type(bool print_delay) const
DelayType NetForLoop::delay_type() const
{
return get_loop_delay_type(condition_, statement_, print_delay);
ivl_assert(*this, statement_);
return get_loop_delay_type(condition_, statement_);
}
DelayType NetPDelay::delay_type(bool print_delay) const
DelayType NetPDelay::delay_type() const
{
if (print_delay) {
cerr << get_fileline() << ": error: a blocking delay is not allowed "
"in an always_comb, always_ff or always_latch process."
<< endl;
}
if (expr_) {
if (statement_) {
return combine_delays(delay_type_from_expr(expr_),
statement_->delay_type(print_delay));
return delay_type_from_expr(expr_);
} else {
if (delay() > 0) {
return DEFINITE_DELAY;
} else {
return delay_type_from_expr(expr_);
}
}
if (delay() > 0) return DEFINITE_DELAY;
if (statement_) {
return combine_delays(ZERO_DELAY,
statement_->delay_type(print_delay));
} else {
return ZERO_DELAY;
}
}
DelayType NetRepeat::delay_type(bool print_delay) const
{
return get_loop_delay_type(expr_, statement_, print_delay);
}
DelayType NetTaskDef::delay_type(bool print_delay) const
{
if (proc_) {
return proc_->delay_type(print_delay);
} else {
return NO_DELAY;
}
}
DelayType NetUTask::delay_type(bool print_delay) const
{
return task()->task_def()->delay_type(print_delay);
}
static bool do_expr_event_match(const NetExpr*expr, const NetEvWait*evwt)
{
// The event wait should only have a single event.
if (evwt->nevents() != 1) return false;
// The event should have a single probe.
const NetEvent *evt = evwt->event(0);
if (evt->nprobe() != 1) return false;
// The probe should be for any edge.
const NetEvProbe *prb = evt->probe(0);
if (prb->edge() != NetEvProbe::ANYEDGE) return false;
// Create a NexusSet from the event probe signals.
NexusSet *ns_evwt = new NexusSet;
for (unsigned idx =0; idx < prb->pin_count(); idx += 1) {
if (! prb->pin(idx).is_linked()) {
delete ns_evwt;
return false;
}
// Casting away const is safe since this nexus set is only being read.
ns_evwt->add(const_cast<Nexus*> (prb->pin(idx).nexus()),
0, prb->pin(idx).nexus()->vector_width());
}
// Get the NexusSet for the expression.
NexusSet *ns_expr = expr->nex_input();
// Make sure the event and expression NexusSets match exactly.
if (ns_evwt->size() != ns_expr->size()) {
delete ns_evwt;
delete ns_expr;
return false;
}
ns_expr->rem(*ns_evwt);
delete ns_evwt;
if (ns_expr->size() != 0) {
delete ns_expr;
return false;
}
delete ns_expr;
return true;
}
static bool while_is_wait(const NetExpr*expr, const NetProc*stmt)
{
if (const NetEvWait*evwt = dynamic_cast<const NetEvWait*>(stmt)) {
if (evwt->statement()) return false;
const NetEBComp*cond = dynamic_cast<const NetEBComp*>(expr);
if (! cond) return false;
if (cond->op() != 'N') return false;
const NetEConst*cval = dynamic_cast<const NetEConst*>(cond->right());
if (! cval) return false;
const verinum val = cval->value();
if (val.len() != 1) return false;
if (val.get(0) != verinum::V1) return false;
if (! do_expr_event_match(cond->left(), evwt)) return false;
if (evwt->get_lineno() != cond->get_lineno()) return false;
if (evwt->get_file() != cond->get_file()) return false;
return true;
}
return false;
}
DelayType NetWhile::delay_type(bool print_delay) const
{
// If the wait was a constant value the compiler already removed it
// so we know we can only have a possible delay.
if (while_is_wait(cond_, proc_)) {
if (print_delay) {
cerr << get_fileline() << ": error: a wait statement is "
"not allowed in an "
"always_comb, always_ff or always_latch process."
<< endl;
}
return POSSIBLE_DELAY;
}
return get_loop_delay_type(cond_, proc_, print_delay);
}
/*
* These are the check_synth() functions. They are used to print
* a warning if the item is not synthesizable.
*/
static const char * get_process_type_as_string(ivl_process_type_t pr_type)
{
switch (pr_type) {
case IVL_PR_ALWAYS_COMB:
return "in an always_comb process.";
break;
case IVL_PR_ALWAYS_FF:
return "in an always_ff process.";
break;
case IVL_PR_ALWAYS_LATCH:
return "in an always_latch process.";
break;
default:
assert(0);
return 0;
}
}
static void print_synth_warning(const NetProc *net_proc, const char *name,
ivl_process_type_t pr_type)
{
cerr << net_proc->get_fileline() << ": warning: " << name
<< " statement cannot be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
static void check_if_logic_l_value(const NetAssignBase *base,
ivl_process_type_t pr_type)
{
if (base->l_val_count() != 1) return;
const NetAssign_*lval = base->l_val(0);
if (! lval) return;
NetNet*sig = lval->sig();
if (! sig) return;
if ((sig->data_type() != IVL_VT_BOOL) &&
(sig->data_type() != IVL_VT_LOGIC)) {
cerr << base->get_fileline() << ": warning: Assinging to a "
"non-integral variable ("<< sig->name()
<< ") cannot be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
}
/* By default elements can be synthesized or ignored. */
bool NetProc::check_synth(ivl_process_type_t /* pr_type */,
const NetScope* /* scope */ ) const
{
return false;
}
// FIXME: User function calls still need to be checked (NetEUFunc).
// : Non-constant system functions need a warning (NetESFunc).
// : Constant functions should already be elaborated.
/* By default assign elements can be synthesized. */
bool NetAssignBase::check_synth(ivl_process_type_t /* pr_type */,
const NetScope* /* scope */ ) const
{
return false;
}
bool NetAssign::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */ ) const
{
check_if_logic_l_value(this, pr_type);
// FIXME: Check that ff/latch only use this for internal signals.
return false;
}
bool NetAssignNB::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */ ) const
{
bool result = false;
if (pr_type == IVL_PR_ALWAYS_COMB) {
cerr << get_fileline() << ": warning: A non-blocking assignment "
"should not be used in an always_comb process." << endl;
}
if (event_) {
cerr << get_fileline() << ": error: A non-blocking assignment "
"cannot be synthesized with an event control "
<< get_process_type_as_string(pr_type) << endl;
result = true;
}
check_if_logic_l_value(this, pr_type);
return result;
}
bool NetBlock::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
bool result = false;
// Only a begin/end can be synthesized.
if (type() != SEQU) {
cerr << get_fileline() << ": error: A fork/";
switch (type()) {
case PARA:
cerr << "join";
break;
case PARA_JOIN_ANY:
cerr << "join_any";
break;
case PARA_JOIN_NONE:
cerr << "join_none";
break;
default:
assert(0);
}
cerr << " statement cannot be synthesized "
<< get_process_type_as_string(pr_type) << endl;
result = true;
}
const NetScope*save_scope = scope;
if (subscope()) scope = subscope();
if (scope != save_scope) {
result |= scope->check_synth(pr_type, scope);
}
for (const NetProc*cur = proc_first(); cur; cur = proc_next(cur)) {
result |= cur->check_synth(pr_type, scope);
}
scope = save_scope;
return result;
}
bool NetCase::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
bool result = false;
for (unsigned idx = 0; idx < nitems(); idx += 1) {
if (stat(idx)) result |= stat(idx)->check_synth(pr_type, scope);
}
// FIXME: Check for ff/latch/comb structures.
return result;
}
bool NetCAssign::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */ ) const
{
print_synth_warning(this, "A procedural assign", pr_type);
return false;
}
bool NetCondit::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
bool result = false;
if (if_) result |= if_->check_synth(pr_type, scope);
if (else_) result |= else_->check_synth(pr_type, scope);
// FIXME: Check for ff/latch/comb structures.
return result;
}
bool NetDeassign::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */ ) const
{
print_synth_warning(this, "A procedural deassign", pr_type);
return false;
}
bool NetDisable::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
while (scope) {
if (scope != target_) scope = scope->parent();
else break;
}
if (! scope) {
cerr << get_fileline() << ": warning: A disable statement can "
"only be synthesized when disabling an enclosing block "
<< get_process_type_as_string(pr_type) << endl;
}
return false;
}
bool NetDoWhile::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
bool result = false;
print_synth_warning(this, "A do/while", pr_type);
if (proc_) result |= proc_->check_synth(pr_type, scope);
return result;
}
bool NetEvTrig::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */ ) const
{
print_synth_warning(this, "An event trigger", pr_type);
return false;
}
// The delay check above has already marked this as an error.
bool NetEvWait::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
bool result = false;
if (statement_) result |= statement_->check_synth(pr_type, scope);
return result;
}
bool NetForce::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */ ) const
{
print_synth_warning(this, "A force", pr_type);
return false;
}
bool NetForever::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
bool result = false;
print_synth_warning(this, "A forever", pr_type);
if (statement_) result |= statement_->check_synth(pr_type, scope);
return result;
}
/*
* A bunch of private routines to verify that a for loop has the correct
* structure for synthesis.
*/
static void print_for_idx_warning(const NetProc*proc, const char*check,
ivl_process_type_t pr_type, NetNet*idx)
{
cerr << proc->get_fileline() << ": warning: A for statement must use "
"the index (" << idx->name() << ") in the " << check
<< " expression to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
static void check_for_const_synth(const NetExpr*expr, const NetProc*proc,
const char*str, ivl_process_type_t pr_type)
{
if (! dynamic_cast<const NetEConst*>(expr)) {
cerr << proc-> get_fileline() << ": warning: A for "
"statement must " << str
<< " value to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
}
static void check_for_bin_synth(const NetExpr*left,const NetExpr*right,
const char*str, const char*check,
const NetProc*proc,
ivl_process_type_t pr_type, NetNet*index)
{
const NetESignal*lsig = dynamic_cast<const NetESignal*>(left);
const NetESignal*rsig = dynamic_cast<const NetESignal*>(right);
if (lsig && (lsig->sig() == index)) {
check_for_const_synth(right, proc, str, pr_type);
} else if (rsig && (rsig->sig() == index)) {
check_for_const_synth(left, proc, str, pr_type);
} else {
print_for_idx_warning(proc, check, pr_type, index);
}
}
static void print_for_step_warning(const NetProc*proc,
ivl_process_type_t pr_type)
{
cerr << proc->get_fileline() << ": warning: A for statement step must "
"be a simple assignment statement to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
static void print_for_step_warning(const NetProc*proc,
ivl_process_type_t pr_type, NetNet*idx)
{
cerr << proc->get_fileline() << ": warning: A for statement step must "
"be an assignment to the index variable ("
<< idx->name() << ") to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
static void check_for_bstep_synth(const NetExpr*expr, const NetProc*proc,
ivl_process_type_t pr_type, NetNet*index)
{
if (const NetECast*tmp = dynamic_cast<const NetECast*>(expr)) {
expr = tmp->expr();
}
if (const NetEBAdd*tmp = dynamic_cast<const NetEBAdd*>(expr)) {
check_for_bin_synth(tmp->left(), tmp->right(),
"change by a constant", "step", proc, pr_type,
index);
} else {
cerr << proc->get_fileline() << ": warning: A for statement "
"step must be a simple binary +/- "
"to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
}
static void check_for_step_synth(const NetAssign*assign, const NetProc*proc,
ivl_process_type_t pr_type, NetNet*index)
{
if (assign->l_val_count() != 1) {
print_for_step_warning(proc, pr_type);
} else if (assign->l_val(0)->sig() != index) {
print_for_step_warning(proc, pr_type, index);
} else {
switch (assign->assign_operator()) {
case '+':
case '-':
check_for_const_synth(assign->rval(), proc,
"have a constant step", pr_type);
break;
case 0:
check_for_bstep_synth(assign->rval(), proc, pr_type, index);
break;
default:
cerr << proc->get_fileline() << ": warning: A for statement "
"step does not support operator '"
<< assign->assign_operator()
<< "' it must be +/- to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
break;
if (statement_) {
return combine_delays(ZERO_DELAY,
statement_->delay_type());
} else {
return ZERO_DELAY;
}
}
}
}
bool NetForLoop::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
DelayType NetRepeat::delay_type() const
{
bool result = false;
// FIXME: What about an enum (NetEConstEnum)?
if (! dynamic_cast<const NetEConst*>(init_expr_)) {
cerr << get_fileline() << ": warning: A for statement must "
"have a constant initial value to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
// FIXME: Do the following also need to be supported in the condition?
// It would seem like they are hard to use to find the bounds.
// From NetEBinary
// What about NetEBits sig & constant, etc.
// From NetEUnary
// What about NetEUBits ! sig or ! (sig == constat)
// What about NetEUReduce &signal
if (const NetESignal*tmp = dynamic_cast<const NetESignal*>(condition_)) {
if (tmp->sig() != index_) {
print_for_idx_warning(this, "condition", pr_type, index_);
}
} else if (const NetEBComp*cmp = dynamic_cast<const NetEBComp*>(condition_)) {
check_for_bin_synth(cmp->left(), cmp->right(),
"compare against a constant", "condition",
this, pr_type, index_);
} else {
print_for_idx_warning(this, "condition", pr_type, index_);
}
if (const NetAssign*tmp = dynamic_cast<const NetAssign*>(step_statement_)) {
check_for_step_synth(tmp, this, pr_type, index_);
} else {
print_for_step_warning(this, pr_type);
}
if (statement_) result |= statement_->check_synth(pr_type, scope);
return result;
ivl_assert(*this, statement_);
return get_loop_delay_type(expr_, statement_);
}
// The delay check above has already marked this as an error.
bool NetPDelay::check_synth(ivl_process_type_t /* pr_type */,
const NetScope* /* scope */ ) const
DelayType NetTaskDef::delay_type() const
{
return false;
return proc_->delay_type();
}
bool NetRelease::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */ ) const
DelayType NetUTask::delay_type() const
{
print_synth_warning(this, "A release", pr_type);
return false;
return task()->task_def()->delay_type();
}
bool NetRepeat::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
DelayType NetWhile::delay_type() const
{
bool result = false;
print_synth_warning(this, "A repeat", pr_type);
if (statement_) result |= statement_->check_synth(pr_type, scope);
return result;
}
bool NetScope::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */) const
{
bool result = false;
// Skip local events/signals
for (NetEvent*cur = events_ ; cur ; cur = cur->snext_) {
if (cur->local_flag()) continue;
cerr << cur->get_fileline() << ": warning: An event ("
<< cur->name() << ") cannot be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
for (signals_map_iter_t cur = signals_map_.begin();
cur != signals_map_.end() ; ++ cur) {
const NetNet*sig = cur->second;
if ((sig->data_type() != IVL_VT_BOOL) &&
(sig->data_type() != IVL_VT_LOGIC)) {
cerr << sig->get_fileline() << ": warning: A non-integral "
"variable (" << sig->name() << ") cannot be "
"synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
}
return result;
}
bool NetSTask::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */) const
{
if (strcmp(name(), "$ivl_darray_method$delete") == 0) {
cerr << get_fileline() << ": warning: Dynamic array "
"delete method cannot be synthesized "
<< get_process_type_as_string(pr_type) << endl;
} else {
cerr << get_fileline() << ": warning: System task ("
<< name() << ") cannot be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
return false;
}
bool NetTaskDef::check_synth(ivl_process_type_t pr_type,
const NetScope* /* scope */) const
{
bool result = false;
const NetScope *tscope = this->scope();
result |= tscope->check_synth(pr_type, tscope);
if (! tscope->is_auto()) {
cerr << tscope->get_def_file() << ":"
<< tscope->get_def_lineno()
<< ": warning: user task (" << tscope->basename()
<< ") must be automatic to be synthesized "
<< get_process_type_as_string(pr_type) << endl;
}
if (proc_) result |= proc_->check_synth(pr_type, tscope);
return result;
}
bool NetUTask::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
return task()->task_def()->check_synth(pr_type, scope);
}
bool NetWhile::check_synth(ivl_process_type_t pr_type,
const NetScope* scope) const
{
bool result = false;
// A wait is already maked as an error in the delay check above.
if (! while_is_wait(cond_, proc_)) {
print_synth_warning(this, "A while", pr_type);
if (proc_) result |= proc_->check_synth(pr_type, scope);
}
return result;
ivl_assert(*this, proc_);
return get_loop_delay_type(cond_, proc_);
}
+128 -322
View File
File diff suppressed because it is too large Load Diff
+43 -145
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2001-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2001-2017 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -158,7 +158,7 @@ NetExpr* cast_to_int2(NetExpr*expr, unsigned width)
NetExpr* cast_to_int4(NetExpr*expr, unsigned width)
{
// Special case: The expression is already LOGIC or BOOL
if (expr->expr_type() == IVL_VT_LOGIC || expr->expr_type() == IVL_VT_BOOL)
if (expr->expr_type() != IVL_VT_REAL)
return expr;
if (debug_elaborate)
@@ -925,19 +925,6 @@ static NetExpr* do_elab_and_eval(Design*des, NetScope*scope, PExpr*pe,
if (tmp == 0) return 0;
if ((cast_type != IVL_VT_NO_TYPE) && (cast_type != tmp->expr_type())) {
switch (tmp->expr_type()) {
case IVL_VT_BOOL:
case IVL_VT_LOGIC:
case IVL_VT_REAL:
break;
default:
cerr << tmp->get_fileline() << ": error: "
"The expression '" << *pe << "' cannot be implicitly "
"cast to the target type." << endl;
des->errors += 1;
delete tmp;
return 0;
}
switch (cast_type) {
case IVL_VT_REAL:
tmp = cast_to_real(tmp);
@@ -1009,41 +996,6 @@ NetExpr* elab_and_eval(Design*des, NetScope*scope, PExpr*pe,
flags |= PExpr::NEED_CONST;
NetExpr*tmp = pe->elaborate_expr(des, scope, lv_net_type, flags);
if (tmp == 0) return 0;
ivl_variable_type_t cast_type = ivl_type_base(lv_net_type);
if ((cast_type != IVL_VT_NO_TYPE) && (cast_type != tmp->expr_type())) {
// Catch some special cases.
switch (cast_type) {
case IVL_VT_DARRAY:
case IVL_VT_QUEUE:
if (NetESignal*net = dynamic_cast<NetESignal*>(tmp)) {
ivl_variable_type_t type = net->expr_type();
if ((type == IVL_VT_DARRAY) || (type == IVL_VT_QUEUE))
return tmp;
}
if (dynamic_cast<PEAssignPattern*>(pe))
return tmp;
// fall through
case IVL_VT_STRING:
if (dynamic_cast<PEConcat*>(pe))
return tmp;
break;
case IVL_VT_CLASS:
if (dynamic_cast<PENull*>(pe))
return tmp;
break;
default:
break;
}
cerr << tmp->get_fileline() << ": error: "
"The expression '" << *pe << "' cannot be implicitly "
"cast to the target type." << endl;
des->errors += 1;
delete tmp;
return 0;
}
return tmp;
}
@@ -1085,94 +1037,50 @@ NetExpr* elab_sys_task_arg(Design*des, NetScope*scope, perm_string name,
return tmp;
}
bool evaluate_range(Design*des, NetScope*scope, const LineInfo*li,
const pform_range_t&range, long&index_l, long&index_r)
{
bool dimension_ok = true;
// Unsized and queue dimensions should be handled before calling
// this function. If we find them here, we are in a context where
// they are not allowed.
if (range.first == 0) {
cerr << li->get_fileline() << ": error: "
"An unsized dimension is not allowed here." << endl;
dimension_ok = false;
des->errors += 1;
} else if (dynamic_cast<PENull*>(range.first)) {
cerr << li->get_fileline() << ": error: "
"A queue dimension is not allowed here." << endl;
dimension_ok = false;
des->errors += 1;
} else {
NetExpr*texpr = elab_and_eval(des, scope, range.first, -1, true);
if (! eval_as_long(index_l, texpr)) {
cerr << range.first->get_fileline() << ": error: "
"Dimensions must be constant." << endl;
cerr << range.first->get_fileline() << " : "
<< (range.second ? "This MSB" : "This size")
<< " expression violates the rule: "
<< *range.first << endl;
dimension_ok = false;
des->errors += 1;
}
delete texpr;
if (range.second == 0) {
// This is a SystemVerilog [size] dimension. The IEEE
// standard does not allow this in a packed dimension,
// but we do. At least one commercial simulator does too.
if (!dimension_ok) {
// bail out
} else if (index_l > 0) {
index_l = index_l - 1;
index_r = 0;
} else {
cerr << range.first->get_fileline() << ": error: "
"Dimension size must be greater than zero." << endl;
cerr << range.first->get_fileline() << " : "
"This size expression violates the rule: "
<< *range.first << endl;
dimension_ok = false;
des->errors += 1;
}
} else {
texpr = elab_and_eval(des, scope, range.second, -1, true);
if (! eval_as_long(index_r, texpr)) {
cerr << range.second->get_fileline() << ": error: "
"Dimensions must be constant." << endl;
cerr << range.second->get_fileline() << " : "
"This LSB expression violates the rule: "
<< *range.second << endl;
dimension_ok = false;
des->errors += 1;
}
delete texpr;
}
}
/* Error recovery */
if (!dimension_ok) {
index_l = 0;
index_r = 0;
}
return dimension_ok;
}
bool evaluate_ranges(Design*des, NetScope*scope, const LineInfo*li,
bool evaluate_ranges(Design*des, NetScope*scope,
vector<netrange_t>&llist,
const list<pform_range_t>&rlist)
{
bool dimensions_ok = true;
bool bad_msb = false, bad_lsb = false;
for (list<pform_range_t>::const_iterator cur = rlist.begin()
; cur != rlist.end() ; ++cur) {
long index_l, index_r;
dimensions_ok &= evaluate_range(des, scope, li, *cur, index_l, index_r);
llist.push_back(netrange_t(index_l, index_r));
long use_msb, use_lsb;
NetExpr*texpr = elab_and_eval(des, scope, cur->first, -1, true);
if (! eval_as_long(use_msb, texpr)) {
cerr << cur->first->get_fileline() << ": error: "
"Range expressions must be constant." << endl;
cerr << cur->first->get_fileline() << " : "
"This MSB expression violates the rule: "
<< *cur->first << endl;
des->errors += 1;
bad_msb = true;
}
delete texpr;
texpr = elab_and_eval(des, scope, cur->second, -1, true);
if (! eval_as_long(use_lsb, texpr)) {
cerr << cur->second->get_fileline() << ": error: "
"Range expressions must be constant." << endl;
cerr << cur->second->get_fileline() << " : "
"This LSB expression violates the rule: "
<< *cur->second << endl;
des->errors += 1;
bad_lsb = true;
}
delete texpr;
/* Error recovery */
if (bad_lsb) use_lsb = 0;
if (bad_msb) use_msb = use_lsb;
llist.push_back(netrange_t(use_msb, use_lsb));
}
return dimensions_ok;
return bad_msb | bad_lsb;
}
void eval_expr(NetExpr*&expr, int context_width)
@@ -1341,11 +1249,9 @@ const char *human_readable_op(const char op, bool unary)
case '|': type = "|"; break; // Bitwise OR
case 'O': type = "~|"; break; // NOR
case '!': type = "!"; break; // Logical NOT
case 'a': type = "&&"; break; // Logical AND
case 'o': type = "||"; break; // Logical OR
case 'q': type = "->"; break; // Logical implication
case 'Q': type = "<->"; break; // Logical equivalence
case '!': type = "!"; break; // Logical NOT
case 'a': type = "&&"; break; // Logical AND
case 'o': type = "||"; break; // Logical OR
case 'e': type = "=="; break;
case 'n': type = "!="; break;
@@ -1354,8 +1260,6 @@ const char *human_readable_op(const char op, bool unary)
if (unary) type = "~|"; // NOR
else type = "!=="; // Case inequality
break;
case 'w': type = "==?"; break; // Wild equality
case 'W': type = "!=?"; break; // Wild inequality
case 'l': type = "<<(<)"; break; // Left shifts
case 'r': type = ">>"; break; // Logical right shift
@@ -1539,14 +1443,8 @@ bool evaluate_index_prefix(Design*des, NetScope*scope,
{
list<index_component_t>::const_iterator icur = indices.begin();
for (size_t idx = 0 ; (idx+1) < indices.size() ; idx += 1, ++icur) {
assert(icur != indices.end());
if (icur->sel != index_component_t::SEL_BIT) {
cerr << icur->msb->get_fileline() << ": error: "
"All but the final index in a chain of indices must be "
"a single value, not a range." << endl;
des->errors += 1;
return false;
}
ivl_assert(*(icur->msb), icur != indices.end());
ivl_assert(*(icur->msb), icur->sel == index_component_t::SEL_BIT);
NetExpr*texpr = elab_and_eval(des, scope, icur->msb, -1, true);
long tmp;
+3 -7
View File
@@ -1,7 +1,7 @@
#ifndef IVL_netmisc_H
#define IVL_netmisc_H
/*
* Copyright (c) 1999-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2017 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -175,7 +175,7 @@ extern NetExpr*normalize_variable_slice_base(const list<long>&indices, NetExpr *
* index values in the form [<>][<>]....
*/
template <class TYPE> struct __IndicesManip {
explicit inline __IndicesManip(const std::list<TYPE>&v) : val(v) { }
inline __IndicesManip(const std::list<TYPE>&v) : val(v) { }
const std::list<TYPE>&val;
};
template <class TYPE> inline __IndicesManip<TYPE> as_indices(const std::list<TYPE>&indices)
@@ -321,11 +321,7 @@ extern NetExpr* elaborate_rval_expr(Design*des, NetScope*scope,
bool need_const =false,
bool force_unsigned =false);
extern bool evaluate_range(Design*des, NetScope*scope, const LineInfo*li,
const pform_range_t&range,
long&index_l, long&index_r);
extern bool evaluate_ranges(Design*des, NetScope*scope, const LineInfo*li,
extern bool evaluate_ranges(Design*des, NetScope*scope,
std::vector<netrange_t>&llist,
const std::list<pform_range_t>&rlist);
/*
+6 -13
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2014 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -22,8 +22,8 @@
using namespace std;
netqueue_t::netqueue_t(ivl_type_t vec, long max_idx)
: netdarray_t(vec), max_idx_(max_idx)
netqueue_t::netqueue_t(ivl_type_t vec)
: netdarray_t(vec)
{
}
@@ -38,16 +38,9 @@ ivl_variable_type_t netqueue_t::base_type() const
bool netqueue_t::test_compatibility(ivl_type_t that) const
{
ivl_type_t elem_type = 0;
if (const netqueue_t*that_q = dynamic_cast<const netqueue_t*>(that))
elem_type = that_q->element_type();
if (const netdarray_t*that_da = dynamic_cast<const netdarray_t*>(that))
elem_type = that_da->element_type();
if (elem_type == 0)
const netqueue_t*that_q = dynamic_cast<const netqueue_t*>(that);
if (that_q == 0)
return false;
return element_type()->type_compatible(elem_type);
return element_type()->type_compatible(that_q->element_type());
}
+2 -8
View File
@@ -1,7 +1,7 @@
#ifndef IVL__netqueue_H
#define IVL__netqueue_H
/*
* Copyright (c) 2014-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 2014-2015 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -30,7 +30,7 @@
class netqueue_t : public netdarray_t {
public:
explicit netqueue_t(ivl_type_t vec, long max_idx);
explicit netqueue_t(ivl_type_t vec);
~netqueue_t();
// This is the "base_type()" virtual method of the
@@ -41,16 +41,10 @@ class netqueue_t : public netdarray_t {
// A queue may have a type that is signed.
inline bool get_signed() const { return element_type()->get_signed(); }
// Use the packed width to pass the element width
long packed_width(void) const { return element_type()->packed_width(); }
long max_idx(void) const { return max_idx_; }
std::ostream& debug_dump(std::ostream&) const;
private:
bool test_compatibility(ivl_type_t that) const;
long max_idx_;
};
#endif
-53
View File
@@ -122,63 +122,10 @@ void nodangle_f::event(Design*, NetEvent*ev)
}
}
static bool floating_net_tested(NetNet*sig)
{
static set<NetNet*> tested_set;
pair< set<NetNet*>::iterator, bool > cur = tested_set.insert(sig);
return !cur.second;
}
static void check_is_floating(NetNet*sig)
{
// Some signal types are implicitly driven if nothing else.
if (sig->type() == NetNet::SUPPLY0) return;
if (sig->type() == NetNet::SUPPLY1) return;
if (sig->type() == NetNet::TRI0) return;
if (sig->type() == NetNet::TRI1) return;
if (sig->type() == NetNet::IMPLICIT_REG) return;
if (sig->type() == NetNet::REG) return ;
// Assignments drive a signal.
if (sig->peek_lref() > 0) return;
for (unsigned idx = 0 ; idx < sig->pin_count() ; idx += 1) {
if (sig->pin(idx).get_dir() == Link::OUTPUT)
continue;
if (sig->pin(idx).nexus()->drivers_present())
continue;
if (sig->port_type() == PortType::NOT_A_PORT && sig->pin_count()==1) {
cerr << sig->get_fileline() << ": warning: "
<< "Signal " << scope_path(sig->scope())
<< "." << sig->name()
<< " has no drivers." << endl;
} else if (sig->port_type()==PortType::NOT_A_PORT) {
cerr << sig->get_fileline() << ": warning: "
<< "Signal " << scope_path(sig->scope())
<< "." << sig->name()
<< "[" << idx << "]"
<< " has no drivers." << endl;
} else {
cerr << sig->get_fileline() << ": warning: "
<< "Port " << sig->name()
<< " of " << scope_path(sig->scope())
<< " has no drivers." << endl;
}
}
}
void nodangle_f::signal(Design*, NetNet*sig)
{
if (scomplete) return;
if (warn_floating_nets && !sig->local_flag() && !floating_net_tested(sig)) {
check_is_floating(sig);
}
/* Cannot delete signals referenced in an expression
or an l-value. */
if (sig->get_refs() > 0)
+285 -594
View File
File diff suppressed because it is too large Load Diff
+14 -7
View File
@@ -42,21 +42,28 @@ struct enum_type_t;
*/
extern std::map<perm_string,Module*> pform_modules;
extern std::map<perm_string,PUdp*> pform_primitives;
extern std::vector<PPackage*> pform_units;
extern std::map<perm_string,data_type_t*> pform_typedefs;
extern std::set<enum_type_t*> pform_enum_sets;
extern std::map<perm_string,PTaskFunc*> pform_tasks;
extern std::vector<PClass*> pform_classes;
extern std::map<perm_string,PPackage*> pform_packages;
extern void pform_dump(std::ostream&out, const PClass*pac);
extern void pform_dump(std::ostream&out, const PPackage*pac);
extern void pform_dump(std::ostream&out, const PTaskFunc*tf);
extern void elaborate_rootscope_enumerations(Design*des);
extern void elaborate_rootscope_classes(Design*des);
extern void elaborate_rootscope_tasks(Design*des);
/*
* This code actually invokes the parser to make modules. If the path
* parameter is "-", the parser reads from stdin, otherwise it attempts
* to open and read the specified file. When reading from a file, if
* the ivlpp_string variable is not set to null, the file will be piped
* through the command specified by ivlpp_string before being parsed.
* This code actually invokes the parser to make modules. The first
* parameter is the name of the file that is to be parsed. The
* optional second parameter is the opened descriptor for the file. If
* the descriptor is 0 (or skipped) then the function will attempt to
* open the file on its own.
*/
extern int pform_parse(const char*path);
extern int pform_parse(const char*path, FILE*file =0);
extern string vl_file;
-5
View File
@@ -39,11 +39,6 @@ std::ostream& operator << (std::ostream&o, const YYLTYPE&loc)
return o;
}
void VLwarn(const char*msg)
{
warn_count += 1;
cerr << yylloc.text << ":" << yylloc.first_line << ": " << msg << endl;
}
void VLerror(const char*msg)
{
+8 -3
View File
@@ -1,7 +1,7 @@
#ifndef IVL_parse_misc_H
#define IVL_parse_misc_H
/*
* Copyright (c) 1998-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2014 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -59,7 +59,6 @@ extern int VLlex();
extern void VLerror(const char*msg);
extern void VLerror(const YYLTYPE&loc, const char*msg, ...) __attribute__((format(printf,2,3)));
#define yywarn VLwarn
extern void VLwarn(const char*msg);
extern void VLwarn(const YYLTYPE&loc, const char*msg);
extern void destroy_lexor();
@@ -72,6 +71,12 @@ extern unsigned long based_size;
extern bool in_celldefine;
enum UCDriveType { UCD_NONE, UCD_PULL0, UCD_PULL1 };
extern UCDriveType uc_drive;
/*
* Flags to control if we are declaring or checking a timeunit or
* timeprecision statement.
*/
extern bool have_timeunit_decl;
extern bool have_timeprec_decl;
/*
* The parser signals back to the lexor that the next identifier
@@ -88,7 +93,7 @@ extern void lex_in_package_scope(PPackage*pkg);
* parser detects typedefs and marks the typedef'ed identifiers as
* type names.
*/
extern data_type_t* pform_test_type_identifier(const YYLTYPE&loc, const char*txt);
extern data_type_t* pform_test_type_identifier(const char*txt);
extern data_type_t* pform_test_type_identifier(PPackage*pkg, const char*txt);
extern bool pform_test_type_identifier_local(perm_string txt);
+584 -676
View File
File diff suppressed because it is too large Load Diff
+16 -45
View File
@@ -1,7 +1,7 @@
#ifndef IVL_pform_H
#define IVL_pform_H
/*
* Copyright (c) 1998-2020 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2016 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -104,7 +104,7 @@ struct net_decl_assign_t {
/* The lgate is gate instantiation information. */
struct lgate {
explicit inline lgate(int =0)
inline lgate(int =0)
: parms(0), parms_by_name(0), file(NULL), lineno(0)
{ }
@@ -147,11 +147,7 @@ extern bool pform_in_interface(void);
*/
extern PWire* pform_get_wire_in_scope(perm_string name);
extern PWire* pform_get_make_wire_in_scope(const struct vlltype&li,
perm_string name,
NetNet::Type net_type,
NetNet::PortType port_type,
ivl_variable_type_t vt_type);
extern PWire* pform_get_make_wire_in_scope(perm_string name, NetNet::Type net_type, NetNet::PortType port_type, ivl_variable_type_t vt_type);
/*
* The parser uses startmodule and endmodule together to build up a
@@ -169,8 +165,8 @@ extern void pform_startmodule(const struct vlltype&loc, const char*name,
bool program_block, bool is_interface,
LexicalScope::lifetime_t lifetime,
list<named_pexpr_t>*attr);
extern void pform_check_timeunit_prec();
extern void pform_module_set_ports(vector<Module::port_t*>*);
extern void pform_set_scope_timescale(const struct vlltype&loc);
/* These functions are used when we have a complete port definition, either
in an ansi style or non-ansi style declaration. In this case, we have
@@ -246,10 +242,7 @@ extern void pform_add_modport_port(const struct vlltype&loc,
* This creates an identifier aware of names that may have been
* imported from other packages.
*/
extern PEIdent* pform_new_ident(const struct vlltype&loc, const pform_name_t&name);
extern PTrigger* pform_new_trigger(const struct vlltype&loc, PPackage*pkg,
const pform_name_t&name);
extern PEIdent* pform_new_ident(const pform_name_t&name);
/*
* Enter/exit name scopes. The push_scope function pushes the scope
@@ -277,8 +270,7 @@ extern PTask*pform_push_task_scope(const struct vlltype&loc, char*name,
extern PFunction*pform_push_function_scope(const struct vlltype&loc, const char*name,
LexicalScope::lifetime_t lifetime);
extern PBlock*pform_push_block_scope(const struct vlltype&loc, char*name,
PBlock::BL_TYPE tt);
extern PBlock*pform_push_block_scope(char*name, PBlock::BL_TYPE tt);
extern void pform_put_behavior_in_scope(AProcess*proc);
@@ -292,7 +284,6 @@ extern verinum* pform_verinum_with_size(verinum*s, verinum*val,
extern void pform_genvars(const struct vlltype&li, list<perm_string>*names);
extern void pform_start_generate_for(const struct vlltype&li,
bool local_index,
char*ident1,
PExpr*init,
PExpr*test,
@@ -304,7 +295,7 @@ extern void pform_start_generate_case(const struct vlltype&lp, PExpr*test);
extern void pform_start_generate_nblock(const struct vlltype&lp, char*name);
extern void pform_generate_case_item(const struct vlltype&lp, list<PExpr*>*test);
extern void pform_generate_block_name(char*name);
extern void pform_endgenerate(bool end_conditional);
extern void pform_endgenerate();
/*
* This function returns the lexically containing generate scheme, if
@@ -316,10 +307,9 @@ extern PGenerate* pform_parent_generate(void);
extern void pform_set_typedef(perm_string name, data_type_t*data_type,
std::list<pform_range_t>*unp_ranges);
extern void pform_set_type_referenced(const struct vlltype&loc, const char*name);
/*
* This function makes a PECallFunction of the named function.
* This function makes a PECallFunction of the named function. Decide
* if this function is in the scope or is imported from a package.
*/
extern PECallFunction* pform_make_call_function(const struct vlltype&loc,
const pform_name_t&name,
@@ -396,11 +386,11 @@ extern void pform_set_reg_idx(perm_string name,
extern void pform_set_data_type(const struct vlltype&li, data_type_t*, list<perm_string>*names, NetNet::Type net_type, list<named_pexpr_t>*attr);
extern void pform_set_struct_type(const struct vlltype&li, struct_type_t*struct_type, std::list<perm_string>*names, NetNet::Type net_type, std::list<named_pexpr_t>*attr);
extern void pform_set_struct_type(struct_type_t*struct_type, std::list<perm_string>*names, NetNet::Type net_type, std::list<named_pexpr_t>*attr);
extern void pform_set_string_type(const struct vlltype&li, const string_type_t*string_type, std::list<perm_string>*names, NetNet::Type net_type, std::list<named_pexpr_t>*attr);
extern void pform_set_string_type(const string_type_t*string_type, std::list<perm_string>*names, NetNet::Type net_type, std::list<named_pexpr_t>*attr);
extern void pform_set_class_type(const struct vlltype&li, class_type_t*class_type, std::list<perm_string>*names, NetNet::Type net_type, std::list<named_pexpr_t>*addr);
extern void pform_set_class_type(class_type_t*class_type, std::list<perm_string>*names, NetNet::Type net_type, std::list<named_pexpr_t>*addr);
/* pform_set_attrib and pform_set_type_attrib exist to support the
@@ -434,13 +424,6 @@ extern void pform_set_specparam(const struct vlltype&loc,
PExpr*expr);
extern void pform_set_defparam(const pform_name_t&name, PExpr*expr);
extern void pform_set_param_from_type(const struct vlltype&loc,
const data_type_t *data_type,
const char *name,
list<pform_range_t> *&param_range,
bool &param_signed,
ivl_variable_type_t &param_type);
/*
* Functions related to specify blocks.
*/
@@ -488,8 +471,7 @@ extern void pform_makegates(const struct vlltype&loc,
extern void pform_make_modgates(const struct vlltype&loc,
perm_string type,
struct parmvalue_t*overrides,
svector<lgate>*gates,
list<named_pexpr_t>*attr);
svector<lgate>*gates);
/* Make a continuous assignment node, with optional bit- or part- select. */
extern void pform_make_pgassign_list(list<PExpr*>*alist,
@@ -520,13 +502,6 @@ extern std::vector<pform_tf_port_t>*pform_make_task_ports(const struct vlltype&l
extern PAssign* pform_compressed_assign_from_inc_dec(const struct vlltype&loc,
PExpr*exp);
/*
* The parser uses this function to convert a genvar increment/decrement
* expression to the equivalent binary add/subtract expression.
*/
extern PExpr* pform_genvar_inc_dec(const struct vlltype&loc, const char*name,
bool inc_flag);
/*
* These are functions that the outside-the-parser code uses the do
* interesting things to the Verilog. The parse function reads and
@@ -584,12 +559,8 @@ extern void parm_to_defparam_list(const string&param);
*/
extern bool get_time_unit(const char*cp, int &unit);
extern int pform_get_timeunit();
extern void pform_set_timeunit(const char*txt, bool initial_decl);
extern void pform_set_timeprec(const char*txt, bool initial_decl);
/*
* Flags to determine whether this is an initial declaration.
*/
extern bool allow_timeunit_decl;
extern bool allow_timeprec_decl;
extern void pform_set_timeunit(const char*txt, bool in_module, bool only_check);
extern void pform_set_timeprecision(const char*txt, bool in_module,
bool only_check);
#endif /* IVL_pform_H */
+6 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2019 Picture Elements, Inc.
* Copyright (c) 2012-2014 Picture Elements, Inc.
* Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
@@ -22,17 +22,18 @@
# include "parse_misc.h"
# include "ivl_assert.h"
static void pform_set_class_type(const struct vlltype&li, class_type_t*, perm_string name, NetNet::Type net_type, list<named_pexpr_t>*attr)
static void pform_set_class_type(class_type_t*class_type, perm_string name, NetNet::Type net_type, list<named_pexpr_t>*attr)
{
PWire*net = pform_get_make_wire_in_scope(li, name, net_type, NetNet::NOT_A_PORT, IVL_VT_CLASS);
PWire*net = pform_get_make_wire_in_scope(name, net_type, NetNet::NOT_A_PORT, IVL_VT_CLASS);
assert(net);
net->set_data_type(class_type);
pform_bind_attributes(net->attributes, attr, true);
}
void pform_set_class_type(const struct vlltype&li, class_type_t*class_type, list<perm_string>*names, NetNet::Type net_type, list<named_pexpr_t>*attr)
void pform_set_class_type(class_type_t*class_type, list<perm_string>*names, NetNet::Type net_type, list<named_pexpr_t>*attr)
{
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end() ; ++ cur) {
pform_set_class_type(li, class_type, *cur, net_type, attr);
pform_set_class_type(class_type, *cur, net_type, attr);
}
}
+35 -84
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 1998-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2016 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -99,10 +99,6 @@ ostream& operator<< (ostream&out, const name_component_t&that)
ostream& operator<< (ostream&o, const pform_name_t&that)
{
pform_name_t::const_iterator cur;
if (that.size() == 0) {
o << "<nil>";
return o;
}
cur = that.begin();
o << *cur;
@@ -125,15 +121,6 @@ std::ostream& operator << (std::ostream&out, ivl_process_type_t pt)
case IVL_PR_ALWAYS:
out << "always";
break;
case IVL_PR_ALWAYS_COMB:
out << "always_comb";
break;
case IVL_PR_ALWAYS_FF:
out << "always_ff";
break;
case IVL_PR_ALWAYS_LATCH:
out << "always_latch";
break;
case IVL_PR_FINAL:
out << "final";
break;
@@ -204,10 +191,7 @@ void vector_type_t::pform_dump(ostream&fd, unsigned indent) const
if (pdims.get()) {
for (list<pform_range_t>::iterator cur = pdims->begin()
; cur != pdims->end() ; ++cur) {
fd << "[";
if (cur->first) fd << *(cur->first);
if (cur->second) fd << ":" << *(cur->second);
fd << "]";
fd << "[" << *(cur->first) << ":" << *(cur->second) << "]";
}
}
fd << endl;
@@ -531,12 +515,10 @@ void PWire::dump(ostream&out, unsigned ind) const
if (signed_) {
out << " signed";
}
if (get_isint()) {
out << " integer";
}
if (get_scalar()) {
out << " scalar";
}
if (set_data_type_) {
out << " set_data_type_=" << typeid(*set_data_type_).name();
}
@@ -551,12 +533,8 @@ void PWire::dump(ostream&out, unsigned ind) const
} else {
out << " port";
for (list<pform_range_t>::const_iterator cur = port_.begin()
; cur != port_.end() ; ++cur) {
out << "[";
if (cur->first) out << *cur->first;
if (cur->second) out << ":" << *cur->second;
out << "]";
}
; cur != port_.end() ; ++cur)
out << "[" << *cur->first << ":" << *cur->second << "]";
}
}
if (net_set_) {
@@ -565,12 +543,8 @@ void PWire::dump(ostream&out, unsigned ind) const
} else {
out << " net";
for (list<pform_range_t>::const_iterator cur = net_.begin()
; cur != net_.end() ; ++cur) {
out << "[";
if (cur->first) out << *cur->first;
if (cur->second) out << ":" << *cur->second;
out << "]";
}
; cur != net_.end() ; ++cur)
out << "[" << *cur->first << ":" << *cur->second << "]";
}
}
@@ -653,10 +627,10 @@ void PGBuiltin::dump(ostream&out, unsigned ind) const
out << "bufif1 ";
break;
case PGBuiltin::NOTIF0:
out << "notif0 ";
out << "bufif0 ";
break;
case PGBuiltin::NOTIF1:
out << "notif1 ";
out << "bufif1 ";
break;
case PGBuiltin::NAND:
out << "nand ";
@@ -721,11 +695,10 @@ void PGModule::dump(ostream&out, unsigned ind) const
if (parms_) {
assert(overrides_ == 0);
out << "#(";
for (unsigned idx = 0 ; idx < nparms_ ; idx += 1) {
if (idx > 0) out << ", ";
out << "." << parms_[idx].name << "(";
if (parms_[idx].parm) out << *parms_[idx].parm;
out << ")";
out << "." << parms_[0].name << "(" << *parms_[0].parm << ")";
for (unsigned idx = 1 ; idx < nparms_ ; idx += 1) {
out << ", ." << parms_[idx].name << "(" <<
*parms_[idx].parm << ")";
}
out << ") ";
}
@@ -756,7 +729,6 @@ void PGModule::dump(ostream&out, unsigned ind) const
dump_pins(out);
}
out << ");" << endl;
dump_attributes_map(out, attributes, 8);
}
void Statement::dump(ostream&out, unsigned ind) const
@@ -854,19 +826,6 @@ void PCallTask::dump(ostream&out, unsigned ind) const
void PCase::dump(ostream&out, unsigned ind) const
{
out << setw(ind) << "";
switch (quality_) {
case IVL_CASE_QUALITY_BASIC:
break;
case IVL_CASE_QUALITY_UNIQUE:
out << "unique ";
break;
case IVL_CASE_QUALITY_UNIQUE0:
out << "unique0 ";
break;
case IVL_CASE_QUALITY_PRIORITY:
out << "priority ";
break;
}
switch (type_) {
case NetCase::EQ:
out << "case";
@@ -884,7 +843,7 @@ void PCase::dump(ostream&out, unsigned ind) const
for (unsigned idx = 0 ; idx < items_->count() ; idx += 1) {
PCase::Item*cur = (*items_)[idx];
if (! cur->expr.empty()) {
if (cur->expr.size()) {
out << setw(ind+2) << "" << "default:";
} else {
@@ -1216,11 +1175,6 @@ void AProcess::dump(ostream&out, unsigned ind) const
case IVL_PR_ALWAYS:
out << setw(ind) << "" << "analog";
break;
case IVL_PR_ALWAYS_COMB:
case IVL_PR_ALWAYS_FF:
case IVL_PR_ALWAYS_LATCH:
assert(0);
break;
case IVL_PR_FINAL:
out << setw(ind) << "" << "analog final";
break;
@@ -1386,22 +1340,22 @@ void LexicalScope::dump_typedefs_(ostream&out, unsigned indent) const
void LexicalScope::dump_parameters_(ostream&out, unsigned indent) const
{
typedef map<perm_string,param_expr_t*>::const_iterator parm_iter_t;
typedef map<perm_string,param_expr_t>::const_iterator parm_iter_t;
for (parm_iter_t cur = parameters.begin()
; cur != parameters.end() ; ++ cur ) {
out << setw(indent) << "" << "parameter "
<< (*cur).second->type << " ";
if ((*cur).second->signed_flag)
<< (*cur).second.type << " ";
if ((*cur).second.signed_flag)
out << "signed ";
if ((*cur).second->msb)
out << "[" << *(*cur).second->msb << ":"
<< *(*cur).second->lsb << "] ";
if ((*cur).second.msb)
out << "[" << *(*cur).second.msb << ":"
<< *(*cur).second.lsb << "] ";
out << (*cur).first << " = ";
if ((*cur).second->expr)
out << *(*cur).second->expr;
if ((*cur).second.expr)
out << *(*cur).second.expr;
else
out << "/* ERROR */";
for (LexicalScope::range_t*tmp = (*cur).second->range
for (LexicalScope::range_t*tmp = (*cur).second.range
; tmp ; tmp = tmp->next) {
if (tmp->exclude_flag)
out << " exclude ";
@@ -1435,16 +1389,16 @@ void LexicalScope::dump_parameters_(ostream&out, unsigned indent) const
void LexicalScope::dump_localparams_(ostream&out, unsigned indent) const
{
typedef map<perm_string,param_expr_t*>::const_iterator parm_iter_t;
typedef map<perm_string,param_expr_t>::const_iterator parm_iter_t;
for (parm_iter_t cur = localparams.begin()
; cur != localparams.end() ; ++ cur ) {
out << setw(indent) << "" << "localparam ";
if ((*cur).second->msb)
out << "[" << *(*cur).second->msb << ":"
<< *(*cur).second->lsb << "] ";
if ((*cur).second.msb)
out << "[" << *(*cur).second.msb << ":"
<< *(*cur).second.lsb << "] ";
out << (*cur).first << " = ";
if ((*cur).second->expr)
out << *(*cur).second->expr << ";" << endl;
if ((*cur).second.expr)
out << *(*cur).second.expr << ";" << endl;
else
out << "/* ERROR */;" << endl;
}
@@ -1540,16 +1494,16 @@ void PClass::dump(ostream&out, unsigned indent) const
void Module::dump_specparams_(ostream&out, unsigned indent) const
{
typedef map<perm_string,param_expr_t*>::const_iterator parm_iter_t;
typedef map<perm_string,param_expr_t>::const_iterator parm_iter_t;
for (parm_iter_t cur = specparams.begin()
; cur != specparams.end() ; ++ cur ) {
out << setw(indent) << "" << "specparam ";
if ((*cur).second->msb)
out << "[" << *(*cur).second->msb << ":"
<< *(*cur).second->lsb << "] ";
if ((*cur).second.msb)
out << "[" << *(*cur).second.msb << ":"
<< *(*cur).second.lsb << "] ";
out << (*cur).first << " = ";
if ((*cur).second->expr)
out << *(*cur).second->expr << ";" << endl;
if ((*cur).second.expr)
out << *(*cur).second.expr << ";" << endl;
else
out << "/* ERROR */;" << endl;
}
@@ -1750,12 +1704,9 @@ void PPackage::pform_dump(std::ostream&out) const
out << "package " << pscope_name() << endl;
dump_localparams_(out, 4);
dump_parameters_(out, 4);
dump_typedefs_(out, 4);
dump_enumerations_(out, 4);
dump_wires_(out, 4);
dump_tasks_(out, 4);
dump_funcs_(out, 4);
dump_var_inits_(out, 4);
out << "endpackage" << endl;
}
+70 -36
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2019 Stephen Williams (steve@icarus.com)
* Copyright (c) 2012-2016 Stephen Williams (steve@icarus.com)
* Copyright CERN 2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
@@ -72,58 +72,92 @@ void pform_end_package_declaration(const struct vlltype&loc)
* package is declared in pform ahead of time (it is) and that we can
* simply transfer definitions to the current scope (we can).
*/
void pform_package_import(const struct vlltype&loc, PPackage*pkg, const char*ident)
void pform_package_import(const struct vlltype&, PPackage*pkg, const char*ident)
{
LexicalScope*scope = pform_peek_scope();
if (ident) {
perm_string use_ident = lex_strings.make(ident);
// Check that the requested symbol is available.
map<perm_string,PNamedItem*>::const_iterator cur_sym
= pkg->local_symbols.find(use_ident);
if (cur_sym == pkg->local_symbols.end()) {
cerr << loc.get_fileline() << ": error: "
"'" << use_ident << "' is not exported by '"
<< pkg->pscope_name() << "'." << endl;
error_count += 1;
map<perm_string,LexicalScope::param_expr_t>::const_iterator cur
= pkg->parameters.find(use_ident);
if (cur != pkg->parameters.end()) {
scope->imports[cur->first] = pkg;
return;
}
// Check for conflict with local symbol.
cur_sym = scope->local_symbols.find(use_ident);
if (cur_sym != scope->local_symbols.end()) {
cerr << loc.get_fileline() << ": error: "
"'" << use_ident << "' has already been declared "
"in this scope." << endl;
cerr << cur_sym->second->get_fileline() << ": : "
"It was declared here as "
<< cur_sym->second->symbol_type() << "." << endl;
error_count += 1;
cur = pkg->localparams.find(use_ident);
if (cur != pkg->localparams.end()) {
scope->imports[cur->first] = pkg;
return;
}
// Check for conflict with previous import.
map<perm_string,PPackage*>::const_iterator cur_pkg
= scope->explicit_imports.find(use_ident);
if (cur_pkg != scope->explicit_imports.end()) {
if (cur_pkg->second != pkg) {
cerr << loc.get_fileline() << ": error: "
"'" << use_ident << "' has already been "
"imported into this scope from package '"
<< cur_pkg->second->pscope_name() << "'." << endl;
error_count += 1;
}
map<perm_string,data_type_t*>::const_iterator tcur;
tcur = pkg->typedefs.find(use_ident);
if (tcur != pkg->typedefs.end()) {
scope->imports[tcur->first] = pkg;
return;
}
scope->explicit_imports[use_ident] = pkg;
map<perm_string,PFunction*>::const_iterator fcur;
fcur = pkg->funcs.find(use_ident);
if (fcur != pkg->funcs.end()) {
scope->imports[fcur->first] = pkg;
return;
}
map<perm_string,PTask*>::const_iterator ttcur;
ttcur = pkg->tasks.find(use_ident);
if (ttcur != pkg->tasks.end()) {
scope->imports[ttcur->first] = pkg;
return;
}
map<perm_string,PWire*>::const_iterator wcur;
wcur = pkg->wires.find(use_ident);
if (wcur != pkg->wires.end()) {
scope->imports[wcur->first] = pkg;
return;
}
ostringstream msg;
msg << "Symbol " << use_ident
<< " not found in package " << pkg->pscope_name() << "." << ends;
VLerror(msg.str().c_str());
return;
} else {
set<PPackage*>::const_iterator cur_pkg
= scope->potential_imports.find(pkg);
if (cur_pkg == scope->potential_imports.end())
scope->potential_imports.insert(pkg);
// Handle the pkg::* case by importing everything from
// the package.
for (map<perm_string,LexicalScope::param_expr_t>::const_iterator cur = pkg->parameters.begin()
; cur != pkg->parameters.end() ; ++cur) {
scope->imports[cur->first] = pkg;
}
for (map<perm_string,LexicalScope::param_expr_t>::const_iterator cur = pkg->localparams.begin()
; cur != pkg->localparams.end() ; ++cur) {
scope->imports[cur->first] = pkg;
}
for (map<perm_string,data_type_t*>::const_iterator cur = pkg->typedefs.begin()
; cur != pkg->typedefs.end() ; ++cur) {
scope->imports[cur->first] = pkg;
}
for (map<perm_string,PFunction*>::const_iterator cur = pkg->funcs.begin()
; cur != pkg->funcs.end() ; ++cur) {
scope->imports[cur->first] = pkg;
}
for (set<enum_type_t*>::const_iterator cur = pkg->enum_sets.begin()
; cur != pkg->enum_sets.end() ; ++ cur) {
scope->enum_sets.insert(*cur);
}
}
}

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