luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix for GitHub issue #115 - synthesis aborts on case with max guard of 0. 

The calculation of the required multiplexer width was incorrect for
the corner case of a single guard value of zero.
This commit is contained in:
Martin Whitaker 2016-07-22 23:09:36 +01:00
parent 7bed181f68
commit 27213f2af8
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
synth2.cc
View File

@ -846,7 +846,7 @@ bool NetCase::synth_async(Design*des, NetScope*scope,
// The minimum selector width is the number of inputs that
// are selected, rounded up to the nearest power of 2.
unsigned sel_need = ceil(log2(max_guard_value + 1));
unsigned sel_need = max(ceil(log2(max_guard_value + 1)), 1.0);
// If the sel_width can select more than just the explicit
// guard values, and there is a default statement, then adjust