Commit Graph

43 Commits

Author SHA1 Message Date
steve aed8474944 Reimplement basic asynchronous processes. 2005-04-25 01:35:58 +00:00
steve 365cfedd55 Update DFF support to new data flow. 2005-04-24 23:44:01 +00:00
steve d74177634c Restructure NetMux devices to pass vectors.
Generate NetMux devices from ternary expressions,
 Reduce NetMux devices to bufif when appropriate.
2005-02-12 06:25:40 +00:00
steve 65e9b6be12 Rework of internals to carry vectors through nexus instead
of single bits. Make the ivl, tgt-vvp and vvp initial changes
 down this path.
2004-12-11 02:31:25 +00:00
steve e4ae832153 Clean up spurious trailing white space. 2004-10-04 01:10:51 +00:00
steve d76ad25778 Do not change reg to wire in NetAssign_ unless synthesizing. 2004-08-28 15:08:31 +00:00
steve c8d67b904a Only include DEBUG_SYNTH2 if __FUNCTION__ defined. 2004-03-15 18:40:12 +00:00
steve 177b6ffb6a Addtrbute keys are perm_strings. 2004-02-20 18:53:33 +00:00
steve 27af95d402 Use perm_strings for named langiage items. 2004-02-18 17:11:54 +00:00
steve e331b182a7 Synthesis debug messages. 2003-12-20 00:59:31 +00:00
steve 57c3e86084 Debug dumps for synth2. 2003-12-17 16:52:39 +00:00
steve a503e2d91f Handle special case of FF with enable and constant data. 2003-10-27 02:18:04 +00:00
steve 7c1401a2ba Spelling patch. 2003-08-28 04:11:17 +00:00
steve e561819179 Add synthesis support for synchronous reset. 2003-08-15 02:23:52 +00:00
steve bc428cfe9b Fix dangling pointer in NexusSet handling blocks. 2003-08-14 02:41:05 +00:00
steve fff8278eb4 Detect asynchronous FF inputs that are expressions. 2003-08-10 17:04:23 +00:00
steve 5cb5a19819 ivl_synthesis_cell cuts off synthesis within a module. 2003-06-23 00:14:44 +00:00
steve 61195c5daa Harmless fixup of warnings. 2003-06-21 01:21:42 +00:00
steve 47060bfedd Prevent overrun comparing verinums to zero. 2003-04-03 04:30:00 +00:00
steve 38ebbd23c7 Handle defaults in synthesized case statements. 2003-03-25 04:04:29 +00:00
steve badad63ab4 All NetObj objects have lex_string base names. 2003-03-06 00:28:41 +00:00
steve a275133ff9 LPM objects store only their base names. 2003-02-26 01:29:24 +00:00
steve 8f0c02c0fa Spelling fixes. 2003-01-27 05:09:17 +00:00
steve 1742231eba Handle nested-if chip enables. 2002-11-09 23:29:29 +00:00
steve cbc4a0ab52 Detect synthesis conflicts blocks statements share outputs. 2002-11-09 20:22:57 +00:00
steve 0e751ad975 More forgiving about assignment rval width mismatch. 2002-11-06 03:22:28 +00:00
steve 9ce2806710 Fix synth2 handling of aset/aclr signals where
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
steve 3d4593d4d5 Synthesizer support for synchronous begin-end blocks. 2002-10-21 01:42:08 +00:00
steve df5ae54ec7 Handle conditional error cases better. 2002-10-20 19:19:37 +00:00
steve e3eb89fb12 Remove excess debug messages. 2002-09-26 03:42:10 +00:00
steve 166621bcb3 Generate vvp code for asynch set/reset of NetFF. 2002-09-26 03:18:04 +00:00
steve 879a5a4cbe Synthesize async set/reset is certain cases. 2002-09-26 01:13:14 +00:00
steve 6258011210 More detailed check of process edge events. 2002-09-24 00:58:35 +00:00
steve c44c123ef5 Connect output of block to net_out, instead of statement outputs. 2002-09-17 04:40:28 +00:00
steve eb81062d85 Add to synth2 support for synthesis of
synchronous logic. This includes DFF enables
 modeled by if/then/else.
2002-09-16 00:30:33 +00:00
steve 2fad8d4cff Detect temporaries in sequential block synthesis. 2002-08-18 22:07:16 +00:00
steve 52bf4e613f conditional ident string using autoconfig. 2002-08-12 01:34:58 +00:00
steve b4b18f3f30 Observe attributes to control synthesis. 2002-08-10 22:07:08 +00:00
steve bb87c368b8 Asynchronous synthesis of sequential blocks. 2002-07-29 00:00:28 +00:00
steve 68da84e84a Allow wide rvalues assigned to narrow nex_out. 2002-07-16 04:40:48 +00:00
steve 8114523be2 Asynchronous synthesis of case statements. 2002-07-07 22:32:15 +00:00
steve d5e9e13555 synth_asych of if/else requires redirecting the target
if sub-statements. Use NetNet objects to manage the
 situation.
2002-07-01 00:54:21 +00:00
steve 9b6b081e38 Add structure for asynchronous logic synthesis. 2002-06-30 02:21:31 +00:00