Commit Graph

366 Commits

Author SHA1 Message Date
Cary R 588409389e SV: Add support for var decls in unnamed begin/end blocks.
SystemVerilog allows variables to be declared in unnamed begin/end
blocks. This patch adds support for this functionality.
2014-07-22 18:58:23 -07:00
Stephen Williams 14f597acdd Add support for synthesis translate meta-comments. 2014-07-15 18:03:40 -07:00
Cary R 0611135758 Some more cppcheck cleanup/updates 2014-06-29 20:39:40 -07:00
Martin Whitaker d96e8872c1 Fix for GitHub issue 25 - compiler crash when function declared outside module.
This is an error in traditional Verilog and a unsupported feature in
SystemVerilog. Fail gracefully with a suitable error/sorry message.
Do the same for task declarations.
2014-05-23 21:55:46 +01:00
Stephen Williams 6caa41cc93 First pass at support for continuous assign of unpacked net arrays. 2014-04-06 08:40:09 -07:00
Stephen Williams f8e33b12cd Clean up pform_module_define_port in preparation for new tricks.
Get rid of the data_type, signed_flag, and range arguments to the
pform_module_define_port because they add no value within the
parse.y parser. Cleaning these out will hopefully ease the addition
of new functionality.
2014-04-06 08:40:09 -07:00
Stephen Williams a849249a86 Allow typedefs to override inherited type names. 2014-04-06 08:40:08 -07:00
Larry Doolittle 3e95966d70 More spelling fixes
Mostly comments
Changs "initilzers" in a string visible with debug_elaborate.
Includes a few British->American changes in the root directory only.
2014-01-30 16:43:17 -08:00
Larry Doolittle be17bfc0e9 Spelling fixes
Mostly comments.
One user-visible string ("Evalutated to ") changed in the debug_eval_tree case.
2014-01-30 15:34:20 -08:00
Stephen Williams a3b29dd70b Handle enumeration literals that are in $root. 2014-01-11 19:19:14 -08:00
Stephen Williams b0491b9c54 Handle typedefs in $root scope. 2014-01-11 19:19:14 -08:00
Stephen Williams 819770a6c4 Handle enumerations as packed struct/union members.
There were also some subtleties related to using enumerations
from typedefs and using them in multiple places. Fix various
bugs related to those issues.
2013-12-07 12:20:28 -08:00
Stephen Williams 9a116498a2 Handle task/function default expressions in parsing/pform.
This gets it to (but not through) the elaborator.
2013-09-20 20:44:56 -07:00
Cary R 07cc18284c Fix print token/argument mismatches and other cppcheck fixes 2013-09-09 13:34:38 -07:00
Martin Whitaker 503487e9ea Fix for br932 - support string types in task input ports. 2013-06-13 23:18:23 +01:00
Martin Whitaker 6364aba975 Fix for br930 - support attributes on old-style port declarations. 2013-05-19 09:16:24 +01:00
Cary R 71c6193ff1 Finish adding support for end labels in SystemVerilog 2013-05-14 15:01:54 -07:00
Cary R 51d3c03922 A time variable is always unsigned and pass the integer property 2013-04-30 14:05:19 -07:00
Stephen Williams de6c57d661 Elaborate classes in lexical order so that mutual references work. 2013-04-28 16:28:24 -07:00
Stephen Williams 20ee350601 Generalize user defined function return type handling.
I'm gonna need functions to return class objects, so generalize
the output types of user defined functions.
2013-04-20 16:38:35 -07:00
Stephen Williams 4ad556d464 Update some copyright notices. 2013-04-08 18:35:37 -07:00
Stephen Williams 4dffd97d28 Handle tasks in packages. 2013-04-08 18:20:39 -07:00
Stephen Williams b1d853bf9b Fix handling of struct members for variables imported from packages. 2013-04-08 18:20:39 -07:00
Stephen Williams eba3d407ca packages can contain variables. 2013-04-08 18:20:39 -07:00
Stephen Williams bae0f1d3a7 Parse more package items
Rework lexical support for PACKAGE_IDENTIFIER so that the lexor
can help with package scoped identifiers.

Pform package types and package functions up to elaboration.
2013-04-08 18:20:39 -07:00
Cary R bdfd5b9b55 Add -g2012 flag and keywords for IEEE 1800-2012. 2013-04-02 14:41:44 -07:00
Stephen Williams 17330a3073 Elaborate class task and function methods.
The parse of class methods already works, this patch forms
the methods into their own scopes, and elaborates those scopes.
The "this"
2013-03-24 15:12:35 -07:00
Stephen Williams 25b48fa790 Remove svector template from port handling. 2013-03-24 15:03:52 -07:00
Martin Whitaker e437321ea7 Fix implicit casts in assignments (part 6).
IVL_VT_NO_TYPE is now used to signal an untyped LHS in a parameter
declaration. The parser function that handles specparam declarations
needs to do this too. Also, although it should never happen, make
sure we don't set the expression width in a NetECast object to a
negative number. Make constant evaluation of NetECast objects
observe the expression width.
2013-03-24 13:51:10 -07:00
Cary R b378dccbe9 Update parameter add code to correctly handle a non-Module scope
A package can have parameters, but it does not have specparams or
keep the order the parameters are defined. This patch skips these
items if the scope is not a Module.
2013-03-08 10:04:46 -08:00
Stephen Williams 8fa79ceb30 Properly implement import <pkg>::<name>
This was temporarily implemented to just copy definitions to the
local scope, but the better method is to create a PEIdent that has
the package attached to it.
2013-02-17 17:00:15 -08:00
Stephen Williams 99b8086ad2 Import parameters from packages. 2013-02-17 16:59:21 -08:00
Stephen Williams 77d24cd095 Elaborate class_new and (null) expressions
This gets the types right for class_new and null expressions, and
elaborate them down to the ivl_target.h API.
2012-12-10 19:13:43 -08:00
Cary R 15fb58f8e4 Remove some cppcheck warnings, etc. 2012-11-12 18:15:25 -08:00
Stephen Williams 62be9c5b46 Parse (with sorry message) package declarations. 2012-10-21 11:42:19 -07:00
Stephen Williams b8093be42f Rework parse rules to handle more net types.
This makes the rules for types to be more in line with IEEE1800.
2012-09-03 16:00:10 -07:00
Stephen Williams f24d6b055d Use data_type_t instead of raw type bits. 2012-09-03 16:00:10 -07:00
Stephen Williams 0bdabab4fb Rework packed dimensions handling
Make packed structs more obviously parts of a vector.
Handle arrays of structs in certain cases.
2012-09-03 16:00:10 -07:00
Stephen Williams 3d9ed1f0f8 Clean up PWire handling of wire data type. / Reword packed type handling 2012-09-03 16:00:09 -07:00
Arun Persaud f5aafc32f9 updated FSF-address 2012-08-29 10:12:10 -07:00
Martin Whitaker 1f152aa838 Fix for pr3557493.
defparam assignments found inside a generate block were being stored
in the enclosing module scope. They should be stored in the generate
block scope.

Also removed the genvar list from the PGenerate class, as this is
already declared in the base LexicalScope class.
2012-08-21 17:46:34 -07:00
Cary R 4313fbbf1f Fix space errors in various files 2012-08-16 11:13:32 -07:00
Cary R 7ce8a9b01c Fix some cppcheck warnings in the main directory 2012-08-08 11:28:20 -07:00
Stephen Williams d48362b861 First pass at getting strings to work.
In vvp, create the .var/str variable for representing strings, and
handle strings in the $display system task.

Add to vvp threads the concept of a stack of strings. This is going to
be how complex objects are to me handled in the future: forth-like
operation stacks. Also add the first two instructions to minimally get
strings to work.

In the parser, handle the variable declaration and make it available
to the ivl_target.h code generator. The vvp code generator can use this
information to generate the code for new vvp support.
2012-07-22 10:52:06 -07:00
Stephen Williams c0f35cbe62 Disallow modules/gates in program blocks. 2012-05-27 18:26:53 -07:00
Stephen Williams dfe7beec31 Allow modules (and program blocks in particular) to nest.
An important advantage of program blocks is its ability to nest
within a module. This winds up also allowing modules to nest, which
is legal but presumably less used feature.
2012-05-27 18:26:53 -07:00
Stephen Williams 580c44c015 Prevent non-blocking assignment in program blocks. 2012-05-27 18:26:53 -07:00
Stephen Williams 0833d9e37a Basic support for program blocks. 2012-05-27 18:26:53 -07:00
Stephen Williams 342646264e Merge branch 'pei1' 2012-05-25 16:32:12 -07:00
Stephen Williams 6e8aef8262 Get unpacked arrays working. 2012-05-25 15:58:29 -07:00
Stephen Williams ceaa60d2f4 Parse (to "sorry") arrays of named types. 2012-05-22 17:31:27 -07:00
Stephen Williams 247f6a4ecf Handle properly parsed structs in module ports. 2012-05-22 17:31:26 -07:00
Stephen Williams b7b633b613 module output ports use data_type_t types.
This is in place of ad hoc type information passed to the
pform_module_define_port function.
2012-05-22 17:31:26 -07:00
Stephen Williams c7366e65cd Rework port input and inout to use data_type_or_implicit rule for types. 2012-05-22 17:31:26 -07:00
Martin Whitaker 44c5a37ab8 Allow specparam declarations outside specify blocks.
This patch extends the compiler to support all specparam declarations
allowed by the 1364-2005 standard. For compatibility with other
simulators, it allows specparam values to be used in any constant
expression, but outputs a warning message and disables run-time
annotation of a specparam if it is used in an expression that must
be evaluated at compile time.
2012-05-17 16:18:38 -07:00
Stephen Williams 5d05d97eb0 Repair handling of attributes attached to variables. 2012-05-09 10:56:52 -07:00
Stephen Williams 13348ba7ac Ranges are ranges, not expression lists.
This is a cleanup in preparation for better support of range lists.
(cherry picked from commit 8f7cf3255acad55841f8b3725e3786ef49daad68)

Conflicts:

	PTask.h
	elab_scope.cc
	elab_sig.cc
	parse.y
	pform.cc
	pform.h
	pform_types.h

Signed-off-by: Stephen Williams <steve@icarus.com>
2012-04-10 14:29:28 -07:00
Stephen Williams 3657b15428 Merge branch 'x-ms1' 2012-04-02 19:22:31 -07:00
Stephen Williams 5dbe688296 Allow variable initialization in any scope.
This is a SystemVerilog feature, so only allow it when
compiling SystemVerilog files.
2012-03-11 15:08:42 -07:00
Stephen Williams b0d61813b2 Get the scope of class methods right
Class methods belong in a class scope, not the containing module.
So create a lexical scope that carries tasks and functions and
create a PClass to represent classes.
2012-03-11 13:18:24 -07:00
Stephen Williams da743c3b2c Bunches more SystemVerilog syntax. 2012-03-09 18:54:05 -08:00
Stephen Williams 0e01dcf2b9 Miscellaneous SystemVerilog syntax.
... and sorry messages.
2012-03-04 19:33:16 -08:00
Stephen Williams f749867369 Rework rules for variable_dimensions, and support more syntax. 2012-03-02 18:34:43 -08:00
Stephen Williams 410350ae5a Rework data_type parsing to bring integer vectors into data_type_t method.
This adds the vector_type_t and real_type_t types to handle
vector and real types in tf_port items. This cleans up a lot
of the parsing for these items.
2012-02-25 22:05:00 -08:00
Cary R bae02433b7 Remove some more warnings in pform.cc Ubuntu 11.10 (gcc/clang)
Remove a few more warnings from the gcc and clang compilers on
Ubuntu 11.10.
2012-02-22 17:27:27 -08:00
Stephen Williams f8e346f108 Implement increment/decrement statements.
During parse/pform processing, convert increment statements to
the equivalent compressed assignment statement. This is less weird
for elaboration processing and better expresses what is going on.
2012-02-19 18:54:58 -08:00
Stephen Williams 6b4251626b Parse array literals / rearrange task declaration rules. 2012-02-19 17:31:15 -08:00
Stephen Williams 8456252c0c More class syntax
Part of ongoing parser work to support SystemVerilog classes.
2012-02-19 10:29:50 -08:00
Stephen Williams 950e7a632c Parse multi-dimension packed arrays to pform. 2012-02-04 16:19:27 -08:00
Stephen Williams 764b38bb3b Use user defined types in the syntax.
Given that the syntax is already parsed and elaborated, it is a
simple matter to bind that typedef'ed type to the instances that
use it.
2012-02-02 16:18:50 -08:00
Stephen Williams 42b3e6f268 Implement simple typedefs, and parse type identifiers.
This gets me to the point where the parser stashes a defined type,
and the lexical analyzer uses the type names to differentiate
IDENTIFIER and TYPE_IDENTIFIER.
2012-02-02 16:18:50 -08:00
Stephen Williams e14628193a Parse simple typedefs
Parse typedefs with structs and enums, but give a sorry message,
because they are not yet supported. Rearrange some of the parse
rules for variables in order to increase comonality with the
typedef rules.
2012-02-02 16:18:50 -08:00
Stephen Williams e9e2fb33e9 Handle nets that are packed structures. 2012-02-02 16:18:49 -08:00
Stephen Williams d362c8dba0 Parse support for struct variables. 2012-02-02 16:18:49 -08:00
Cary R 4c6a5bbd89 Update PSpecPath to take the polarity and full_flag when constructed
To avoid a variables not initialized in the construct this patch modifies
the PSpecPath class to take the polarity and full_flag as arguments to
the constructor.
2011-11-22 19:39:26 -08:00
Cary R b1869f80ab Add check that a parallel connection uses the same width input/output.
This patch uses the full_flag to verify that the input and output have the
same width for a parallel connection. Icarus always uses a full connection
so this is just a portability issue with other simulators.

The pform dump code was also modified to correctly display the polarity
and full/parallel connection type.
2011-11-10 17:43:35 -08:00
Cary R b2ebc29c5a Fix some enum bugs.
This patch fixes a few more bugs in the enumeration code.

It add support for saving the file and line information to make
diagnostic messages better.

It updates some of the compiler warning messages to use the file
and line information.

It passes if the enumeration type is signed all the way to the
code generators.

It fixes the parser to correctly have the range after the signed
designation for the vector types.

It adds a warning that vvp does not currently support a negative
two state enumeration value.
2011-09-11 11:32:16 -07:00
Prasad Joshi 2cb9a2360c Add support for SystemVerilog style time literals
SystemVerilog has support for time literals. The time literal for
example #10ns, adds a delay of 10ns no matter the time unit currently
in effect. For more details please refer to
http://iverilog.wikia.com/wiki/Projects#SystemVerilog_Style_Time_Literals

Tested-by: Oswaldo Cadenas <oswaldo.cadenas@gmail.com>
Signed-off-by: Prasad Joshi <prasadjoshi124@gmail.com>
2011-07-14 18:43:55 -07:00
Cary R 4006bb2336 Some more cppcheck cleanup.
This patch cleans up most of the warnings in the main (ivl) directory.
2011-04-20 18:09:11 -07:00
Larry Doolittle 8a568055f6 Spelling fixes
All are in comments and .txt files except for one in the Architecture::Statement dump message.
2011-03-29 08:56:10 -07:00
Cary R 427aef8cc4 Add more file/line and scope information to the ivl interface, etc.
This patch adds/fixes the following:

  Adds file/line information to a UDP definition.

  Prints an error message if a UDP is passed signals wider than 1 bit.
  A UDP should supports a range, but the compiler currently does not.

  Add scope information for constants.

  Fix the Icarus extension UDP table entry element 'h' to use h.

  The ivl_udp_init() value is a char not unsigned.

  Add FILE_NAME() for a bunch more of the ivl interface objects.
2011-02-10 19:04:08 -08:00
Cary R eb81d2fe94 Fix some bugs in task integer/real arguments.
This patch fixes the following problem in the compiler:

  An integer task argument should be marked as an integer port.

  An implicit register can be converted to either a reg or an integer.

  An old style task port should default to <no type> unless reg or some
  other type is provided. ANSI style is always defined. For example:
    input ri;
    output ro;
    inout rio;
    real ri, ro, rio;
  should define all three task ports to be of type real.
2011-01-31 11:27:11 -08:00
Cary R d4a97b4a9c Add a generation for 1800-2005, etc.
It was a poor choice to only add -g2009 for 1800-2009 and ignore the
previous version of System Verilog 1800-2005. This patch adds a
generation for 1800-2005 and also adds `begin_keywords support for
1800-2005. The previous SystemVerilog keywords have been put under
the 1800-2005 generation and the new one from 1800-2009 have also
been added.
2011-01-12 16:36:17 -08:00
Cary R d0b063b4a4 Fix enum compile warnings and update ivl.def (windows compile).
This patch fixes a few compilation warnings introduced by the
enumeration code. It also updates the ivl.def file so that the
proper routines get exported under windows.
2010-11-30 16:10:34 -08:00
Stephen Williams 16e1570737 Merge branch 'master' into work2
Conflicts:
	elab_scope.cc
	net_nex_input.cc
	t-dll-api.cc
	vvp/parse.y
2010-11-28 08:38:40 -08:00
Stephen Williams 27dfdf99dd Enumeration element values can be expressions
Allow more complex enumeration expressions, which means putting
off the evaluation of the expression values until elaboration.
2010-11-12 18:47:06 -08:00
Stephen Williams cc304ef0db Broken implicit enumeration value. 2010-11-07 10:24:04 -08:00
Stephen Williams cd6c6c7a70 Get the netenum_t base type data from the pform.
The pform propagates the parsed enum base type information
to the elaborator so that the base type can be fully elaborated.
This is necessary to get the types of the enumeration literals
correct.
2010-11-03 20:11:19 -07:00
Cary R a4a7b0a09d Make ivl_alloc.h the last include so it doesn't effect any system includes.
In ivl_alloc.h we redefine malloc(), realloc() and calloc() to have
standard error checking. We don't want to do this for anything that
comes from the standard headers. This specifically doesn't work if
a C++ header files does std::malloc, etc.

Also change to -W instead of -Wextra since that is more portable. I
plan to add a check from -Wextra and use it when available since it
is more descriptive.
2010-11-02 10:51:57 -07:00
Cary R 225ca1e205 Change iterators to use prefix ++ since it is more efficient.
This patch changes all the iterator code to use a prefix ++ instead
of postfix since it is more efficient (no need for a temporary). It
is likely that the compiler could optimize this away, but lets make
it efficient from the start.
2010-11-02 10:43:16 -07:00
Stephen Williams a14fa038b4 Enum names in r-value expressions
When enum names are used as r-values in expressions, use their
values. Treat the enum names similar to (but not exactly as)
localparams so that they fit into the rest of the elaboration
flow naturally.
2010-10-31 11:26:09 -07:00
Stephen Williams cced1e771b Remove some uses of the svector template.
I'm adding more uses of the make_range_from_width function, so
it seems like time to get rid of its use of the svector template.
This thread led to a lot of other uses of svector that had to
also be removed.
2010-10-25 19:36:44 -07:00
Stephen Williams eb4ed82893 Finish up parser code for enum types
This gets the parser syntax actions done, up to the pform code.
It is ready for generating pform structures.
2010-10-24 11:21:17 -07:00
Stephen Williams 3733c59e49 Merge branch 'work1' 2010-10-21 19:31:49 -07:00
Cary R cb86fb15bf Add error checking definitions for malloc(), realloc() and calloc()
This patch adds defines that translate all malloc(), realloc() and calloc()
calls into ones with error checking when ivl_alloc.h is included.
2010-10-14 17:39:23 -07:00
Stephen Williams e03ff763fb Parse support for SystemVerilog atom2 types. 2010-10-10 10:06:26 -07:00
Stephen Williams ec49f10e2d Revert bad merge from vhdl branch 2010-10-02 11:02:27 -07:00
Cary R 07ee2e7dff On error there is no need to pop the scope.
The error routines for task and function definitions were incorrectly
popping the scope. This should not be done since no scope was pushed.
Also assert that the current_task/function is 0 to catch that kind of
error like the other definition rules.
2010-06-18 15:48:00 -07:00
Cary R 1993bf6f69 Remove malloc.h support and for C++ files use <c...> include files.
The functions (malloc, free, etc.) that used to be provided in
malloc.h are now provided in cstdlib for C++ files and stdlib.h for
C files. Since we require a C99 compliant compiler it makes sense
that malloc.h is no longer needed.

This patch also modifies all the C++ files to use the <c...>
version of the standard C header files (e.g. <cstdlib> vs
<stdlib.h>). Some of the files used the C++ version and others did
not. There are still a few other header changes that could be done,
but this takes care of much of it.
2010-06-01 08:56:30 -07:00
Cary R 420519193d make_pair has a PExpr* as a second argument
The make_pair() routine has a PExpr* as the second argument. Not all
compilers can promote a child correctly, so just assign the child type
to a PExpr* when they are created solves this issue.
2010-05-17 20:54:54 -07:00