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Fix some bugs in task integer/real arguments. 

This patch fixes the following problem in the compiler:

  An integer task argument should be marked as an integer port.

  An implicit register can be converted to either a reg or an integer.

  An old style task port should default to <no type> unless reg or some
  other type is provided. ANSI style is always defined. For example:
    input ri;
    output ro;
    inout rio;
    real ri, ro, rio;
  should define all three task ports to be of type real.
This commit is contained in:
Cary R 2011-01-26 19:33:49 -08:00 committed by Stephen Williams
parent 633ee85dc2
commit eb81d2fe94
4 changed files with 34 additions and 21 deletions
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12
PWire.cc
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999-2010 Stephen Williams (steve@icarus.com)
* Copyright (c) 1999-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -58,7 +58,15 @@ bool PWire::set_wire_type(NetNet::Type t)
type_ = t;
return true;
case NetNet::IMPLICIT_REG:
if (t == NetNet::REG) { type_ = t; return true; }
if (t == NetNet::REG) {
type_ = t;
return true;
}
if (t == NetNet::INTEGER) {
type_ = NetNet::REG;
isint_ = true;
return true;
}
return false;
case NetNet::REG:
if (t == NetNet::INTEGER) {

34
parse.y
View File

@ -388,7 +388,7 @@ static list<named_pexpr_t>* make_named_number(perm_string name, PExpr*val =0)
%type <flag> from_exclude
%type <number> number
%type <flag> unsigned_signed_opt signed_unsigned_opt
%type <flag> unsigned_signed_opt signed_unsigned_opt reg_opt
%type <flag> udp_reg_opt edge_operator automatic_opt
%type <drive> drive_strength drive_strength_opt dr_strength0 dr_strength1
%type <letter> udp_input_sym udp_output_sym
@ -4287,30 +4287,32 @@ task_item
;
reg_opt
: K_reg
|
: K_reg { $$ = true; }
| { $$ = false; }
;
task_port_item
: K_input reg_opt unsigned_signed_opt range_opt list_of_identifiers ';'
{ svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINPUT,
IVL_VT_NO_TYPE, $3,
$4, $5,
$2 ? IVL_VT_LOGIC :
IVL_VT_NO_TYPE,
$3, $4, $5,
@1.text, @1.first_line);
$$ = tmp;
}
| K_output reg_opt unsigned_signed_opt range_opt list_of_identifiers ';'
{ svector<PWire*>*tmp = pform_make_task_ports(NetNet::POUTPUT,
IVL_VT_LOGIC, $3,
$4, $5,
$2 ? IVL_VT_LOGIC :
IVL_VT_NO_TYPE,
$3, $4, $5,
@1.text, @1.first_line);
$$ = tmp;
}
| K_inout reg_opt unsigned_signed_opt range_opt list_of_identifiers ';'
{ svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINOUT,
IVL_VT_LOGIC, $3,
$4, $5,
$2 ? IVL_VT_LOGIC :
IVL_VT_NO_TYPE,
$3, $4, $5,
@1.text, @1.first_line);
$$ = tmp;
}
@ -4323,7 +4325,7 @@ task_port_item
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINPUT,
IVL_VT_LOGIC, true,
range_stub, $3,
@1.text, @1.first_line);
@1.text, @1.first_line, true);
$$ = tmp;
}
| K_output K_integer list_of_identifiers ';'
@ -4331,7 +4333,7 @@ task_port_item
svector<PWire*>*tmp = pform_make_task_ports(NetNet::POUTPUT,
IVL_VT_LOGIC, true,
range_stub, $3,
@1.text, @1.first_line);
@1.text, @1.first_line, true);
$$ = tmp;
}
| K_inout K_integer list_of_identifiers ';'
@ -4339,7 +4341,7 @@ task_port_item
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINOUT,
IVL_VT_LOGIC, true,
range_stub, $3,
@1.text, @1.first_line);
@1.text, @1.first_line, true);
$$ = tmp;
}
@ -4472,7 +4474,7 @@ task_port_decl
IVL_VT_LOGIC, true,
range_stub,
list_from_identifier($3),
@1.text, @1.first_line);
@1.text, @1.first_line, true);
$$ = tmp;
}
| K_output K_integer IDENTIFIER
@ -4486,7 +4488,7 @@ task_port_decl
IVL_VT_LOGIC, true,
range_stub,
list_from_identifier($3),
@1.text, @1.first_line);
@1.text, @1.first_line, true);
$$ = tmp;
}
| K_inout K_integer IDENTIFIER
@ -4500,7 +4502,7 @@ task_port_decl
IVL_VT_LOGIC, true,
range_stub,
list_from_identifier($3),
@1.text, @1.first_line);
@1.text, @1.first_line, true);
$$ = tmp;
}

4
pform.cc
View File

@ -2066,7 +2066,8 @@ svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
list<PExpr*>*range,
list<perm_string>*names,
const char* file,
unsigned lineno)
unsigned lineno,
bool isint)
{
assert(names);
svector<PWire*>*res = new svector<PWire*>(0);
@ -2087,6 +2088,7 @@ svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
}
curw->set_signed(signed_flag);
if (isint) assert(curw->set_wire_type(NetNet::INTEGER));
/* If there is a range involved, it needs to be set. */
if (range) {

5
pform.h
View File

@ -1,7 +1,7 @@
#ifndef __pform_H
#define __pform_H
/*
* Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
* Copyright (c) 1998-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -369,7 +369,8 @@ extern svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
list<PExpr*>*range,
list<perm_string>*names,
const char* file,
unsigned lineno);
unsigned lineno,
bool isint = false);
/*