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Remove some uses of the svector template. 

I'm adding more uses of the make_range_from_width function, so
it seems like time to get rid of its use of the svector template.
This thread led to a lot of other uses of svector that had to
also be removed.
This commit is contained in:
Stephen Williams 2010-10-25 19:36:44 -07:00
parent eb4ed82893
commit cced1e771b
22 changed files with 478 additions and 475 deletions
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10
PDelays.cc
View File

@ -55,12 +55,14 @@ void PDelays::set_delay(PExpr*del)
}
void PDelays::set_delays(const svector<PExpr*>*del, bool df)
void PDelays::set_delays(const list<PExpr*>*del, bool df)
{
assert(del);
assert(del->count() <= 3);
for (unsigned idx = 0 ; idx < del->count() ; idx += 1)
delay_[idx] = (*del)[idx];
assert(del->size() <= 3);
list<PExpr*>::const_iterator cur = del->begin();
for (unsigned idx = 0 ; cur != del->end() ; idx += 1, ++cur)
delay_[idx] = *cur;
delete_flag_ = df;
}

3
PDelays.h
View File

@ -21,6 +21,7 @@
# include "svector.h"
# include <string>
# include <list>
# include <iostream>
#ifdef __GNUC__
@ -48,7 +49,7 @@ class PDelays {
this object takes ownership of the expressions, and will
delete it in the destructor. */
void set_delay(PExpr*);
void set_delays(const svector<PExpr*>*del, bool delete_flag=true);
void set_delays(const list<PExpr*>*del, bool delete_flag=true);
unsigned delay_count() const;

32
PExpr.cc
View File

@ -26,6 +26,7 @@
# include "PWire.h"
# include "Module.h"
# include "netmisc.h"
# include "util.h"
# include <typeinfo>
PExpr::PExpr()
@ -161,14 +162,24 @@ PECallFunction::PECallFunction(perm_string n)
}
// NOTE: Anachronism. Try to work all use of svector out.
PECallFunction::PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms)
: path_(n), parms_(vector_from_svector(parms))
PECallFunction::PECallFunction(const pform_name_t&n, const list<PExpr *> &parms)
: path_(n), parms_(parms.size())
{
int tmp_idx = 0;
assert(parms_.size() == parms.size());
for (list<PExpr*>::const_iterator idx = parms.begin()
; idx != parms.end() ; ++idx)
parms_[tmp_idx++] = *idx;
}
PECallFunction::PECallFunction(perm_string n, const svector<PExpr*>&parms)
: path_(pn_from_ps(n)), parms_(vector_from_svector(parms))
PECallFunction::PECallFunction(perm_string n, const list<PExpr*>&parms)
: path_(pn_from_ps(n)), parms_(parms.size())
{
int tmp_idx = 0;
assert(parms_.size() == parms.size());
for (list<PExpr*>::const_iterator idx = parms.begin()
; idx != parms.end() ; ++idx)
parms_[tmp_idx++] = *idx;
}
PECallFunction::~PECallFunction()
@ -191,9 +202,14 @@ bool PECallFunction::has_aa_term(Design*des, NetScope*scope) const
return flag;
}
PEConcat::PEConcat(const svector<PExpr*>&p, PExpr*r)
: parms_(p), tested_widths_(p.count()), repeat_(r)
PEConcat::PEConcat(const list<PExpr*>&p, PExpr*r)
: parms_(p.size()), tested_widths_(p.size()), repeat_(r)
{
int tmp_idx = 0;
assert(parms_.size() == p.size());
for (list<PExpr*>::const_iterator idx = p.begin()
; idx != p.end() ; ++idx)
parms_[tmp_idx++] = *idx;
}
PEConcat::~PEConcat()
@ -203,7 +219,7 @@ PEConcat::~PEConcat()
void PEConcat::declare_implicit_nets(LexicalScope*scope, NetNet::Type type)
{
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
parms_[idx]->declare_implicit_nets(scope, type);
}
}
@ -211,7 +227,7 @@ void PEConcat::declare_implicit_nets(LexicalScope*scope, NetNet::Type type)
bool PEConcat::has_aa_term(Design*des, NetScope*scope) const
{
bool flag = false;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
flag = parms_[idx]->has_aa_term(des, scope) || flag;
}
if (repeat_)

8
PExpr.h
View File

@ -160,7 +160,7 @@ ostream& operator << (ostream&, const PExpr&);
class PEConcat : public PExpr {
public:
PEConcat(const svector<PExpr*>&p, PExpr*r =0);
PEConcat(const list<PExpr*>&p, PExpr*r =0);
~PEConcat();
virtual verinum* eval_const(Design*des, NetScope*sc) const;
@ -187,7 +187,7 @@ class PEConcat : public PExpr {
NetNet* elaborate_lnet_common_(Design*des, NetScope*scope,
bool bidirectional_flag) const;
private:
svector<PExpr*>parms_;
vector<PExpr*>parms_;
std::valarray<unsigned>tested_widths_;
PExpr*repeat_;
@ -661,8 +661,8 @@ class PECallFunction : public PExpr {
explicit PECallFunction(perm_string n);
// svector versions. Should be removed!
explicit PECallFunction(const pform_name_t&n, const svector<PExpr *> &parms);
explicit PECallFunction(perm_string n, const svector<PExpr *> &parms);
explicit PECallFunction(const pform_name_t&n, const list<PExpr *> &parms);
explicit PECallFunction(perm_string n, const list<PExpr *> &parms);
~PECallFunction();

51
PGate.cc
View File

@ -24,29 +24,42 @@
# include "verinum.h"
# include <cassert>
PGate::PGate(perm_string name,
svector<PExpr*>*pins,
const svector<PExpr*>*del)
: name_(name), pins_(pins)
void PGate::set_pins_(list<PExpr*>*pins)
{
assert(pins);
assert(pins->size() == pins_.size());
for (size_t idx = 0 ; idx < pins_.size() ; idx += 1) {
pins_[idx] = pins->front();
pins->pop_front();
}
assert(pins->empty());
delete pins;
}
PGate::PGate(perm_string name, list<PExpr*>*pins, const list<PExpr*>*del)
: name_(name), pins_(pins? pins->size() : 0)
{
if (pins) set_pins_(pins);
if (del) delay_.set_delays(del);
str0_ = IVL_DR_STRONG;
str1_ = IVL_DR_STRONG;
}
PGate::PGate(perm_string name,
svector<PExpr*>*pins,
PExpr*del)
: name_(name), pins_(pins)
PGate::PGate(perm_string name, list<PExpr*>*pins, PExpr*del)
: name_(name), pins_(pins? pins->size() : 0)
{
if (pins) set_pins_(pins);
if (del) delay_.set_delay(del);
str0_ = IVL_DR_STRONG;
str1_ = IVL_DR_STRONG;
}
PGate::PGate(perm_string name, svector<PExpr*>*pins)
: name_(name), pins_(pins)
PGate::PGate(perm_string name, list<PExpr*>*pins)
: name_(name), pins_(pins? pins->size() : 0)
{
if (pins) set_pins_(pins);
str0_ = IVL_DR_STRONG;
str1_ = IVL_DR_STRONG;
}
@ -104,16 +117,16 @@ unsigned PGate::delay_count() const
return delay_.delay_count();
}
PGAssign::PGAssign(svector<PExpr*>*pins)
PGAssign::PGAssign(list<PExpr*>*pins)
: PGate(perm_string(), pins)
{
assert(pins->count() == 2);
assert(pin_count() == 2);
}
PGAssign::PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels)
PGAssign::PGAssign(list<PExpr*>*pins, list<PExpr*>*dels)
: PGate(perm_string(), pins, dels)
{
assert(pins->count() == 2);
assert(pin_count() == 2);
}
PGAssign::~PGAssign()
@ -121,14 +134,14 @@ PGAssign::~PGAssign()
}
PGBuiltin::PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
svector<PExpr*>*del)
list<PExpr*>*pins,
list<PExpr*>*del)
: PGate(name, pins, del), type_(t), msb_(0), lsb_(0)
{
}
PGBuiltin::PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
list<PExpr*>*pins,
PExpr*del)
: PGate(name, pins, del), type_(t), msb_(0), lsb_(0)
{
@ -246,7 +259,7 @@ const char* PGBuiltin::gate_name() const
return "<unknown>";
}
PGModule::PGModule(perm_string type, perm_string name, svector<PExpr*>*pins)
PGModule::PGModule(perm_string type, perm_string name, list<PExpr*>*pins)
: PGate(name, pins), overrides_(0), pins_(0),
npins_(0), parms_(0), nparms_(0), msb_(0), lsb_(0)
{
@ -265,7 +278,7 @@ PGModule::~PGModule()
{
}
void PGModule::set_parameters(svector<PExpr*>*o)
void PGModule::set_parameters(list<PExpr*>*o)
{
assert(overrides_ == 0);
overrides_ = o;

36
PGate.h
View File

@ -26,6 +26,8 @@
# include "PDelays.h"
# include "netlist.h"
# include <map>
# include <list>
# include <vector>
# include <string>
class PExpr;
class PUdp;
@ -48,13 +50,13 @@ class Module;
class PGate : public LineInfo {
public:
explicit PGate(perm_string name, svector<PExpr*>*pins,
const svector<PExpr*>*del);
explicit PGate(perm_string name, list<PExpr*>*pins,
const list<PExpr*>*del);
explicit PGate(perm_string name, svector<PExpr*>*pins,
explicit PGate(perm_string name, list<PExpr*>*pins,
PExpr*del);
explicit PGate(perm_string name, svector<PExpr*>*pins);
explicit PGate(perm_string name, list<PExpr*>*pins);
virtual ~PGate();
@ -70,8 +72,8 @@ class PGate : public LineInfo {
unsigned delay_count() const;
unsigned pin_count() const { return pins_? pins_->count() : 0; }
PExpr*pin(unsigned idx) const { return (*pins_)[idx]; }
unsigned pin_count() const { return pins_.size(); }
PExpr*pin(unsigned idx) const { return pins_[idx]; }
ivl_drive_t strength0() const;
ivl_drive_t strength1() const;
@ -87,7 +89,7 @@ class PGate : public LineInfo {
virtual bool elaborate_sig(Design*des, NetScope*scope) const;
protected:
const svector<PExpr*>& get_pins() const { return *pins_; }
const vector<PExpr*>& get_pins() const { return pins_; }
void dump_pins(ostream&out) const;
void dump_delays(ostream&out) const;
@ -95,10 +97,12 @@ class PGate : public LineInfo {
private:
perm_string name_;
PDelays delay_;
svector<PExpr*>*pins_;
vector<PExpr*>pins_;
ivl_drive_t str0_, str1_;
void set_pins_(list<PExpr*>*pins);
private: // not implemented
PGate(const PGate&);
PGate& operator= (const PGate&);
@ -111,8 +115,8 @@ class PGate : public LineInfo {
class PGAssign : public PGate {
public:
explicit PGAssign(svector<PExpr*>*pins);
explicit PGAssign(svector<PExpr*>*pins, svector<PExpr*>*dels);
explicit PGAssign(list<PExpr*>*pins);
explicit PGAssign(list<PExpr*>*pins, list<PExpr*>*dels);
~PGAssign();
void dump(ostream&out, unsigned ind =4) const;
@ -143,10 +147,10 @@ class PGBuiltin : public PGate {
public:
explicit PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
svector<PExpr*>*del);
list<PExpr*>*pins,
list<PExpr*>*del);
explicit PGBuiltin(Type t, perm_string name,
svector<PExpr*>*pins,
list<PExpr*>*pins,
PExpr*del);
~PGBuiltin();
@ -189,7 +193,7 @@ class PGModule : public PGate {
// If the binding of ports is by position, this constructor
// builds everything all at once.
explicit PGModule(perm_string type, perm_string name,
svector<PExpr*>*pins);
list<PExpr*>*pins);
// If the binding of ports is by name, this constructor takes
// the bindings and stores them for later elaboration.
@ -201,7 +205,7 @@ class PGModule : public PGate {
// Parameter overrides can come as an ordered list, or a set
// of named expressions.
void set_parameters(svector<PExpr*>*o);
void set_parameters(list<PExpr*>*o);
void set_parameters(named<PExpr*>*pa, unsigned npa);
// Modules can be instantiated in ranges. The parser uses this
@ -219,7 +223,7 @@ class PGModule : public PGate {
private:
perm_string type_;
svector<PExpr*>*overrides_;
list<PExpr*>*overrides_;
named<PExpr*>*pins_;
unsigned npins_;

3
PTask.h
View File

@ -24,6 +24,7 @@
# include "svector.h"
# include "StringHeap.h"
# include <string>
# include <list>
class Design;
class NetScope;
class PWire;
@ -44,7 +45,7 @@ enum PTaskFuncEnum {
struct PTaskFuncArg {
PTaskFuncEnum type;
svector<PExpr*>*range;
vector<PExpr*>*range;
};
/*

20
Statement.cc
View File

@ -114,14 +114,26 @@ void PBlock::set_statement(const svector<Statement*>&st)
list_ = st;
}
PCallTask::PCallTask(const pform_name_t&n, const svector<PExpr*>&p)
: path_(n), parms_(p)
PCallTask::PCallTask(const pform_name_t&n, const list<PExpr*>&p)
: path_(n), parms_(p.size())
{
list<PExpr*>::const_iterator cur = p.begin();
for (size_t idx = 0 ; idx < parms_.size() ; idx += 1) {
parms_[idx] = *cur;
++cur;
}
assert(cur == p.end());
}
PCallTask::PCallTask(perm_string n, const svector<PExpr*>&p)
: parms_(p)
PCallTask::PCallTask(perm_string n, const list<PExpr*>&p)
: parms_(p.size())
{
list<PExpr*>::const_iterator cur = p.begin();
for (size_t idx = 0 ; idx < parms_.size() ; idx += 1) {
parms_[idx] = *cur;
++cur;
}
assert(cur == p.end());
path_.push_back(name_component_t(n));
}

15
Statement.h
View File

@ -20,6 +20,7 @@
*/
# include <string>
# include <list>
# include "ivl_target.h"
# include "svector.h"
# include "StringHeap.h"
@ -181,21 +182,21 @@ class PBlock : public PScope, public Statement {
class PCallTask : public Statement {
public:
explicit PCallTask(const pform_name_t&n, const svector<PExpr*>&parms);
explicit PCallTask(perm_string n, const svector<PExpr*>&parms);
explicit PCallTask(const pform_name_t&n, const list<PExpr*>&parms);
explicit PCallTask(perm_string n, const list<PExpr*>&parms);
~PCallTask();
const pform_name_t& path() const;
unsigned nparms() const { return parms_.count(); }
unsigned nparms() const { return parms_.size(); }
PExpr*&parm(unsigned idx)
{ assert(idx < parms_.count());
{ assert(idx < parms_.size());
return parms_[idx];
}
PExpr* parm(unsigned idx) const
{ assert(idx < parms_.count());
{ assert(idx < parms_.size());
return parms_[idx];
}
@ -207,14 +208,14 @@ class PCallTask : public Statement {
NetProc* elaborate_usr(Design*des, NetScope*scope) const;
pform_name_t path_;
svector<PExpr*> parms_;
vector<PExpr*> parms_;
};
class PCase : public Statement {
public:
struct Item {
svector<PExpr*>expr;
list<PExpr*>expr;
Statement*stat;
};

6
elab_expr.cc
View File

@ -1617,7 +1617,7 @@ unsigned PEConcat::test_width(Design*des, NetScope*scope,
expr_type_ = IVL_VT_LOGIC;
unsigned count_width = 0;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
tested_widths_[idx] = parms_[idx]->test_width(des, scope, 0, 0, expr_type__, unsized_flag);
count_width += tested_widths_[idx];
}
@ -1730,10 +1730,10 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope,
unsigned wid_sum = 0;
unsigned parm_cnt = 0;
svector<NetExpr*> parms(parms_.count());
svector<NetExpr*> parms(parms_.size());
/* Elaborate all the parameters and attach them to the concat node. */
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
if (parms_[idx] == 0) {
cerr << get_fileline() << ": error: Missing expression "
<< (idx+1) << " of concatenation list." << endl;

2
elab_lval.cc
View File

@ -107,7 +107,7 @@ NetAssign_* PEConcat::elaborate_lval(Design*des,
NetAssign_*res = 0;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
if (parms_[idx] == 0) {
cerr << get_fileline() << ": error: Empty expressions "

2
elab_net.cc
View File

@ -41,7 +41,7 @@ NetNet* PEConcat::elaborate_lnet_common_(Design*des, NetScope*scope,
{
assert(scope);
svector<NetNet*>nets (parms_.count());
svector<NetNet*>nets (parms_.size());
unsigned width = 0;
unsigned errors = 0;

4
elab_pexpr.cc
View File

@ -144,14 +144,14 @@ NetEConcat* PEConcat::elaborate_pexpr(Design*des, NetScope*scope) const
}
/* Make the empty concat expression. */
NetEConcat*tmp = new NetEConcat(parms_.count(), repeat);
NetEConcat*tmp = new NetEConcat(parms_.size(), repeat);
tmp->set_line(*this);
/* Elaborate all the operands and attach them to the concat
node. Use the elaborate_pexpr method instead of the
elaborate_expr method. */
bool fail = false;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 0 ; idx < parms_.size() ; idx += 1) {
assert(parms_[idx]);
NetExpr*ex = parms_[idx]->elaborate_pexpr(des, scope);
if (ex == 0) continue;

10
elab_scope.cc
View File

@ -1321,17 +1321,17 @@ void PGModule::elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*s
assert(parms_ == 0);
list<perm_string>::const_iterator cur
= mod->param_names.begin();
unsigned jdx = 0;
list<PExpr*>::const_iterator jdx = overrides_->begin();
for (;;) {
if (jdx >= overrides_->count())
if (jdx == overrides_->end())
break;
if (cur == mod->param_names.end())
break;
replace[*cur] = (*overrides_)[jdx];
replace[*cur] = *jdx;
jdx += 1;
cur ++;
++ jdx;
++ cur;
}
}

9
elab_sig.cc
View File

@ -468,15 +468,16 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
case PTF_REG:
case PTF_REG_S:
if (return_type_.range) {
probe_expr_width(des, scope, (*return_type_.range)[0]);
probe_expr_width(des, scope, (*return_type_.range)[1]);
ivl_assert(*this, return_type_.range->size() == 2);
probe_expr_width(des, scope, return_type_.range->at(0));
probe_expr_width(des, scope, return_type_.range->at(1));
need_constant_expr = true;
NetExpr*me = elab_and_eval(des, scope,
(*return_type_.range)[0], -1);
return_type_.range->at(0), -1);
assert(me);
NetExpr*le = elab_and_eval(des, scope,
(*return_type_.range)[1], -1);
return_type_.range->at(1), -1);
assert(le);
need_constant_expr = false;

26
elaborate.cc
View File

@ -1105,7 +1105,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
// order of the declaration. If the source instantiation uses
// bind by order, this is the same as the source list. Otherwise,
// the source list is rearranged by name binding into this list.
svector<PExpr*>pins (rmod->port_count());
vector<PExpr*>pins (rmod->port_count());
// If the instance has a pins_ member, then we know we are
// binding by name. Therefore, make up a pins array that
@ -1204,7 +1204,7 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
// to a concatenation, or connected to an internally
// unconnected port.
for (unsigned idx = 0 ; idx < pins.count() ; idx += 1) {
for (unsigned idx = 0 ; idx < pins.size() ; idx += 1) {
// Skip unconnected module ports. This happens when a
// null parameter is passed in.
@ -1748,7 +1748,7 @@ void PGModule::elaborate_udp_(Design*des, PUdp*udp, NetScope*scope) const
module or primitive, it interprets them as parameter
overrides. Correct that misconception here. */
if (overrides_) {
if (overrides_->count() > 2) {
if (overrides_->size() > 2) {
cerr << get_fileline() << ": error: UDPs take at most two "
"delay arguments." << endl;
des->errors += 1;
@ -1782,7 +1782,7 @@ void PGModule::elaborate_udp_(Design*des, PUdp*udp, NetScope*scope) const
// bind by order, this is the same as the source
// list. Otherwise, the source list is rearranged by name
// binding into this list.
svector<PExpr*>pins;
vector<PExpr*>pins;
// Detect binding by name. If I am binding by name, then make
// up a pins array that reflects the positions of the named
@ -1790,7 +1790,7 @@ void PGModule::elaborate_udp_(Design*des, PUdp*udp, NetScope*scope) const
// place, then get the binding from the base class.
if (pins_) {
unsigned nexp = udp->ports.count();
pins = svector<PExpr*>(nexp);
pins = vector<PExpr*>(nexp);
// Scan the bindings, matching them with port names.
for (unsigned idx = 0 ; idx < npins_ ; idx += 1) {
@ -2488,10 +2488,10 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
for (unsigned idx = 0 ; idx < items_->count() ; idx += 1) {
PCase::Item*cur = (*items_)[idx];
if (cur->expr.count() == 0)
if (cur->expr.empty())
icount += 1;
else
icount += cur->expr.count();
icount += cur->expr.size();
}
NetCase*res = new NetCase(type_, expr, icount);
@ -2507,7 +2507,7 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
assert(inum < icount);
PCase::Item*cur = (*items_)[idx];
if (cur->expr.count() == 0) {
if (cur->expr.empty()) {
/* If there are no expressions, then this is the
default case. */
NetProc*st = 0;
@ -2517,17 +2517,19 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
res->set_case(inum, 0, st);
inum += 1;
} else for (unsigned e = 0; e < cur->expr.count(); e += 1) {
} else for (list<PExpr*>::iterator idx_expr = cur->expr.begin()
; idx_expr != cur->expr.end() ; ++idx_expr) {
/* If there are one or more expressions, then
iterate over the guard expressions, elaborating
a separate case for each. (Yes, the statement
will be elaborated again for each.) */
PExpr*cur_expr = *idx_expr;
NetExpr*gu = 0;
NetProc*st = 0;
assert(cur->expr[e]);
probe_expr_width(des, scope, cur->expr[e]);
gu = elab_and_eval(des, scope, cur->expr[e], -1);
assert(cur_expr);
probe_expr_width(des, scope, cur_expr);
gu = elab_and_eval(des, scope, cur_expr, -1);
if (cur->stat)
st = cur->stat->elaborate(des, scope);

2
eval.cc
View File

@ -147,7 +147,7 @@ verinum* PEConcat::eval_const(Design*des, NetScope*scope) const
if (accum == 0)
return 0;
for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 1 ; idx < parms_.size() ; idx += 1) {
verinum*tmp = parms_[idx]->eval_const(des, scope);
if (tmp == 0) {

517
parse.y
View File

@ -38,7 +38,7 @@ extern void lex_end_table();
bool have_timeunit_decl = false;
bool have_timeprec_decl = false;
static svector<PExpr*>* param_active_range = 0;
static list<PExpr*>* param_active_range = 0;
static bool param_active_signed = false;
static ivl_variable_type_t param_active_type = IVL_VT_LOGIC;
@ -48,7 +48,7 @@ static struct {
NetNet::PortType port_type;
ivl_variable_type_t var_type;
bool sign_flag;
svector<PExpr*>* range;
list<PExpr*>* range;
} port_declaration_context = {NetNet::NONE, NetNet::NOT_A_PORT,
IVL_VT_NO_TYPE, false, 0};
@ -106,16 +106,41 @@ static list<pair<perm_string,PExpr*> >* make_port_list(list<pair<perm_string,
return tmp;
}
static svector<PExpr*>* make_range_from_width(uint64_t wid)
static list<PExpr*>* make_range_from_width(uint64_t wid)
{
svector<PExpr*>*range = new svector<PExpr*>(2);
list<PExpr*>*range = new list<PExpr*>;
(*range)[0] = new PENumber(new verinum(wid-1, integer_width));
(*range)[1] = new PENumber(new verinum((uint64_t)0, integer_width));
range->push_back(new PENumber(new verinum(wid-1, integer_width)));
range->push_back(new PENumber(new verinum((uint64_t)0, integer_width)));
return range;
}
/*
* Make a rqange vector from an existing pair of expressions.
*/
static vector<PExpr*>* make_range_vector(list<PExpr*>*that)
{
assert(that->size() == 2);
vector<PExpr*>*tmp = new vector<PExpr*> (2);
tmp->at(0) = that->front();
tmp->at(1) = that->back();
delete that;
return tmp;
}
/*
* Make a range vector from a width. Generate the msb and lsb
* expressions to get the canonical range for the given width.
*/
static vector<PExpr*>* make_range_vector(uint64_t wid)
{
vector<PExpr*>*tmp = new vector<PExpr*> (2);
tmp->at(0) = new PENumber(new verinum(wid-1, integer_width));
tmp->at(1) = new PENumber(new verinum((uint64_t)0, integer_width));
return tmp;
}
static list<perm_string>* list_from_identifier(char*id)
{
list<perm_string>*tmp = new list<perm_string>;
@ -131,15 +156,12 @@ static list<perm_string>* list_from_identifier(list<perm_string>*tmp, char*id)
return tmp;
}
static svector<PExpr*>* copy_range(svector<PExpr*>* orig)
static list<PExpr*>* copy_range(list<PExpr*>* orig)
{
svector<PExpr*>*copy = 0;
list<PExpr*>*copy = 0;
if (orig) {
copy = new svector<PExpr*>(2);
(*copy)[0] = (*orig)[0];
(*copy)[1] = (*orig)[1];
}
if (orig)
copy = new list<PExpr*> (*orig);
return copy;
}
@ -156,7 +178,7 @@ template <class T> void append(vector<T>&out, const vector<T>&in)
*/
static PECallFunction*make_call_function(perm_string tn, PExpr*arg)
{
svector<PExpr*> parms(1);
vector<PExpr*> parms(1);
parms[0] = arg;
PECallFunction*tmp = new PECallFunction(tn, parms);
return tmp;
@ -164,7 +186,7 @@ static PECallFunction*make_call_function(perm_string tn, PExpr*arg)
static PECallFunction*make_call_function(perm_string tn, PExpr*arg1, PExpr*arg2)
{
svector<PExpr*> parms(2);
vector<PExpr*> parms(2);
parms[0] = arg1;
parms[1] = arg2;
PECallFunction*tmp = new PECallFunction(tn, parms);
@ -229,7 +251,7 @@ static named_number_t* make_named_number(perm_string name, const verinum&val)
struct parmvalue_t*parmvalue;
PExpr*expr;
svector<PExpr*>*exprs;
list<PExpr*>*exprs;
svector<PEEvent*>*event_expr;
@ -769,39 +791,39 @@ defparam_assign_list
delay1
: '#' delay_value_simple
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $2;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($2);
$$ = tmp;
}
| '#' '(' delay_value ')'
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $3;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($3);
$$ = tmp;
}
;
delay3
: '#' delay_value_simple
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $2;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($2);
$$ = tmp;
}
| '#' '(' delay_value ')'
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $3;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($3);
$$ = tmp;
}
| '#' '(' delay_value ',' delay_value ')'
{ svector<PExpr*>*tmp = new svector<PExpr*>(2);
(*tmp)[0] = $3;
(*tmp)[1] = $5;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($3);
tmp->push_back($5);
$$ = tmp;
}
| '#' '(' delay_value ',' delay_value ',' delay_value ')'
{ svector<PExpr*>*tmp = new svector<PExpr*>(3);
(*tmp)[0] = $3;
(*tmp)[1] = $5;
(*tmp)[2] = $7;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($3);
tmp->push_back($5);
tmp->push_back($7);
$$ = tmp;
}
;
@ -812,17 +834,17 @@ delay3_opt
;
delay_value_list
: delay_value
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $1;
$$ = tmp;
}
| delay_value_list ',' delay_value
{ svector<PExpr*>*tmp = new svector<PExpr*>(*$1, $3);
delete $1;
$$ = tmp;
}
;
: delay_value
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($1);
$$ = tmp;
}
| delay_value_list ',' delay_value
{ list<PExpr*>*tmp = $1;
tmp->push_back($3);
$$ = tmp;
}
;
delay_value
: expression
@ -1360,41 +1382,40 @@ expr_mintypmax
expression list, so can be used where nul expressions are not allowed. */
expression_list_with_nuls
: expression_list_with_nuls ',' expression
{ svector<PExpr*>*tmp = new svector<PExpr*>(*$1, $3);
delete $1;
$$ = tmp;
}
| expression
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $1;
$$ = tmp;
}
|
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = 0;
$$ = tmp;
}
| expression_list_with_nuls ','
{ svector<PExpr*>*tmp = new svector<PExpr*>(*$1, 0);
delete $1;
$$ = tmp;
}
: expression_list_with_nuls ',' expression
{ list<PExpr*>*tmp = $1;
tmp->push_back($3);
$$ = tmp;
}
| expression
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($1);
$$ = tmp;
}
|
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back(0);
$$ = tmp;
}
| expression_list_with_nuls ','
{ list<PExpr*>*tmp = $1;
tmp->push_back(0);
$$ = tmp;
}
;
expression_list_proper
: expression_list_proper ',' expression
{ svector<PExpr*>*tmp = new svector<PExpr*>(*$1, $3);
delete $1;
$$ = tmp;
}
| expression
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $1;
$$ = tmp;
}
;
: expression_list_proper ',' expression
{ list<PExpr*>*tmp = $1;
tmp->push_back($3);
$$ = tmp;
}
| expression
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($1);
$$ = tmp;
}
;
expr_primary
: number
@ -1695,11 +1716,12 @@ gate_instance
| IDENTIFIER range '(' expression_list_with_nuls ')'
{ lgate*tmp = new lgate;
svector<PExpr*>*rng = $2;
list<PExpr*>*rng = $2;
tmp->name = $1;
tmp->parms = $4;
tmp->range[0] = (*rng)[0];
tmp->range[1] = (*rng)[1];
tmp->range[0] = rng->front(); rng->pop_front();
tmp->range[1] = rng->front(); rng->pop_front();
assert(rng->empty());
tmp->file = @1.text;
tmp->lineno = @1.first_line;
delete[]$1;
@ -1719,12 +1741,13 @@ gate_instance
| IDENTIFIER range
{ lgate*tmp = new lgate;
svector<PExpr*>*rng = $2;
list<PExpr*>*rng = $2;
tmp->name = $1;
tmp->parms = 0;
tmp->parms_by_name = 0;
tmp->range[0] = (*rng)[0];
tmp->range[1] = (*rng)[1];
tmp->range[0] = rng->front(); rng->pop_front();
tmp->range[1] = rng->front(); rng->pop_front();
assert(rng->empty());
tmp->file = @1.text;
tmp->lineno = @1.first_line;
delete[]$1;
@ -1747,12 +1770,13 @@ gate_instance
| IDENTIFIER range '(' port_name_list ')'
{ lgate*tmp = new lgate;
svector<PExpr*>*rng = $2;
list<PExpr*>*rng = $2;
tmp->name = $1;
tmp->parms = 0;
tmp->parms_by_name = $4;
tmp->range[0] = (*rng)[0];
tmp->range[1] = (*rng)[1];
tmp->range[0] = rng->front(); rng->pop_front();
tmp->range[1] = rng->front(); rng->pop_front();
assert(rng->empty());
tmp->file = @1.text;
tmp->lineno = @1.first_line;
delete[]$1;
@ -2011,7 +2035,7 @@ port_declaration
| attribute_list_opt K_input atom2_type signed_unsigned_opt IDENTIFIER
{ Module::port_t*ptmp;
perm_string name = lex_strings.make($5);
svector<PExpr*>*use_range = make_range_from_width($3);
list<PExpr*>*use_range = make_range_from_width($3);
ptmp = pform_module_port_reference(name, @2.text,
@2.first_line);
pform_module_define_port(@2, name, NetNet::PINPUT,
@ -2105,7 +2129,7 @@ port_declaration
| attribute_list_opt K_output atom2_type signed_unsigned_opt IDENTIFIER
{ Module::port_t*ptmp;
perm_string name = lex_strings.make($5);
svector<PExpr*>*use_range = make_range_from_width($3);
list<PExpr*>*use_range = make_range_from_width($3);
ptmp = pform_module_port_reference(name, @2.text,
@2.first_line);
pform_module_define_port(@2, name, NetNet::POUTPUT,
@ -2186,24 +2210,24 @@ lpvalue
/* Continuous assignments have a list of individual assignments. */
cont_assign
: lpvalue '=' expression
{ svector<PExpr*>*tmp = new svector<PExpr*>(2);
(*tmp)[0] = $1;
(*tmp)[1] = $3;
$$ = tmp;
}
;
: lpvalue '=' expression
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($1);
tmp->push_back($3);
$$ = tmp;
}
;
cont_assign_list
: cont_assign_list ',' cont_assign
{ svector<PExpr*>*tmp = new svector<PExpr*>(*$1, *$3);
delete $1;
delete $3;
$$ = tmp;
}
| cont_assign
{ $$ = $1; }
;
: cont_assign_list ',' cont_assign
{ list<PExpr*>*tmp = $1;
tmp->splice(tmp->end(), *$3);
delete $3;
$$ = tmp;
}
| cont_assign
{ $$ = $1; }
;
/* We allow zero, one or two unique declarations. */
local_timeunit_prec_decl_opt
@ -2876,14 +2900,7 @@ parameter_assign_decl
param_active_type = IVL_VT_LOGIC;
}
| K_integer
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1, integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
/* The default range is [31:0] */
param_active_range = range_stub;
{ param_active_range = make_range_from_width(integer_width);
param_active_signed = true;
param_active_type = IVL_VT_LOGIC;
}
@ -2893,14 +2910,7 @@ parameter_assign_decl
param_active_type = IVL_VT_LOGIC;
}
| K_time
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum((uint64_t)63, integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
/* The range is [63:0] */
param_active_range = range_stub;
{ param_active_range = make_range_from_width(64);
param_active_signed = false;
param_active_type = IVL_VT_LOGIC;
}
@ -3005,14 +3015,7 @@ localparam_assign_decl
param_active_type = IVL_VT_LOGIC;
}
| K_integer
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1, integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
/* The default range is [31:0] */
param_active_range = range_stub;
{ param_active_range = make_range_from_width(integer_width);
param_active_signed = true;
param_active_type = IVL_VT_LOGIC;
}
@ -3022,14 +3025,7 @@ localparam_assign_decl
param_active_type = IVL_VT_LOGIC;
}
| K_time
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum((uint64_t)63, integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
/* The range is [63:0] */
param_active_range = range_stub;
{ param_active_range = make_range_from_width(64);
param_active_signed = false;
param_active_type = IVL_VT_LOGIC;
}
@ -3090,8 +3086,8 @@ parameter_value_opt
FILE_NAME(tmp, @1);
struct parmvalue_t*lst = new struct parmvalue_t;
lst->by_order = new svector<PExpr*>(1);
(*lst->by_order)[0] = tmp;
lst->by_order = new list<PExpr*>;
lst->by_order->push_back(tmp);
lst->by_name = 0;
$$ = lst;
based_size = 0;
@ -3340,13 +3336,13 @@ port_type
;
range
: '[' expression ':' expression ']'
{ svector<PExpr*>*tmp = new svector<PExpr*> (2);
(*tmp)[0] = $2;
(*tmp)[1] = $4;
$$ = tmp;
}
;
: '[' expression ':' expression ']'
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($2);
tmp->push_back($4);
$$ = tmp;
}
;
range_opt
: range
@ -3376,16 +3372,16 @@ dimensions
/* This is used to express the return type of a function. */
function_range_or_type_opt
: range { $$.range = $1; $$.type = PTF_REG; }
| K_signed range { $$.range = $2; $$.type = PTF_REG_S; }
| K_unsigned range { $$.range = $2; $$.type = PTF_REG; }
: range { $$.range = make_range_vector($1); $$.type = PTF_REG; }
| K_signed range { $$.range = make_range_vector($2); $$.type = PTF_REG_S; }
| K_unsigned range { $$.range = make_range_vector($2); $$.type = PTF_REG; }
| K_integer { $$.range = 0; $$.type = PTF_INTEGER; }
| K_real { $$.range = 0; $$.type = PTF_REAL; }
| K_realtime { $$.range = 0; $$.type = PTF_REALTIME; }
| K_time { $$.range = 0; $$.type = PTF_TIME; }
| atom2_type { $$.range = make_range_from_width($1); $$.type = PTF_ATOM2_S; }
| atom2_type K_signed { $$.range = make_range_from_width($1); $$.type = PTF_ATOM2_S; }
| atom2_type K_unsigned { $$.range = make_range_from_width($1); $$.type = PTF_ATOM2; }
| atom2_type { $$.range = make_range_vector($1); $$.type = PTF_ATOM2_S; }
| atom2_type K_signed { $$.range = make_range_vector($1); $$.type = PTF_ATOM2_S; }
| atom2_type K_unsigned { $$.range = make_range_vector($1); $$.type = PTF_ATOM2; }
| { $$.range = 0; $$.type = PTF_REG; }
;
@ -3619,8 +3615,8 @@ specify_edge_path_decl
: specify_edge_path '=' '(' delay_value_list ')'
{ $$ = pform_assign_path_delay($1, $4); }
| specify_edge_path '=' delay_value_simple
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $3;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($3);
$$ = pform_assign_path_delay($1, tmp);
}
;
@ -3656,8 +3652,8 @@ specify_simple_path_decl
: specify_simple_path '=' '(' delay_value_list ')'
{ $$ = pform_assign_path_delay($1, $4); }
| specify_simple_path '=' delay_value_simple
{ svector<PExpr*>*tmp = new svector<PExpr*>(1);
(*tmp)[0] = $3;
{ list<PExpr*>*tmp = new list<PExpr*>;
tmp->push_back($3);
$$ = pform_assign_path_delay($1, tmp);
}
| specify_simple_path '=' '(' error ')'
@ -4044,8 +4040,9 @@ statement
yyerror(@1, "error: Error in while loop condition.");
}
| delay1 statement_or_null
{ PExpr*del = (*$1)[0];
assert($1->count() == 1);
{ PExpr*del = $1->front();
assert($1->size() == 1);
delete $1;
PDelayStatement*tmp = new PDelayStatement(del, $2);
FILE_NAME(tmp, @1);
$$ = tmp;
@ -4096,15 +4093,15 @@ statement
$$ = new PNoop;
}
| lpvalue '=' delay1 expression ';'
{ assert($3->count() == 1);
PExpr*del = (*$3)[0];
{ PExpr*del = $3->front(); $3->pop_front();
assert($3->empty());
PAssign*tmp = new PAssign($1,del,$4);
FILE_NAME(tmp, @1);
$$ = tmp;
}
| lpvalue K_LE delay1 expression ';'
{ assert($3->count() == 1);
PExpr*del = (*$3)[0];
{ PExpr*del = $3->front(); $3->pop_front();
assert($3->empty());
PAssignNB*tmp = new PAssignNB($1,del,$4);
FILE_NAME(tmp, @1);
$$ = tmp;
@ -4146,7 +4143,7 @@ statement
$$ = tmp;
}
| SYSTEM_IDENTIFIER ';'
{ svector<PExpr*>pt (0);
{ list<PExpr*>pt;
PCallTask*tmp = new PCallTask(lex_strings.make($1), pt);
FILE_NAME(tmp,@1);
delete[]$1;
@ -4165,14 +4162,14 @@ statement
want it. So accept it explicitly. */
| hierarchy_identifier '(' ')' ';'
{ svector<PExpr*>pt (0);
{ list<PExpr*>pt;
PCallTask*tmp = new PCallTask(*$1, pt);
FILE_NAME(tmp, @1);
delete $1;
$$ = tmp;
}
| hierarchy_identifier ';'
{ svector<PExpr*>pt (0);
{ list<PExpr*>pt;
PCallTask*tmp = new PCallTask(*$1, pt);
FILE_NAME(tmp, @1);
delete $1;
@ -4249,96 +4246,57 @@ task_port_item
/* When the port is an integer, infer a signed vector of the integer
shape. Generate a range ([31:0]) to make it work. */
| K_input K_integer list_of_identifiers ';'
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1,
integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::PINPUT,
| K_input K_integer list_of_identifiers ';'
{ list<PExpr*>*range_stub = make_range_from_width(integer_width);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINPUT,
IVL_VT_LOGIC, true,
range_stub, $3,
@1.text, @1.first_line);
$$ = tmp;
}
| K_output K_integer list_of_identifiers ';'
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1,
integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::POUTPUT,
$$ = tmp;
}
| K_output K_integer list_of_identifiers ';'
{ list<PExpr*>*range_stub = make_range_from_width(integer_width);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::POUTPUT,
IVL_VT_LOGIC, true,
range_stub, $3,
@1.text, @1.first_line);
$$ = tmp;
}
| K_inout K_integer list_of_identifiers ';'
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1,
integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::PINOUT,
$$ = tmp;
}
| K_inout K_integer list_of_identifiers ';'
{ list<PExpr*>*range_stub = make_range_from_width(integer_width);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINOUT,
IVL_VT_LOGIC, true,
range_stub, $3,
@1.text, @1.first_line);
$$ = tmp;
}
$$ = tmp;
}
/* Ports can be time with a width of [63:0] (unsigned). */
| K_input K_time list_of_identifiers ';'
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum((uint64_t)63, integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::PINPUT,
| K_input K_time list_of_identifiers ';'
{ list<PExpr*>*range_stub = make_range_from_width(64);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINPUT,
IVL_VT_LOGIC, false,
range_stub, $3,
@1.text, @1.first_line);
$$ = tmp;
}
| K_output K_time list_of_identifiers ';'
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum((uint64_t)63, integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::POUTPUT,
$$ = tmp;
}
| K_output K_time list_of_identifiers ';'
{ list<PExpr*>*range_stub = make_range_from_width(64);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::POUTPUT,
IVL_VT_LOGIC, false,
range_stub, $3,
@1.text, @1.first_line);
$$ = tmp;
}
| K_inout K_time list_of_identifiers ';'
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum((uint64_t)63, integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::PINOUT,
$$ = tmp;
}
| K_inout K_time list_of_identifiers ';'
{ list<PExpr*>*range_stub = make_range_from_width(64);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINOUT,
IVL_VT_LOGIC, false,
range_stub, $3,
@1.text, @1.first_line);
$$ = tmp;
}
$$ = tmp;
}
/* Ports can be real or realtime. */
@ -4431,74 +4389,53 @@ task_port_decl
/* Ports can be integer with a width of [31:0]. */
| K_input K_integer IDENTIFIER
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1,
integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
port_declaration_context.port_type = NetNet::PINPUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = true;
delete port_declaration_context.range;
port_declaration_context.range = copy_range(range_stub);
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::PINPUT,
| K_input K_integer IDENTIFIER
{ list<PExpr*>*range_stub = make_range_from_width(integer_width);
port_declaration_context.port_type = NetNet::PINPUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = true;
delete port_declaration_context.range;
port_declaration_context.range = copy_range(range_stub);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINPUT,
IVL_VT_LOGIC, true,
range_stub,
list_from_identifier($3),
@1.text, @1.first_line);
$$ = tmp;
}
| K_output K_integer IDENTIFIER
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1,
integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
port_declaration_context.port_type = NetNet::POUTPUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = true;
delete port_declaration_context.range;
port_declaration_context.range = copy_range(range_stub);
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::POUTPUT,
$$ = tmp;
}
| K_output K_integer IDENTIFIER
{ list<PExpr*>*range_stub = make_range_from_width(integer_width);
port_declaration_context.port_type = NetNet::POUTPUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = true;
delete port_declaration_context.range;
port_declaration_context.range = copy_range(range_stub);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::POUTPUT,
IVL_VT_LOGIC, true,
range_stub,
list_from_identifier($3),
@1.text, @1.first_line);
$$ = tmp;
}
| K_inout K_integer IDENTIFIER
{ svector<PExpr*>*range_stub = new svector<PExpr*>(2);
PExpr*re;
re = new PENumber(new verinum(integer_width-1,
integer_width));
(*range_stub)[0] = re;
re = new PENumber(new verinum((uint64_t)0, integer_width));
(*range_stub)[1] = re;
port_declaration_context.port_type = NetNet::PINOUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = true;
delete port_declaration_context.range;
port_declaration_context.range = copy_range(range_stub);
svector<PWire*>*tmp
= pform_make_task_ports(NetNet::PINOUT,
$$ = tmp;
}
| K_inout K_integer IDENTIFIER
{ list<PExpr*>*range_stub = make_range_from_width(integer_width);
port_declaration_context.port_type = NetNet::PINOUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = true;
delete port_declaration_context.range;
port_declaration_context.range = copy_range(range_stub);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::PINOUT,
IVL_VT_LOGIC, true,
range_stub,
list_from_identifier($3),
@1.text, @1.first_line);
$$ = tmp;
}
$$ = tmp;
}
/* Ports can be time with a width of [63:0] (unsigned). */
| K_input K_time IDENTIFIER
{ svector<PExpr*>*range_stub = make_range_from_width(64);
{ list<PExpr*>*range_stub = make_range_from_width(64);
port_declaration_context.port_type = NetNet::PINPUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = false;
@ -4512,7 +4449,7 @@ task_port_decl
$$ = tmp;
}
| K_output K_time IDENTIFIER
{ svector<PExpr*>*range_stub = make_range_from_width(64);
{ list<PExpr*>*range_stub = make_range_from_width(64);
port_declaration_context.port_type = NetNet::POUTPUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = false;
@ -4526,7 +4463,7 @@ task_port_decl
$$ = tmp;
}
| K_inout K_time IDENTIFIER
{ svector<PExpr*>*range_stub = make_range_from_width(64);
{ list<PExpr*>*range_stub = make_range_from_width(64);
port_declaration_context.port_type = NetNet::PINOUT;
port_declaration_context.var_type = IVL_VT_LOGIC;
port_declaration_context.sign_flag = false;
@ -4585,7 +4522,7 @@ task_port_decl
/* Ports can be 2-value atom types. */
| K_input atom2_type signed_unsigned_opt IDENTIFIER
{ svector<PExpr*>*range_stub = make_range_from_width($2);
{ list<PExpr*>*range_stub = make_range_from_width($2);
port_declaration_context.port_type = NetNet::PINPUT;
port_declaration_context.var_type = IVL_VT_BOOL;
port_declaration_context.sign_flag = $3;
@ -4599,21 +4536,21 @@ task_port_decl
}
| K_output atom2_type signed_unsigned_opt IDENTIFIER
{ svector<PExpr*>*range_stub = make_range_from_width($2);
{ list<PExpr*>*range_stub = make_range_from_width($2);
port_declaration_context.port_type = NetNet::POUTPUT;
port_declaration_context.var_type = IVL_VT_BOOL;
port_declaration_context.sign_flag = $3;
delete port_declaration_context.range;
port_declaration_context.range = copy_range(range_stub);
svector<PWire*>*tmp = pform_make_task_ports(NetNet::POUTPUT,
IVL_VT_BOOL, $3,
range_stub, list_from_identifier($4),
@1.text, @1.first_line);
IVL_VT_BOOL, $3,
range_stub, list_from_identifier($4),
@1.text, @1.first_line);
$$ = tmp;
}
| K_inout atom2_type signed_unsigned_opt IDENTIFIER
{ svector<PExpr*>*range_stub = make_range_from_width($2);
{ list<PExpr*>*range_stub = make_range_from_width($2);
port_declaration_context.port_type = NetNet::PINOUT;
port_declaration_context.var_type = IVL_VT_BOOL;
port_declaration_context.sign_flag = $3;

132
pform.cc
View File

@ -939,7 +939,7 @@ void pform_start_generate_nblock(const struct vlltype&li, char*name)
* case schema can only instantiate exactly one item, so the items
* need not have a unique number.
*/
void pform_generate_case_item(const struct vlltype&li, svector<PExpr*>*expr_list)
void pform_generate_case_item(const struct vlltype&li, list<PExpr*>*expr_list)
{
assert(pform_cur_generate);
assert(pform_cur_generate->scheme_type == PGenerate::GS_CASE);
@ -958,9 +958,13 @@ void pform_generate_case_item(const struct vlltype&li, svector<PExpr*>*expr_list
pform_cur_generate->loop_step = 0;
if (expr_list != 0) {
pform_cur_generate->item_test.resize(expr_list->count());
for (unsigned idx = 0 ; idx < expr_list->count() ; idx += 1)
pform_cur_generate->item_test[idx] = expr_list[0][idx];
list<PExpr*>::iterator expr_cur = expr_list->begin();
pform_cur_generate->item_test.resize(expr_list->size());
for (unsigned idx = 0 ; idx < expr_list->size() ; idx += 1) {
pform_cur_generate->item_test[idx] = *expr_cur;
++ expr_cur;
}
assert(expr_cur == expr_list->end());
}
}
@ -1398,7 +1402,7 @@ void pform_make_udp(perm_string name, bool synchronous_flag,
* and the name that I receive only has the tail component.
*/
static void pform_set_net_range(perm_string name,
const svector<PExpr*>*range,
const list<PExpr*>*range,
bool signed_flag,
ivl_variable_type_t dt,
PWSRType rt)
@ -1415,10 +1419,8 @@ static void pform_set_net_range(perm_string name,
cur->set_range(0, 0, rt, true);
} else {
assert(range->count() == 2);
assert((*range)[0]);
assert((*range)[1]);
cur->set_range((*range)[0], (*range)[1], rt, false);
assert(range->size() == 2);
cur->set_range(range->front(), range->back(), rt, false);
}
cur->set_signed(signed_flag);
@ -1427,12 +1429,12 @@ static void pform_set_net_range(perm_string name,
}
void pform_set_net_range(list<perm_string>*names,
svector<PExpr*>*range,
list<PExpr*>*range,
bool signed_flag,
ivl_variable_type_t dt,
PWSRType rt)
{
assert((range == 0) || (range->count() == 2));
assert((range == 0) || (range->size() == 2));
for (list<perm_string>::iterator cur = names->begin()
; cur != names->end()
@ -1484,7 +1486,7 @@ void pform_make_events(list<perm_string>*names, const char*fn, unsigned ln)
*/
void pform_makegate(PGBuiltin::Type type,
struct str_pair_t str,
svector<PExpr*>* delay,
list<PExpr*>* delay,
const lgate&info,
svector<named_pexpr_t*>*attr)
{
@ -1495,8 +1497,9 @@ void pform_makegate(PGBuiltin::Type type,
return;
}
for (unsigned idx = 0 ; idx < info.parms->count() ; idx += 1) {
pform_declare_implicit_nets((*info.parms)[idx]);
for (list<PExpr*>::iterator cur = info.parms->begin()
; cur != info.parms->end() ; ++cur) {
pform_declare_implicit_nets(*cur);
}
perm_string dev_name = lex_strings.make(info.name);
@ -1523,7 +1526,7 @@ void pform_makegate(PGBuiltin::Type type,
void pform_makegates(PGBuiltin::Type type,
struct str_pair_t str,
svector<PExpr*>*delay,
list<PExpr*>*delay,
svector<lgate>*gates,
svector<named_pexpr_t*>*attr)
{
@ -1559,12 +1562,13 @@ void pform_makegates(PGBuiltin::Type type,
static void pform_make_modgate(perm_string type,
perm_string name,
struct parmvalue_t*overrides,
svector<PExpr*>*wires,
list<PExpr*>*wires,
PExpr*msb, PExpr*lsb,
const char*fn, unsigned ln)
{
for (unsigned idx = 0 ; idx < wires->count() ; idx += 1) {
pform_declare_implicit_nets((*wires)[idx]);
for (list<PExpr*>::iterator idx = wires->begin()
; idx != wires->end() ; ++idx) {
pform_declare_implicit_nets(*idx);
}
PGModule*cur = new PGModule(type, name, wires);
@ -1657,9 +1661,9 @@ void pform_make_modgates(perm_string type,
/* If there are no parameters, the parser will be
tricked into thinking it is one empty
parameter. This fixes that. */
if ((cur.parms->count() == 1) && (cur.parms[0][0] == 0)) {
if ((cur.parms->size() == 1) && (cur.parms->front() == 0)) {
delete cur.parms;
cur.parms = new svector<PExpr*>(0);
cur.parms = new list<PExpr*>;
}
pform_make_modgate(type, cur_name, overrides,
cur.parms,
@ -1667,7 +1671,7 @@ void pform_make_modgates(perm_string type,
cur.file, cur.lineno);
} else {
svector<PExpr*>*wires = new svector<PExpr*>(0);
list<PExpr*>*wires = new list<PExpr*>;
pform_make_modgate(type, cur_name, overrides,
wires,
cur.range[0], cur.range[1],
@ -1679,7 +1683,7 @@ void pform_make_modgates(perm_string type,
}
static PGAssign* pform_make_pgassign(PExpr*lval, PExpr*rval,
svector<PExpr*>*del,
list<PExpr*>*del,
struct str_pair_t str)
{
/* Implicit declaration of nets on the LHS of a continuous
@ -1687,9 +1691,9 @@ static PGAssign* pform_make_pgassign(PExpr*lval, PExpr*rval,
if (generation_flag != GN_VER1995)
pform_declare_implicit_nets(lval);
svector<PExpr*>*wires = new svector<PExpr*>(2);
(*wires)[0] = lval;
(*wires)[1] = rval;
list<PExpr*>*wires = new list<PExpr*>;
wires->push_back(lval);
wires->push_back(rval);
PGAssign*cur;
@ -1709,19 +1713,19 @@ static PGAssign* pform_make_pgassign(PExpr*lval, PExpr*rval,
return cur;
}
void pform_make_pgassign_list(svector<PExpr*>*alist,
svector<PExpr*>*del,
void pform_make_pgassign_list(list<PExpr*>*alist,
list<PExpr*>*del,
struct str_pair_t str,
const char* fn,
unsigned lineno)
{
PGAssign*tmp;
for (unsigned idx = 0 ; idx < alist->count()/2 ; idx += 1) {
tmp = pform_make_pgassign((*alist)[2*idx],
(*alist)[2*idx+1],
del, str);
FILE_NAME(tmp, fn, lineno);
}
assert(alist->size() % 2 == 0);
while (! alist->empty()) {
PExpr*lval = alist->front(); alist->pop_front();
PExpr*rval = alist->front(); alist->pop_front();
PGAssign*tmp = pform_make_pgassign(lval, rval, del, str);
FILE_NAME(tmp, fn, lineno);
}
}
/*
@ -1783,7 +1787,7 @@ void pform_module_define_port(const struct vlltype&li,
NetNet::Type type,
ivl_variable_type_t data_type,
bool signed_flag,
svector<PExpr*>*range,
list<PExpr*>*range,
svector<named_pexpr_t*>*attr)
{
PWire*cur = pform_get_wire_in_scope(name);
@ -1811,10 +1815,10 @@ void pform_module_define_port(const struct vlltype&li,
true);
} else {
assert(range->count() == 2);
assert((*range)[0]);
assert((*range)[1]);
cur->set_range((*range)[0], (*range)[1],
assert(range->size() == 2);
assert(range->front());
assert(range->back());
cur->set_range(range->front(), range->back(),
(type == NetNet::IMPLICIT) ? SR_PORT : SR_BOTH,
false);
}
@ -1920,7 +1924,7 @@ void pform_makewire(const vlltype&li, perm_string name,
* pform_makewire above.
*/
void pform_makewire(const vlltype&li,
svector<PExpr*>*range,
list<PExpr*>*range,
bool signed_flag,
list<perm_string>*names,
NetNet::Type type,
@ -1948,9 +1952,9 @@ void pform_makewire(const vlltype&li,
* This form makes nets with delays and continuous assignments.
*/
void pform_makewire(const vlltype&li,
svector<PExpr*>*range,
list<PExpr*>*range,
bool signed_flag,
svector<PExpr*>*delay,
list<PExpr*>*delay,
str_pair_t str,
net_decl_assign_t*decls,
NetNet::Type type,
@ -2058,7 +2062,7 @@ void pform_set_port_type(perm_string name, NetNet::PortType pt,
svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
ivl_variable_type_t vtype,
bool signed_flag,
svector<PExpr*>*range,
list<PExpr*>*range,
list<perm_string>*names,
const char* file,
unsigned lineno)
@ -2084,8 +2088,10 @@ svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
curw->set_signed(signed_flag);
/* If there is a range involved, it needs to be set. */
if (range)
curw->set_range((*range)[0], (*range)[1], SR_PORT, false);
if (range) {
assert(range->size() == 2);
curw->set_range(range->front(), range->back(), SR_PORT, false);
}
svector<PWire*>*tmp = new svector<PWire*>(*res, curw);
@ -2166,7 +2172,7 @@ LexicalScope::range_t* pform_parameter_value_range(bool exclude_flag,
void pform_set_parameter(const struct vlltype&loc,
perm_string name, ivl_variable_type_t type,
bool signed_flag, svector<PExpr*>*range, PExpr*expr,
bool signed_flag, list<PExpr*>*range, PExpr*expr,
LexicalScope::range_t*value_range)
{
LexicalScope*scope = lexical_scope;
@ -2201,11 +2207,11 @@ void pform_set_parameter(const struct vlltype&loc,
parm.type = type;
if (range) {
assert(range->count() == 2);
assert((*range)[0]);
assert((*range)[1]);
parm.msb = (*range)[0];
parm.lsb = (*range)[1];
assert(range->size() == 2);
assert(range->front());
assert(range->back());
parm.msb = range->front();
parm.lsb = range->back();
} else {
parm.msb = 0;
parm.lsb = 0;
@ -2219,7 +2225,7 @@ void pform_set_parameter(const struct vlltype&loc,
void pform_set_localparam(const struct vlltype&loc,
perm_string name, ivl_variable_type_t type,
bool signed_flag, svector<PExpr*>*range, PExpr*expr)
bool signed_flag, list<PExpr*>*range, PExpr*expr)
{
LexicalScope*scope = lexical_scope;
@ -2249,11 +2255,11 @@ void pform_set_localparam(const struct vlltype&loc,
parm.type = type;
if (range) {
assert(range->count() == 2);
assert((*range)[0]);
assert((*range)[1]);
parm.msb = (*range)[0];
parm.lsb = (*range)[1];
assert(range->size() == 2);
assert(range->front());
assert(range->back());
parm.msb = range->front();
parm.lsb = range->back();
} else {
parm.msb = 0;
parm.lsb = 0;
@ -2324,16 +2330,18 @@ extern PSpecPath*pform_make_specify_edge_path(const struct vlltype&li,
return tmp;
}
extern PSpecPath* pform_assign_path_delay(PSpecPath*path, svector<PExpr*>*del)
extern PSpecPath* pform_assign_path_delay(PSpecPath*path, list<PExpr*>*del)
{
if (path == 0)
return 0;
assert(path->delays.size() == 0);
path->delays.resize(del->count());
for (unsigned idx = 0 ; idx < path->delays.size() ; idx += 1)
path->delays[idx] = (*del)[idx];
path->delays.resize(del->size());
for (unsigned idx = 0 ; idx < path->delays.size() ; idx += 1) {
path->delays[idx] = del->front();
del->pop_front();
}
delete del;
@ -2350,7 +2358,7 @@ extern void pform_module_specify_path(PSpecPath*obj)
void pform_set_port_type(const struct vlltype&li,
list<perm_string>*names,
svector<PExpr*>*range,
list<PExpr*>*range,
bool signed_flag,
NetNet::PortType pt)
{

34
pform.h
View File

@ -89,7 +89,7 @@ typedef named<PExpr*> named_pexpr_t;
typedef named<verinum> named_number_t;
struct parmvalue_t {
svector<PExpr*>*by_order;
list<PExpr*>*by_order;
svector<named_pexpr_t*>*by_name;
};
@ -105,7 +105,7 @@ struct net_decl_assign_t {
struct enum_type_t {
ivl_variable_type_t base_type;
bool signed_flag;
auto_ptr< svector<PExpr*> > range;
auto_ptr< list<PExpr*> > range;
auto_ptr< list<named_number_t> > names;
};
@ -118,7 +118,7 @@ struct lgate {
}
string name;
svector<PExpr*>*parms;
list<PExpr*>*parms;
svector<named_pexpr_t*>*parms_by_name;
PExpr*range[2];
@ -165,7 +165,7 @@ extern void pform_module_define_port(const struct vlltype&li,
NetNet::Type type,
ivl_variable_type_t data_type,
bool signed_flag,
svector<PExpr*>*range,
list<PExpr*>*range,
svector<named_pexpr_t*>*attr);
extern Module::port_t* pform_module_port_reference(perm_string name,
@ -220,7 +220,7 @@ extern void pform_start_generate_if(const struct vlltype&li, PExpr*test);
extern void pform_start_generate_else(const struct vlltype&li);
extern void pform_start_generate_case(const struct vlltype&lp, PExpr*test);
extern void pform_start_generate_nblock(const struct vlltype&lp, char*name);
extern void pform_generate_case_item(const struct vlltype&lp, svector<PExpr*>*test);
extern void pform_generate_case_item(const struct vlltype&lp, list<PExpr*>*test);
extern void pform_generate_block_name(char*name);
extern void pform_endgenerate();
@ -243,7 +243,7 @@ extern void pform_makewire(const struct vlltype&li, perm_string name,
/* This form handles simple declarations */
extern void pform_makewire(const struct vlltype&li,
svector<PExpr*>*range,
list<PExpr*>*range,
bool signed_flag,
list<perm_string>*names,
NetNet::Type type,
@ -254,9 +254,9 @@ extern void pform_makewire(const struct vlltype&li,
/* This form handles assignment declarations. */
extern void pform_makewire(const struct vlltype&li,
svector<PExpr*>*range,
list<PExpr*>*range,
bool signed_flag,
svector<PExpr*>*delay,
list<PExpr*>*delay,
str_pair_t str,
net_decl_assign_t*assign_list,
NetNet::Type type,
@ -270,14 +270,14 @@ extern void pform_make_reginit(const struct vlltype&li,
it. The second form takes a single name. */
extern void pform_set_port_type(const struct vlltype&li,
list<perm_string>*names,
svector<PExpr*>*range,
list<PExpr*>*range,
bool signed_flag,
NetNet::PortType);
extern void pform_set_port_type(perm_string nm, NetNet::PortType pt,
const char*file, unsigned lineno);
extern void pform_set_net_range(list<perm_string>*names,
svector<PExpr*>*,
list<PExpr*>*,
bool signed_flag,
ivl_variable_type_t,
PWSRType rt = SR_NET);
@ -306,13 +306,13 @@ extern void pform_set_parameter(const struct vlltype&loc,
perm_string name,
ivl_variable_type_t type,
bool signed_flag,
svector<PExpr*>*range,
list<PExpr*>*range,
PExpr*expr, LexicalScope::range_t*value_range);
extern void pform_set_localparam(const struct vlltype&loc,
perm_string name,
ivl_variable_type_t type,
bool signed_flag,
svector<PExpr*>*range,
list<PExpr*>*range,
PExpr*expr);
extern void pform_set_defparam(const pform_name_t&name, PExpr*expr);
@ -329,7 +329,7 @@ extern PSpecPath*pform_make_specify_edge_path(const struct vlltype&li,
list<perm_string>*src, char pol,
bool full_flag, list<perm_string>*dst,
PExpr*data_source_expression);
extern PSpecPath*pform_assign_path_delay(PSpecPath*obj, svector<PExpr*>*delays);
extern PSpecPath*pform_assign_path_delay(PSpecPath*obj, list<PExpr*>*delays);
extern void pform_module_specify_path(PSpecPath*obj);
@ -356,7 +356,7 @@ extern void pform_make_reals(list<perm_string>*names,
*/
extern void pform_makegates(PGBuiltin::Type type,
struct str_pair_t str,
svector<PExpr*>*delay,
list<PExpr*>*delay,
svector<lgate>*gates,
svector<named_pexpr_t*>*attr);
@ -365,8 +365,8 @@ extern void pform_make_modgates(perm_string type,
svector<lgate>*gates);
/* Make a continuous assignment node, with optional bit- or part- select. */
extern void pform_make_pgassign_list(svector<PExpr*>*alist,
svector<PExpr*>*del,
extern void pform_make_pgassign_list(list<PExpr*>*alist,
list<PExpr*>*del,
struct str_pair_t str,
const char* fn, unsigned lineno);
@ -375,7 +375,7 @@ extern void pform_make_pgassign_list(svector<PExpr*>*alist,
extern svector<PWire*>*pform_make_task_ports(NetNet::PortType pt,
ivl_variable_type_t vtype,
bool signed_flag,
svector<PExpr*>*range,
list<PExpr*>*range,
list<perm_string>*names,
const char* file,
unsigned lineno);

29
pform_dump.cc
View File

@ -169,14 +169,14 @@ void PEConcat::dump(ostream&out) const
if (repeat_)
out << "{" << *repeat_;
if (parms_.count() == 0) {
if (parms_.size() == 0) {
out << "{}";
return;
}
out << "{";
if (parms_[0]) out << *parms_[0];
for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 1 ; idx < parms_.size() ; idx += 1) {
out << ", ";
if (parms_[idx]) out << *parms_[idx];
}
@ -478,16 +478,18 @@ void PGModule::dump(ostream&out, unsigned ind) const
out << setw(ind) << "" << type_ << " ";
// If parameters are overridden by order, dump them.
if (overrides_ && overrides_->count() > 0) {
if (overrides_ && overrides_->size() > 0) {
assert(parms_ == 0);
out << "#(";
if ((*overrides_)[0] == 0)
list<PExpr*>::const_iterator idx = overrides_->begin();
if (*idx == 0)
out << "<nil>";
else
out << *((*overrides_)[0]);
for (unsigned idx = 1 ; idx < overrides_->count() ; idx += 1) {
out << "," << *((*overrides_)[idx]);
out << *idx;
for ( ; idx != overrides_->end() ; ++ idx) {
out << "," << *idx;
}
out << ") ";
}
@ -600,12 +602,12 @@ void PCallTask::dump(ostream&out, unsigned ind) const
{
out << setw(ind) << "" << path_;
if (parms_.count() > 0) {
if (parms_.size() > 0) {
out << "(";
if (parms_[0])
out << *parms_[0];
for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
for (unsigned idx = 1 ; idx < parms_.size() ; idx += 1) {
out << ", ";
if (parms_[idx])
out << *parms_[idx];
@ -636,14 +638,15 @@ void PCase::dump(ostream&out, unsigned ind) const
for (unsigned idx = 0 ; idx < items_->count() ; idx += 1) {
PCase::Item*cur = (*items_)[idx];
if (cur->expr.count() == 0) {
if (cur->expr.size() == 0) {
out << setw(ind+2) << "" << "default:";
} else {
out << setw(ind+2) << "" << *cur->expr[0];
list<PExpr*>::iterator idx_exp = cur->expr.begin();
out << setw(ind+2) << "" << *idx_exp;
for(unsigned e = 1 ; e < cur->expr.count() ; e += 1)
out << ", " << *cur->expr[e];
for( ; idx_exp != cur->expr.end() ; ++idx_exp)
out << ", " << *idx_exp;
out << ":";
}

2
util.h
View File

@ -20,6 +20,8 @@
*/
# include <map>
# include <vector>
# include <list>
# include "StringHeap.h"
# include "verinum.h"