1d215998b2
Move the rvalue into NetAssign_ common code.
1999-10-06 05:06:16 +00:00
a7f48c86e2
Relaxed width handling for <= assignment.
1999-10-05 04:02:10 +00:00
efa5222c66
Handle mutual reference of tasks by elaborating
...
task definitions in two passes, like functions.
1999-09-30 21:28:34 +00:00
a64a33e65a
Full case support
1999-09-29 18:36:02 +00:00
900949ab56
Get the bit widths of unary operators that return one bit.
1999-09-28 03:11:29 +00:00
1a21d2fe9d
Support shift operators.
1999-09-23 03:56:57 +00:00
1c41f8ebd2
Move set_width methods into a single file,
...
Add the NetEBLogic class for logic expressions,
Fix error setting with of && in if statements.
1999-09-23 00:21:54 +00:00
349f9ae302
Support parameters that reference other paramters.
1999-09-21 00:13:40 +00:00
3a5e55b229
Elaborate parameters in phases.
1999-09-20 02:21:10 +00:00
dab04c221d
Detect constant lessthen-equal expressions.
1999-09-18 01:53:08 +00:00
4594ac1c2c
elaborate concatenation repeats.
1999-09-16 04:18:15 +00:00
a890724b40
Handle implicit !=0 in if statements.
1999-09-16 00:33:45 +00:00
b04148b754
Elaborate non-blocking assignment to memories.
1999-09-15 01:55:06 +00:00
7a211b9136
Clarify msb/lsb in context of netlist. Properly
...
handle part selects in lval and rval of expressions,
and document where the least significant bit goes
in NetNet objects.
1999-09-13 03:10:59 +00:00
25d6912217
Pad r-values in certain assignments.
1999-09-12 01:16:51 +00:00
1c238f1948
Support ternary and <= operators in vvm.
1999-09-11 04:43:17 +00:00
d6fbc30cd5
Allow assign to not match rvalue width.
1999-09-08 04:05:30 +00:00
555d447180
Generate fake adder code in vvm.
1999-09-04 01:57:15 +00:00
41a1c6bb02
elaborate the binary plus operator.
1999-09-03 04:28:38 +00:00
9f7eb4a935
Handle recursive functions and arbitrary function
...
references to other functions, properly pass
function parameters and save function results.
1999-09-01 20:46:19 +00:00
e69345b9fe
Elaborate and emit to vvm procedural functions.
1999-08-31 22:38:29 +00:00
23acca48ff
elaborate some aspects of functions.
1999-08-25 22:22:41 +00:00
c33b0c2262
Handle scope of parameters.
1999-08-06 04:05:28 +00:00
444c83b19a
set width of procedural r-values when then
...
l-value is a memory word.
1999-08-01 21:48:11 +00:00
e0a988bf7e
Add functions up to elaboration (Ed Carter)
1999-07-31 19:14:47 +00:00
d2f77defe6
move binary operators to derived classes.
1999-07-31 03:16:54 +00:00
93a77a2efd
Elaborate task input ports.
1999-07-24 02:11:19 +00:00
563ec1bb81
Add support for CE input to XNF DFF, and do
...
complete cleanup of replaced design nodes.
1999-07-18 21:17:50 +00:00
7d876f7735
xnfsyn generates DFF objects for XNF output, and
...
properly rewrites the Design netlist in the process.
1999-07-18 05:52:46 +00:00
a5921ceae8
netlist support for ternary operator.
1999-07-17 19:50:59 +00:00
772f38ca1e
Better handling of bit width of + operators.
1999-07-17 18:06:02 +00:00
13cd13d9d5
part select in expressions.
1999-07-17 03:08:31 +00:00
b155202dd2
set_width for NetESubSignal.
1999-07-16 04:33:41 +00:00
3ff6912bdd
Elaborate user defined tasks.
1999-07-03 02:12:51 +00:00
484485e299
Properly terminate signal matching scan.
1999-06-24 05:02:36 +00:00
11b2b1740a
Handle expression widths for EEE and NEE operators,
...
add named blocks and scope handling,
add registers declared in named blocks.
1999-06-24 04:24:18 +00:00
853ad247a1
Elaborate and supprort to vvm the forever
...
and repeat statements.
1999-06-19 21:06:16 +00:00
740c63291a
l-value part select for procedural assignments.
1999-06-13 23:51:16 +00:00
6a823cde59
Unify the NetAssign constructors a bit.
1999-06-13 16:30:06 +00:00
6c03b2ab65
Handle a few more operator bit widths.
1999-06-10 05:33:28 +00:00
1464851e0e
Add support for procedural concatenation expression.
1999-06-09 03:00:05 +00:00
4932dc7c5e
Support non-blocking assignment down to vvm.
1999-06-07 02:23:31 +00:00
7605a7b1f0
Add parse and elaboration of non-blocking assignments,
...
Replace list<PCase::Item*> with an svector version,
Add integer support.
1999-06-06 20:45:38 +00:00
caae00f1fd
Compile time evalutation of constant expressions.
1999-06-03 05:16:25 +00:00
f3a91a10b3
Line information with nets.
1999-06-02 15:38:46 +00:00
982cce6086
Exressions are trees that can duplicate, and not DAGS.
1999-05-30 01:11:46 +00:00
5ef3970714
Handle expression bit widths with non-fatal errors.
1999-05-27 04:13:08 +00:00
f653760559
Line number info with match error message.
1999-05-20 05:07:37 +00:00
10ffaeda90
Redo constant expression detection to happen
...
after parsing.
Parse more operators and expressions.
1999-05-16 05:08:42 +00:00
c677afd8e3
More precise handling of verinum bit lengths.
1999-05-13 04:02:09 +00:00
295306aad5
emit NetAssignMem objects in vvm target.
1999-05-12 04:03:19 +00:00
5de9b7c9f1
Parse and elaborate the concatenate operator
...
in structural contexts, Replace vector<PExpr*>
and list<PExpr*> with svector<PExpr*>, evaluate
constant expressions with parameters, handle
memories as lvalues.
Parse task declarations, integer types.
1999-05-10 00:16:57 +00:00
41f9a84a4b
Handle much more complex event expressions.
1999-05-01 02:57:52 +00:00
09cfbc6240
Core handles subsignal expressions.
1999-04-25 00:44:10 +00:00
5895d3c98d
Add memories to the parse and elaboration phases.
1999-04-19 01:59:36 +00:00
b7f833dd71
Support more operators, especially logical.
1999-03-15 02:43:32 +00:00
13a6f05463
Prevent the duplicate allocation of ESignal objects.
1999-03-01 03:27:53 +00:00
e2a37a8ccd
Add support for module parameters.
1999-02-21 17:01:57 +00:00
30a3953c85
Turn the NetESignal into a NetNode so
...
that it can connect to the netlist.
Implement the case statement.
Convince t-vvm to output code for
the case statement.
1999-02-08 02:49:56 +00:00
8bdd381cdf
Parse and elaborate the Verilog CASE statement.
1999-02-03 04:20:11 +00:00
2c1df3e6f7
Parse more UDP input edge descriptions.
1998-12-18 05:16:25 +00:00
4e2c0036aa
VVM support for small sequential UDP objects.
1998-12-17 23:54:58 +00:00
10b345bd16
Fully elaborate Sequential UDP behavior.
1998-12-14 02:01:34 +00:00
9a73433759
Generate OBUF or IBUF attributes (and the gates
...
to garry them) where a wire is a pad. This involved
figuring out enough of the netlist to know when such
was needed, and to generate new gates and signales
to handle what's missing.
1998-12-07 04:53:16 +00:00
ada45acb0c
Add the nobufz function to eliminate bufz objects,
...
Object links are marked with direction,
constant propagation is more careful will wide links,
Signal folding is aware of attributes, and
the XNF target can dump UDP objects based on LCA
attributes.
1998-12-02 04:37:13 +00:00
e097c999d5
Elaborate UDP devices,
...
Support UDP type attributes, and
pass those attributes to nodes that
are instantiated by elaboration,
Put modules into a map instead of
a simple list.
1998-12-01 00:42:13 +00:00
af8d6fbf01
NetAssign handles lvalues as pin links
...
instead of a signal pointer,
Wire attributes added,
Ability to parse UDP descriptions added,
XNF generates EXT records for signals with
the PAD attribute.
1998-11-23 00:20:22 +00:00
ac71df5257
Add -f flags for generic flag key/values.
1998-11-18 04:25:22 +00:00
4661006e4b
Add the sigfold function that unlinks excess
...
signal nodes, and add the XNF target.
1998-11-16 05:03:52 +00:00
3d6d334f80
Introduce netlist optimizations with the
...
cprop function to do constant propogation.
1998-11-13 06:23:17 +00:00
ebad845fc3
Add procedural while loops,
...
Parse procedural for loops,
Add procedural wait statements,
Add constant nodes,
Add XNOR logic gate,
Make vvm output look a bit prettier.
1998-11-09 18:55:33 +00:00
47a444fb92
Calculate expression widths at elaboration time.
1998-11-07 19:17:10 +00:00
b118634189
Handle procedural conditional, and some
...
of the conditional expressions.
Elaborate signals and identifiers differently,
allowing the netlist to hold signal information.
1998-11-07 17:05:05 +00:00
3fb7a053be
Introduce verilog to CVS.
1998-11-03 23:28:49 +00:00
steve