Relaxed width handling for <= assignment.

This commit is contained in:
steve 1999-10-05 04:02:10 +00:00
parent 35e84f15d4
commit a7f48c86e2
4 changed files with 67 additions and 34 deletions

View File

@ -17,12 +17,13 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: netlist.cc,v 1.72 1999/09/30 21:28:34 steve Exp $"
#ident "$Id: netlist.cc,v 1.73 1999/10/05 04:02:10 steve Exp $"
#endif
# include <cassert>
# include <typeinfo>
# include "netlist.h"
# include "netmisc.h"
ostream& operator<< (ostream&o, NetNet::Type t)
{
@ -405,10 +406,10 @@ NetAssign::~NetAssign()
NetAssignNB::NetAssignNB(const string&n, Design*des, unsigned w, NetExpr*rv)
: NetAssign_(n, w), rval_(rv), bmux_(0)
{
bool flag = rval_->set_width(w);
if (flag == false) {
cerr << rv->get_line() << ": Expression bit width" <<
" conflicts with l-value bit width." << endl;
if (rval_->expr_width() < w) {
cerr << rv->get_line() << ": Expression bit width (" <<
rval_->expr_width() << ") conflicts with l-value "
"bit width (" << w << ")." << endl;
des->errors += 1;
}
}
@ -765,6 +766,29 @@ NetEBAdd::~NetEBAdd()
NetEBBits::NetEBBits(char op, NetExpr*l, NetExpr*r)
: NetEBinary(op, l, r)
{
/* First try to naturally adjust the size of the
expressions to match. */
if (l->expr_width() > r->expr_width())
r->set_width(l->expr_width());
if (r->expr_width() > l->expr_width())
l->set_width(r->expr_width());
if (l->expr_width() < r->expr_width())
r->set_width(l->expr_width());
if (r->expr_width() < l->expr_width())
l->set_width(r->expr_width());
/* If the expressions cannot be matched, pad them to fit. */
if (l->expr_width() > r->expr_width())
right_ = pad_to_width(r, l->expr_width());
if (r->expr_width() > l->expr_width())
left_ = pad_to_width(l, r->expr_width());
assert(left_->expr_width() == right_->expr_width());
expr_width(left_->expr_width());
}
NetEBBits::~NetEBBits()
@ -784,28 +808,6 @@ NetEBComp::~NetEBComp()
NetEBinary::NetEBinary(char op, NetExpr*l, NetExpr*r)
: op_(op), left_(l), right_(r)
{
switch (op_) {
case '^':
case '&':
case '|':
case '%':
case '/':
if (l->expr_width() > r->expr_width())
r->set_width(l->expr_width());
if (r->expr_width() > l->expr_width())
l->set_width(r->expr_width());
if (l->expr_width() < r->expr_width())
r->set_width(l->expr_width());
if (r->expr_width() < l->expr_width())
l->set_width(r->expr_width());
assert(l->expr_width() == r->expr_width());
expr_width(l->expr_width());
break;
}
}
NetEBinary::~NetEBinary()
@ -1682,6 +1684,9 @@ NetNet* Design::find_signal(bool (*func)(const NetNet*))
/*
* $Log: netlist.cc,v $
* Revision 1.73 1999/10/05 04:02:10 steve
* Relaxed width handling for <= assignment.
*
* Revision 1.72 1999/09/30 21:28:34 steve
* Handle mutual reference of tasks by elaborating
* task definitions in two passes, like functions.

View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: set_width.cc,v 1.4 1999/09/29 00:42:51 steve Exp $"
#ident "$Id: set_width.cc,v 1.5 1999/10/05 04:02:10 steve Exp $"
#endif
/*
@ -113,7 +113,8 @@ bool NetEBBits::set_width(unsigned w)
flag = left_->set_width(w) && flag;
flag = right_->set_width(w) && flag;
expr_width(w);
if (flag)
expr_width(w);
return flag;
}
@ -261,6 +262,9 @@ bool NetEUnary::set_width(unsigned w)
/*
* $Log: set_width.cc,v $
* Revision 1.5 1999/10/05 04:02:10 steve
* Relaxed width handling for <= assignment.
*
* Revision 1.4 1999/09/29 00:42:51 steve
* Allow expanding of additive operators.
*

View File

@ -17,7 +17,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: t-vvm.cc,v 1.56 1999/10/01 15:26:28 steve Exp $"
#ident "$Id: t-vvm.cc,v 1.57 1999/10/05 04:02:10 steve Exp $"
#endif
# include <iostream>
@ -917,7 +917,7 @@ void target_vvm::udp(ostream&os, const NetUDP*gate)
void target_vvm::net_assign_nb(ostream&os, const NetAssignNB*net)
{
const string name = mangle(net->name());
unsigned iwid = net->rval()->expr_width();
unsigned iwid = net->pin_count();
os << "class " << name << " : public vvm_event {" << endl;
os << " public:" << endl;
@ -926,8 +926,8 @@ void target_vvm::net_assign_nb(ostream&os, const NetAssignNB*net)
<< iwid << ">&v, unsigned idx)" << endl;
os << " : sim_(s), value_(v), idx_(idx) { }" << endl;
} else {
os << " " << name << "(vvm_simulation*s, const vvm_bitset_t<"
<< iwid << ">&v)" << endl;
os << " " << name << "(vvm_simulation*s, const vvm_bits_t&v)"
<< endl;
os << " : sim_(s), value_(v) { }" << endl;
}
os << " void event_function();" << endl;
@ -1681,6 +1681,9 @@ extern const struct target tgt_vvm = {
};
/*
* $Log: t-vvm.cc,v $
* Revision 1.57 1999/10/05 04:02:10 steve
* Relaxed width handling for <= assignment.
*
* Revision 1.56 1999/10/01 15:26:28 steve
* Add some vvm operators from Eric Aardoom.
*

View File

@ -19,7 +19,7 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT)
#ident "$Id: vvm.h,v 1.12 1999/09/29 18:36:04 steve Exp $"
#ident "$Id: vvm.h,v 1.13 1999/10/05 04:02:10 steve Exp $"
#endif
# include <vector>
@ -126,6 +126,18 @@ template <unsigned WIDTH> class vvm_bitset_t : public vvm_bits_t {
{ for (unsigned idx = 0 ; idx < WIDTH ; idx += 1)
bits_[idx] = Vz;
}
vvm_bitset_t(const vvm_bitset_t<WIDTH>&that)
{ bits_ = that.bits_; }
vvm_bitset_t(const vvm_bits_t&that)
{ unsigned wid = WIDTH;
if (that.get_width() < WIDTH)
wid = that.get_width();
for (unsigned idx = 0 ; idx < wid ; idx += 1)
bits_[idx] = that.get_bit(idx);
for (unsigned idx = wid ; idx < WIDTH ; idx += 1)
bits_[idx] = V0;
}
vvm_bit_t operator[] (unsigned idx) const { return bits_[idx]; }
vvm_bit_t&operator[] (unsigned idx) { return bits_[idx]; }
@ -142,6 +154,12 @@ template <unsigned WIDTH> class vvm_bitset_t : public vvm_bits_t {
return result;
}
vvm_bitset_t<WIDTH>& operator= (const vvm_bitset_t<WIDTH>&that)
{ if (this == &that) return *this;
bits_ = that.bits_;
return *this;
}
private:
vvm_bit_t bits_[WIDTH];
};
@ -282,6 +300,9 @@ template <unsigned WIDTH> class vvm_signal_t : public vvm_monitor_t {
/*
* $Log: vvm.h,v $
* Revision 1.13 1999/10/05 04:02:10 steve
* Relaxed width handling for <= assignment.
*
* Revision 1.12 1999/09/29 18:36:04 steve
* Full case support
*